This introduces YAML bindings documentation for the A31 MIPI CSI-2
controller.
Signed-off-by: Paul Kocialkowski
---
.../media/allwinner,sun6i-a31-mipi-csi2.yaml | 149 ++
1 file changed, 149 insertions(+)
create mode 100644
Documentation/devicetree/bindings/media/allwinner,sun6i-a31-mipi-csi2.yaml
diff --git
a/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-mipi-csi2.yaml
b/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-mipi-csi2.yaml
new file mode 100644
index ..bb05105c45b7
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-mipi-csi2.yaml
@@ -0,0 +1,149 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/media/allwinner,sun6i-a31-mipi-csi2.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Allwinner A31 MIPI CSI-2 Device Tree Bindings
+
+maintainers:
+ - Paul Kocialkowski
+
+properties:
+ compatible:
+oneOf:
+ - const: allwinner,sun6i-a31-mipi-csi2
+ - items:
+ - const: allwinner,sun8i-v3s-mipi-csi2
+ - const: allwinner,sun6i-a31-mipi-csi2
+
+ reg:
+maxItems: 1
+
+ interrupts:
+maxItems: 1
+
+ clocks:
+items:
+ - description: Bus Clock
+ - description: Module Clock
+
+ clock-names:
+items:
+ - const: bus
+ - const: mod
+
+ phys:
+maxItems: 1
+description: MIPI D-PHY
+
+ resets:
+maxItems: 1
+
+ # See ./video-interfaces.txt for details
+ ports:
+type: object
+
+properties:
+ port@0:
+type: object
+description: Input port, connect to a MIPI CSI-2 sensor
+
+properties:
+ reg:
+const: 0
+
+ endpoint:
+type: object
+
+properties:
+ remote-endpoint: true
+
+ data-lanes:
+minItems: 1
+maxItems: 4
+
+required:
+ - data-lanes
+ - remote-endpoint
+
+required:
+ - endpoint
+
+additionalProperties: false
+
+ port@1:
+type: object
+description: Output port, connect to a CSI controller
+
+properties:
+ reg:
+const: 1
+
+ endpoint:
+type: object
+
+properties:
+ remote-endpoint: true
+
+required:
+ - remote-endpoint
+
+required:
+ - endpoint
+
+additionalProperties: false
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - clock-names
+ - resets
+
+additionalProperties: false
+
+examples:
+ - |
+#include
+#include
+#include
+
+mipi_csi2: csi@1cb1000 {
+compatible = "allwinner,sun8i-v3s-mipi-csi2",
+ "allwinner,sun6i-a31-mipi-csi2";
+reg = <0x01cb1000 0x1000>;
+interrupts = ;
+clocks = <&ccu CLK_BUS_CSI>,
+ <&ccu CLK_CSI1_SCLK>;
+clock-names = "bus", "mod";
+resets = <&ccu RST_BUS_CSI>;
+
+phys = <&dphy>;
+
+ports {
+#address-cells = <1>;
+#size-cells = <0>;
+
+mipi_csi2_in: port@0 {
+reg = <0>;
+
+mipi_csi2_in_ov5648: endpoint {
+data-lanes = <1 2 3 4>;
+
+remote-endpoint = <&ov5648_out_mipi_csi2>;
+};
+};
+
+mipi_csi2_out: port@1 {
+reg = <1>;
+
+mipi_csi2_out_csi0: endpoint {
+remote-endpoint = <&csi0_in_mipi_csi2>;
+};
+};
+};
+};
+
+...
--
2.29.2
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