[PATCH] staging: ccree: mark debug_regs[] as static

2018-01-03 Thread Arnd Bergmann 
The global array clashes with an existing symbol of the same name:

drivers/staging/ccree/cc_debugfs.o:(.data+0x0): multiple definition of 
`debug_regs'
drivers/mmc/host/s3cmci.o:(.data+0x70): first defined here

We should fix both, this one addresses the ccree driver by removing
the symbol from the global namespace.

Fixes: 9bdd203b4dc8 ("s3cmci: add debugfs support for examining driver and 
hardware state")
Fixes: b3ec9a6736f2 ("staging: ccree: staging: ccree: replace sysfs by debugfs 
interface")
Signed-off-by: Arnd Bergmann 
---
 drivers/staging/ccree/cc_debugfs.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/staging/ccree/cc_debugfs.c 
b/drivers/staging/ccree/cc_debugfs.c
index 7cd33957fdc6..662fa07af832 100644
--- a/drivers/staging/ccree/cc_debugfs.c
+++ b/drivers/staging/ccree/cc_debugfs.c
@@ -37,7 +37,7 @@ struct cc_debugfs_ctx {
  */
 static struct dentry *cc_debugfs_dir;
 
-struct debugfs_reg32 debug_regs[] = {
+static struct debugfs_reg32 debug_regs[] = {
CC_DEBUG_REG(HOST_SIGNATURE),
CC_DEBUG_REG(HOST_IRR),
CC_DEBUG_REG(HOST_POWER_DOWN_EN),
-- 
2.9.0

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[PATCH] Staging: greybus: audio_codec.h: Change uint32_t to u32

2018-01-03 Thread Sumit Pundir 
This patch fixes the following checkpatch.pl issues:

CHECK: Prefer kernel type 'u32' over 'uint32_t'
+   uint32_t format, rate;

CHECK: Prefer kernel type 'u32' over 'uint32_t'
+  uint32_t *rate, u8 *channels,

CHECK: Prefer kernel type 'u32' over 'uint32_t'
+  uint32_t rate, u8 channels,

Signed-off-by: Sumit Pundir 
---
 drivers/staging/greybus/audio_codec.h | 10 +-
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/staging/greybus/audio_codec.h 
b/drivers/staging/greybus/audio_codec.h
index 161b37c..fd7b893 100644
--- a/drivers/staging/greybus/audio_codec.h
+++ b/drivers/staging/greybus/audio_codec.h
@@ -53,7 +53,7 @@ enum gbaudio_codec_state {
 struct gbaudio_stream_params {
int state;
u8 sig_bits, channels;
-   uint32_t format, rate;
+   u32 format, rate;
 };
 
 struct gbaudio_codec_dai {
@@ -183,12 +183,12 @@ extern int gb_audio_gb_enable_widget(struct gb_connection 
*connection,
 extern int gb_audio_gb_disable_widget(struct gb_connection *connection,
  u8 widget_id);
 extern int gb_audio_gb_get_pcm(struct gb_connection *connection,
-  u16 data_cport, uint32_t *format,
-  uint32_t *rate, u8 *channels,
+  u16 data_cport, u32 *format,
+  u32 *rate, u8 *channels,
   u8 *sig_bits);
 extern int gb_audio_gb_set_pcm(struct gb_connection *connection,
-  u16 data_cport, uint32_t format,
-  uint32_t rate, u8 channels,
+  u16 data_cport, u32 format,
+  u32 rate, u8 channels,
   u8 sig_bits);
 extern int gb_audio_gb_set_tx_data_size(struct gb_connection *connection,
u16 data_cport, u16 size);
-- 
2.7.4

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[PATCH] Staging: greybus: audio_codec.c: Change uint32_t to u32

2018-01-03 Thread Sumit Pundir 
This patch fixes the following checkpatch.pl issue at multiple lines:

CHECK: Prefer kernel type 'u32' over 'uint32_t'
+   uint32_t format, rate;

Signed-off-by: Sumit Pundir 
---
 drivers/staging/greybus/audio_codec.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/staging/greybus/audio_codec.c 
b/drivers/staging/greybus/audio_codec.c
index fdb9e83..d81cdc9 100644
--- a/drivers/staging/greybus/audio_codec.c
+++ b/drivers/staging/greybus/audio_codec.c
@@ -47,7 +47,7 @@ static int gbaudio_module_enable_tx(struct gbaudio_codec_info 
*codec,
int module_state, ret = 0;
u16 data_cport, i2s_port, cportid;
u8 sig_bits, channels;
-   uint32_t format, rate;
+   u32 format, rate;
struct gbaudio_data_connection *data;
struct gbaudio_stream_params *params;
 
@@ -182,7 +182,7 @@ static int gbaudio_module_enable_rx(struct 
gbaudio_codec_info *codec,
int module_state, ret = 0;
u16 data_cport, i2s_port, cportid;
u8 sig_bits, channels;
-   uint32_t format, rate;
+   u32 format, rate;
struct gbaudio_data_connection *data;
struct gbaudio_stream_params *params;
 
@@ -412,7 +412,7 @@ static int gbcodec_hw_params(struct snd_pcm_substream 
*substream,
 {
int ret;
u8 sig_bits, channels;
-   uint32_t format, rate;
+   u32 format, rate;
struct gbaudio_module_info *module;
struct gbaudio_data_connection *data;
struct gb_bundle *bundle;
-- 
2.7.4

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Re: [PATCH] staging: ccree: mark debug_regs[] as static

2018-01-03 Thread Gilad Ben-Yossef 
Hi

On Wed, Jan 3, 2018 at 11:26 AM, Arnd Bergmann  wrote:
> The global array clashes with an existing symbol of the same name:
>
> drivers/staging/ccree/cc_debugfs.o:(.data+0x0): multiple definition of 
> `debug_regs'
> drivers/mmc/host/s3cmci.o:(.data+0x70): first defined here
>
> We should fix both, this one addresses the ccree driver by removing
> the symbol from the global namespace.
>
> Fixes: 9bdd203b4dc8 ("s3cmci: add debugfs support for examining driver and 
> hardware state")
> Fixes: b3ec9a6736f2 ("staging: ccree: staging: ccree: replace sysfs by 
> debugfs interface")
> Signed-off-by: Arnd Bergmann 
> ---
>  drivers/staging/ccree/cc_debugfs.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/staging/ccree/cc_debugfs.c 
> b/drivers/staging/ccree/cc_debugfs.c
> index 7cd33957fdc6..662fa07af832 100644
> --- a/drivers/staging/ccree/cc_debugfs.c
> +++ b/drivers/staging/ccree/cc_debugfs.c
> @@ -37,7 +37,7 @@ struct cc_debugfs_ctx {
>   */
>  static struct dentry *cc_debugfs_dir;
>
> -struct debugfs_reg32 debug_regs[] = {
> +static struct debugfs_reg32 debug_regs[] = {
> CC_DEBUG_REG(HOST_SIGNATURE),
> CC_DEBUG_REG(HOST_IRR),
> CC_DEBUG_REG(HOST_POWER_DOWN_EN),
> --
> 2.9.0
>

Thank you Arnd.

I ran into this issue myself via a sparse check (I did not have s3cmci
compiled in) and was sure I sent a fix for it but now I see I did not.

Acked-by: Gilad Ben-Yossef 

Gilad

-- 
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Chief Coffee Drinker

"If you take a class in large-scale robotics, can you end up in a
situation where the homework eats your dog?"
 -- Jean-Baptiste Queru
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Re: [PATCH] Staging: greybus: audio_codec.h: Change uint32_t to u32

2018-01-03 Thread Johan Hovold 
On Wed, Jan 03, 2018 at 03:07:33PM +0530, Sumit Pundir wrote:
> This patch fixes the following checkpatch.pl issues:
> 
> CHECK: Prefer kernel type 'u32' over 'uint32_t'
> +   uint32_t format, rate;
> 
> CHECK: Prefer kernel type 'u32' over 'uint32_t'
> +  uint32_t *rate, u8 *channels,
> 
> CHECK: Prefer kernel type 'u32' over 'uint32_t'
> +  uint32_t rate, u8 channels,
> 
> Signed-off-by: Sumit Pundir 
> ---
>  drivers/staging/greybus/audio_codec.h | 10 +-
>  1 file changed, 5 insertions(+), 5 deletions(-)

Please fold this in with the changes to audio_codec.c and submit a
single patch for it all.

Thanks,
Johan
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Re: [PATCH 2/8] staging: greybus: audio_codec.c: Fix alignment should match open parenthesis

2018-01-03 Thread Vaibhav Agarwal 
On Fri, Dec 22, 2017 at 4:50 PM, Kamal Heib  wrote:
> Cleanup "Alignment should match open parenthesis" checkpatch.pl errors.
>
> Cc: Vaibhav Agarwal 
> Signed-off-by: Kamal Heib 

Hi Kamal,

Thanks for sharing cleanup patches. Kindly share the complete series
with greybus-dev mailing list as well. You can get more details on
whom to keep in the loop using get_maintainer.pl script.

Other than that, for patch v 2/8 till 8/8:
Acked-by: Vaibhav Agarwal 

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Re: [PATCH] Staging: greybus: audio_codec.c: Change uint32_t to u32

2018-01-03 Thread Vaibhav Agarwal 
On Wed, Jan 3, 2018 at 3:09 PM, Sumit Pundir  wrote:
> This patch fixes the following checkpatch.pl issue at multiple lines:
>
> CHECK: Prefer kernel type 'u32' over 'uint32_t'
> +   uint32_t format, rate;
>
> Signed-off-by: Sumit Pundir 
> ---

Hi Sumit,

Similar patches are already submitted by Kamal. Kindly go thru the
driverdev mailing list to get more details and share another series if
you find anything missing.


--
thanks,
./va
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[PATCH v2 00/27] staging: ccree: fixes and cleanups

2018-01-03 Thread Gilad Ben-Yossef 
The usual combo of code cleanups and fixes.

The highlights are:
- Use SPDX for all driver copyright/license
- Make ccree compliant with crypto API handling of backlog requests
- Make ccree compliant with Crypto API rules of resource alloc/release
- Settle on a single coherent file naming convention (which is why
  the diff looks so big)

Note that there are some fixes in the set that I currently consider
out of scope for stable. I will consider if I can/should roll
separate minimal fix patches for stable after these are taken.

With this set of changes, I've handled anything that I know about
that keeps it from moving out of staging to the best of my understanding
and would like to ask for a review before moving out of staging.

Thanks and happy new year ;-)

Signed-off-by: Gilad Ben-Yossef 

Changes from v1:
- Fixed wrong use of CPP style comments in SPDX include file
  headers as pointed out by Philippe Ombredanne.
- Moved to using SPDX-3.0 style GPL-2.0-only tags
- Rephrased one commit message to better clarify it is a fix
  and not just a cleanup
- Separated two commits which got squashed together unintentionally 
- Rebased on top of latest staging-next

Gilad Ben-Yossef (27):
  staging: ccree: SPDXify driver
  staging: ccree: fold hash defs into queue defs
  staging: ccree: fold reg common defines into driver
  staging: ccree: remove GFP_DMA flag from mem allocs
  staging: ccree: pick alloc mem flags based on req flags
  staging: ccree: copy larval digest from RAM
  staging: ccree: tag debugfs init/exit func properly
  staging: ccree: remove unused leftover field
  staging: ccree: break send_request and fix ret val
  staging: ccree: add backlog processing
  stating: ccree: revert "staging: ccree: fix leak of import() after
init()"
  staging: ccree: failing the suspend is not an error
  staging: ccree: check DMA pool buf !NULL  before free
  staging: ccree: handle end of sg list gracefully
  staging: ccree: use Makefile to include PM code
  staging: ccree: remove unused field
  staging: ccree: use array for double buffer
  staging: ccree: allocate hash bufs inside req ctx
  staging: ccree: do not map bufs in ahash_init
  staging: ccree: fix indentation of func params
  staging: ccree: fold common code into service func
  staging: ccree: put pointer next to var name
  stating: ccree: fix allocation of void sized buf
  staging: ccree: use a consistent file naming convention
  staging: ccree: remove unneeded includes
  staging: ccree: update TODO
  staging: ccree: add missing include

 drivers/staging/ccree/Kconfig|2 +
 drivers/staging/ccree/Makefile   |7 +-
 drivers/staging/ccree/TODO   |2 +-
 drivers/staging/ccree/cc_aead.c  | 2702 +
 drivers/staging/ccree/cc_aead.h  |  109 ++
 drivers/staging/ccree/cc_buffer_mgr.c| 1651 ++
 drivers/staging/ccree/cc_buffer_mgr.h|   74 +
 drivers/staging/ccree/cc_cipher.c| 1167 +
 drivers/staging/ccree/cc_cipher.h|   74 +
 drivers/staging/ccree/cc_crypto_ctx.h|   21 +-
 drivers/staging/ccree/cc_debugfs.c   |   24 +-
 drivers/staging/ccree/cc_debugfs.h   |   17 +-
 drivers/staging/ccree/cc_driver.c|  477 ++
 drivers/staging/ccree/cc_driver.h|  194 +++
 drivers/staging/ccree/cc_fips.c  |  112 ++
 drivers/staging/ccree/cc_fips.h  |   37 +
 drivers/staging/ccree/cc_hash.c  | 2297 +
 drivers/staging/ccree/cc_hash.h  |  114 ++
 drivers/staging/ccree/cc_host_regs.h |  142 ++
 drivers/staging/ccree/cc_hw_queue_defs.h |   32 +-
 drivers/staging/ccree/cc_ivgen.c |  280 +++
 drivers/staging/ccree/cc_ivgen.h |   55 +
 drivers/staging/ccree/cc_kernel_regs.h   |  167 ++
 drivers/staging/ccree/cc_lli_defs.h  |   17 +-
 drivers/staging/ccree/cc_pm.c|  123 ++
 drivers/staging/ccree/cc_pm.h|   57 +
 drivers/staging/ccree/cc_request_mgr.c   |  714 
 drivers/staging/ccree/cc_request_mgr.h   |   51 +
 drivers/staging/ccree/cc_sram_mgr.c  |  107 ++
 drivers/staging/ccree/cc_sram_mgr.h  |   65 +
 drivers/staging/ccree/dx_crys_kernel.h   |  180 --
 drivers/staging/ccree/dx_host.h  |  155 --
 drivers/staging/ccree/dx_reg_common.h|   26 -
 drivers/staging/ccree/hash_defs.h|   36 -
 drivers/staging/ccree/ssi_aead.c | 2720 --
 drivers/staging/ccree/ssi_aead.h |  122 --
 drivers/staging/ccree/ssi_buffer_mgr.c   | 1675 --
 drivers/staging/ccree/ssi_buffer_mgr.h   |   87 -
 drivers/staging/ccree/ssi_cipher.c   | 1182 -
 drivers/staging/ccree/ssi_cipher.h   |   87 -
 drivers/staging/ccree/ssi_driver.c   |  519 --
 drivers/staging/ccree/ssi_driver.h   |  201 ---
 drivers/staging/ccree/ssi_fips.c |  125 --
 drivers/staging/ccree/ssi_fips.h |   50 -
 drivers/staging/ccree/ssi_hash.c

[PATCH v2 01/27] staging: ccree: SPDXify driver

2018-01-03 Thread Gilad Ben-Yossef 
Replace verbatim GPL v2 copy with SPDX tag.

Signed-off-by: Gilad Ben-Yossef 
---
 drivers/staging/ccree/Kconfig|  2 ++
 drivers/staging/ccree/Makefile   |  2 ++
 drivers/staging/ccree/cc_crypto_ctx.h| 17 ++---
 drivers/staging/ccree/cc_debugfs.c   | 17 ++---
 drivers/staging/ccree/cc_debugfs.h   | 17 ++---
 drivers/staging/ccree/cc_hw_queue_defs.h | 17 ++---
 drivers/staging/ccree/cc_lli_defs.h  | 17 ++---
 drivers/staging/ccree/dx_crys_kernel.h   | 17 ++---
 drivers/staging/ccree/dx_host.h  | 17 ++---
 drivers/staging/ccree/dx_reg_common.h| 17 ++---
 drivers/staging/ccree/hash_defs.h| 17 ++---
 drivers/staging/ccree/ssi_aead.c | 17 ++---
 drivers/staging/ccree/ssi_aead.h | 17 ++---
 drivers/staging/ccree/ssi_buffer_mgr.c   | 17 ++---
 drivers/staging/ccree/ssi_buffer_mgr.h   | 17 ++---
 drivers/staging/ccree/ssi_cipher.c   | 17 ++---
 drivers/staging/ccree/ssi_cipher.h   | 17 ++---
 drivers/staging/ccree/ssi_driver.c   | 17 ++---
 drivers/staging/ccree/ssi_driver.h   | 17 ++---
 drivers/staging/ccree/ssi_fips.c | 17 ++---
 drivers/staging/ccree/ssi_fips.h | 17 ++---
 drivers/staging/ccree/ssi_hash.c | 17 ++---
 drivers/staging/ccree/ssi_hash.h | 17 ++---
 drivers/staging/ccree/ssi_ivgen.c| 17 ++---
 drivers/staging/ccree/ssi_ivgen.h| 17 ++---
 drivers/staging/ccree/ssi_pm.c   | 17 ++---
 drivers/staging/ccree/ssi_pm.h   | 17 ++---
 drivers/staging/ccree/ssi_request_mgr.c  | 17 ++---
 drivers/staging/ccree/ssi_request_mgr.h  | 17 ++---
 drivers/staging/ccree/ssi_sram_mgr.c | 17 ++---
 drivers/staging/ccree/ssi_sram_mgr.h | 17 ++---
 31 files changed, 62 insertions(+), 435 deletions(-)

diff --git a/drivers/staging/ccree/Kconfig b/drivers/staging/ccree/Kconfig
index 0b3092b..c94dfe8 100644
--- a/drivers/staging/ccree/Kconfig
+++ b/drivers/staging/ccree/Kconfig
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0
+
 config CRYPTO_DEV_CCREE
tristate "Support for ARM TrustZone CryptoCell C7XX family of Crypto 
accelerators"
depends on CRYPTO && CRYPTO_HW && OF && HAS_DMA
diff --git a/drivers/staging/ccree/Makefile b/drivers/staging/ccree/Makefile
index ab9f073..bb47144 100644
--- a/drivers/staging/ccree/Makefile
+++ b/drivers/staging/ccree/Makefile
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0
+
 obj-$(CONFIG_CRYPTO_DEV_CCREE) := ccree.o
 ccree-y := ssi_driver.o ssi_buffer_mgr.o ssi_request_mgr.o ssi_cipher.o 
ssi_hash.o ssi_aead.o ssi_ivgen.o ssi_sram_mgr.o ssi_pm.o
 ccree-$(CONFIG_CRYPTO_FIPS) += ssi_fips.o
diff --git a/drivers/staging/ccree/cc_crypto_ctx.h 
b/drivers/staging/ccree/cc_crypto_ctx.h
index 0e34d9a..1b2698f 100644
--- a/drivers/staging/ccree/cc_crypto_ctx.h
+++ b/drivers/staging/ccree/cc_crypto_ctx.h
@@ -1,18 +1,5 @@
-/*
- * Copyright (C) 2012-2017 ARM Limited or its affiliates.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, see .
- */
+/* SPDX-License-Identifier: GPL-2.0-only */
+/* Copyright (C) 2012-2018 ARM Limited or its affiliates. */
 
 #ifndef _CC_CRYPTO_CTX_H_
 #define _CC_CRYPTO_CTX_H_
diff --git a/drivers/staging/ccree/cc_debugfs.c 
b/drivers/staging/ccree/cc_debugfs.c
index 662fa07..518cefd 100644
--- a/drivers/staging/ccree/cc_debugfs.c
+++ b/drivers/staging/ccree/cc_debugfs.c
@@ -1,18 +1,5 @@
-/*
- * Copyright (C) 2012-2017 ARM Limited or its affiliates.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, see .
- */
+// SPDX-License-Identifier: GPL-2.0-only
+/* Copyright (C) 2012-2018 ARM Limited or its

[PATCH v2 03/27] staging: ccree: fold reg common defines into driver

2018-01-03 Thread Gilad Ben-Yossef 
Fold the 2 macro defined in dx_reg_common.h into the file they
are used in and delete the file.

Signed-off-by: Gilad Ben-Yossef 
---
 drivers/staging/ccree/cc_crypto_ctx.h |  4 ++--
 drivers/staging/ccree/dx_reg_common.h | 13 -
 drivers/staging/ccree/ssi_driver.h|  5 +++--
 3 files changed, 5 insertions(+), 17 deletions(-)
 delete mode 100644 drivers/staging/ccree/dx_reg_common.h

diff --git a/drivers/staging/ccree/cc_crypto_ctx.h 
b/drivers/staging/ccree/cc_crypto_ctx.h
index 1b2698f..88b6e88 100644
--- a/drivers/staging/ccree/cc_crypto_ctx.h
+++ b/drivers/staging/ccree/cc_crypto_ctx.h
@@ -8,7 +8,7 @@
 
 /* context size */
 #ifndef CC_CTX_SIZE_LOG2
-#if (CC_SUPPORT_SHA > 256)
+#if (CC_DEV_SHA_MAX > 256)
 #define CC_CTX_SIZE_LOG2 8
 #else
 #define CC_CTX_SIZE_LOG2 7
@@ -59,7 +59,7 @@
 #define CC_SHA384_BLOCK_SIZE 128
 #define CC_SHA512_BLOCK_SIZE 128
 
-#if (CC_SUPPORT_SHA > 256)
+#if (CC_DEV_SHA_MAX > 256)
 #define CC_DIGEST_SIZE_MAX CC_SHA512_DIGEST_SIZE
 #define CC_HASH_BLOCK_SIZE_MAX CC_SHA512_BLOCK_SIZE /*1024b*/
 #else /* Only up to SHA256 */
diff --git a/drivers/staging/ccree/dx_reg_common.h 
b/drivers/staging/ccree/dx_reg_common.h
deleted file mode 100644
index 84184d2..000
--- a/drivers/staging/ccree/dx_reg_common.h
+++ /dev/null
@@ -1,13 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/* Copyright (C) 2012-2018 ARM Limited or its affiliates. */
-
-#ifndef __CC_REG_COMMON_H__
-#define __CC_REG_COMMON_H__
-
-#define CC_DEV_SIGNATURE 0xDCC71200UL
-
-#define CC_HW_VERSION 0xef840015UL
-
-#define CC_DEV_SHA_MAX 512
-
-#endif /*__CC_REG_COMMON_H__*/
diff --git a/drivers/staging/ccree/ssi_driver.h 
b/drivers/staging/ccree/ssi_driver.h
index b978862..3810740 100644
--- a/drivers/staging/ccree/ssi_driver.h
+++ b/drivers/staging/ccree/ssi_driver.h
@@ -27,8 +27,7 @@
 
 /* Registers definitions from shared/hw/ree_include */
 #include "dx_host.h"
-#include "dx_reg_common.h"
-#define CC_SUPPORT_SHA CC_DEV_SHA_MAX
+#define CC_DEV_SHA_MAX 512
 #include "cc_crypto_ctx.h"
 #include "cc_hw_queue_defs.h"
 #include "ssi_sram_mgr.h"
@@ -44,6 +43,8 @@ extern bool cc_dump_bytes;
 /* Maximum DMA mask supported by IP */
 #define DMA_BIT_MASK_LEN 48
 
+#define CC_DEV_SIGNATURE 0xDCC71200UL
+
 #define CC_AXI_IRQ_MASK ((1 << CC_AXIM_CFG_BRESPMASK_BIT_SHIFT) | \
  (1 << CC_AXIM_CFG_RRESPMASK_BIT_SHIFT) | \
  (1 << CC_AXIM_CFG_INFLTMASK_BIT_SHIFT) | \
-- 
2.7.4

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[PATCH v2 02/27] staging: ccree: fold hash defs into queue defs

2018-01-03 Thread Gilad Ben-Yossef 
Fold the two remaining enum in hash defs into the queue defs
that are using them and delete the hash defs include file.

Signed-off-by: Gilad Ben-Yossef 
---
 drivers/staging/ccree/cc_hw_queue_defs.h | 13 +
 drivers/staging/ccree/hash_defs.h| 23 ---
 drivers/staging/ccree/ssi_driver.h   |  1 -
 3 files changed, 13 insertions(+), 24 deletions(-)
 delete mode 100644 drivers/staging/ccree/hash_defs.h

diff --git a/drivers/staging/ccree/cc_hw_queue_defs.h 
b/drivers/staging/ccree/cc_hw_queue_defs.h
index c06c791..79782976 100644
--- a/drivers/staging/ccree/cc_hw_queue_defs.h
+++ b/drivers/staging/ccree/cc_hw_queue_defs.h
@@ -186,6 +186,19 @@ enum cc_hw_des_key_size {
END_OF_DES_KEYS = S32_MAX,
 };
 
+enum cc_hash_conf_pad {
+   HASH_PADDING_DISABLED = 0,
+   HASH_PADDING_ENABLED = 1,
+   HASH_DIGEST_RESULT_LITTLE_ENDIAN = 2,
+   HASH_CONFIG1_PADDING_RESERVE32 = S32_MAX,
+};
+
+enum cc_hash_cipher_pad {
+   DO_NOT_PAD = 0,
+   DO_PAD = 1,
+   HASH_CIPHER_DO_PADDING_RESERVE32 = S32_MAX,
+};
+
 /*/
 /* Descriptor packing macros */
 /*/
diff --git a/drivers/staging/ccree/hash_defs.h 
b/drivers/staging/ccree/hash_defs.h
deleted file mode 100644
index efe403c..000
--- a/drivers/staging/ccree/hash_defs.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/* Copyright (C) 2012-2018 ARM Limited or its affiliates. */
-
-#ifndef _HASH_DEFS_H_
-#define _HASH_DEFS_H_
-
-#include "cc_crypto_ctx.h"
-
-enum cc_hash_conf_pad {
-   HASH_PADDING_DISABLED = 0,
-   HASH_PADDING_ENABLED = 1,
-   HASH_DIGEST_RESULT_LITTLE_ENDIAN = 2,
-   HASH_CONFIG1_PADDING_RESERVE32 = S32_MAX,
-};
-
-enum cc_hash_cipher_pad {
-   DO_NOT_PAD = 0,
-   DO_PAD = 1,
-   HASH_CIPHER_DO_PADDING_RESERVE32 = S32_MAX,
-};
-
-#endif /*_HASH_DEFS_H_*/
-
diff --git a/drivers/staging/ccree/ssi_driver.h 
b/drivers/staging/ccree/ssi_driver.h
index e0cd7b4..b978862 100644
--- a/drivers/staging/ccree/ssi_driver.h
+++ b/drivers/staging/ccree/ssi_driver.h
@@ -30,7 +30,6 @@
 #include "dx_reg_common.h"
 #define CC_SUPPORT_SHA CC_DEV_SHA_MAX
 #include "cc_crypto_ctx.h"
-#include "hash_defs.h"
 #include "cc_hw_queue_defs.h"
 #include "ssi_sram_mgr.h"
 
-- 
2.7.4

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[PATCH v2 04/27] staging: ccree: remove GFP_DMA flag from mem allocs

2018-01-03 Thread Gilad Ben-Yossef 
Remove bogus GFP_DMA flag from memory allocations. ccree driver
does not operate over an ISA or similar limited bus.

Signed-off-by: Gilad Ben-Yossef 
---
 drivers/staging/ccree/ssi_cipher.c |  2 +-
 drivers/staging/ccree/ssi_hash.c   | 15 ++-
 2 files changed, 7 insertions(+), 10 deletions(-)

diff --git a/drivers/staging/ccree/ssi_cipher.c 
b/drivers/staging/ccree/ssi_cipher.c
index 71d3e79..479186f 100644
--- a/drivers/staging/ccree/ssi_cipher.c
+++ b/drivers/staging/ccree/ssi_cipher.c
@@ -166,7 +166,7 @@ static int cc_cipher_init(struct crypto_tfm *tfm)
ctx_p->drvdata = cc_alg->drvdata;
 
/* Allocate key buffer, cache line aligned */
-   ctx_p->user.key = kmalloc(max_key_buf_size, GFP_KERNEL | GFP_DMA);
+   ctx_p->user.key = kmalloc(max_key_buf_size, GFP_KERNEL);
if (!ctx_p->user.key)
return -ENOMEM;
 
diff --git a/drivers/staging/ccree/ssi_hash.c b/drivers/staging/ccree/ssi_hash.c
index c409dcd..a6702cf 100644
--- a/drivers/staging/ccree/ssi_hash.c
+++ b/drivers/staging/ccree/ssi_hash.c
@@ -132,29 +132,27 @@ static int cc_map_req(struct device *dev, struct 
ahash_req_ctx *state,
struct cc_hw_desc desc;
int rc = -ENOMEM;
 
-   state->buff0 = kzalloc(CC_MAX_HASH_BLCK_SIZE, GFP_KERNEL | GFP_DMA);
+   state->buff0 = kzalloc(CC_MAX_HASH_BLCK_SIZE, GFP_KERNEL);
if (!state->buff0)
goto fail0;
 
-   state->buff1 = kzalloc(CC_MAX_HASH_BLCK_SIZE, GFP_KERNEL | GFP_DMA);
+   state->buff1 = kzalloc(CC_MAX_HASH_BLCK_SIZE, GFP_KERNEL);
if (!state->buff1)
goto fail_buff0;
 
state->digest_result_buff = kzalloc(CC_MAX_HASH_DIGEST_SIZE,
-   GFP_KERNEL | GFP_DMA);
+   GFP_KERNEL);
if (!state->digest_result_buff)
goto fail_buff1;
 
-   state->digest_buff = kzalloc(ctx->inter_digestsize,
-GFP_KERNEL | GFP_DMA);
+   state->digest_buff = kzalloc(ctx->inter_digestsize, GFP_KERNEL);
if (!state->digest_buff)
goto fail_digest_result_buff;
 
dev_dbg(dev, "Allocated digest-buffer in context 
ctx->digest_buff=@%p\n",
state->digest_buff);
if (ctx->hw_mode != DRV_CIPHER_XCBC_MAC) {
-   state->digest_bytes_len = kzalloc(HASH_LEN_SIZE,
- GFP_KERNEL | GFP_DMA);
+   state->digest_bytes_len = kzalloc(HASH_LEN_SIZE, GFP_KERNEL);
if (!state->digest_bytes_len)
goto fail1;
 
@@ -164,8 +162,7 @@ static int cc_map_req(struct device *dev, struct 
ahash_req_ctx *state,
state->digest_bytes_len = NULL;
}
 
-   state->opad_digest_buff = kzalloc(ctx->inter_digestsize,
- GFP_KERNEL | GFP_DMA);
+   state->opad_digest_buff = kzalloc(ctx->inter_digestsize, GFP_KERNEL);
if (!state->opad_digest_buff)
goto fail2;
 
-- 
2.7.4

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[PATCH v2 05/27] staging: ccree: pick alloc mem flags based on req flags

2018-01-03 Thread Gilad Ben-Yossef 
The ccree driver was allocating memory using GFP_KERNEL flag
always, ignoring the flags set in the crypto request. Fix it
by choosing gfp flags based on crypto request flags.

Signed-off-by: Gilad Ben-Yossef 
---
 drivers/staging/ccree/ssi_buffer_mgr.c | 19 +++--
 drivers/staging/ccree/ssi_buffer_mgr.h |  6 ++--
 drivers/staging/ccree/ssi_cipher.c |  8 --
 drivers/staging/ccree/ssi_driver.h |  6 
 drivers/staging/ccree/ssi_hash.c   | 50 --
 5 files changed, 54 insertions(+), 35 deletions(-)

diff --git a/drivers/staging/ccree/ssi_buffer_mgr.c 
b/drivers/staging/ccree/ssi_buffer_mgr.c
index 60fcee4..5e3cff3 100644
--- a/drivers/staging/ccree/ssi_buffer_mgr.c
+++ b/drivers/staging/ccree/ssi_buffer_mgr.c
@@ -217,7 +217,7 @@ static int cc_render_sg_to_mlli(struct device *dev, struct 
scatterlist *sgl,
 }
 
 static int cc_generate_mlli(struct device *dev, struct buffer_array *sg_data,
-   struct mlli_params *mlli_params)
+   struct mlli_params *mlli_params, gfp_t flags)
 {
u32 *mlli_p;
u32 total_nents = 0, prev_total_nents = 0;
@@ -227,7 +227,7 @@ static int cc_generate_mlli(struct device *dev, struct 
buffer_array *sg_data,
 
/* Allocate memory from the pointed pool */
mlli_params->mlli_virt_addr =
-   dma_pool_alloc(mlli_params->curr_pool, GFP_KERNEL,
+   dma_pool_alloc(mlli_params->curr_pool, flags,
   &mlli_params->mlli_dma_addr);
if (!mlli_params->mlli_virt_addr) {
dev_err(dev, "dma_pool_alloc() failed\n");
@@ -483,7 +483,7 @@ void cc_unmap_blkcipher_request(struct device *dev, void 
*ctx,
 int cc_map_blkcipher_request(struct cc_drvdata *drvdata, void *ctx,
 unsigned int ivsize, unsigned int nbytes,
 void *info, struct scatterlist *src,
-struct scatterlist *dst)
+struct scatterlist *dst, gfp_t flags)
 {
struct blkcipher_req_ctx *req_ctx = (struct blkcipher_req_ctx *)ctx;
struct mlli_params *mlli_params = &req_ctx->mlli_params;
@@ -558,7 +558,7 @@ int cc_map_blkcipher_request(struct cc_drvdata *drvdata, 
void *ctx,
 
if (req_ctx->dma_buf_type == CC_DMA_BUF_MLLI) {
mlli_params->curr_pool = buff_mgr->mlli_buffs_pool;
-   rc = cc_generate_mlli(dev, &sg_data, mlli_params);
+   rc = cc_generate_mlli(dev, &sg_data, mlli_params, flags);
if (rc)
goto ablkcipher_exit;
}
@@ -1200,6 +1200,7 @@ int cc_map_aead_request(struct cc_drvdata *drvdata, 
struct aead_request *req)
u32 mapped_nents = 0;
u32 dummy = 0; /*used for the assoc data fragments */
u32 size_to_map = 0;
+   gfp_t flags = cc_gfp_flags(&req->base);
 
mlli_params->curr_pool = NULL;
sg_data.num_of_buffers = 0;
@@ -1366,7 +1367,7 @@ int cc_map_aead_request(struct cc_drvdata *drvdata, 
struct aead_request *req)
if (areq_ctx->assoc_buff_type == CC_DMA_BUF_MLLI ||
areq_ctx->data_buff_type == CC_DMA_BUF_MLLI) {
mlli_params->curr_pool = buff_mgr->mlli_buffs_pool;
-   rc = cc_generate_mlli(dev, &sg_data, mlli_params);
+   rc = cc_generate_mlli(dev, &sg_data, mlli_params, flags);
if (rc)
goto aead_map_failure;
 
@@ -1385,7 +1386,7 @@ int cc_map_aead_request(struct cc_drvdata *drvdata, 
struct aead_request *req)
 
 int cc_map_hash_request_final(struct cc_drvdata *drvdata, void *ctx,
  struct scatterlist *src, unsigned int nbytes,
- bool do_update)
+ bool do_update, gfp_t flags)
 {
struct ahash_req_ctx *areq_ctx = (struct ahash_req_ctx *)ctx;
struct device *dev = drvdata_to_dev(drvdata);
@@ -1445,7 +1446,7 @@ int cc_map_hash_request_final(struct cc_drvdata *drvdata, 
void *ctx,
/* add the src data to the sg_data */
cc_add_sg_entry(dev, &sg_data, areq_ctx->in_nents, src, nbytes,
0, true, &areq_ctx->mlli_nents);
-   if (cc_generate_mlli(dev, &sg_data, mlli_params))
+   if (cc_generate_mlli(dev, &sg_data, mlli_params, flags))
goto fail_unmap_din;
}
/* change the buffer index for the unmap function */
@@ -1466,7 +1467,7 @@ int cc_map_hash_request_final(struct cc_drvdata *drvdata, 
void *ctx,
 
 int cc_map_hash_request_update(struct cc_drvdata *drvdata, void *ctx,
   struct scatterlist *src, unsigned int nbytes,
-  unsigned int block_size)
+  unsigned int block_size, gfp_t flags)
 {
struct ahash_req_ctx *areq_ctx = (struct ahash_req_ctx *)ctx;
struct device *dev = drvdata_to_dev(

[PATCH v2 06/27] staging: ccree: copy larval digest from RAM

2018-01-03 Thread Gilad Ben-Yossef 
The ccree driver was using a DMA operation to copy larval digest
from the ccree SRAM to RAM. Replace it with a simple memcpy.

Signed-off-by: Gilad Ben-Yossef 
---
 drivers/staging/ccree/ssi_driver.c |   2 +
 drivers/staging/ccree/ssi_hash.c   | 121 -
 drivers/staging/ccree/ssi_hash.h   |   2 +
 3 files changed, 68 insertions(+), 57 deletions(-)

diff --git a/drivers/staging/ccree/ssi_driver.c 
b/drivers/staging/ccree/ssi_driver.c
index 9b4c064..64db0c1 100644
--- a/drivers/staging/ccree/ssi_driver.c
+++ b/drivers/staging/ccree/ssi_driver.c
@@ -484,6 +484,8 @@ static int __init ccree_init(void)
 {
int ret;
 
+   cc_hash_global_init();
+
ret = cc_debugfs_global_init();
if (ret)
return ret;
diff --git a/drivers/staging/ccree/ssi_hash.c b/drivers/staging/ccree/ssi_hash.c
index 5324914..06cc5cd 100644
--- a/drivers/staging/ccree/ssi_hash.c
+++ b/drivers/staging/ccree/ssi_hash.c
@@ -41,10 +41,10 @@ static const u32 sha256_init[] = {
 #if (CC_DEV_SHA_MAX > 256)
 static const u32 digest_len_sha512_init[] = {
0x0080, 0x, 0x, 0x };
-static const u64 sha384_init[] = {
+static u64 sha384_init[] = {
SHA384_H7, SHA384_H6, SHA384_H5, SHA384_H4,
SHA384_H3, SHA384_H2, SHA384_H1, SHA384_H0 };
-static const u64 sha512_init[] = {
+static u64 sha512_init[] = {
SHA512_H7, SHA512_H6, SHA512_H5, SHA512_H4,
SHA512_H3, SHA512_H2, SHA512_H1, SHA512_H0 };
 #endif
@@ -55,6 +55,8 @@ static void cc_setup_xcbc(struct ahash_request *areq, struct 
cc_hw_desc desc[],
 static void cc_setup_cmac(struct ahash_request *areq, struct cc_hw_desc desc[],
  unsigned int *seq_size);
 
+static const void *cc_larval_digest(struct device *dev, u32 mode);
+
 struct cc_hash_alg {
struct list_head entry;
int hash_mode;
@@ -126,10 +128,6 @@ static int cc_map_req(struct device *dev, struct 
ahash_req_ctx *state,
  struct cc_hash_ctx *ctx, gfp_t flags)
 {
bool is_hmac = ctx->is_hmac;
-   cc_sram_addr_t larval_digest_addr =
-   cc_larval_digest_addr(ctx->drvdata, ctx->hash_mode);
-   struct cc_crypto_req cc_req = {};
-   struct cc_hw_desc desc;
int rc = -ENOMEM;
 
state->buff0 = kzalloc(CC_MAX_HASH_BLCK_SIZE, flags);
@@ -203,9 +201,6 @@ static int cc_map_req(struct device *dev, struct 
ahash_req_ctx *state,
   HASH_LEN_SIZE);
 #endif
}
-   dma_sync_single_for_device(dev, state->digest_buff_dma_addr,
-  ctx->inter_digestsize,
-  DMA_BIDIRECTIONAL);
 
if (ctx->hash_mode != DRV_HASH_NULL) {
dma_sync_single_for_cpu(dev,
@@ -216,22 +211,15 @@ static int cc_map_req(struct device *dev, struct 
ahash_req_ctx *state,
   ctx->opad_tmp_keys_buff, ctx->inter_digestsize);
}
} else { /*hash*/
-   /* Copy the initial digests if hash flow. The SRAM contains the
-* initial digests in the expected order for all SHA*
-*/
-   hw_desc_init(&desc);
-   set_din_sram(&desc, larval_digest_addr, ctx->inter_digestsize);
-   set_dout_dlli(&desc, state->digest_buff_dma_addr,
- ctx->inter_digestsize, NS_BIT, 0);
-   set_flow_mode(&desc, BYPASS);
+   /* Copy the initial digests if hash flow. */
+   const void *larval = cc_larval_digest(dev, ctx->hash_mode);
 
-   rc = send_request(ctx->drvdata, &cc_req, &desc, 1, 0);
-   if (rc) {
-   dev_err(dev, "send_request() failed (rc=%d)\n", rc);
-   goto fail4;
-   }
+   memcpy(state->digest_buff, larval, ctx->inter_digestsize);
}
 
+   dma_sync_single_for_device(dev, state->digest_buff_dma_addr,
+  ctx->inter_digestsize, DMA_BIDIRECTIONAL);
+
if (ctx->hw_mode != DRV_CIPHER_XCBC_MAC) {
state->digest_bytes_len_dma_addr =
dma_map_single(dev, (void *)state->digest_bytes_len,
@@ -2003,11 +1991,7 @@ int cc_init_hash_sram(struct cc_drvdata *drvdata)
cc_sram_addr_t sram_buff_ofs = hash_handle->digest_len_sram_addr;
unsigned int larval_seq_len = 0;
struct cc_hw_desc larval_seq[CC_DIGEST_SIZE_MAX / sizeof(u32)];
-   struct device *dev = drvdata_to_dev(drvdata);
int rc = 0;
-#if (CC_DEV_SHA_MAX > 256)
-   int i;
-#endif
 
/* Copy-to-sram digest-len */
cc_set_sram_desc(digest_len_init, sram_buff_ofs,
@@ -2074,49 +2058,49 @@ int cc_init_hash_sram(struct cc_drvdata *drvdata)
larval_seq_len = 0;
 
 #if (CC_DEV_SHA_MAX > 256)
-   /* We are forced to swap each double-word larval before copying to
-

[PATCH v2 09/27] staging: ccree: break send_request and fix ret val

2018-01-03 Thread Gilad Ben-Yossef 
The send_request() function was handling both synchronous
and asynchronous invocations, but were not handling
the asynchronous case, which may be called in an atomic
context, properly as it was sleeping.

Start to fix the problem by breaking up the two use
cases to separate functions calling a common internal
service function and return error instead of sleeping
for the asynchronous case.

The next patch will complete the fix by implementing
proper backlog handling.

Fixes: abefd6741d ("staging: ccree: introduce CryptoCell HW driver").
Signed-off-by: Gilad Ben-Yossef 
---
 drivers/staging/ccree/ssi_aead.c|   6 +-
 drivers/staging/ccree/ssi_cipher.c  |   3 +-
 drivers/staging/ccree/ssi_hash.c|  22 ++--
 drivers/staging/ccree/ssi_request_mgr.c | 180 ++--
 drivers/staging/ccree/ssi_request_mgr.h |  11 +-
 5 files changed, 128 insertions(+), 94 deletions(-)

diff --git a/drivers/staging/ccree/ssi_aead.c b/drivers/staging/ccree/ssi_aead.c
index 5276bde..ec50014 100644
--- a/drivers/staging/ccree/ssi_aead.c
+++ b/drivers/staging/ccree/ssi_aead.c
@@ -531,7 +531,7 @@ cc_get_plain_hmac_key(struct crypto_aead *tfm, const u8 
*key,
idx++;
}
 
-   rc = send_request(ctx->drvdata, &cc_req, desc, idx, 0);
+   rc = cc_send_sync_request(ctx->drvdata, &cc_req, desc, idx);
if (rc)
dev_err(dev, "send_request() failed (rc=%d)\n", rc);
 
@@ -630,7 +630,7 @@ cc_aead_setkey(struct crypto_aead *tfm, const u8 *key, 
unsigned int keylen)
/* STAT_PHASE_3: Submit sequence to HW */
 
if (seq_len > 0) { /* For CCM there is no sequence to setup the key */
-   rc = send_request(ctx->drvdata, &cc_req, desc, seq_len, 0);
+   rc = cc_send_sync_request(ctx->drvdata, &cc_req, desc, seq_len);
if (rc) {
dev_err(dev, "send_request() failed (rc=%d)\n", rc);
goto setkey_error;
@@ -2039,7 +2039,7 @@ static int cc_proc_aead(struct aead_request *req,
 
/* STAT_PHASE_3: Lock HW and push sequence */
 
-   rc = send_request(ctx->drvdata, &cc_req, desc, seq_len, 1);
+   rc = cc_send_request(ctx->drvdata, &cc_req, desc, seq_len, &req->base);
 
if (rc != -EINPROGRESS) {
dev_err(dev, "send_request() failed (rc=%d)\n", rc);
diff --git a/drivers/staging/ccree/ssi_cipher.c 
b/drivers/staging/ccree/ssi_cipher.c
index fe8d78d..ad56da7 100644
--- a/drivers/staging/ccree/ssi_cipher.c
+++ b/drivers/staging/ccree/ssi_cipher.c
@@ -717,7 +717,8 @@ static int cc_cipher_process(struct ablkcipher_request *req,
 
/* STAT_PHASE_3: Lock HW and push sequence */
 
-   rc = send_request(ctx_p->drvdata, &cc_req, desc, seq_len, 1);
+   rc = cc_send_request(ctx_p->drvdata, &cc_req, desc, seq_len,
+&req->base);
if (rc != -EINPROGRESS) {
/* Failed to send the request or request completed
 * synchronously
diff --git a/drivers/staging/ccree/ssi_hash.c b/drivers/staging/ccree/ssi_hash.c
index 06cc5cd..21745bb 100644
--- a/drivers/staging/ccree/ssi_hash.c
+++ b/drivers/staging/ccree/ssi_hash.c
@@ -532,7 +532,7 @@ static int cc_hash_digest(struct ahash_request *req)
cc_set_endianity(ctx->hash_mode, &desc[idx]);
idx++;
 
-   rc = send_request(ctx->drvdata, &cc_req, desc, idx, 1);
+   rc = cc_send_request(ctx->drvdata, &cc_req, desc, idx, &req->base);
if (rc != -EINPROGRESS) {
dev_err(dev, "send_request() failed (rc=%d)\n", rc);
cc_unmap_hash_request(dev, state, src, true);
@@ -620,7 +620,7 @@ static int cc_hash_update(struct ahash_request *req)
set_setup_mode(&desc[idx], SETUP_WRITE_STATE1);
idx++;
 
-   rc = send_request(ctx->drvdata, &cc_req, desc, idx, 1);
+   rc = cc_send_request(ctx->drvdata, &cc_req, desc, idx, &req->base);
if (rc != -EINPROGRESS) {
dev_err(dev, "send_request() failed (rc=%d)\n", rc);
cc_unmap_hash_request(dev, state, src, true);
@@ -741,7 +741,7 @@ static int cc_hash_finup(struct ahash_request *req)
set_cipher_mode(&desc[idx], ctx->hw_mode);
idx++;
 
-   rc = send_request(ctx->drvdata, &cc_req, desc, idx, 1);
+   rc = cc_send_request(ctx->drvdata, &cc_req, desc, idx, &req->base);
if (rc != -EINPROGRESS) {
dev_err(dev, "send_request() failed (rc=%d)\n", rc);
cc_unmap_hash_request(dev, state, src, true);
@@ -873,7 +873,7 @@ static int cc_hash_final(struct ahash_request *req)
set_cipher_mode(&desc[idx], ctx->hw_mode);
idx++;
 
-   rc = send_request(ctx->drvdata, &cc_req, desc, idx, 1);
+   rc = cc_send_request(ctx->drvdata, &cc_req, desc, idx, &req->base);
if (rc != -EINPROGRESS) {
dev_err(dev, "send_request() failed (rc=%d)\n", rc);
cc_unmap_hash_request(dev, state, src, true);
@@ -1014,7 +

[PATCH v2 07/27] staging: ccree: tag debugfs init/exit func properly

2018-01-03 Thread Gilad Ben-Yossef 
The debugfs global init and exit functions were missing
__init and __exit tags, potentially wasting memory.
Fix it by properly tagging them.

Signed-off-by: Gilad Ben-Yossef 
---
 drivers/staging/ccree/cc_debugfs.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/staging/ccree/cc_debugfs.c 
b/drivers/staging/ccree/cc_debugfs.c
index 518cefd..128c994 100644
--- a/drivers/staging/ccree/cc_debugfs.c
+++ b/drivers/staging/ccree/cc_debugfs.c
@@ -38,14 +38,14 @@ static struct debugfs_reg32 debug_regs[] = {
CC_DEBUG_REG(AXIM_MON_COMP),
 };
 
-int cc_debugfs_global_init(void)
+int __init cc_debugfs_global_init(void)
 {
cc_debugfs_dir = debugfs_create_dir("ccree", NULL);
 
return !cc_debugfs_dir;
 }
 
-void cc_debugfs_global_fini(void)
+void __exit cc_debugfs_global_fini(void)
 {
debugfs_remove(cc_debugfs_dir);
 }
-- 
2.7.4

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[PATCH v2 08/27] staging: ccree: remove unused leftover field

2018-01-03 Thread Gilad Ben-Yossef 
Remove the unused monitor_desc field.

Signed-off-by: Gilad Ben-Yossef 
---
 drivers/staging/ccree/ssi_request_mgr.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/staging/ccree/ssi_request_mgr.c 
b/drivers/staging/ccree/ssi_request_mgr.c
index ac6846f..18e2e1d 100644
--- a/drivers/staging/ccree/ssi_request_mgr.c
+++ b/drivers/staging/ccree/ssi_request_mgr.c
@@ -32,7 +32,6 @@ struct cc_req_mgr_handle {
struct cc_hw_desc compl_desc;
u8 *dummy_comp_buff;
dma_addr_t dummy_comp_buff_dma;
-   struct cc_hw_desc monitor_desc;
 
 #ifdef COMP_IN_WQ
struct workqueue_struct *workq;
-- 
2.7.4

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[PATCH v2 12/27] staging: ccree: failing the suspend is not an error

2018-01-03 Thread Gilad Ben-Yossef 
PM suspend returning a none zero value is not an error. It simply
indicates a suspend is not advised right now so don't treat it as
an error.

Signed-off-by: Gilad Ben-Yossef 
---
 drivers/staging/ccree/ssi_request_mgr.c | 8 +---
 1 file changed, 1 insertion(+), 7 deletions(-)

diff --git a/drivers/staging/ccree/ssi_request_mgr.c 
b/drivers/staging/ccree/ssi_request_mgr.c
index db3b29f..e99c148 100644
--- a/drivers/staging/ccree/ssi_request_mgr.c
+++ b/drivers/staging/ccree/ssi_request_mgr.c
@@ -598,9 +598,6 @@ static void proc_completions(struct cc_drvdata *drvdata)
drvdata->request_mgr_handle;
unsigned int *tail = &request_mgr_handle->req_queue_tail;
unsigned int *head = &request_mgr_handle->req_queue_head;
-#if defined(CONFIG_PM)
-   int rc = 0;
-#endif
 
while (request_mgr_handle->axi_completed) {
request_mgr_handle->axi_completed--;
@@ -625,10 +622,7 @@ static void proc_completions(struct cc_drvdata *drvdata)
dev_dbg(dev, "Request completed. axi_completed=%d\n",
request_mgr_handle->axi_completed);
 #if defined(CONFIG_PM)
-   rc = cc_pm_put_suspend(dev);
-   if (rc)
-   dev_err(dev, "Failed to set runtime suspension %d\n",
-   rc);
+   cc_pm_put_suspend(dev);
 #endif
}
 }
-- 
2.7.4

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[PATCH v2 10/27] staging: ccree: add backlog processing

2018-01-03 Thread Gilad Ben-Yossef 
Crypto API tfm providers are required to provide a backlog
service, if so indicated, that queues up requests in the case
of the provider being busy and processing them later.

The ccree driver did not provide this facility. Add it now.

Signed-off-by: Gilad Ben-Yossef 
---
 drivers/staging/ccree/ssi_aead.c|  26 +++---
 drivers/staging/ccree/ssi_cipher.c  |  13 ++-
 drivers/staging/ccree/ssi_driver.h  |   2 +-
 drivers/staging/ccree/ssi_hash.c|  28 +++
 drivers/staging/ccree/ssi_request_mgr.c | 136 ++--
 5 files changed, 163 insertions(+), 42 deletions(-)

diff --git a/drivers/staging/ccree/ssi_aead.c b/drivers/staging/ccree/ssi_aead.c
index ec50014..cbe520d 100644
--- a/drivers/staging/ccree/ssi_aead.c
+++ b/drivers/staging/ccree/ssi_aead.c
@@ -211,19 +211,21 @@ static int cc_aead_init(struct crypto_aead *tfm)
return -ENOMEM;
 }
 
-static void cc_aead_complete(struct device *dev, void *cc_req)
+static void cc_aead_complete(struct device *dev, void *cc_req, int err)
 {
struct aead_request *areq = (struct aead_request *)cc_req;
struct aead_req_ctx *areq_ctx = aead_request_ctx(areq);
struct crypto_aead *tfm = crypto_aead_reqtfm(cc_req);
struct cc_aead_ctx *ctx = crypto_aead_ctx(tfm);
-   int err = 0;
 
cc_unmap_aead_request(dev, areq);
 
/* Restore ordinary iv pointer */
areq->iv = areq_ctx->backup_iv;
 
+   if (err)
+   goto done;
+
if (areq_ctx->gen_ctx.op_type == DRV_CRYPTO_DIRECTION_DECRYPT) {
if (memcmp(areq_ctx->mac_buf, areq_ctx->icv_virt_addr,
   ctx->authsize) != 0) {
@@ -258,7 +260,7 @@ static void cc_aead_complete(struct device *dev, void 
*cc_req)
   CCM_BLOCK_IV_OFFSET, CCM_BLOCK_IV_SIZE);
}
}
-
+done:
aead_request_complete(areq, err);
 }
 
@@ -2041,7 +2043,7 @@ static int cc_proc_aead(struct aead_request *req,
 
rc = cc_send_request(ctx->drvdata, &cc_req, desc, seq_len, &req->base);
 
-   if (rc != -EINPROGRESS) {
+   if (rc != -EINPROGRESS && rc != -EBUSY) {
dev_err(dev, "send_request() failed (rc=%d)\n", rc);
cc_unmap_aead_request(dev, req);
}
@@ -2063,7 +2065,7 @@ static int cc_aead_encrypt(struct aead_request *req)
areq_ctx->plaintext_authenticate_only = false;
 
rc = cc_proc_aead(req, DRV_CRYPTO_DIRECTION_ENCRYPT);
-   if (rc != -EINPROGRESS)
+   if (rc != -EINPROGRESS && rc != -EBUSY)
req->iv = areq_ctx->backup_iv;
 
return rc;
@@ -2092,7 +2094,7 @@ static int cc_rfc4309_ccm_encrypt(struct aead_request 
*req)
cc_proc_rfc4309_ccm(req);
 
rc = cc_proc_aead(req, DRV_CRYPTO_DIRECTION_ENCRYPT);
-   if (rc != -EINPROGRESS)
+   if (rc != -EINPROGRESS && rc != -EBUSY)
req->iv = areq_ctx->backup_iv;
 out:
return rc;
@@ -2111,7 +2113,7 @@ static int cc_aead_decrypt(struct aead_request *req)
areq_ctx->plaintext_authenticate_only = false;
 
rc = cc_proc_aead(req, DRV_CRYPTO_DIRECTION_DECRYPT);
-   if (rc != -EINPROGRESS)
+   if (rc != -EINPROGRESS && rc != -EBUSY)
req->iv = areq_ctx->backup_iv;
 
return rc;
@@ -2138,7 +2140,7 @@ static int cc_rfc4309_ccm_decrypt(struct aead_request 
*req)
cc_proc_rfc4309_ccm(req);
 
rc = cc_proc_aead(req, DRV_CRYPTO_DIRECTION_DECRYPT);
-   if (rc != -EINPROGRESS)
+   if (rc != -EINPROGRESS && rc != -EBUSY)
req->iv = areq_ctx->backup_iv;
 
 out:
@@ -2257,7 +2259,7 @@ static int cc_rfc4106_gcm_encrypt(struct aead_request 
*req)
areq_ctx->is_gcm4543 = true;
 
rc = cc_proc_aead(req, DRV_CRYPTO_DIRECTION_ENCRYPT);
-   if (rc != -EINPROGRESS)
+   if (rc != -EINPROGRESS && rc != -EBUSY)
req->iv = areq_ctx->backup_iv;
 out:
return rc;
@@ -2281,7 +2283,7 @@ static int cc_rfc4543_gcm_encrypt(struct aead_request 
*req)
areq_ctx->is_gcm4543 = true;
 
rc = cc_proc_aead(req, DRV_CRYPTO_DIRECTION_ENCRYPT);
-   if (rc != -EINPROGRESS)
+   if (rc != -EINPROGRESS && rc != -EBUSY)
req->iv = areq_ctx->backup_iv;
 
return rc;
@@ -2312,7 +2314,7 @@ static int cc_rfc4106_gcm_decrypt(struct aead_request 
*req)
areq_ctx->is_gcm4543 = true;
 
rc = cc_proc_aead(req, DRV_CRYPTO_DIRECTION_DECRYPT);
-   if (rc != -EINPROGRESS)
+   if (rc != -EINPROGRESS && rc != -EBUSY)
req->iv = areq_ctx->backup_iv;
 out:
return rc;
@@ -2336,7 +2338,7 @@ static int cc_rfc4543_gcm_decrypt(struct aead_request 
*req)
areq_ctx->is_gcm4543 = true;
 
rc = cc_proc_aead(req, DRV_CRYPTO_DIRECTION_DECRYPT);
-   if (rc != -EINPROGRESS)
+   if (rc != -EINPROGRESS && rc != -EBUSY)
req->iv = areq_ctx->backup_iv;
 
return rc;
diff --git a/drivers/stagin

[PATCH v2 14/27] staging: ccree: handle end of sg list gracefully

2018-01-03 Thread Gilad Ben-Yossef 
If we are asked for number of entries of an offset bigger than the
sg list we should not crash.

Cc: sta...@vger.kernel.org
Signed-off-by: Gilad Ben-Yossef 
---
 drivers/staging/ccree/ssi_buffer_mgr.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/staging/ccree/ssi_buffer_mgr.c 
b/drivers/staging/ccree/ssi_buffer_mgr.c
index 13cb062..9e3f557 100644
--- a/drivers/staging/ccree/ssi_buffer_mgr.c
+++ b/drivers/staging/ccree/ssi_buffer_mgr.c
@@ -94,7 +94,7 @@ static unsigned int cc_get_sgl_nents(struct device *dev,
 {
unsigned int nents = 0;
 
-   while (nbytes) {
+   while (nbytes && sg_list) {
if (sg_list->length) {
nents++;
/* get the number of bytes in the last entry */
-- 
2.7.4

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[PATCH v2 13/27] staging: ccree: check DMA pool buf !NULL before free

2018-01-03 Thread Gilad Ben-Yossef 
If we ran out of DMA pool buffers, we get into the unmap
code path with a NULL before. Deal with this by checking
the virtual mapping is not NULL.

Cc: sta...@vger.kernel.org
Signed-off-by: Gilad Ben-Yossef 
---
 drivers/staging/ccree/ssi_buffer_mgr.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/staging/ccree/ssi_buffer_mgr.c 
b/drivers/staging/ccree/ssi_buffer_mgr.c
index 5e3cff3..13cb062 100644
--- a/drivers/staging/ccree/ssi_buffer_mgr.c
+++ b/drivers/staging/ccree/ssi_buffer_mgr.c
@@ -465,7 +465,8 @@ void cc_unmap_blkcipher_request(struct device *dev, void 
*ctx,
 DMA_TO_DEVICE);
}
/* Release pool */
-   if (req_ctx->dma_buf_type == CC_DMA_BUF_MLLI) {
+   if (req_ctx->dma_buf_type == CC_DMA_BUF_MLLI &&
+   req_ctx->mlli_params.mlli_virt_addr) {
dma_pool_free(req_ctx->mlli_params.curr_pool,
  req_ctx->mlli_params.mlli_virt_addr,
  req_ctx->mlli_params.mlli_dma_addr);
-- 
2.7.4

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[PATCH v2 15/27] staging: ccree: use Makefile to include PM code

2018-01-03 Thread Gilad Ben-Yossef 
Replace ugly ifdefs with some inline macros and Makefile magic
for optionally including power management related code for
better readability.

Signed-off-by: Gilad Ben-Yossef 
---
 drivers/staging/ccree/Makefile  |  3 ++-
 drivers/staging/ccree/ssi_pm.c  |  9 +---
 drivers/staging/ccree/ssi_pm.h  | 39 +++--
 drivers/staging/ccree/ssi_request_mgr.c | 18 ++-
 4 files changed, 37 insertions(+), 32 deletions(-)

diff --git a/drivers/staging/ccree/Makefile b/drivers/staging/ccree/Makefile
index bb47144..c107e25 100644
--- a/drivers/staging/ccree/Makefile
+++ b/drivers/staging/ccree/Makefile
@@ -1,6 +1,7 @@
 # SPDX-License-Identifier: GPL-2.0
 
 obj-$(CONFIG_CRYPTO_DEV_CCREE) := ccree.o
-ccree-y := ssi_driver.o ssi_buffer_mgr.o ssi_request_mgr.o ssi_cipher.o 
ssi_hash.o ssi_aead.o ssi_ivgen.o ssi_sram_mgr.o ssi_pm.o
+ccree-y := ssi_driver.o ssi_buffer_mgr.o ssi_request_mgr.o ssi_cipher.o 
ssi_hash.o ssi_aead.o ssi_ivgen.o ssi_sram_mgr.o
 ccree-$(CONFIG_CRYPTO_FIPS) += ssi_fips.o
 ccree-$(CONFIG_DEBUG_FS) += cc_debugfs.o
+ccree-$(CONFIG_PM) += ssi_pm.o
diff --git a/drivers/staging/ccree/ssi_pm.c b/drivers/staging/ccree/ssi_pm.c
index 4031881..b0ace75 100644
--- a/drivers/staging/ccree/ssi_pm.c
+++ b/drivers/staging/ccree/ssi_pm.c
@@ -14,8 +14,6 @@
 #include "ssi_hash.h"
 #include "ssi_pm.h"
 
-#if defined(CONFIG_PM)
-
 #define POWER_DOWN_ENABLE 0x01
 #define POWER_DOWN_DISABLE 0x00
 
@@ -103,12 +101,9 @@ int cc_pm_put_suspend(struct device *dev)
return rc;
 }
 
-#endif
-
 int cc_pm_init(struct cc_drvdata *drvdata)
 {
int rc = 0;
-#if defined(CONFIG_PM)
struct device *dev = drvdata_to_dev(drvdata);
 
/* must be before the enabling to avoid resdundent suspending */
@@ -120,13 +115,11 @@ int cc_pm_init(struct cc_drvdata *drvdata)
return rc;
/* enable the PM module*/
pm_runtime_enable(dev);
-#endif
+
return rc;
 }
 
 void cc_pm_fini(struct cc_drvdata *drvdata)
 {
-#if defined(CONFIG_PM)
pm_runtime_disable(drvdata_to_dev(drvdata));
-#endif
 }
diff --git a/drivers/staging/ccree/ssi_pm.h b/drivers/staging/ccree/ssi_pm.h
index 138de71..c28f3aa 100644
--- a/drivers/staging/ccree/ssi_pm.h
+++ b/drivers/staging/ccree/ssi_pm.h
@@ -11,21 +11,46 @@
 
 #define CC_SUSPEND_TIMEOUT 3000
 
-int cc_pm_init(struct cc_drvdata *drvdata);
-
-void cc_pm_fini(struct cc_drvdata *drvdata);
-
 #if defined(CONFIG_PM)
 
 extern const struct dev_pm_ops ccree_pm;
 
+int cc_pm_init(struct cc_drvdata *drvdata);
+void cc_pm_fini(struct cc_drvdata *drvdata);
 int cc_pm_suspend(struct device *dev);
-
 int cc_pm_resume(struct device *dev);
-
 int cc_pm_get(struct device *dev);
-
 int cc_pm_put_suspend(struct device *dev);
+
+#else
+
+static inline int cc_pm_init(struct cc_drvdata *drvdata)
+{
+   return 0;
+}
+
+static inline void cc_pm_fini(struct cc_drvdata *drvdata) {}
+
+static inline int cc_pm_suspend(struct device *dev)
+{
+   return 0;
+}
+
+static inline int cc_pm_resume(struct device *dev)
+{
+   return 0;
+}
+
+static inline int cc_pm_get(struct device *dev)
+{
+   return 0;
+}
+
+static inline int cc_pm_put_suspend(struct device *dev)
+{
+   return 0;
+}
+
 #endif
 
 #endif /*__POWER_MGR_H__*/
diff --git a/drivers/staging/ccree/ssi_request_mgr.c 
b/drivers/staging/ccree/ssi_request_mgr.c
index e99c148..01f4756 100644
--- a/drivers/staging/ccree/ssi_request_mgr.c
+++ b/drivers/staging/ccree/ssi_request_mgr.c
@@ -46,9 +46,7 @@ struct cc_req_mgr_handle {
 #else
struct tasklet_struct comptask;
 #endif
-#if defined(CONFIG_PM)
bool is_runtime_suspended;
-#endif
 };
 
 struct cc_bl_item {
@@ -404,9 +402,7 @@ static void cc_proc_backlog(struct cc_drvdata *drvdata)
spin_unlock(&mgr->hw_lock);
 
if (rc != -EINPROGRESS) {
-#if defined(CONFIG_PM)
cc_pm_put_suspend(dev);
-#endif
creq->user_cb(dev, req, rc);
}
 
@@ -432,13 +428,12 @@ int cc_send_request(struct cc_drvdata *drvdata, struct 
cc_crypto_req *cc_req,
gfp_t flags = cc_gfp_flags(req);
struct cc_bl_item *bli;
 
-#if defined(CONFIG_PM)
rc = cc_pm_get(dev);
if (rc) {
dev_err(dev, "ssi_power_mgr_runtime_get returned %x\n", rc);
return rc;
}
-#endif
+
spin_lock_bh(&mgr->hw_lock);
rc = cc_queues_status(drvdata, mgr, total_len);
 
@@ -452,9 +447,7 @@ int cc_send_request(struct cc_drvdata *drvdata, struct 
cc_crypto_req *cc_req,
 
bli = kmalloc(sizeof(*bli), flags);
if (!bli) {
-#if defined(CONFIG_PM)
cc_pm_put_suspend(dev);
-#endif
return -ENOMEM;
}
 
@@ -486,13 +479,12 @@ int cc_send_sync_request(struct cc_drvdata *drvdata,
cc_req->user_cb = request_mgr_complete;
cc_req->user_arg = &cc_req->seq_compl;
 
-#if defined(CONFIG_PM)

[PATCH v2 11/27] stating: ccree: revert "staging: ccree: fix leak of import() after init()"

2018-01-03 Thread Gilad Ben-Yossef 
This reverts commit c5f39d07860c ("staging: ccree: fix leak of import()
after init()") and commit aece09024414 ("staging: ccree: Uninitialized
return in ssi_ahash_import()").

This is the wrong solution and ends up relying on uninitialized memory,
although it was not obvious to me at the time.

Cc: sta...@vger.kernel.org
Signed-off-by: Gilad Ben-Yossef 
---
 drivers/staging/ccree/ssi_hash.c | 11 ---
 1 file changed, 4 insertions(+), 7 deletions(-)

diff --git a/drivers/staging/ccree/ssi_hash.c b/drivers/staging/ccree/ssi_hash.c
index ffcd1f0..e05c87d 100644
--- a/drivers/staging/ccree/ssi_hash.c
+++ b/drivers/staging/ccree/ssi_hash.c
@@ -1673,7 +1673,7 @@ static int cc_hash_import(struct ahash_request *req, 
const void *in)
struct device *dev = drvdata_to_dev(ctx->drvdata);
struct ahash_req_ctx *state = ahash_request_ctx(req);
u32 tmp;
-   int rc = 0;
+   int rc;
 
memcpy(&tmp, in, sizeof(u32));
if (tmp != CC_EXPORT_MAGIC) {
@@ -1682,12 +1682,9 @@ static int cc_hash_import(struct ahash_request *req, 
const void *in)
}
in += sizeof(u32);
 
-   /* call init() to allocate bufs if the user hasn't */
-   if (!state->digest_buff) {
-   rc = cc_hash_init(req);
-   if (rc)
-   goto out;
-   }
+   rc = cc_hash_init(req);
+   if (rc)
+   goto out;
 
dma_sync_single_for_cpu(dev, state->digest_buff_dma_addr,
ctx->inter_digestsize, DMA_BIDIRECTIONAL);
-- 
2.7.4

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[PATCH v2 16/27] staging: ccree: remove unused field

2018-01-03 Thread Gilad Ben-Yossef 
Remove unused struct field.

Signed-off-by: Gilad Ben-Yossef 
---
 drivers/staging/ccree/ssi_hash.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/staging/ccree/ssi_hash.c b/drivers/staging/ccree/ssi_hash.c
index e05c87d..4e11b5d 100644
--- a/drivers/staging/ccree/ssi_hash.c
+++ b/drivers/staging/ccree/ssi_hash.c
@@ -23,7 +23,6 @@ struct cc_hash_handle {
cc_sram_addr_t digest_len_sram_addr; /* const value in SRAM*/
cc_sram_addr_t larval_digest_sram_addr;   /* const value in SRAM */
struct list_head hash_list;
-   struct completion init_comp;
 };
 
 static const u32 digest_len_init[] = {
-- 
2.7.4

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[PATCH v2 17/27] staging: ccree: use array for double buffer

2018-01-03 Thread Gilad Ben-Yossef 
The ccree hash code is using a double buffer to hold data
for processing but manages the buffers and their associated
data count in two separate fields and uses a predicate to
chose which to use.

Move to using a proper 2 members array for a much cleaner code.

Signed-off-by: Gilad Ben-Yossef 
---
 drivers/staging/ccree/ssi_buffer_mgr.c | 21 +++-
 drivers/staging/ccree/ssi_hash.c   | 36 --
 drivers/staging/ccree/ssi_hash.h   | 26 
 3 files changed, 46 insertions(+), 37 deletions(-)

diff --git a/drivers/staging/ccree/ssi_buffer_mgr.c 
b/drivers/staging/ccree/ssi_buffer_mgr.c
index 9e3f557..9f67bb7 100644
--- a/drivers/staging/ccree/ssi_buffer_mgr.c
+++ b/drivers/staging/ccree/ssi_buffer_mgr.c
@@ -1391,10 +1391,8 @@ int cc_map_hash_request_final(struct cc_drvdata 
*drvdata, void *ctx,
 {
struct ahash_req_ctx *areq_ctx = (struct ahash_req_ctx *)ctx;
struct device *dev = drvdata_to_dev(drvdata);
-   u8 *curr_buff = areq_ctx->buff_index ? areq_ctx->buff1 :
-   areq_ctx->buff0;
-   u32 *curr_buff_cnt = areq_ctx->buff_index ? &areq_ctx->buff1_cnt :
-   &areq_ctx->buff0_cnt;
+   u8 *curr_buff = cc_hash_buf(areq_ctx);
+   u32 *curr_buff_cnt = cc_hash_buf_cnt(areq_ctx);
struct mlli_params *mlli_params = &areq_ctx->mlli_params;
struct buffer_array sg_data;
struct buff_mgr_handle *buff_mgr = drvdata->buff_mgr_handle;
@@ -1472,14 +1470,10 @@ int cc_map_hash_request_update(struct cc_drvdata 
*drvdata, void *ctx,
 {
struct ahash_req_ctx *areq_ctx = (struct ahash_req_ctx *)ctx;
struct device *dev = drvdata_to_dev(drvdata);
-   u8 *curr_buff = areq_ctx->buff_index ? areq_ctx->buff1 :
-   areq_ctx->buff0;
-   u32 *curr_buff_cnt = areq_ctx->buff_index ? &areq_ctx->buff1_cnt :
-   &areq_ctx->buff0_cnt;
-   u8 *next_buff = areq_ctx->buff_index ? areq_ctx->buff0 :
-   areq_ctx->buff1;
-   u32 *next_buff_cnt = areq_ctx->buff_index ? &areq_ctx->buff0_cnt :
-   &areq_ctx->buff1_cnt;
+   u8 *curr_buff = cc_hash_buf(areq_ctx);
+   u32 *curr_buff_cnt = cc_hash_buf_cnt(areq_ctx);
+   u8 *next_buff = cc_next_buf(areq_ctx);
+   u32 *next_buff_cnt = cc_next_buf_cnt(areq_ctx);
struct mlli_params *mlli_params = &areq_ctx->mlli_params;
unsigned int update_data_len;
u32 total_in_len = nbytes + *curr_buff_cnt;
@@ -1585,8 +1579,7 @@ void cc_unmap_hash_request(struct device *dev, void *ctx,
   struct scatterlist *src, bool do_revert)
 {
struct ahash_req_ctx *areq_ctx = (struct ahash_req_ctx *)ctx;
-   u32 *prev_len = areq_ctx->buff_index ?  &areq_ctx->buff0_cnt :
-   &areq_ctx->buff1_cnt;
+   u32 *prev_len = cc_next_buf_cnt(areq_ctx);
 
/*In case a pool was set, a table was
 *allocated and should be released
diff --git a/drivers/staging/ccree/ssi_hash.c b/drivers/staging/ccree/ssi_hash.c
index 4e11b5d..a8ea6a2 100644
--- a/drivers/staging/ccree/ssi_hash.c
+++ b/drivers/staging/ccree/ssi_hash.c
@@ -129,12 +129,12 @@ static int cc_map_req(struct device *dev, struct 
ahash_req_ctx *state,
bool is_hmac = ctx->is_hmac;
int rc = -ENOMEM;
 
-   state->buff0 = kzalloc(CC_MAX_HASH_BLCK_SIZE, flags);
-   if (!state->buff0)
+   state->buffers[0] = kzalloc(CC_MAX_HASH_BLCK_SIZE, flags);
+   if (!state->buffers[0])
goto fail0;
 
-   state->buff1 = kzalloc(CC_MAX_HASH_BLCK_SIZE, flags);
-   if (!state->buff1)
+   state->buffers[1] = kzalloc(CC_MAX_HASH_BLCK_SIZE, flags);
+   if (!state->buffers[1])
goto fail_buff0;
 
state->digest_result_buff = kzalloc(CC_MAX_HASH_DIGEST_SIZE, flags);
@@ -252,8 +252,8 @@ static int cc_map_req(struct device *dev, struct 
ahash_req_ctx *state,
} else {
state->opad_digest_dma_addr = 0;
}
-   state->buff0_cnt = 0;
-   state->buff1_cnt = 0;
+   state->buf_cnt[0] = 0;
+   state->buf_cnt[1] = 0;
state->buff_index = 0;
state->mlli_params.curr_pool = NULL;
 
@@ -281,11 +281,11 @@ static int cc_map_req(struct device *dev, struct 
ahash_req_ctx *state,
kfree(state->digest_result_buff);
state->digest_result_buff = NULL;
 fail_buff1:
-   kfree(state->buff1);
-   state->buff1 = NULL;
+   kfree(state->buffers[1]);
+   state->buffers[1] = NULL;
 fail_buff0:
-   kfree(state->buff0);
-   state->buff0 = NULL;
+   kfree(state->buffers[0]);
+   state->buffers[0] = NULL;
 fail0:
return rc;
 }
@@ -319,8 +319,8 @@ static void cc_unmap_req(struct device *dev, struct 
ahash_req_ctx *state,
kfree(state->digest_bytes_len);
kfree(state->digest_buff);
kfree(state->digest_result_buff);
-   kfree(state->

[PATCH v2 18/27] staging: ccree: allocate hash bufs inside req ctx

2018-01-03 Thread Gilad Ben-Yossef 
Move to allocating the buffers needed for requests as part of
the request structure instead of malloc'ing each one on it's
own, making for simpler (and more efficient) code.

Signed-off-by: Gilad Ben-Yossef 
---
 drivers/staging/ccree/ssi_hash.c | 68 
 drivers/staging/ccree/ssi_hash.h | 12 +++
 2 files changed, 12 insertions(+), 68 deletions(-)

diff --git a/drivers/staging/ccree/ssi_hash.c b/drivers/staging/ccree/ssi_hash.c
index a8ea6a2..69fc2fcf3 100644
--- a/drivers/staging/ccree/ssi_hash.c
+++ b/drivers/staging/ccree/ssi_hash.c
@@ -108,7 +108,7 @@ static int cc_map_result(struct device *dev, struct 
ahash_req_ctx *state,
 unsigned int digestsize)
 {
state->digest_result_dma_addr =
-   dma_map_single(dev, (void *)state->digest_result_buff,
+   dma_map_single(dev, state->digest_result_buff,
   digestsize,
   DMA_BIDIRECTIONAL);
if (dma_mapping_error(dev, state->digest_result_dma_addr)) {
@@ -129,49 +129,15 @@ static int cc_map_req(struct device *dev, struct 
ahash_req_ctx *state,
bool is_hmac = ctx->is_hmac;
int rc = -ENOMEM;
 
-   state->buffers[0] = kzalloc(CC_MAX_HASH_BLCK_SIZE, flags);
-   if (!state->buffers[0])
-   goto fail0;
-
-   state->buffers[1] = kzalloc(CC_MAX_HASH_BLCK_SIZE, flags);
-   if (!state->buffers[1])
-   goto fail_buff0;
-
-   state->digest_result_buff = kzalloc(CC_MAX_HASH_DIGEST_SIZE, flags);
-   if (!state->digest_result_buff)
-   goto fail_buff1;
-
-   state->digest_buff = kzalloc(ctx->inter_digestsize, flags);
-   if (!state->digest_buff)
-   goto fail_digest_result_buff;
-
-   dev_dbg(dev, "Allocated digest-buffer in context 
ctx->digest_buff=@%p\n",
-   state->digest_buff);
-   if (ctx->hw_mode != DRV_CIPHER_XCBC_MAC) {
-   state->digest_bytes_len = kzalloc(HASH_LEN_SIZE, flags);
-   if (!state->digest_bytes_len)
-   goto fail1;
-
-   dev_dbg(dev, "Allocated digest-bytes-len in context 
state->>digest_bytes_len=@%p\n",
-   state->digest_bytes_len);
-   } else {
-   state->digest_bytes_len = NULL;
-   }
-
-   state->opad_digest_buff = kzalloc(ctx->inter_digestsize, flags);
-   if (!state->opad_digest_buff)
-   goto fail2;
-
-   dev_dbg(dev, "Allocated opad-digest-buffer in context 
state->digest_bytes_len=@%p\n",
-   state->opad_digest_buff);
+   memset(state, 0, sizeof(*state));
 
state->digest_buff_dma_addr =
-   dma_map_single(dev, (void *)state->digest_buff,
+   dma_map_single(dev, state->digest_buff,
   ctx->inter_digestsize, DMA_BIDIRECTIONAL);
if (dma_mapping_error(dev, state->digest_buff_dma_addr)) {
dev_err(dev, "Mapping digest len %d B at va=%pK for DMA 
failed\n",
ctx->inter_digestsize, state->digest_buff);
-   goto fail3;
+   goto fail0;
}
dev_dbg(dev, "Mapped digest %d B at va=%pK to dma=%pad\n",
ctx->inter_digestsize, state->digest_buff,
@@ -221,7 +187,7 @@ static int cc_map_req(struct device *dev, struct 
ahash_req_ctx *state,
 
if (ctx->hw_mode != DRV_CIPHER_XCBC_MAC) {
state->digest_bytes_len_dma_addr =
-   dma_map_single(dev, (void *)state->digest_bytes_len,
+   dma_map_single(dev, state->digest_bytes_len,
   HASH_LEN_SIZE, DMA_BIDIRECTIONAL);
if (dma_mapping_error(dev, state->digest_bytes_len_dma_addr)) {
dev_err(dev, "Mapping digest len %u B at va=%pK for DMA 
failed\n",
@@ -237,7 +203,7 @@ static int cc_map_req(struct device *dev, struct 
ahash_req_ctx *state,
 
if (is_hmac && ctx->hash_mode != DRV_HASH_NULL) {
state->opad_digest_dma_addr =
-   dma_map_single(dev, (void *)state->opad_digest_buff,
+   dma_map_single(dev, state->opad_digest_buff,
   ctx->inter_digestsize,
   DMA_BIDIRECTIONAL);
if (dma_mapping_error(dev, state->opad_digest_dma_addr)) {
@@ -271,21 +237,6 @@ static int cc_map_req(struct device *dev, struct 
ahash_req_ctx *state,
 ctx->inter_digestsize, DMA_BIDIRECTIONAL);
state->digest_buff_dma_addr = 0;
}
-fail3:
-   kfree(state->opad_digest_buff);
-fail2:
-   kfree(state->digest_bytes_len);
-fail1:
-kfree(state->digest_buff);
-fail_digest_result_buff:
-   kfree(state->digest_result_buff);
-   state->digest_result_buff = NULL;
-fail_buff1:
-   kfree(state->buffers[1]);
-   state->buffers[1] = NULL;

[PATCH v2 19/27] staging: ccree: do not map bufs in ahash_init

2018-01-03 Thread Gilad Ben-Yossef 
hash_init was mapping DMA memory that were then being unmap in
hash_digest/final/finup callbacks, which is against the Crypto API
usage rules (see discussion at
https://www.mail-archive.com/linux-crypto@vger.kernel.org/msg30077.html)

Fix it by moving all buffer mapping/unmapping or each Crypto API op.

This also properly deals with hash_import() not knowing if
hash_init was called or not as it now no longer matters.

Signed-off-by: Gilad Ben-Yossef 
---
 drivers/staging/ccree/ssi_hash.c | 192 +--
 1 file changed, 103 insertions(+), 89 deletions(-)

diff --git a/drivers/staging/ccree/ssi_hash.c b/drivers/staging/ccree/ssi_hash.c
index 69fc2fcf3..11d83c2 100644
--- a/drivers/staging/ccree/ssi_hash.c
+++ b/drivers/staging/ccree/ssi_hash.c
@@ -123,34 +123,20 @@ static int cc_map_result(struct device *dev, struct 
ahash_req_ctx *state,
return 0;
 }
 
-static int cc_map_req(struct device *dev, struct ahash_req_ctx *state,
- struct cc_hash_ctx *ctx, gfp_t flags)
+static void cc_init_req(struct device *dev, struct ahash_req_ctx *state,
+   struct cc_hash_ctx *ctx)
 {
bool is_hmac = ctx->is_hmac;
-   int rc = -ENOMEM;
 
memset(state, 0, sizeof(*state));
 
-   state->digest_buff_dma_addr =
-   dma_map_single(dev, state->digest_buff,
-  ctx->inter_digestsize, DMA_BIDIRECTIONAL);
-   if (dma_mapping_error(dev, state->digest_buff_dma_addr)) {
-   dev_err(dev, "Mapping digest len %d B at va=%pK for DMA 
failed\n",
-   ctx->inter_digestsize, state->digest_buff);
-   goto fail0;
-   }
-   dev_dbg(dev, "Mapped digest %d B at va=%pK to dma=%pad\n",
-   ctx->inter_digestsize, state->digest_buff,
-   &state->digest_buff_dma_addr);
-
if (is_hmac) {
-   dma_sync_single_for_cpu(dev, ctx->digest_buff_dma_addr,
-   ctx->inter_digestsize,
-   DMA_BIDIRECTIONAL);
-   if (ctx->hw_mode == DRV_CIPHER_XCBC_MAC ||
-   ctx->hw_mode == DRV_CIPHER_CMAC) {
-   memset(state->digest_buff, 0, ctx->inter_digestsize);
-   } else { /*sha*/
+   if (ctx->hw_mode != DRV_CIPHER_XCBC_MAC &&
+   ctx->hw_mode != DRV_CIPHER_CMAC) {
+   dma_sync_single_for_cpu(dev, ctx->digest_buff_dma_addr,
+   ctx->inter_digestsize,
+   DMA_BIDIRECTIONAL);
+
memcpy(state->digest_buff, ctx->digest_buff,
   ctx->inter_digestsize);
 #if (CC_DEV_SHA_MAX > 256)
@@ -181,9 +167,24 @@ static int cc_map_req(struct device *dev, struct 
ahash_req_ctx *state,
 
memcpy(state->digest_buff, larval, ctx->inter_digestsize);
}
+}
 
-   dma_sync_single_for_device(dev, state->digest_buff_dma_addr,
-  ctx->inter_digestsize, DMA_BIDIRECTIONAL);
+static int cc_map_req(struct device *dev, struct ahash_req_ctx *state,
+ struct cc_hash_ctx *ctx)
+{
+   bool is_hmac = ctx->is_hmac;
+
+   state->digest_buff_dma_addr =
+   dma_map_single(dev, state->digest_buff,
+  ctx->inter_digestsize, DMA_BIDIRECTIONAL);
+   if (dma_mapping_error(dev, state->digest_buff_dma_addr)) {
+   dev_err(dev, "Mapping digest len %d B at va=%pK for DMA 
failed\n",
+   ctx->inter_digestsize, state->digest_buff);
+   return -EINVAL;
+   }
+   dev_dbg(dev, "Mapped digest %d B at va=%pK to dma=%pad\n",
+   ctx->inter_digestsize, state->digest_buff,
+   &state->digest_buff_dma_addr);
 
if (ctx->hw_mode != DRV_CIPHER_XCBC_MAC) {
state->digest_bytes_len_dma_addr =
@@ -192,13 +193,11 @@ static int cc_map_req(struct device *dev, struct 
ahash_req_ctx *state,
if (dma_mapping_error(dev, state->digest_bytes_len_dma_addr)) {
dev_err(dev, "Mapping digest len %u B at va=%pK for DMA 
failed\n",
HASH_LEN_SIZE, state->digest_bytes_len);
-   goto fail4;
+   goto unmap_digest_buf;
}
dev_dbg(dev, "Mapped digest len %u B at va=%pK to dma=%pad\n",
HASH_LEN_SIZE, state->digest_bytes_len,
&state->digest_bytes_len_dma_addr);
-   } else {
-   state->digest_bytes_len_dma_addr = 0;
}
 
if (is_hmac && ctx->hash_mode != DRV_HASH_NULL) {
@@ -210,35 +209,29 @@ static int cc_map_req(struct device *dev, struct 
ahash_req_ctx *state,
dev_err(dev, "Mapping opad digest %d B at va=%pK for 
DMA failed\n",

[PATCH v2 20/27] staging: ccree: fix indentation of func params

2018-01-03 Thread Gilad Ben-Yossef 
Fix indentation of some function params in hash code for
better readability.

Signed-off-by: Gilad Ben-Yossef 
---
 drivers/staging/ccree/ssi_hash.c | 46 +---
 1 file changed, 20 insertions(+), 26 deletions(-)

diff --git a/drivers/staging/ccree/ssi_hash.c b/drivers/staging/ccree/ssi_hash.c
index 11d83c2..6e696ff 100644
--- a/drivers/staging/ccree/ssi_hash.c
+++ b/drivers/staging/ccree/ssi_hash.c
@@ -109,8 +109,7 @@ static int cc_map_result(struct device *dev, struct 
ahash_req_ctx *state,
 {
state->digest_result_dma_addr =
dma_map_single(dev, state->digest_result_buff,
-  digestsize,
-  DMA_BIDIRECTIONAL);
+  digestsize, DMA_BIDIRECTIONAL);
if (dma_mapping_error(dev, state->digest_result_dma_addr)) {
dev_err(dev, "Mapping digest result buffer %u B for DMA 
failed\n",
digestsize);
@@ -264,16 +263,12 @@ static void cc_unmap_result(struct device *dev, struct 
ahash_req_ctx *state,
unsigned int digestsize, u8 *result)
 {
if (state->digest_result_dma_addr) {
-   dma_unmap_single(dev,
-state->digest_result_dma_addr,
-digestsize,
- DMA_BIDIRECTIONAL);
+   dma_unmap_single(dev, state->digest_result_dma_addr, digestsize,
+DMA_BIDIRECTIONAL);
dev_dbg(dev, "unmpa digest result buffer va (%pK) pa (%pad) len 
%u\n",
state->digest_result_buff,
&state->digest_result_dma_addr, digestsize);
-   memcpy(result,
-  state->digest_result_buff,
-  digestsize);
+   memcpy(result, state->digest_result_buff, digestsize);
}
state->digest_result_dma_addr = 0;
 }
@@ -1100,25 +1095,25 @@ static int cc_xcbc_setkey(struct crypto_ahash *ahash,
hw_desc_init(&desc[idx]);
set_din_const(&desc[idx], 0x01010101, CC_AES_128_BIT_KEY_SIZE);
set_flow_mode(&desc[idx], DIN_AES_DOUT);
-   set_dout_dlli(&desc[idx], (ctx->opad_tmp_keys_dma_addr +
-  XCBC_MAC_K1_OFFSET),
- CC_AES_128_BIT_KEY_SIZE, NS_BIT, 0);
+   set_dout_dlli(&desc[idx],
+ (ctx->opad_tmp_keys_dma_addr + XCBC_MAC_K1_OFFSET),
+ CC_AES_128_BIT_KEY_SIZE, NS_BIT, 0);
idx++;
 
hw_desc_init(&desc[idx]);
set_din_const(&desc[idx], 0x02020202, CC_AES_128_BIT_KEY_SIZE);
set_flow_mode(&desc[idx], DIN_AES_DOUT);
-   set_dout_dlli(&desc[idx], (ctx->opad_tmp_keys_dma_addr +
-  XCBC_MAC_K2_OFFSET),
- CC_AES_128_BIT_KEY_SIZE, NS_BIT, 0);
+   set_dout_dlli(&desc[idx],
+ (ctx->opad_tmp_keys_dma_addr + XCBC_MAC_K2_OFFSET),
+ CC_AES_128_BIT_KEY_SIZE, NS_BIT, 0);
idx++;
 
hw_desc_init(&desc[idx]);
set_din_const(&desc[idx], 0x03030303, CC_AES_128_BIT_KEY_SIZE);
set_flow_mode(&desc[idx], DIN_AES_DOUT);
-   set_dout_dlli(&desc[idx], (ctx->opad_tmp_keys_dma_addr +
-  XCBC_MAC_K3_OFFSET),
-  CC_AES_128_BIT_KEY_SIZE, NS_BIT, 0);
+   set_dout_dlli(&desc[idx],
+ (ctx->opad_tmp_keys_dma_addr + XCBC_MAC_K3_OFFSET),
+ CC_AES_128_BIT_KEY_SIZE, NS_BIT, 0);
idx++;
 
rc = cc_send_sync_request(ctx->drvdata, &cc_req, desc, idx);
@@ -1245,8 +1240,7 @@ static int cc_cra_init(struct crypto_tfm *tfm)
struct ahash_alg *ahash_alg =
container_of(hash_alg_common, struct ahash_alg, halg);
struct cc_hash_alg *cc_alg =
-   container_of(ahash_alg, struct cc_hash_alg,
-ahash_alg);
+   container_of(ahash_alg, struct cc_hash_alg, ahash_alg);
 
crypto_ahash_set_reqsize(__crypto_ahash_cast(tfm),
 sizeof(struct ahash_req_ctx));
@@ -1391,8 +1385,8 @@ static int cc_mac_final(struct ahash_request *req)
set_cipher_mode(&desc[idx], DRV_CIPHER_ECB);
set_cipher_config0(&desc[idx], DRV_CRYPTO_DIRECTION_DECRYPT);
set_din_type(&desc[idx], DMA_DLLI,
-(ctx->opad_tmp_keys_dma_addr +
- XCBC_MAC_K1_OFFSET), key_size, NS_BIT);
+(ctx->opad_tmp_keys_dma_addr + XCBC_MAC_K1_OFFSET),
+key_size, NS_BIT);
set_key_size_aes(&desc[idx], key_len);
set_flow_mode(&desc[idx], S_DIN_to_AES);
set_setup_mode(&desc[idx], SETUP_LOAD_KEY0);
@@ -2197,8 +2191,8 @@ static v

[PATCH v2 22/27] staging: ccree: put pointer next to var name

2018-01-03 Thread Gilad Ben-Yossef 
Put pointer next to var name as per coding style.

Signed-off-by: Gilad Ben-Yossef 
---
 drivers/staging/ccree/ssi_request_mgr.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/staging/ccree/ssi_request_mgr.c 
b/drivers/staging/ccree/ssi_request_mgr.c
index 01f4756..82377d2 100644
--- a/drivers/staging/ccree/ssi_request_mgr.c
+++ b/drivers/staging/ccree/ssi_request_mgr.c
@@ -166,7 +166,7 @@ static void enqueue_seq(struct cc_drvdata *drvdata, struct 
cc_hw_desc seq[],
unsigned int seq_len)
 {
int i, w;
-   void * __iomem reg = drvdata->cc_base + CC_REG(DSCRPTR_QUEUE_WORD0);
+   void __iomem *reg = drvdata->cc_base + CC_REG(DSCRPTR_QUEUE_WORD0);
struct device *dev = drvdata_to_dev(drvdata);
 
/*
-- 
2.7.4

___
devel mailing list
de...@linuxdriverproject.org
http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel

[PATCH v2 21/27] staging: ccree: fold common code into service func

2018-01-03 Thread Gilad Ben-Yossef 
Fold common code in hash call into service functions.

Signed-off-by: Gilad Ben-Yossef 
---
 drivers/staging/ccree/ssi_hash.c | 339 ++-
 1 file changed, 116 insertions(+), 223 deletions(-)

diff --git a/drivers/staging/ccree/ssi_hash.c b/drivers/staging/ccree/ssi_hash.c
index 6e696ff..731c0d6 100644
--- a/drivers/staging/ccree/ssi_hash.c
+++ b/drivers/staging/ccree/ssi_hash.c
@@ -319,6 +319,84 @@ static void cc_hash_complete(struct device *dev, void 
*cc_req, int err)
req->base.complete(&req->base, err);
 }
 
+static int cc_fin_result(struct cc_hw_desc *desc, struct ahash_request *req,
+int idx)
+{
+   struct ahash_req_ctx *state = ahash_request_ctx(req);
+   struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
+   struct cc_hash_ctx *ctx = crypto_ahash_ctx(tfm);
+   u32 digestsize = crypto_ahash_digestsize(tfm);
+
+   /* Get final MAC result */
+   hw_desc_init(&desc[idx]);
+   set_cipher_mode(&desc[idx], ctx->hw_mode);
+   /* TODO */
+   set_dout_dlli(&desc[idx], state->digest_result_dma_addr, digestsize,
+ NS_BIT, 1);
+   set_queue_last_ind(&desc[idx]);
+   set_flow_mode(&desc[idx], S_HASH_to_DOUT);
+   set_setup_mode(&desc[idx], SETUP_WRITE_STATE0);
+   set_cipher_config1(&desc[idx], HASH_PADDING_DISABLED);
+   cc_set_endianity(ctx->hash_mode, &desc[idx]);
+   idx++;
+
+   return idx;
+}
+
+static int cc_fin_hmac(struct cc_hw_desc *desc, struct ahash_request *req,
+  int idx)
+{
+   struct ahash_req_ctx *state = ahash_request_ctx(req);
+   struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
+   struct cc_hash_ctx *ctx = crypto_ahash_ctx(tfm);
+   u32 digestsize = crypto_ahash_digestsize(tfm);
+
+   /* store the hash digest result in the context */
+   hw_desc_init(&desc[idx]);
+   set_cipher_mode(&desc[idx], ctx->hw_mode);
+   set_dout_dlli(&desc[idx], state->digest_buff_dma_addr, digestsize,
+ NS_BIT, 0);
+   set_flow_mode(&desc[idx], S_HASH_to_DOUT);
+   cc_set_endianity(ctx->hash_mode, &desc[idx]);
+   set_setup_mode(&desc[idx], SETUP_WRITE_STATE0);
+   idx++;
+
+   /* Loading hash opad xor key state */
+   hw_desc_init(&desc[idx]);
+   set_cipher_mode(&desc[idx], ctx->hw_mode);
+   set_din_type(&desc[idx], DMA_DLLI, state->opad_digest_dma_addr,
+ctx->inter_digestsize, NS_BIT);
+   set_flow_mode(&desc[idx], S_DIN_to_HASH);
+   set_setup_mode(&desc[idx], SETUP_LOAD_STATE0);
+   idx++;
+
+   /* Load the hash current length */
+   hw_desc_init(&desc[idx]);
+   set_cipher_mode(&desc[idx], ctx->hw_mode);
+   set_din_sram(&desc[idx],
+cc_digest_len_addr(ctx->drvdata, ctx->hash_mode),
+HASH_LEN_SIZE);
+   set_cipher_config1(&desc[idx], HASH_PADDING_ENABLED);
+   set_flow_mode(&desc[idx], S_DIN_to_HASH);
+   set_setup_mode(&desc[idx], SETUP_LOAD_KEY0);
+   idx++;
+
+   /* Memory Barrier: wait for IPAD/OPAD axi write to complete */
+   hw_desc_init(&desc[idx]);
+   set_din_no_dma(&desc[idx], 0, 0xf0);
+   set_dout_no_dma(&desc[idx], 0, 0, 1);
+   idx++;
+
+   /* Perform HASH update */
+   hw_desc_init(&desc[idx]);
+   set_din_type(&desc[idx], DMA_DLLI, state->digest_buff_dma_addr,
+digestsize, NS_BIT);
+   set_flow_mode(&desc[idx], DIN_HASH);
+   idx++;
+
+   return idx;
+}
+
 static int cc_hash_digest(struct ahash_request *req)
 {
struct ahash_req_ctx *state = ahash_request_ctx(req);
@@ -414,62 +492,10 @@ static int cc_hash_digest(struct ahash_request *req)
set_cipher_do(&desc[idx], DO_PAD);
idx++;
 
-   /* store the hash digest result in the context */
-   hw_desc_init(&desc[idx]);
-   set_cipher_mode(&desc[idx], ctx->hw_mode);
-   set_dout_dlli(&desc[idx], state->digest_buff_dma_addr,
- digestsize, NS_BIT, 0);
-   set_flow_mode(&desc[idx], S_HASH_to_DOUT);
-   cc_set_endianity(ctx->hash_mode, &desc[idx]);
-   set_setup_mode(&desc[idx], SETUP_WRITE_STATE0);
-   idx++;
-
-   /* Loading hash opad xor key state */
-   hw_desc_init(&desc[idx]);
-   set_cipher_mode(&desc[idx], ctx->hw_mode);
-   set_din_type(&desc[idx], DMA_DLLI, state->opad_digest_dma_addr,
-ctx->inter_digestsize, NS_BIT);
-   set_flow_mode(&desc[idx], S_DIN_to_HASH);
-   set_setup_mode(&desc[idx], SETUP_LOAD_STATE0);
-   idx++;
-
-   /* Load the hash current length */
-   hw_desc_init(&desc[idx]);
-   set_cipher_mode(&desc[idx], ctx->hw_mode);
-   set_din_sram(&desc[idx],
-cc_

[PATCH v2 23/27] stating: ccree: fix allocation of void sized buf

2018-01-03 Thread Gilad Ben-Yossef 
We were allocating buffers using sizeof(*struct->field) where field was
type void.  Fix it by having a local variable with the real type.

Cc: sta...@vger.kernel.org
Signed-off-by: Gilad Ben-Yossef 
---
 drivers/staging/ccree/ssi_ivgen.c| 9 -
 drivers/staging/ccree/ssi_sram_mgr.c | 9 ++---
 2 files changed, 10 insertions(+), 8 deletions(-)

diff --git a/drivers/staging/ccree/ssi_ivgen.c 
b/drivers/staging/ccree/ssi_ivgen.c
index 94a0502..9d8d307 100644
--- a/drivers/staging/ccree/ssi_ivgen.c
+++ b/drivers/staging/ccree/ssi_ivgen.c
@@ -175,13 +175,10 @@ int cc_ivgen_init(struct cc_drvdata *drvdata)
int rc;
 
/* Allocate "this" context */
-   drvdata->ivgen_handle = kzalloc(sizeof(*drvdata->ivgen_handle),
-   GFP_KERNEL);
-   if (!drvdata->ivgen_handle)
+   ivgen_ctx = kzalloc(sizeof(*ivgen_ctx), GFP_KERNEL);
+   if (!ivgen_ctx)
return -ENOMEM;
 
-   ivgen_ctx = drvdata->ivgen_handle;
-
/* Allocate pool's header for initial enc. key/IV */
ivgen_ctx->pool_meta = dma_alloc_coherent(device, CC_IVPOOL_META_SIZE,
  &ivgen_ctx->pool_meta_dma,
@@ -200,6 +197,8 @@ int cc_ivgen_init(struct cc_drvdata *drvdata)
goto out;
}
 
+   drvdata->ivgen_handle = ivgen_ctx;
+
return cc_init_iv_sram(drvdata);
 
 out:
diff --git a/drivers/staging/ccree/ssi_sram_mgr.c 
b/drivers/staging/ccree/ssi_sram_mgr.c
index e178385..3a93299 100644
--- a/drivers/staging/ccree/ssi_sram_mgr.c
+++ b/drivers/staging/ccree/ssi_sram_mgr.c
@@ -32,13 +32,16 @@ void cc_sram_mgr_fini(struct cc_drvdata *drvdata)
  */
 int cc_sram_mgr_init(struct cc_drvdata *drvdata)
 {
+   struct cc_sram_ctx *ctx;
+
/* Allocate "this" context */
-   drvdata->sram_mgr_handle = kzalloc(sizeof(*drvdata->sram_mgr_handle),
-  GFP_KERNEL);
+   ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
 
-   if (!drvdata->sram_mgr_handle)
+   if (!ctx)
return -ENOMEM;
 
+   drvdata->sram_mgr_handle = ctx;
+
return 0;
 }
 
-- 
2.7.4

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[PATCH v2 25/27] staging: ccree: remove unneeded includes

2018-01-03 Thread Gilad Ben-Yossef 
Remove include files not needed for compilation.

Signed-off-by: Gilad Ben-Yossef 
---
 drivers/staging/ccree/cc_aead.c|  7 ---
 drivers/staging/ccree/cc_buffer_mgr.c  |  6 --
 drivers/staging/ccree/cc_cipher.c  |  4 
 drivers/staging/ccree/cc_driver.c  | 31 ---
 drivers/staging/ccree/cc_hash.c|  2 --
 drivers/staging/ccree/cc_ivgen.c   |  1 -
 drivers/staging/ccree/cc_pm.c  |  2 --
 drivers/staging/ccree/cc_request_mgr.c |  5 -
 8 files changed, 58 deletions(-)

diff --git a/drivers/staging/ccree/cc_aead.c b/drivers/staging/ccree/cc_aead.c
index 0560cc9..494f973 100644
--- a/drivers/staging/ccree/cc_aead.c
+++ b/drivers/staging/ccree/cc_aead.c
@@ -3,18 +3,11 @@
 
 #include 
 #include 
-#include 
 #include 
-#include 
-#include 
 #include 
-#include 
-#include 
 #include 
-#include 
 #include 
 #include 
-#include 
 #include "cc_driver.h"
 #include "cc_buffer_mgr.h"
 #include "cc_aead.h"
diff --git a/drivers/staging/ccree/cc_buffer_mgr.c 
b/drivers/staging/ccree/cc_buffer_mgr.c
index 13275eb..85408ca 100644
--- a/drivers/staging/ccree/cc_buffer_mgr.c
+++ b/drivers/staging/ccree/cc_buffer_mgr.c
@@ -1,17 +1,11 @@
 // SPDX-License-Identifier: GPL-2.0-only
 /* Copyright (C) 2012-2018 ARM Limited or its affiliates. */
 
-#include 
-#include 
-#include 
 #include 
-#include 
 #include 
 #include 
 #include 
 #include 
-#include 
-#include 
 
 #include "cc_buffer_mgr.h"
 #include "cc_lli_defs.h"
diff --git a/drivers/staging/ccree/cc_cipher.c 
b/drivers/staging/ccree/cc_cipher.c
index 37635aa..a768710 100644
--- a/drivers/staging/ccree/cc_cipher.c
+++ b/drivers/staging/ccree/cc_cipher.c
@@ -3,12 +3,8 @@
 
 #include 
 #include 
-#include 
-#include 
 #include 
 #include 
-#include 
-#include 
 #include 
 #include 
 #include 
diff --git a/drivers/staging/ccree/cc_driver.c 
b/drivers/staging/ccree/cc_driver.c
index ddf0cb8..0197aa2 100644
--- a/drivers/staging/ccree/cc_driver.c
+++ b/drivers/staging/ccree/cc_driver.c
@@ -5,43 +5,12 @@
 #include 
 
 #include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-
-#include 
 #include 
 #include 
-#include 
-#include 
 #include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
 #include 
-#include 
-#include 
-#include 
-#include 
-#include 
 #include 
 #include 
-#include 
-
-/* cache.h required for L1_CACHE_ALIGN() and cache_line_size() */
-#include 
-#include 
-#include 
-#include 
-#include 
 #include 
 #include 
 #include 
diff --git a/drivers/staging/ccree/cc_hash.c b/drivers/staging/ccree/cc_hash.c
index c47084b..de49314 100644
--- a/drivers/staging/ccree/cc_hash.c
+++ b/drivers/staging/ccree/cc_hash.c
@@ -3,10 +3,8 @@
 
 #include 
 #include 
-#include 
 #include 
 #include 
-#include 
 #include 
 #include 
 
diff --git a/drivers/staging/ccree/cc_ivgen.c b/drivers/staging/ccree/cc_ivgen.c
index 892cd78..5defe1f 100644
--- a/drivers/staging/ccree/cc_ivgen.c
+++ b/drivers/staging/ccree/cc_ivgen.c
@@ -1,7 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0-only
 /* Copyright (C) 2012-2018 ARM Limited or its affiliates. */
 
-#include 
 #include 
 #include "cc_driver.h"
 #include "cc_ivgen.h"
diff --git a/drivers/staging/ccree/cc_pm.c b/drivers/staging/ccree/cc_pm.c
index 8a28cfd..273216d 100644
--- a/drivers/staging/ccree/cc_pm.c
+++ b/drivers/staging/ccree/cc_pm.c
@@ -2,9 +2,7 @@
 /* Copyright (C) 2012-2018 ARM Limited or its affiliates. */
 
 #include 
-#include 
 #include 
-#include 
 #include 
 #include "cc_driver.h"
 #include "cc_buffer_mgr.h"
diff --git a/drivers/staging/ccree/cc_request_mgr.c 
b/drivers/staging/ccree/cc_request_mgr.c
index eacf944..fe62dd8 100644
--- a/drivers/staging/ccree/cc_request_mgr.c
+++ b/drivers/staging/ccree/cc_request_mgr.c
@@ -2,11 +2,6 @@
 /* Copyright (C) 2012-2018 ARM Limited or its affiliates. */
 
 #include 
-#include 
-#include 
-#include 
-#include 
-#include 
 #include "cc_driver.h"
 #include "cc_buffer_mgr.h"
 #include "cc_request_mgr.h"
-- 
2.7.4

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[PATCH v2 26/27] staging: ccree: update TODO

2018-01-03 Thread Gilad Ben-Yossef 
Update TODO to reflect work done

Signed-off-by: Gilad Ben-Yossef 
---
 drivers/staging/ccree/TODO | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/staging/ccree/TODO b/drivers/staging/ccree/TODO
index 6d8702b..b8e163d 100644
--- a/drivers/staging/ccree/TODO
+++ b/drivers/staging/ccree/TODO
@@ -6,5 +6,5 @@
 *  *
 *
 
-1. Handle HW FIFO fullness more cleanly.
+1. ???
 
-- 
2.7.4

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[PATCH v2 27/27] staging: ccree: add missing include

2018-01-03 Thread Gilad Ben-Yossef 
Add the missing include of include file with function declarations.

Signed-off-by: Gilad Ben-Yossef 
---
 drivers/staging/ccree/cc_debugfs.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/staging/ccree/cc_debugfs.c 
b/drivers/staging/ccree/cc_debugfs.c
index 363a0ef..e07cbb1 100644
--- a/drivers/staging/ccree/cc_debugfs.c
+++ b/drivers/staging/ccree/cc_debugfs.c
@@ -6,6 +6,7 @@
 #include 
 #include "cc_driver.h"
 #include "cc_crypto_ctx.h"
+#include "cc_debugfs.h"
 
 struct cc_debugfs_ctx {
struct dentry *dir;
-- 
2.7.4

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Re: [PATCH v2 0/7] x86/kvm/hyperv: stable clocksorce for L2 guests when running nested KVM on Hyper-V

2018-01-03 Thread Vitaly Kuznetsov 
Vitaly Kuznetsov  writes:

> Paolo Bonzini  writes:
>>
>> Patches 5-7 are
>>
>> Acked-by: Paolo Bonzini 
>>
>> I would appreciate if the Hyper-V folks can provide a topic branch to be
>> merged in both HV and KVM trees.
>>
>
> There's no such thing as Hyper-V tree, patches are usually getting
> merged through 'tip' tree when the majority of changes go to arch/x86 or
> Greg's char-misc tree when changes are drivers/hv heavy (+ net, scsi,
> pci, hid, ... trees for individual drivers).
>
> In this particular case the series is x86-heavy and I believe it should
> go through x86 'tip' tree.
>
> Thomas, Ingo, Peter, could you please take a look? Thanks!

Gentle ping after the holidays season :-)

-- 
  Vitaly
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Re: [PATCH v2 01/27] staging: ccree: SPDXify driver

2018-01-03 Thread Philippe Ombredanne 
Gilad,

On Wed, Jan 3, 2018 at 2:35 PM, Gilad Ben-Yossef  wrote:
> Replace verbatim GPL v2 copy with SPDX tag.
>
> Signed-off-by: Gilad Ben-Yossef 



> --- a/drivers/staging/ccree/cc_crypto_ctx.h
> +++ b/drivers/staging/ccree/cc_crypto_ctx.h
> @@ -1,18 +1,5 @@
> -/*
> - * Copyright (C) 2012-2017 ARM Limited or its affiliates.
> - *
> - * This program is free software; you can redistribute it and/or modify
> - * it under the terms of the GNU General Public License version 2 as
> - * published by the Free Software Foundation.
> - *
> - * This program is distributed in the hope that it will be useful,
> - * but WITHOUT ANY WARRANTY; without even the implied warranty of
> - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> - * GNU General Public License for more details.
> - *
> - * You should have received a copy of the GNU General Public License
> - * along with this program; if not, see .
> - */
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +/* Copyright (C) 2012-2018 ARM Limited or its affiliates. */

Thank you for using the SPDX tags!

Now, while I appreciate your attempt to use the latest and greatest
SPDX license id definitions (published by SPDX a few days agao), THIS
IS NOT a welcomed initiative. Please stick instead to use ONLY the
SPDX license ids that are defined in Thomas doc patches [1]: e.g. use
instead:  SPDX-License-Identifier: GPL-2.0 and please DO NOT USE
GPL-2.0-only for now.

The rationale is simple: from a kernel standpoint we cannot depend on
the latest changes of an external spec such as SPDX (and I am involved
with SPDX alright but I am wearing a kernel hat here). This is why
things have been carefully documented for the kernel proper by Thomas.
It is perfectly fine at some times in the future to adopt the newest
license ids, but this will have to happen in an orderly fashion with a
proper doc update and the eventual tree-wide changes to update every
occurrence. This cannot happen any other way or this would defeat the
whole purpose to have clear licensing kernel-wide: using the latest
and greatest introduces variations and creates a mess that we want to
avoid in the first place.

CC: Thomas Gleixner 

[1] https://lkml.org/lkml/2017/12/28/323

-- 
Cordially
Philippe Ombredanne
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Re: [PATCH v3 00/27] kill devm_ioremap_nocache

2018-01-03 Thread Arnd Bergmann 
On Sun, Dec 24, 2017 at 9:55 AM, christophe leroy
 wrote:
> Le 23/12/2017 à 16:57, Guenter Roeck a écrit :
>>
>> On 12/23/2017 05:48 AM, Greg KH wrote:
>>>
>>> On Sat, Dec 23, 2017 at 06:55:25PM +0800, Yisheng Xie wrote:

 Hi all,

 When I tried to use devm_ioremap function and review related code, I
 found
 devm_ioremap and devm_ioremap_nocache is almost the same with each
 other,
 except one use ioremap while the other use ioremap_nocache.
>>>
>>>
>>> For all arches?  Really?  Look at MIPS, and x86, they have different
>>> functions.
>>>
>>
>> Both mips and x86 end up mapping the same function, but other arches
>> don't.
>> mn10300 is one where ioremap and ioremap_nocache are definitely different.
>
>
> alpha: identical
> arc: identical
> arm: identical
> arm64: identical
> cris: different<==
> frv: identical
> hexagone: identical
> ia64: different<==
> m32r: identical
> m68k: identical
> metag: identical
> microblaze: identical
> mips: identical
> mn10300: different <==
> nios: identical
> openrisc: different<==
> parisc: identical
> riscv: identical
> s390: identical
> sh: identical
> sparc: identical
> tile: identical
> um: rely on asm/generic
> unicore32: identical
> x86: identical
> asm/generic (no mmu): identical
>
> So 4 among all arches seems to have ioremap() and ioremap_nocache() being
> different.
>
> Could we have a define set by the 4 arches on which ioremap() and
> ioremap_nocache() are different, something like
> HAVE_DIFFERENT_IOREMAP_NOCACHE ?

I wonder if those are actually correct or not. What I found looking at
those architectures:

- openrisc only has one driver using ioremap (drivers/net/ethernet/ethoc.c)
  and that calls ioremap_nocache(). Presumably the authors went with the
  implementation for ioremap that made sense (using default attributes)
  rather than the one that actually works (using uncached).

- On ia64, ioremap() checks the attributes for the physical
  address based on firmware tables and then picks either cached
  or uncached mappings. ioremap_nocache() does the same but
  returns NULL instead of a cached mapping for anything that is
  not an MMIO address. Presumably it would just work to always
  call ioremap().

- mn10300 appears to be wrong, broken by David Howells in
  commit 83c2dc15ce82 ("MN10300: Handle cacheable PCI regions
  in pci_iomap()") for any driver calling ioremap() by to get uncached
  memory, if I understand the comment for commit 34f1bdee1910
   ("mn10300: switch to GENERIC_PCI_IOMAP") correctly: it
  seems that PCI addresses include the 'uncached' bit by default
  to get the right behavior, but dropping that bit breaks it.

- cris seems similar to mn10300 in hardware, using an phys address
  bit for uncached access. There are two callers in arch code that
  appear to rely on the cachable output of ioremap()
arch/cris/arch-v32/kernel/signal.c:
__ioremap_prot(virt_to_phys(data), PAGE_SIZE, PAGE_SIGNAL_TRAMPOLINE);
arch/cris/arch-v32/mm/intmem.c: intmem_virtual =
ioremap(MEM_INTMEM_START + RESERVED_SIZE,
  It's unclear whether ioremap_nocache() actually has any users
  on cris, or whether it was only added for compile-time testing,
  and calling plain ioremap() would always work too (assuming we
  pass the phys address with the uncached-bit set).

   Arnd
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[PATCH] staging: android: check the return value of register_shrinker

2018-01-03 Thread Xiongwei Song 
register_shrinker call is made in ashmem_init, it may return error code,
so we need to check it.

Signed-off-by: Xiongwei Song 
---
 drivers/staging/android/ashmem.c | 8 +++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/staging/android/ashmem.c b/drivers/staging/android/ashmem.c
index 4e8947923904..0b23c3e25cd4 100644
--- a/drivers/staging/android/ashmem.c
+++ b/drivers/staging/android/ashmem.c
@@ -854,12 +854,18 @@ static int __init ashmem_init(void)
goto out_free2;
}
 
-   register_shrinker(&ashmem_shrinker);
+   ret = register_shrinker(&ashmem_shrinker);
+   if (unlikely(ret)) {
+   pr_err("failed to register shrinker!\n");
+   goto out_demisc;
+   }
 
pr_info("initialized\n");
 
return 0;
 
+out_demisc:
+   misc_deregister(&ashmem_misc);
 out_free2:
kmem_cache_destroy(ashmem_range_cachep);
 out_free1:
-- 
2.15.1

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