Re: [PATCH] staging: iio: trigger: replace device_attr with device_attr_rw

2018-01-06 Thread Jonathan Cameron
On Thu, 4 Jan 2018 16:28:51 +0530
Aishwarya Pant  wrote:

> This is a clean-up patch which replaces DEVICE_ATTR() macro with the
> file permission specific DEVICE_ATTR_RW() macro for compaction and
> readability. Done using coccinelle.
> 
> Signed-off-by: Aishwarya Pant 

Whilst this driver is in theory going away (Lars, update on that?)
I guess this is a minor improvement.

Applied to the togreg branch of iio.git and pushed out as testing
for the autobuilders to play with it.

Also, note I changed the title to include the driver name as 
just putting to a directory is not much use for people trying
to track down changes that matter to them.

Jonathan

> ---
>  drivers/staging/iio/trigger/iio-trig-bfin-timer.c | 15 +++
>  1 file changed, 7 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/staging/iio/trigger/iio-trig-bfin-timer.c 
> b/drivers/staging/iio/trigger/iio-trig-bfin-timer.c
> index f389f5cca99d..71f11d7472c0 100644
> --- a/drivers/staging/iio/trigger/iio-trig-bfin-timer.c
> +++ b/drivers/staging/iio/trigger/iio-trig-bfin-timer.c
> @@ -78,9 +78,9 @@ static int iio_bfin_tmr_set_state(struct iio_trigger *trig, 
> bool state)
>   return 0;
>  }
>  
> -static ssize_t iio_bfin_tmr_frequency_store(struct device *dev,
> - struct device_attribute *attr,
> - const char *buf, size_t count)
> +static ssize_t frequency_store(struct device *dev,
> +struct device_attribute *attr,
> +const char *buf, size_t count)
>  {
>   struct iio_trigger *trig = to_iio_trigger(dev);
>   struct bfin_tmr_state *st = iio_trigger_get_drvdata(trig);
> @@ -116,9 +116,9 @@ static ssize_t iio_bfin_tmr_frequency_store(struct device 
> *dev,
>   return count;
>  }
>  
> -static ssize_t iio_bfin_tmr_frequency_show(struct device *dev,
> -struct device_attribute *attr,
> -char *buf)
> +static ssize_t frequency_show(struct device *dev,
> +   struct device_attribute *attr,
> +   char *buf)
>  {
>   struct iio_trigger *trig = to_iio_trigger(dev);
>   struct bfin_tmr_state *st = iio_trigger_get_drvdata(trig);
> @@ -133,8 +133,7 @@ static ssize_t iio_bfin_tmr_frequency_show(struct device 
> *dev,
>   return sprintf(buf, "%lu\n", val);
>  }
>  
> -static DEVICE_ATTR(frequency, 0644, iio_bfin_tmr_frequency_show,
> -iio_bfin_tmr_frequency_store);
> +static DEVICE_ATTR_RW(frequency);
>  
>  static struct attribute *iio_bfin_tmr_trigger_attrs[] = {
>   &dev_attr_frequency.attr,

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Re: [PATCH] Staging: iio: Prefer using BIT macro

2018-01-06 Thread Jonathan Cameron
On Thu,  4 Jan 2018 22:06:31 +0530
Sumit Pundir  wrote:

Patch title needs to mention the specific driver being changed.

> This patch fixes the following checkpatch.pl error at multiple lines:
> 
> CHECK: Prefer using the BIT macro
> 
> Signed-off-by: Sumit Pundir 

The BIT Macros is just fine if they are actually a single bit field.
Some of these are not. See below.

You really have to check the datasheet to be sure on these though 
in the cases here it's obvious from the surrounding lines.

Changing those ones to BIT will actively hurt readability.

Anyhow, the other cases are good so if you can prepare a patch
changing just that and ensd it that would be great.
> ---
>  drivers/staging/iio/cdc/ad7152.c | 12 ++--
>  1 file changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/staging/iio/cdc/ad7152.c 
> b/drivers/staging/iio/cdc/ad7152.c
> index 59d1b35..b2b15b9 100644
> --- a/drivers/staging/iio/cdc/ad7152.c
> +++ b/drivers/staging/iio/cdc/ad7152.c
> @@ -47,24 +47,24 @@
>  #define AD7152_STATUS_PWDN   BIT(7)
>  
>  /* Setup Register Bit Designations (AD7152_REG_CHx_SETUP) */
> -#define AD7152_SETUP_CAPDIFF (1 << 5)
> +#define AD7152_SETUP_CAPDIFF BIT(5)

This is indeed a 1 bit field so fine.

>  #define AD7152_SETUP_RANGE_2pF   (0 << 6)
> -#define AD7152_SETUP_RANGE_0_5pF (1 << 6)
> +#define AD7152_SETUP_RANGE_0_5pF BIT(6)
This is clearly putting the value 1 in a 2 bit field within
the register - BIT macro obscures this compeltely.
>  #define AD7152_SETUP_RANGE_1pF   (2 << 6)
>  #define AD7152_SETUP_RANGE_4pF   (3 << 6)
>  #define AD7152_SETUP_RANGE(x)((x) << 6)
>  
>  /* Config Register Bit Designations (AD7152_REG_CFG) */
> -#define AD7152_CONF_CH2EN(1 << 3)
> -#define AD7152_CONF_CH1EN(1 << 4)
> +#define AD7152_CONF_CH2ENBIT(3)
> +#define AD7152_CONF_CH1ENBIT(4)

These two are valid I think.

>  #define AD7152_CONF_MODE_IDLE(0 << 0)
> -#define AD7152_CONF_MODE_CONT_CONV   (1 << 0)
> +#define AD7152_CONF_MODE_CONT_CONV   BIT(0)

This one is not. Again clear from the code let alone checking the
datasheet. We write 6 to the same location.

>  #define AD7152_CONF_MODE_SINGLE_CONV (2 << 0)
>  #define AD7152_CONF_MODE_OFFS_CAL(5 << 0)
>  #define AD7152_CONF_MODE_GAIN_CAL(6 << 0)
>  
>  /* Capdac Register Bit Designations (AD7152_REG_CAPDAC_XXX) */
> -#define AD7152_CAPDAC_DACEN  (1 << 7)
> +#define AD7152_CAPDAC_DACEN  BIT(7)

This one is a 1 bit field so fine.

>  #define AD7152_CAPDAC_DACP(x)((x) & 0x1F)
>  
>  /* CFG2 Register Bit Designations (AD7152_REG_CFG2) */

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Re: [PATCH] Staging: iio: Prefer using BIT macro

2018-01-06 Thread Sumit Pundir
On Sat, Jan 6, 2018 at 6:12 PM, Jonathan Cameron  wrote:
> On Thu,  4 Jan 2018 22:06:31 +0530
> Sumit Pundir  wrote:
>
> Patch title needs to mention the specific driver being changed.
>
>> This patch fixes the following checkpatch.pl error at multiple lines:
>>
>> CHECK: Prefer using the BIT macro
>>
>> Signed-off-by: Sumit Pundir 
>
> The BIT Macros is just fine if they are actually a single bit field.
> Some of these are not. See below.
>
> You really have to check the datasheet to be sure on these though
> in the cases here it's obvious from the surrounding lines.
>
> Changing those ones to BIT will actively hurt readability.
>
> Anyhow, the other cases are good so if you can prepare a patch
> changing just that and ensd it that would be great.
>> ---
>>  drivers/staging/iio/cdc/ad7152.c | 12 ++--
>>  1 file changed, 6 insertions(+), 6 deletions(-)
>>
>> diff --git a/drivers/staging/iio/cdc/ad7152.c 
>> b/drivers/staging/iio/cdc/ad7152.c
>> index 59d1b35..b2b15b9 100644
>> --- a/drivers/staging/iio/cdc/ad7152.c
>> +++ b/drivers/staging/iio/cdc/ad7152.c
>> @@ -47,24 +47,24 @@
>>  #define AD7152_STATUS_PWDN   BIT(7)
>>
>>  /* Setup Register Bit Designations (AD7152_REG_CHx_SETUP) */
>> -#define AD7152_SETUP_CAPDIFF (1 << 5)
>> +#define AD7152_SETUP_CAPDIFF BIT(5)
>
> This is indeed a 1 bit field so fine.
>
>>  #define AD7152_SETUP_RANGE_2pF   (0 << 6)
>> -#define AD7152_SETUP_RANGE_0_5pF (1 << 6)
>> +#define AD7152_SETUP_RANGE_0_5pF BIT(6)
> This is clearly putting the value 1 in a 2 bit field within
> the register - BIT macro obscures this compeltely.
>>  #define AD7152_SETUP_RANGE_1pF   (2 << 6)
>>  #define AD7152_SETUP_RANGE_4pF   (3 << 6)
>>  #define AD7152_SETUP_RANGE(x)((x) << 6)
>>
>>  /* Config Register Bit Designations (AD7152_REG_CFG) */
>> -#define AD7152_CONF_CH2EN(1 << 3)
>> -#define AD7152_CONF_CH1EN(1 << 4)
>> +#define AD7152_CONF_CH2ENBIT(3)
>> +#define AD7152_CONF_CH1ENBIT(4)
>
> These two are valid I think.
>
>>  #define AD7152_CONF_MODE_IDLE(0 << 0)
>> -#define AD7152_CONF_MODE_CONT_CONV   (1 << 0)
>> +#define AD7152_CONF_MODE_CONT_CONV   BIT(0)
>
> This one is not. Again clear from the code let alone checking the
> datasheet. We write 6 to the same location.
>
>>  #define AD7152_CONF_MODE_SINGLE_CONV (2 << 0)
>>  #define AD7152_CONF_MODE_OFFS_CAL(5 << 0)
>>  #define AD7152_CONF_MODE_GAIN_CAL(6 << 0)
>>
>>  /* Capdac Register Bit Designations (AD7152_REG_CAPDAC_XXX) */
>> -#define AD7152_CAPDAC_DACEN  (1 << 7)
>> +#define AD7152_CAPDAC_DACEN  BIT(7)
>
> This one is a 1 bit field so fine.
>

Hi Jonathan,

I will send a v2 of this patch with all the prescribed changes.

Thanks,
Sumit

On Sat, Jan 6, 2018 at 6:12 PM, Jonathan Cameron  wrote:
> On Thu,  4 Jan 2018 22:06:31 +0530
> Sumit Pundir  wrote:
>
> Patch title needs to mention the specific driver being changed.
>
>> This patch fixes the following checkpatch.pl error at multiple lines:
>>
>> CHECK: Prefer using the BIT macro
>>
>> Signed-off-by: Sumit Pundir 
>
> The BIT Macros is just fine if they are actually a single bit field.
> Some of these are not. See below.
>
> You really have to check the datasheet to be sure on these though
> in the cases here it's obvious from the surrounding lines.
>
> Changing those ones to BIT will actively hurt readability.
>
> Anyhow, the other cases are good so if you can prepare a patch
> changing just that and ensd it that would be great.
>> ---
>>  drivers/staging/iio/cdc/ad7152.c | 12 ++--
>>  1 file changed, 6 insertions(+), 6 deletions(-)
>>
>> diff --git a/drivers/staging/iio/cdc/ad7152.c 
>> b/drivers/staging/iio/cdc/ad7152.c
>> index 59d1b35..b2b15b9 100644
>> --- a/drivers/staging/iio/cdc/ad7152.c
>> +++ b/drivers/staging/iio/cdc/ad7152.c
>> @@ -47,24 +47,24 @@
>>  #define AD7152_STATUS_PWDN   BIT(7)
>>
>>  /* Setup Register Bit Designations (AD7152_REG_CHx_SETUP) */
>> -#define AD7152_SETUP_CAPDIFF (1 << 5)
>> +#define AD7152_SETUP_CAPDIFF BIT(5)
>
> This is indeed a 1 bit field so fine.
>
>>  #define AD7152_SETUP_RANGE_2pF   (0 << 6)
>> -#define AD7152_SETUP_RANGE_0_5pF (1 << 6)
>> +#define AD7152_SETUP_RANGE_0_5pF BIT(6)
> This is clearly putting the value 1 in a 2 bit field within
> the register - BIT macro obscures this compeltely.
>>  #define AD7152_SETUP_RANGE_1pF   (2 << 6)
>>  #define AD7152_SETUP_RANGE_4pF   (3 << 6)
>>  #define AD7152_SETUP_RANGE(x)((x) << 6)
>>
>>  /* Config Register Bit Designations (AD7152_REG_CFG) */
>> -#define AD7152_CONF_CH2EN(1 << 3)
>> -#define AD7152_CONF_CH1EN(1 << 4)
>> +#define AD7152_CONF_CH2ENBIT(3)
>> +#define AD7152_CONF_CH1ENBIT(4)
>
> These two are valid I think.
>
>>  #define AD7152_CONF_MODE_IDLE(0 << 0)
>> -#de

[PATCH v2] Staging: iio: cdc: Prefer using BIT macro

2018-01-06 Thread Sumit Pundir
This patch fixes the following checkpatch.pl issue at multiple lines:

CHECK: Prefer using the BIT macro

Signed-off-by: Sumit Pundir 
---
v2:
 Added the specific driver being changed to the patch title
 and the appropriate fixes as suggested.

 drivers/staging/iio/cdc/ad7152.c | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/staging/iio/cdc/ad7152.c b/drivers/staging/iio/cdc/ad7152.c
index 59d1b35..19dc896 100644
--- a/drivers/staging/iio/cdc/ad7152.c
+++ b/drivers/staging/iio/cdc/ad7152.c
@@ -47,7 +47,7 @@
 #define AD7152_STATUS_PWDN BIT(7)
 
 /* Setup Register Bit Designations (AD7152_REG_CHx_SETUP) */
-#define AD7152_SETUP_CAPDIFF   (1 << 5)
+#define AD7152_SETUP_CAPDIFF   BIT(5)
 #define AD7152_SETUP_RANGE_2pF (0 << 6)
 #define AD7152_SETUP_RANGE_0_5pF   (1 << 6)
 #define AD7152_SETUP_RANGE_1pF (2 << 6)
@@ -55,8 +55,8 @@
 #define AD7152_SETUP_RANGE(x)  ((x) << 6)
 
 /* Config Register Bit Designations (AD7152_REG_CFG) */
-#define AD7152_CONF_CH2EN  (1 << 3)
-#define AD7152_CONF_CH1EN  (1 << 4)
+#define AD7152_CONF_CH2EN  BIT(3)
+#define AD7152_CONF_CH1EN  BIT(4)
 #define AD7152_CONF_MODE_IDLE  (0 << 0)
 #define AD7152_CONF_MODE_CONT_CONV (1 << 0)
 #define AD7152_CONF_MODE_SINGLE_CONV   (2 << 0)
@@ -64,7 +64,7 @@
 #define AD7152_CONF_MODE_GAIN_CAL  (6 << 0)
 
 /* Capdac Register Bit Designations (AD7152_REG_CAPDAC_XXX) */
-#define AD7152_CAPDAC_DACEN(1 << 7)
+#define AD7152_CAPDAC_DACENBIT(7)
 #define AD7152_CAPDAC_DACP(x)  ((x) & 0x1F)
 
 /* CFG2 Register Bit Designations (AD7152_REG_CFG2) */
-- 
2.7.4

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Re: [PATCH v2] Staging: iio: cdc: Prefer using BIT macro

2018-01-06 Thread Jonathan Cameron
On Sat,  6 Jan 2018 20:35:24 +0530
Sumit Pundir  wrote:

> This patch fixes the following checkpatch.pl issue at multiple lines:
> 
> CHECK: Prefer using the BIT macro
> 
> Signed-off-by: Sumit Pundir 
> ---
> v2:
>  Added the specific driver being changed to the patch title
Not that I can see.

Anyhow, never mind I'll fix it whilst applying.

Applied to the togreg branch of iio.git and pushed out as testing
for the autobuilders to play with it.

Thanks,

Jonathan

>  and the appropriate fixes as suggested.
> 
>  drivers/staging/iio/cdc/ad7152.c | 8 
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/staging/iio/cdc/ad7152.c 
> b/drivers/staging/iio/cdc/ad7152.c
> index 59d1b35..19dc896 100644
> --- a/drivers/staging/iio/cdc/ad7152.c
> +++ b/drivers/staging/iio/cdc/ad7152.c
> @@ -47,7 +47,7 @@
>  #define AD7152_STATUS_PWDN   BIT(7)
>  
>  /* Setup Register Bit Designations (AD7152_REG_CHx_SETUP) */
> -#define AD7152_SETUP_CAPDIFF (1 << 5)
> +#define AD7152_SETUP_CAPDIFF BIT(5)
>  #define AD7152_SETUP_RANGE_2pF   (0 << 6)
>  #define AD7152_SETUP_RANGE_0_5pF (1 << 6)
>  #define AD7152_SETUP_RANGE_1pF   (2 << 6)
> @@ -55,8 +55,8 @@
>  #define AD7152_SETUP_RANGE(x)((x) << 6)
>  
>  /* Config Register Bit Designations (AD7152_REG_CFG) */
> -#define AD7152_CONF_CH2EN(1 << 3)
> -#define AD7152_CONF_CH1EN(1 << 4)
> +#define AD7152_CONF_CH2ENBIT(3)
> +#define AD7152_CONF_CH1ENBIT(4)
>  #define AD7152_CONF_MODE_IDLE(0 << 0)
>  #define AD7152_CONF_MODE_CONT_CONV   (1 << 0)
>  #define AD7152_CONF_MODE_SINGLE_CONV (2 << 0)
> @@ -64,7 +64,7 @@
>  #define AD7152_CONF_MODE_GAIN_CAL(6 << 0)
>  
>  /* Capdac Register Bit Designations (AD7152_REG_CAPDAC_XXX) */
> -#define AD7152_CAPDAC_DACEN  (1 << 7)
> +#define AD7152_CAPDAC_DACEN  BIT(7)
>  #define AD7152_CAPDAC_DACP(x)((x) & 0x1F)
>  
>  /* CFG2 Register Bit Designations (AD7152_REG_CFG2) */

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[PATCH] staging: ccree: shorten lengthy lines with breaks

2018-01-06 Thread George Edward Bulmer
This fixes five instances of checkpatch warning:
WARNING: line over 80 characters

Signed-off-by: George Edward Bulmer 
---
 drivers/staging/ccree/ssi_sysfs.c | 21 -
 1 file changed, 16 insertions(+), 5 deletions(-)

diff --git a/drivers/staging/ccree/ssi_sysfs.c 
b/drivers/staging/ccree/ssi_sysfs.c
index 5d39f15cdb59..d488f65e4b1e 100644
--- a/drivers/staging/ccree/ssi_sysfs.c
+++ b/drivers/staging/ccree/ssi_sysfs.c
@@ -32,15 +32,26 @@ static ssize_t ssi_sys_regdump_show(struct kobject *kobj,
int offset = 0;
 
register_value = cc_ioread(drvdata, CC_REG(HOST_SIGNATURE));
-   offset += scnprintf(buf + offset, PAGE_SIZE - offset, "%s \t(0x%lX)\t 
0x%08X\n", "HOST_SIGNATURE   ", DX_HOST_SIGNATURE_REG_OFFSET, 
register_value);
+   offset += scnprintf(buf + offset, PAGE_SIZE - offset,
+   "%s \t(0x%lX)\t 0x%08X\n", "HOST_SIGNATURE   ",
+   DX_HOST_SIGNATURE_REG_OFFSET, register_value);
register_value = cc_ioread(drvdata, CC_REG(HOST_IRR));
-   offset += scnprintf(buf + offset, PAGE_SIZE - offset, "%s \t(0x%lX)\t 
0x%08X\n", "HOST_IRR ", DX_HOST_IRR_REG_OFFSET, register_value);
+   offset += scnprintf(buf + offset, PAGE_SIZE - offset,
+   "%s \t(0x%lX)\t 0x%08X\n", "HOST_IRR ",
+   DX_HOST_IRR_REG_OFFSET, register_value);
register_value = cc_ioread(drvdata, CC_REG(HOST_POWER_DOWN_EN));
-   offset += scnprintf(buf + offset, PAGE_SIZE - offset, "%s \t(0x%lX)\t 
0x%08X\n", "HOST_POWER_DOWN_EN   ", DX_HOST_POWER_DOWN_EN_REG_OFFSET, 
register_value);
+   offset += scnprintf(buf + offset, PAGE_SIZE - offset,
+   "%s \t(0x%lX)\t 0x%08X\n", "HOST_POWER_DOWN_EN   ",
+   DX_HOST_POWER_DOWN_EN_REG_OFFSET, register_value);
register_value =  cc_ioread(drvdata, CC_REG(AXIM_MON_ERR));
-   offset += scnprintf(buf + offset, PAGE_SIZE - offset, "%s \t(0x%lX)\t 
0x%08X\n", "AXIM_MON_ERR ", DX_AXIM_MON_ERR_REG_OFFSET, register_value);
+   offset += scnprintf(buf + offset, PAGE_SIZE - offset,
+   "%s \t(0x%lX)\t 0x%08X\n", "AXIM_MON_ERR ",
+   DX_AXIM_MON_ERR_REG_OFFSET, register_value);
register_value = cc_ioread(drvdata, CC_REG(DSCRPTR_QUEUE_CONTENT));
-   offset += scnprintf(buf + offset, PAGE_SIZE - offset, "%s \t(0x%lX)\t 
0x%08X\n", "DSCRPTR_QUEUE_CONTENT", DX_DSCRPTR_QUEUE_CONTENT_REG_OFFSET, 
register_value);
+   offset += scnprintf(buf + offset, PAGE_SIZE - offset,
+   "%s \t(0x%lX)\t 0x%08X\n", "DSCRPTR_QUEUE_CONTENT",
+   DX_DSCRPTR_QUEUE_CONTENT_REG_OFFSET,
+   register_value);
return offset;
 }
 
-- 
2.15.1

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Re: [PATCH] staging: ccree: shorten lengthy lines with breaks

2018-01-06 Thread Joe Perches
On Sat, 2018-01-06 at 15:47 +, George Edward Bulmer wrote:
> This fixes five instances of checkpatch warning:
> WARNING: line over 80 characters
[]
> diff --git a/drivers/staging/ccree/ssi_sysfs.c 
> b/drivers/staging/ccree/ssi_sysfs.c
[]
> @@ -32,15 +32,26 @@ static ssize_t ssi_sys_regdump_show(struct kobject *kobj,
>   int offset = 0;
>  
>   register_value = cc_ioread(drvdata, CC_REG(HOST_SIGNATURE));
> - offset += scnprintf(buf + offset, PAGE_SIZE - offset, "%s \t(0x%lX)\t 
> 0x%08X\n", "HOST_SIGNATURE   ", DX_HOST_SIGNATURE_REG_OFFSET, 
> register_value);
> + offset += scnprintf(buf + offset, PAGE_SIZE - offset,
> + "%s \t(0x%lX)\t 0x%08X\n", "HOST_SIGNATURE   ",

trivia:

Using %-21s would do the same as padding the format
string argument and would create smaller object code.

offset += scnprintf(buf + offset, PAGE_SIZE - offset,
"%-21s \t(0x%lX)\t 0x%08X\n", "HOST_SIGNATURE",

Using an extra space before a tab is odd.

Using a space after a tab is odd too.

> + DX_HOST_SIGNATURE_REG_OFFSET, register_value);
>   register_value = cc_ioread(drvdata, CC_REG(HOST_IRR));
> - offset += scnprintf(buf + offset, PAGE_SIZE - offset, "%s \t(0x%lX)\t 
> 0x%08X\n", "HOST_IRR ", DX_HOST_IRR_REG_OFFSET, register_value);
> + offset += scnprintf(buf + offset, PAGE_SIZE - offset,
> + "%s \t(0x%lX)\t 0x%08X\n", "HOST_IRR ",

etc...

> + DX_HOST_IRR_REG_OFFSET, register_value);
>   register_value = cc_ioread(drvdata, CC_REG(HOST_POWER_DOWN_EN));
> - offset += scnprintf(buf + offset, PAGE_SIZE - offset, "%s \t(0x%lX)\t 
> 0x%08X\n", "HOST_POWER_DOWN_EN   ", DX_HOST_POWER_DOWN_EN_REG_OFFSET, 
> register_value);
> + offset += scnprintf(buf + offset, PAGE_SIZE - offset,
> + "%s \t(0x%lX)\t 0x%08X\n", "HOST_POWER_DOWN_EN   ",
> + DX_HOST_POWER_DOWN_EN_REG_OFFSET, register_value);
>   register_value =  cc_ioread(drvdata, CC_REG(AXIM_MON_ERR));
> - offset += scnprintf(buf + offset, PAGE_SIZE - offset, "%s \t(0x%lX)\t 
> 0x%08X\n", "AXIM_MON_ERR ", DX_AXIM_MON_ERR_REG_OFFSET, 
> register_value);
> + offset += scnprintf(buf + offset, PAGE_SIZE - offset,
> + "%s \t(0x%lX)\t 0x%08X\n", "AXIM_MON_ERR ",
> + DX_AXIM_MON_ERR_REG_OFFSET, register_value);
>   register_value = cc_ioread(drvdata, CC_REG(DSCRPTR_QUEUE_CONTENT));
> - offset += scnprintf(buf + offset, PAGE_SIZE - offset, "%s \t(0x%lX)\t 
> 0x%08X\n", "DSCRPTR_QUEUE_CONTENT", DX_DSCRPTR_QUEUE_CONTENT_REG_OFFSET, 
> register_value);
> + offset += scnprintf(buf + offset, PAGE_SIZE - offset,
> + "%s \t(0x%lX)\t 0x%08X\n", "DSCRPTR_QUEUE_CONTENT",
> + DX_DSCRPTR_QUEUE_CONTENT_REG_OFFSET,
> + register_value);
>   return offset;
>  }
>  
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