Re: [E1000-devel] 82599EB - PCI Passthrough gives Error -5
> -Original Message- > From: Robert Dunkley [mailto:rob...@saq.co.uk] > Sent: Friday, March 25, 2011 1:11 AM > To: Rose, Gregory V; E1000-devel@lists.sourceforge.net > Cc: Linux NICS > Subject: RE: 82599EB - PCI Passthrough gives Error -5 > > Hi Greg, > > > I believe I have to pass through the PF because I need to support an MTU > of 1600 within the VM which from what I've read is impossible with > SR-IOV, is that correct? With Debian Squeeze PF pass through seems to > work (Detects card and SFPs), I assume per port PF pass through is known > to work but not officially supported? You are correct, we don't' support jumbo frames or frames larger than the standard Ethernet MTU size on the 82599EB in SR-IOV mode. Also, as you state per port PF pass through is known to work on a large number of platforms and OS configurations but we do not officially support it. You might be able to get help from your OS vendor if they claim to support it. - Greg -- Enable your software for Intel(R) Active Management Technology to meet the growing manageability and security demands of your customers. Businesses are taking advantage of Intel(R) vPro (TM) technology - will your software be a part of the solution? Download the Intel(R) Manageability Checker today! http://p.sf.net/sfu/intel-dev2devmar ___ E1000-devel mailing list E1000-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/e1000-devel To learn more about Intel® Ethernet, visit http://communities.intel.com/community/wired
Re: [E1000-devel] Intel 82599 perfect-based Flow director filters - Rx queue by VLAN ID
Hi Alex, Thanks for your assistance for so far in this thread. I have some more comments though :) It appears to me that one of the MQ and RSS parameters are redundant in the current implementation But I still think the best option is when RSS is set to 0 that multiple queues are still enabled - becuase MQ indicates this - and that the MRQC register does not have bits set for doing the RSS hash. If you dont agree with this what would you think of adding an extra parameter to disbale the RSS hashing when multiple queues are active? My use case is an ATCA chassis where there is already a device before the 82599 which does the load balancing and the filters just need to assign the packets to the queues. No additional load balancing function such as the RSS hashing mechanism is required. I feel that other uses with a similar use case will want to do the same thing, hence why I am suggesting a chaned to the ixgbe driver rather that me just modifying the driver for my own use. And I agree with you that the current implementation of the filtering on the 82599 is not the best, the 82599 lacks better l2 and l3 filtering. The flow director and 5-tuple filtering should be configurable independent of the L4 UDP/TCP source ports which are not present in a fragmented UDP/TCP flows. (if the IP identifiaction field could be saved for the head fragment of a flow and the subsequent fragments Identification field compared so that the remaining fragmented packets are redirected to the same queue). Will these issue be addressed in the next generation 10GbE/40GbE NIC... Fortville I think? Could you also explain if the RSS hash mechanism can take into account a symmetry in the source/destination IP address and source/destination port - ie so that the uplink/downlink traffic from a flow is assigned to the same queue. Also does the flow director filters appy a semmetry in this respect? Or are two seperate rules needed? Regards Jonathan On 14 March 2011 17:02, Duyck, Alexander H wrote: > Hi Jonathan, > > > > I’m glad to hear that worked for you. > > > > The MQ switch is meant to be more of a global ON/OFF switch for all of the > multiqueue features in general. The RSS setting is meant to be used to > distribute the workload across multiple queues. > > > > The problem is it is a compromise either way. I’m not certain that the > current setup is still the best given that it would now be directing a > single flow that is a mix of fragmented and non-fragmented to two queues > which will cause out of order reception. In addition the fragmented queue > is going to cause considerable performance issues if a large volume of > traffic is fragmented since it will be the only one that can process it. > > > > I am not certain most users would actually want multiple queues with only > perfect filters sorting between them. Most of our information seems to show > that relying on RSS if a filter misses Flow Director is acceptable to most > of our customers due to the distribution of workload. > > > > Thanks, > > > > Alex > > > > *From:* Lynch, Jonathan [mailto:jonathan.ly...@thenowfactory.com] > *Sent:* Monday, March 14, 2011 3:48 AM > > *To:* Duyck, Alexander H > *Cc:* E1000-devel@lists.sourceforge.net > *Subject:* Re: [E1000-devel] Intel 82599 perfect-based Flow director > filters - Rx queue by VLAN ID > > > > Hi Alex, > > that change does the trick...thanks > > I was expecting the parameter MQ would enable multiple queues and that RSS > would turn on/off the RSS hashing mechanism. > I'd imagine that others using the flow director or 5-tuple filters would > want the option of disabling the RSS-hashing mechanism to control packets > that miss the filters without having to modify/recompile the driver etc. > > is it possible to change the behaviour of the RSS module parameter to the > above for future releases? > > Regards > Jonathan > > On 11 March 2011 18:32, Duyck, Alexander H > wrote: > > As you stated RSS is used if the packet is fragmented. The RSS hash > determination will be based off of the IPv4 source and destination address. > If needed it is possible to compute it and how to do so is explained in the > datasheet. > > > > If you are looking to still have multiple queues, but RSS disabled then you > will likely need to modify the driver. The simplest solution would be to > remove the lines below from the driver’s ixgbe_main.c file: > > > > /* Perform hash on these packet types */ > > mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4 > > | IXGBE_MRQC_RSS_FIELD_IPV4_TCP > > | IXGBE_MRQC_RSS_FIELD_IPV6 > > | IXGBE_MRQC_RSS_FIELD_IPV6_TCP; > > > > This would allow you to keep the multiple queues, but it will result in all > packets that don’t match one of the Flow Director filters will be routed to > queue 0. > > > > Thanks, > > > > Alex > > > > > > *From:* Lynch, Jonathan [mailto:jonathan.ly...@thenowfactory.com] > *Sent:* Friday, March 11, 2011 10:02 AM > > > *To:* Duyck, Alexander
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Re: [E1000-devel] 82599EB - PCI Passthrough gives Error -5
Hi Greg, I believe I have to pass through the PF because I need to support an MTU of 1600 within the VM which from what I've read is impossible with SR-IOV, is that correct? With Debian Squeeze PF pass through seems to work (Detects card and SFPs), I assume per port PF pass through is known to work but not officially supported? Thanks, Rob -Original Message- From: Rose, Gregory V [mailto:gregory.v.r...@intel.com] Sent: 24 March 2011 16:31 To: Robert Dunkley; E1000-devel@lists.sourceforge.net Cc: Linux NICS Subject: RE: 82599EB - PCI Passthrough gives Error -5 > -Original Message- > From: Robert Dunkley [mailto:rob...@saq.co.uk] > Sent: Thursday, March 24, 2011 1:22 AM > To: E1000-devel@lists.sourceforge.net > Cc: Linux NICS > Subject: [E1000-devel] 82599EB - PCI Passthrough gives Error -5 > > I'm trying to setup some X520-DA2s with one copper cable and one Intel > LR SFP in each for standard PF PCI device pass through. The same > systems are working OK with virtual function pass through of 82576 > ports so I think the Xen configuration is fine. The 82599EB works > correctly in Dom0, appears in pci assignable devices when hidden and > is set as permissive in pciback. All messages in Dom0 seem encouraging > but the paravirt Domu just gives error -5 when using the 3.2.10 driver > or the Redhat supplied drivers. Kernel is RHEL 2.6.18-247. Error -5 is EIO. Without more information it's hard for me to determine what your exact problem is but Intel does not officially support pass through (aka Direct Assignment) of PF devices to guests. Vendors who support that feature do so at their own risk. We would suggest using the SR-IOV feature to pass a virtual function through to a guest and that is our only supported configuration. Regards, - Greg Greg Rose LAN Access Division Intel Corp. The SAQ Group Registered Office: 18 Chapel Street, Petersfield, Hampshire GU32 3DZ SAQ is the trading name of SEMTEC Limited. Registered in England & Wales Company Number: 06481952 http://www.saqnet.co.uk AS29219 SAQ Group Delivers high quality, honestly priced communication and I.T. services to UK Business. Broadband : Domains : Email : Hosting : CoLo : Servers : Racks : Transit : Backups : Managed Networks : Remote Support. ISPA Member -- Enable your software for Intel(R) Active Management Technology to meet the growing manageability and security demands of your customers. Businesses are taking advantage of Intel(R) vPro (TM) technology - will your software be a part of the solution? Download the Intel(R) Manageability Checker today! http://p.sf.net/sfu/intel-dev2devmar ___ E1000-devel mailing list E1000-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/e1000-devel To learn more about Intel® Ethernet, visit http://communities.intel.com/community/wired
