initlizing stack for IXP 425 board
Hi all, I am sumanth porting ecos to Intel xscale ixp425 board . i am initilizing the stack in the reset_vector, but it is not getting effected I am getting problem when i am encountering the instruction stmfd/stmdb and in the same way when encountering the instruction ldmfd/ldmdb can any one help me how to solve this problem of initilizing the stack ,so that it can continue execution when encountering stmfd/stmdb ldmfd/ldmdb Thanks in advance, Sumanth. -- View this message in context: http://www.nabble.com/initlizing-stack-for-IXP-425-board-t1168289.html#a3067866 Sent from the Sourceware - ecos-devel forum at Nabble.com.
strucking up in infinite loop for IXP 425
Hi, we are porting ecos for ixp425 we have flashed the image as per the sugessition in the forum but we are running in the infinite loop at this point icache_boundary: // Here is where we switch from boot address (0x0) to the // actual flash runtime address. We align to cache boundary so we // execute from cache during the switchover. Cachelines are 8 words. str r1, [r2, #IXP425_EXP_CNFG0]// make the EXP bus switch nop nop nop nop > mov pc, r0 nop where the instruction says pc value to load into r0 is at the same location and it goes into infinite loop and never stops execution if i change the pc to ignore the step mov pc,r0 then the code is allowing single stepping but the instruction is not getting effected can any one help out to sort this problem. thanks & regards, Sumanth -- View this message in context: http://www.nabble.com/strucking-up-in-infinite-loop-for-IXP-425-t1198324.html#a3161071 Sent from the Sourceware - ecos-devel forum at Nabble.com.
is rom_vector address correct
Hi all,
This problem is for IXP-425 board
I have build the image with config tool and ram as my
startup type, but still it shows as rom_vectors in my image
is that ok ?
and in my target.ld my start location origin shows as 0x0
and rom_vectors section shows as 0x2 as below
MEMORY
{
ram : ORIGIN = 0, LENGTH = 0x0200
}
SECTIONS
{
SECTIONS_BEGIN
SECTION_fixed_vectors (ram, 0x20, LMA_EQ_VMA)
SECTION_rom_vectors (ram, 0x2, LMA_EQ_VMA)
my reset_vector starts at 0x20040 from where the execution starts is it all
going
fine (correct ?) or else i have to change the address in
mlt_arm_xscale_grg_ram.mlt
to load the image from 0x0 location
I am getting problem exactly with the registers r13(stack pointer reg) and
r14(link reg) which are not getting reflected with instructions when i am in
debug mode.
i am getting data abort when encountering stmfd/stmdb of ldmfd/ldmdb from
where i am unable to continue
i am strucking in hal_hardware_init in plf_hardware_init where i encounter
ldmfd/ldmdb
any sugessitions are very helpful
thanks & regards,
Sumanth
--
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why only this address in pci
Hi all, We are porting ecos for ixp425 evalution board, we are using the grg for the purpose , now we are able to go up to plf_hardware_init we are strucking up at cyg_hal_plf_pci_init in pci it is using this address are there any specific reasons *IXP425_PCI_PCIMEMBASE = 0x48494A4B *IXP425_PCI_AHBMEMBASE = 0x00010203 i am strucking at HAL_PCI_CFG_WRITE_UINT32(0, 0, CYG_PCI_CFG_BAR_1, 0x0100); can help me what is the reason or any pointers at this stage of porting thanks & regards, Sumanth -- View this message in context: http://www.nabble.com/why-only-this-address-in-pci-t1211173.html#a3200873 Sent from the Sourceware - ecos-devel forum at Nabble.com.
problem with REG32() in IXP425
Hi, I am sumanth, i am porting ecos to ixp 425 evaluation board of mine, but i am getting problem in the hal_interrupt_configure, where we have address calculation routine *IXP425_GPIT1R = (*IXP425_GPIT1R & ~(7 << shift)) | (ival << shift); *IXP425_GPISR |= (1 << vector); where *IXP425_GPIT1R calls REG32 and it calculates the base address and the actual bytes from base address which should happen actually, and call the routine #define REG32(a,b) ((volatile unsigned int *)((a)+(b))) but in our case it is calling the routine #define REG32(a,b) (b) so we are only getting the no of bytes move from base, is there any problem with definition of _ASSEMBLER_ I am giving the snap shot of the code xscale/cores/current/include/hal_xscale.h #ifdef __ASSEMBLER__ #define REG8(a,b) (b) #define REG16(a,b) (b) #define REG32(a,b) (b) #else /* __ASSEMBLER__ */ #define REG8(a,b) ((volatile unsigned char *)((a)+(b))) #define REG16(a,b) ((volatile unsigned short *)((a)+(b))) #define REG32(a,b) ((volatile unsigned int *)((a)+(b))) extern void hal_xscale_core_init(void); #endif /* __ASSEMBLER__ */ any pointers in this case are very helpful, and any one who worked on the ixp425 processor can help me by sharing their problem situations and how could they resolve them Thanks & regards, Sumanth. -- View this message in context: http://www.nabble.com/problem-with-REG32%28%29-in-IXP425-t1392469.html#a3742562 Sent from the Sourceware - ecos-devel forum at Nabble.com.
cyg_interrupt_create does'nt create isr
Hi all, I am porting ecos for Intel xscale ixp425 evaluation board , i am done up to cyg_user start, i have written a small serial program which works for the polling mode , so i want to test the same in interrupt mode ,so i have written cyg_interrupt_create(int1_vector,int1_priority,0,&interrupt_1_isr,&interrupt_1_dsr, &int1_handle,&int1); cyg_interrupt_attach( int1_handle ); cyg_interrupt_unmask(int1_vector); i am using axd debugger to debug, the code runs without any exceptions and errors but it does'nt enter into ISR or DSR Do i have missed any initilizations regarding interrupts in my port,have any one faced problems please help me, i am doing hal_interrupt_configure for only GPIO pins should i do the same for uart also, could any one say where does the interrupt vector initilization happens any sugessitions would be helpful Thanks & regards, Sumanth. -- View this message in context: http://www.nabble.com/cyg_interrupt_create-does%27nt-create-isr-t1511140.html#a4099185 Sent from the Sourceware - ecos-devel forum at Nabble.com.
How to clear status of interrupt in pic
Hi all, I am porting ecos to xscale Ixp425 processor , the interrupt status register of the ixp425 at address 0xC8003000 according to intel's manual on reset should contain 0x0 but my board is containing 0x3FF080C0 , by this the processor is asserting interrupts even the interrupt has not occured, and the code is looping between the isr and dsr. How to clear the interrupt status register of the pic, it is read only, I am using the axd debugger for debugging. I have tried by reading the register contents, stil it does'nt clears. How to solve the problem? Thanks in advance Regards, Sumanth -- View this message in context: http://www.nabble.com/How-to-clear-status-of-interrupt-in-pic-t1584415.html#a4299639 Sent from the Sourceware - ecos-devel forum at Nabble.com.
about configuring interrupts
HI , I am porting ecos to Ixp425 intel xscale processor, i am downloading the image through multi-ice , i am using xscale grg as the source, i am getting struck -up at hal_interrupt_configure in plf_hardware_init is the problem with the grg or culprit is using multi-ice To say iam in the initilization process of platform related hardware where i was struck i am getting error as data abort at instruction ldrls any sugessitions are welcome. Thanks in advance, Sumanth. -- View this message in context: http://www.nabble.com/about-configuring-interrupts-t1161413.html#a3048423 Sent from the Sourceware - ecos-devel forum at Nabble.com.
