Re: [edk2] [Patch] SourceLevelDebugPkg/SecPeiDebugAgentLib: Fix duplicate symbol

[Ni, Ruiyu]

On 12/7/2017 3:48 PM, Liming Gao wrote:

From: Michael Kinney 

https://bugzilla.tianocore.org/show_bug.cgi?id=573
https://bugzilla.tianocore.org/show_bug.cgi?id=796

The same issue is reported again by GCC. Resend this patch again.
This patch renames the duplicated function name to fix it.

The SecPeiDebugAgentLib uses the global variable
mMemoryDiscoveredNotifyList for a PPI notification on
the Memory Discovered PPI.  This same variable name is
used in the DxeIplPeim for the same PPI notification.

The XCODE5 tool chain detects this duplicate symbol
when the OVMF platform is built with the flag
-D SOURCE_DEBUG_ENABLE.

The fix is to rename this global variable in the
SecPeiDebugAgentLib library.

Cc: Andrew Fish 
Cc: Jeff Fan 
Cc: Hao Wu 
Cc: Laszlo Ersek 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael D Kinney 
Reviewed-by: Jeff Fan 
---
  .../Library/DebugAgent/SecPeiDebugAgent/SecPeiDebugAgentLib.c | 4 ++--
  1 file changed, 2 insertions(+), 2 deletions(-)

diff --git 
a/SourceLevelDebugPkg/Library/DebugAgent/SecPeiDebugAgent/SecPeiDebugAgentLib.c 
b/SourceLevelDebugPkg/Library/DebugAgent/SecPeiDebugAgent/SecPeiDebugAgentLib.c
index b717e33..9f5223a 100644
--- 
a/SourceLevelDebugPkg/Library/DebugAgent/SecPeiDebugAgent/SecPeiDebugAgentLib.c
+++ 
b/SourceLevelDebugPkg/Library/DebugAgent/SecPeiDebugAgent/SecPeiDebugAgentLib.c
@@ -32,7 +32,7 @@ GLOBAL_REMOVE_IF_UNREFERENCED EFI_PEI_PPI_DESCRIPTOR  
 mVectorHandoffInf
}
  };
  
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_PEI_NOTIFY_DESCRIPTOR mMemoryDiscoveredNotifyList[1] = {

+GLOBAL_REMOVE_IF_UNREFERENCED EFI_PEI_NOTIFY_DESCRIPTOR 
mDebugAgentMemoryDiscoveredNotifyList[1] = {
{
  (EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK | 
EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
  ,
@@ -554,7 +554,7 @@ InitializeDebugAgent (
  // Register for a callback once memory has been initialized.
  // If memery has been ready, the callback funtion will be invoked 
immediately
  //
-Status = PeiServicesNotifyPpi ([0]);
+Status = PeiServicesNotifyPpi ([0]);
  if (EFI_ERROR (Status)) {
DEBUG ((EFI_D_ERROR, "DebugAgent: Failed to register memory discovered 
callback function!\n"));
CpuDeadLoop ();


Reviewed-by: Ruiyu Ni 

--
Thanks,
Ray
___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel

Re: [edk2] MdeModulePkg/UefiPxeBcDxe: Question about IcmpErrorListenHandler in PxeBcImpl.c

[Wu, Jiaxin]

Hi Gary, 

IcmpErrorRcvToken is only used to get ICMP error from IP layer, and the data 
will be copied to Mode->IcmpError. So, I think the RxData should be recycled. 

Besides, EFI_IP_PROTO_ICMP should be also checked in the call function but 
currently it's not:

  if (!EFI_IP4_EQUAL (>Header->DestinationAddress, 
>StationIp.v4)) {
//
// The dest address is not equal to Station Ip address, discard it.
//
goto CleanUp;
  }

  +if (>Header->Protocol != EFI_IP_PROTO_ICMP) {
  +//
  +// The protocol value in the header of the receveid packet should be 
EFI_IP_PROTO_ICMP.
  +//
  +goto CleanUp;
  +}

Thanks the report.

Thanks,
Jiaxin



> -Original Message-
> From: Guo Heyi [mailto:heyi@linaro.org]
> Sent: Thursday, December 7, 2017 12:07 PM
> To: edk2-devel@lists.01.org
> Cc: Zeng, Star ; Dong, Eric ; Ni,
> Ruiyu ; Fu, Siyuan ; Wu, Jiaxin
> 
> Subject: MdeModulePkg/UefiPxeBcDxe: Question about
> IcmpErrorListenHandler in PxeBcImpl.c
> 
> Hi folks,
> 
> In PxeBcImpl.c, we have IcmpErrorListenHandler which seems to process
> ICMP errors. But in EfiPxeBcStart function, we can see Private-
> >IcmpErrorRcvToken.Event is only a common event and Ip4->Receive is
> called to receive IP4 packets. So will IcmpErrorListenHandler receive all IP4
> packets belonging to this network interface, or will it only receive ICMP 
> error
> packets? If it is the latter situation, how do we make it?
> 
> The background of this question is that when we flush the network with
> deprecated ICMP packets (type 15, 16, ...), RxData will not be recycled and
> the list of UEFI events becomes longer and longer, which finally impacts
> system performance a lot. If only error ICMP will be received by
> IcmpErrorListenHandler, we'd like to patch it as below:
> 
> diff --git a/MdeModulePkg/Universal/Network/UefiPxeBcDxe/PxeBcImpl.c
> b/MdeModulePkg/Universal/Network/UefiPxeBcDxe/PxeBcImpl.c
> index 6d4f33f..f74b264 100644
> --- a/MdeModulePkg/Universal/Network/UefiPxeBcDxe/PxeBcImpl.c
> +++ b/MdeModulePkg/Universal/Network/UefiPxeBcDxe/PxeBcImpl.c
> @@ -216,8 +216,6 @@ IcmpErrorListenHandlerDpc (
>  CopiedPointer += CopiedLen;
>}
> 
> -  goto Resume;
> -
>  CleanUp:
>gBS->SignalEvent (RxData->RecycleSignal);
> 
> We tested and it worked, but we are still not sure whether it will impact
> other code in the network stack.
> 
> Please let me know your comments.
> 
> Thanks,
> 
> Gary (Heyi Guo)
___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel

Re: [edk2] [PATCH] EmulatorPkg: Fix build failure due to Tftp library removal

[Jordan Justen]

Reviewed-by: Jordan Justen 

On 2017-12-06 23:17:00, Ruiyu Ni wrote:
> The TFTP command was converted from a NULL class library instance to
> a dynamic shell command in commit 0961002352e9.
> 
> The ShellLib and FileHandleLib resolutions are moved from
> Shell app  to [LibraryClasses.common]
> because dynamic shell commands implemented as DXE_DRIVER modules
> also depend on these libraries.
> 
> PcdShellLibAutoInitialize must be set to FALSE for both the shell app
> itself and the dynamic shell command modules.
> 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ruiyu Ni 
> Cc: Jordan Justen 
> Cc: Andrew Fish 
> ---
>  EmulatorPkg/EmulatorPkg.dsc | 10 ++
>  EmulatorPkg/EmulatorPkg.fdf |  3 ++-
>  2 files changed, 8 insertions(+), 5 deletions(-)
> 
> diff --git a/EmulatorPkg/EmulatorPkg.dsc b/EmulatorPkg/EmulatorPkg.dsc
> index ce0ae64dba..818691ce3a 100644
> --- a/EmulatorPkg/EmulatorPkg.dsc
> +++ b/EmulatorPkg/EmulatorPkg.dsc
> @@ -109,6 +109,8 @@ [LibraryClasses]
>VarCheckLib|MdeModulePkg/Library/VarCheckLib/VarCheckLib.inf
>SortLib|MdeModulePkg/Library/BaseSortLib/BaseSortLib.inf
>
> UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManagerLib.inf
> +  ShellLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf
> +  FileHandleLib|MdePkg/Library/UefiFileHandleLib/UefiFileHandleLib.inf
>  
>  [LibraryClasses.common.SEC]
>PeiServicesLib|EmulatorPkg/Library/SecPeiServicesLib/SecPeiServicesLib.inf
> @@ -378,6 +380,10 @@ [Components]
>FatPkg/EnhancedFatDxe/Fat.inf
>  
>  !ifndef $(USE_OLD_SHELL)
> +  ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf {
> +
> +  gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE
> +  }
>ShellPkg/Application/Shell/Shell.inf {
>  
>
> ShellCommandLib|ShellPkg/Library/UefiShellCommandLib/UefiShellCommandLib.inf
> @@ -388,12 +394,8 @@ [Components]
>
> NULL|ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1CommandsLib.inf
>
> NULL|ShellPkg/Library/UefiShellInstall1CommandsLib/UefiShellInstall1CommandsLib.inf
>
> NULL|ShellPkg/Library/UefiShellNetwork1CommandsLib/UefiShellNetwork1CommandsLib.inf
> -  
> NULL|ShellPkg/Library/UefiShellTftpCommandLib/UefiShellTftpCommandLib.inf
>
> HandleParsingLib|ShellPkg/Library/UefiHandleParsingLib/UefiHandleParsingLib.inf
> -  ShellLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf
> -  FileHandleLib|MdePkg/Library/UefiFileHandleLib/UefiFileHandleLib.inf
>SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf
> -  
> UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManagerLib.inf
>PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf
>  #  SafeBlockIoLib|ShellPkg/Library/SafeBlockIoLib/SafeBlockIoLib.inf
>  #  
> SafeOpenProtocolLib|ShellPkg/Library/SafeOpenProtocolLib/SafeOpenProtocolLib.inf
> diff --git a/EmulatorPkg/EmulatorPkg.fdf b/EmulatorPkg/EmulatorPkg.fdf
> index 377de59b5a..314eb7b895 100644
> --- a/EmulatorPkg/EmulatorPkg.fdf
> +++ b/EmulatorPkg/EmulatorPkg.fdf
> @@ -1,7 +1,7 @@
>  ## @file
>  # This is Emulator FDF file with UEFI HII features enabled
>  #
> -# Copyright (c) 2008 - 2015, Intel Corporation. All rights reserved.
> +# Copyright (c) 2008 - 2017, Intel Corporation. All rights reserved.
>  # Portions copyright (c) 2009 - 2011, Apple Inc. All rights reserved.
>  #
>  # This program and the accompanying materials
> @@ -206,6 +206,7 @@ [FV.FvRecovery]
>  INF FatPkg/EnhancedFatDxe/Fat.inf
>  
>  !ifndef $(USE_OLD_SHELL)
> +INF  ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf
>  INF  ShellPkg/Application/Shell/Shell.inf
>  !else
>  INF  RuleOverride = BINARY EdkShellBinPkg/FullShell/FullShell.inf
> -- 
> 2.15.0.gvfs.1.preview.4
> 
> ___
> edk2-devel mailing list
> edk2-devel@lists.01.org
> https://lists.01.org/mailman/listinfo/edk2-devel
___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel

Re: [edk2] [PATCH v2 3/3] IntelFrameworkModulePkg/KeyboardDxe: Use macro to enable/disable page 0

[Ni, Ruiyu]

On 12/7/2017 1:40 PM, Jian J Wang wrote:

v2:
a. Remove unnecessary braces enclosing code passed to ACCESS_PAGE0_CODE


Current implementation uses following two methods

 EnableNullDetection()
 DisableNullDetection()

to enable/disable page 0. These two methods will check PCD
PcdNullPointerDetectionPropertyMask to know if the page 0 is disabled or not.
This is due to the fact that old GCD service doesn't provide paging related
attributes of memory block. Since this issue has been fixed, GCD services
can be used to determine the paging status of page 0. This is also make it
possible to just use a new macro

 ACCESS_PAGE0_CODE(
   
 );

to replace above methods to do the same job, which also makes code more
readability.

Cc: Liming Gao 
Cc: Michael D Kinney 
Cc: Ruiyu Ni 
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang 
---
  .../Csm/BiosThunk/KeyboardDxe/BiosKeyboard.c   | 118 ++---
  .../Csm/BiosThunk/KeyboardDxe/KeyboardDxe.inf  |   1 -
  2 files changed, 10 insertions(+), 109 deletions(-)

diff --git a/IntelFrameworkModulePkg/Csm/BiosThunk/KeyboardDxe/BiosKeyboard.c 
b/IntelFrameworkModulePkg/Csm/BiosThunk/KeyboardDxe/BiosKeyboard.c
index ebf03d30c1..ec525891dc 100644
--- a/IntelFrameworkModulePkg/Csm/BiosThunk/KeyboardDxe/BiosKeyboard.c
+++ b/IntelFrameworkModulePkg/Csm/BiosThunk/KeyboardDxe/BiosKeyboard.c
@@ -1732,98 +1732,6 @@ CheckKeyboardConnect (
}
  }
  
-/**

-  Disable NULL pointer detection.
-**/
-VOID
-DisableNullDetection (
-  VOID
-  )
-{
-  EFI_STATUSStatus;
-  EFI_GCD_MEMORY_SPACE_DESCRIPTOR   Desc;
-
-  if ((PcdGet8 (PcdNullPointerDetectionPropertyMask) & BIT0) == 0) {
-return;
-  }
-
-  //
-  // Check current capabilities and attributes
-  //
-  Status = gDS->GetMemorySpaceDescriptor (0, );
-  ASSERT_EFI_ERROR (Status);
-
-  //
-  // Try to add EFI_MEMORY_RP support if necessary
-  //
-  if ((Desc.Capabilities & EFI_MEMORY_RP) == 0) {
-Desc.Capabilities |= EFI_MEMORY_RP;
-Status = gDS->SetMemorySpaceCapabilities (0, EFI_PAGES_TO_SIZE(1),
-  Desc.Capabilities);
-ASSERT_EFI_ERROR (Status);
-if (EFI_ERROR (Status)) {
-  return;
-}
-  }
-
-  //
-  // Don't bother if EFI_MEMORY_RP is already cleared.
-  //
-  if ((Desc.Attributes & EFI_MEMORY_RP) != 0) {
-Desc.Attributes &= ~EFI_MEMORY_RP;
-Status = gDS->SetMemorySpaceAttributes (0, EFI_PAGES_TO_SIZE(1),
-Desc.Attributes);
-ASSERT_EFI_ERROR (Status);
-  } else {
-DEBUG ((DEBUG_WARN, "!!! Page 0 is supposed to be disabled !!!\r\n"));
-  }
-}
-
-/**
-   Enable NULL pointer detection.
-**/
-VOID
-EnableNullDetection (
-  VOID
-  )
-{
-  EFI_STATUSStatus;
-  EFI_GCD_MEMORY_SPACE_DESCRIPTOR   Desc;
-
-  if ((PcdGet8 (PcdNullPointerDetectionPropertyMask) & BIT0) == 0) {
-return;
-  }
-
-  //
-  // Check current capabilities and attributes
-  //
-  Status = gDS->GetMemorySpaceDescriptor (0, );
-  ASSERT_EFI_ERROR (Status);
-
-  //
-  // Try to add EFI_MEMORY_RP support if necessary
-  //
-  if ((Desc.Capabilities & EFI_MEMORY_RP) == 0) {
-Desc.Capabilities |= EFI_MEMORY_RP;
-Status = gDS->SetMemorySpaceCapabilities (0, EFI_PAGES_TO_SIZE(1),
-  Desc.Capabilities);
-ASSERT_EFI_ERROR (Status);
-if (EFI_ERROR (Status)) {
-  return;
-}
-  }
-
-  //
-  // Don't bother if EFI_MEMORY_RP is already set.
-  //
-  if ((Desc.Attributes & EFI_MEMORY_RP) == 0) {
-Desc.Attributes |= EFI_MEMORY_RP;
-Status = gDS->SetMemorySpaceAttributes (0, EFI_PAGES_TO_SIZE(1),
-Desc.Attributes);
-ASSERT_EFI_ERROR (Status);
-  }
-}
-
  /**
Timer event handler: read a series of key stroke from 8042
and put them into memory key buffer.
@@ -1931,16 +1839,13 @@ BiosKeyboardTimerHandler (
//   0 Right Shift pressed
  
  
-  //

-  // Disable NULL pointer detection temporarily
-  //
-  DisableNullDetection ();
-
//
// Clear the CTRL and ALT BDA flag
//
-  KbFlag1 = *((UINT8 *) (UINTN) 0x417);  // read the STATUS FLAGS 1
-  KbFlag2 = *((UINT8 *) (UINTN) 0x418); // read STATUS FLAGS 2
+  ACCESS_PAGE0_CODE (
+KbFlag1 = *((UINT8 *) (UINTN) 0x417); // read the STATUS FLAGS 1
+KbFlag2 = *((UINT8 *) (UINTN) 0x418); // read STATUS FLAGS 2
+  );
  
DEBUG_CODE (

  {
@@ -2008,15 +1913,12 @@ BiosKeyboardTimerHandler (
//
// Clear left alt and left ctrl BDA flag
//
-  KbFlag2 &= ~(KB_LEFT_ALT_PRESSED | KB_LEFT_CTRL_PRESSED);
-  *((UINT8 *) (UINTN) 0x418) = KbFlag2;
-  KbFlag1 &= ~0x0C;
-  *((UINT8 *) (UINTN) 0x417) = KbFlag1;
-
-  //
-  // Restore NULL pointer detection
-  //
-  EnableNullDetection ();
+  ACCESS_PAGE0_CODE (
+KbFlag2 &= 

Re: [edk2] [PATCH v2 2/3] IntelFrameworkModulePkg/LegacyBiosDxe: Use macro to enable/disable page 0

[Ni, Ruiyu]

On 12/7/2017 1:40 PM, Jian J Wang wrote:

v2:
a. Remove unnecessary braces enclosing code passed to ACCESS_PAGE0_CODE


 EnableNullDetection()
 DisableNullDetection()

to enable/disable page 0. These two methods will check PCD
PcdNullPointerDetectionPropertyMask to know if the page 0 is disabled or not.
This is due to the fact that old GCD service doesn't provide paging related
attributes of memory block. Since this issue has been fixed, GCD services
can be used to determine the paging status of page 0. This is also make it
possible to just use a new macro

 ACCESS_PAGE0_CODE(
   
 );

to replace above methods to do the same job, which also makes code more
readability.

Cc: Liming Gao 
Cc: Michael D Kinney 
Cc: Ruiyu Ni 
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang 
---
  .../Csm/LegacyBiosDxe/LegacyBda.c  |  53 
  .../Csm/LegacyBiosDxe/LegacyBios.c | 135 ++---
  .../Csm/LegacyBiosDxe/LegacyBiosDxe.inf|   1 -
  .../Csm/LegacyBiosDxe/LegacyBiosInterface.h|  16 ---
  .../Csm/LegacyBiosDxe/LegacyBootSupport.c  |  80 ++--
  .../Csm/LegacyBiosDxe/LegacyPci.c  |  72 ++-
  IntelFrameworkModulePkg/Csm/LegacyBiosDxe/Thunk.c  |  51 
  7 files changed, 135 insertions(+), 273 deletions(-)

diff --git a/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBda.c 
b/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBda.c
index c6670febee..a94cba435c 100644
--- a/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBda.c
+++ b/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBda.c
@@ -34,37 +34,36 @@ LegacyBiosInitBda (
BDA_STRUC *Bda;
UINT8 *Ebda;
  
-  DisableNullDetection ();

-
Bda   = (BDA_STRUC *) ((UINTN) 0x400);
Ebda  = (UINT8 *) ((UINTN) 0x9fc00);
  
-  ZeroMem (Bda, 0x100);

+  ACCESS_PAGE0_CODE (
+ZeroMem (Bda, 0x100);
+//
+// 640k-1k for EBDA
+//
+Bda->MemSize= 0x27f;
+Bda->KeyHead= 0x1e;
+Bda->KeyTail= 0x1e;
+Bda->FloppyData = 0x00;
+Bda->FloppyTimeout  = 0xff;
+
+Bda->KeyStart   = 0x001E;
+Bda->KeyEnd = 0x003E;
+Bda->KeyboardStatus = 0x10;
+Bda->Ebda   = 0x9fc0;
+
+//
+// Move LPT time out here and zero out LPT4 since some SCSI OPROMS
+// use this as scratch pad (LPT4 is Reserved)
+//
+Bda->Lpt1_2Timeout  = 0x1414;
+Bda->Lpt3_4Timeout  = 0x1400;
+
+  );
+
ZeroMem (Ebda, 0x400);
-  //
-  // 640k-1k for EBDA
-  //
-  Bda->MemSize= 0x27f;
-  Bda->KeyHead= 0x1e;
-  Bda->KeyTail= 0x1e;
-  Bda->FloppyData = 0x00;
-  Bda->FloppyTimeout  = 0xff;
-
-  Bda->KeyStart   = 0x001E;
-  Bda->KeyEnd = 0x003E;
-  Bda->KeyboardStatus = 0x10;
-  Bda->Ebda   = 0x9fc0;
-
-  //
-  // Move LPT time out here and zero out LPT4 since some SCSI OPROMS
-  // use this as scratch pad (LPT4 is Reserved)
-  //
-  Bda->Lpt1_2Timeout  = 0x1414;
-  Bda->Lpt3_4Timeout  = 0x1400;
-
-  *Ebda   = 0x01;
-
-  EnableNullDetection ();
+  *Ebda = 0x01;
  
return EFI_SUCCESS;

  }
diff --git a/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBios.c 
b/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBios.c
index c6461f5547..fca08a8fa2 100644
--- a/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBios.c
+++ b/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBios.c
@@ -786,115 +786,6 @@ ToggleEndOfDxeStatus (
return;
  }
  
-//

-// Legacy BIOS needs to access memory between 0-4095, which will cause page
-// fault exception if NULL pointer detection mechanism is enabled. Following
-// functions can be used to disable/enable NULL pointer detection before/after
-// accessing those memory.
-//
-
-/**
-   Enable NULL pointer detection.
-**/
-VOID
-EnableNullDetection (
-  VOID
-  )
-{
-  EFI_STATUSStatus;
-  EFI_GCD_MEMORY_SPACE_DESCRIPTOR   Desc;
-
-  if (((PcdGet8 (PcdNullPointerDetectionPropertyMask) & BIT0) == 0)
-  ||
-  ((mEndOfDxe)  &&
-   ((PcdGet8 (PcdNullPointerDetectionPropertyMask) & (BIT7|BIT0))
-== (BIT7|BIT0)))
- ) {
-return;
-  }
-
-  //
-  // Check current capabilities and attributes
-  //
-  Status = gDS->GetMemorySpaceDescriptor (0, );
-  ASSERT_EFI_ERROR (Status);
-
-  //
-  // Try to add EFI_MEMORY_RP support if necessary
-  //
-  if ((Desc.Capabilities & EFI_MEMORY_RP) == 0) {
-Desc.Capabilities |= EFI_MEMORY_RP;
-Status = gDS->SetMemorySpaceCapabilities (0, EFI_PAGES_TO_SIZE(1),
-  Desc.Capabilities);
-ASSERT_EFI_ERROR (Status);
-if (EFI_ERROR (Status)) {
-  return;
-}
-  }
-
-  //
-  // Don't bother if EFI_MEMORY_RP is already set.
-  //
-  if ((Desc.Attributes & EFI_MEMORY_RP) == 0) {
-Desc.Attributes |= EFI_MEMORY_RP;
-Status = 

Re: [edk2] [RFC] MdeModulePkg/Ip4Dxe: fix ICMP echo reply memory leak

[Wu, Jiaxin]

It's is good to me. 

Reviewed-by: Jiaxin Wu 

Thanks,
Jiaxin


> -Original Message-
> From: Heyi Guo [mailto:heyi@linaro.org]
> Sent: Thursday, December 7, 2017 10:22 AM
> To: linaro-u...@lists.linaro.org; edk2-devel@lists.01.org
> Cc: Heyi Guo ; Junbiao Hong
> ; Zeng, Star ; Dong, Eric
> ; Ni, Ruiyu ; Fu, Siyuan
> ; Wu, Jiaxin 
> Subject: [RFC] MdeModulePkg/Ip4Dxe: fix ICMP echo reply memory leak
> 
> When UEFI receives IPMP echo packets it will enter Ip4IcmpReplyEcho
> function, and then call Ip4Output. However, if Ip4Output gets some
> error and exits early, e.g. fails to find the route entry, memory
> buffer of "Data" gets no chance to be freed and memory leak will be
> caused. If there is such an attacker in the network, we will see UEFI
> runs out of memory and system hangs.
> 
> Network stack code is so complicated that this is just a RFC to fix
> this issue. Please provide your comments about this.
> 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Junbiao Hong 
> Signed-off-by: Heyi Guo 
> Cc: Star Zeng 
> Cc: Eric Dong 
> Cc: Ruiyu Ni 
> Cc: Siyuan Fu 
> Cc: Jiaxin Wu 
> ---
>  MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Icmp.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Icmp.c
> b/MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Icmp.c
> index b4b0864..ed6bdbe 100644
> --- a/MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Icmp.c
> +++ b/MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Icmp.c
> @@ -267,6 +267,9 @@ Ip4IcmpReplyEcho (
>   Ip4SysPacketSent,
>   NULL
>   );
> +  if (EFI_ERROR (Status)) {
> +NetbufFree (Data);
> +  }
> 
>  ON_EXIT:
>NetbufFree (Packet);
> --
> 2.7.4

___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel

Re: [edk2] [PATCH v2 1/3] IntelFrameworkPkg/LegacyBios.h: Add a macro to guarantee page 0 access

[Ni, Ruiyu]

On 12/7/2017 1:40 PM, Jian J Wang wrote:

v2:
a. Fix a typo in expression in the macro ACCESS_PAGE0_CODE
b. Fix GCC49 build error


ue to the introduction of NULL pointer detection feature, page 0 will be
disabled if the feature is enabled, which will cause legacy code failed to
update legacy data in page 0. This macro is introduced to make sure the
page 0 is enabled before those code and restore the original status of it
afterwards.

Another reason to introduce this macro is to eliminate the dependency on
the PcdNullPointerDetectionPropertyMask. Because this is a new PCD, it
could cause some backward compatibility issue for some old packages.

This macro will simply check if the page 0 is disabled or not. If it's
disabled, it will enable it before code updating page 0 and disable it
afterwards. Otherwise, this macro will do nothing to page 0.

The usage of the macro will be look like (similar to DEBUG_CODE macro):

 ACCESS_PAGE0_CODE(
   
 );

Cc: Liming Gao 
Cc: Michael D Kinney 
Cc: Ruiyu Ni 
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang 
---
  IntelFrameworkPkg/Include/Protocol/LegacyBios.h | 34 +
  1 file changed, 34 insertions(+)

diff --git a/IntelFrameworkPkg/Include/Protocol/LegacyBios.h 
b/IntelFrameworkPkg/Include/Protocol/LegacyBios.h
index 641f101bce..6a5f5464e7 100644
--- a/IntelFrameworkPkg/Include/Protocol/LegacyBios.h
+++ b/IntelFrameworkPkg/Include/Protocol/LegacyBios.h
@@ -1518,6 +1518,40 @@ struct _EFI_LEGACY_BIOS_PROTOCOL {
EFI_LEGACY_BIOS_BOOT_UNCONVENTIONAL_DEVICE  BootUnconventionalDevice;
  };
  
+//

+// Legacy BIOS needs to access memory in page 0 (0-4095), which is disabled if
+// NULL pointer detection feature is enabled. Following macro can be used to
+// enable/disable page 0 before/after accessing it.
+//
+#define ACCESS_PAGE0_CODE(statements)   \
+  do {  \
+EFI_STATUSStatus_;  \
+EFI_GCD_MEMORY_SPACE_DESCRIPTOR   Desc_;\
+\
+Desc_.Attributes = 0;   \
+Status_ = gDS->GetMemorySpaceDescriptor (0, _);\
+ASSERT_EFI_ERROR (Status_); \
+if ((Desc_.Attributes & EFI_MEMORY_RP) != 0) {  \
+  Status_ = gDS->SetMemorySpaceAttributes ( \
+  0,\
+  EFI_PAGES_TO_SIZE(1), \
+  Desc_.Attributes & ~(UINT64)EFI_MEMORY_RP \
+  );\
+  ASSERT_EFI_ERROR (Status_);   \
+}   \
+\
+statements; \


It's better to surrounded statements with {}.
So that when statements contains variable declaration, C compiler
doesn't complain.


+\
+if ((Desc_.Attributes & EFI_MEMORY_RP) != 0) {  \
+  Status_ = gDS->SetMemorySpaceAttributes ( \
+  0,\
+  EFI_PAGES_TO_SIZE(1), \
+  Desc_.Attributes  \
+  );\
+  ASSERT_EFI_ERROR (Status_);   \
+}   \
+  } while (FALSE)
+
  extern EFI_GUID gEfiLegacyBiosProtocolGuid;
  
  #endif




With the above suggested changes,
  Reviewed-by: Ruiyu Ni 

--
Thanks,
Ray
___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel

[edk2] [PATCH] BaseTools: Fix GenSec can't found the depex file

[Yonghong Zhu]

From: Yunhua Feng 

Filter the FileList when multiple genfds thread options is not enabled.

Cc: Liming Gao 
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Yunhua Feng 
---
 BaseTools/Source/Python/GenFds/EfiSection.py | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/BaseTools/Source/Python/GenFds/EfiSection.py 
b/BaseTools/Source/Python/GenFds/EfiSection.py
index 7b3b717191..4276945a10 100644
--- a/BaseTools/Source/Python/GenFds/EfiSection.py
+++ b/BaseTools/Source/Python/GenFds/EfiSection.py
@@ -92,7 +92,8 @@ class EfiSection (EfiSectionClassObject):
 elif os.path.exists(Filename):
 FileList.append(Filename)
 elif '.depex' in FfsInf.FinalTargetSuffixMap or FfsInf.Depex:
-FileList.append(Filename)
+if IsMakefile:
+FileList.append(Filename)
 else:
 FileList, IsSect = Section.Section.GetFileList(FfsInf, 
self.FileType, self.FileExtension, Dict)
 if IsSect :
-- 
2.12.2.windows.2

___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel

[edk2] [PATCH] MdeModulePkg/Variable/RuntimeDxe: Modify function return status

[chenc2]

Make VariableServiceSetVariable and VariableServiceQueryVariableInfo
functions return status following UEFI 2.7 spec.

Cc: Zhang Chao 
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: chenc2 
---
 .../Universal/Variable/RuntimeDxe/Variable.c   | 26 --
 1 file changed, 19 insertions(+), 7 deletions(-)

diff --git a/MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c 
b/MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c
index f39be6b0b4..d7128fe105 100644
--- a/MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c
+++ b/MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c
@@ -3145,7 +3145,11 @@ VariableServiceSetVariable (
   //  Make sure if runtime bit is set, boot service bit is set also.
   //
   if ((Attributes & (EFI_VARIABLE_RUNTIME_ACCESS | 
EFI_VARIABLE_BOOTSERVICE_ACCESS)) == EFI_VARIABLE_RUNTIME_ACCESS) {
-return EFI_INVALID_PARAMETER;
+if ((Attributes & EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS) != 0) {
+  return EFI_UNSUPPORTED;
+} else {
+  return EFI_INVALID_PARAMETER;
+}
   } else if ((Attributes & VARIABLE_ATTRIBUTE_AT_AW) != 0) {
 if (!mVariableModuleGlobal->VariableGlobal.AuthSupport) {
   //
@@ -3168,15 +3172,16 @@ VariableServiceSetVariable (
   //
   if (((Attributes & EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS) == 
EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS)
  && ((Attributes & EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS) == 
EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS)) {
-return EFI_INVALID_PARAMETER;
+return EFI_UNSUPPORTED;
   }
 
   if ((Attributes & EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS) == 
EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS) {
-if (DataSize < AUTHINFO_SIZE) {
-  //
-  // Try to write Authenticated Variable without AuthInfo.
-  //
-  return EFI_SECURITY_VIOLATION;
+//
+//  If DataSize == AUTHINFO_SIZE and then PayloadSize is 0.
+//  Maybe it's the delete operation of common authenticated variable at 
user physical presence.
+//
+if (DataSize != AUTHINFO_SIZE) {
+  return EFI_UNSUPPORTED;
 }
 PayloadSize = DataSize - AUTHINFO_SIZE;
   } else if ((Attributes & EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS) 
== EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS) {
@@ -3522,6 +3527,13 @@ VariableServiceQueryVariableInfo (
 return EFI_INVALID_PARAMETER;
   }
 
+  if ((Attributes & EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS) != 0) {
+//
+//  Deprecated attribute, make this check as highest priority.
+//
+return EFI_UNSUPPORTED;
+  }
+
   if ((Attributes & EFI_VARIABLE_ATTRIBUTES_MASK) == 0) {
 //
 // Make sure the Attributes combination is supported by the platform.
-- 
2.13.2.windows.1

___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel

[edk2] [PATCH v2 3/3] IntelFrameworkModulePkg/KeyboardDxe: Use macro to enable/disable page 0

[Jian J Wang]

> v2:
> a. Remove unnecessary braces enclosing code passed to ACCESS_PAGE0_CODE

Current implementation uses following two methods

EnableNullDetection()
DisableNullDetection()

to enable/disable page 0. These two methods will check PCD
PcdNullPointerDetectionPropertyMask to know if the page 0 is disabled or not.
This is due to the fact that old GCD service doesn't provide paging related
attributes of memory block. Since this issue has been fixed, GCD services
can be used to determine the paging status of page 0. This is also make it
possible to just use a new macro

ACCESS_PAGE0_CODE(
  
);

to replace above methods to do the same job, which also makes code more
readability.

Cc: Liming Gao 
Cc: Michael D Kinney 
Cc: Ruiyu Ni 
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang 
---
 .../Csm/BiosThunk/KeyboardDxe/BiosKeyboard.c   | 118 ++---
 .../Csm/BiosThunk/KeyboardDxe/KeyboardDxe.inf  |   1 -
 2 files changed, 10 insertions(+), 109 deletions(-)

diff --git a/IntelFrameworkModulePkg/Csm/BiosThunk/KeyboardDxe/BiosKeyboard.c 
b/IntelFrameworkModulePkg/Csm/BiosThunk/KeyboardDxe/BiosKeyboard.c
index ebf03d30c1..ec525891dc 100644
--- a/IntelFrameworkModulePkg/Csm/BiosThunk/KeyboardDxe/BiosKeyboard.c
+++ b/IntelFrameworkModulePkg/Csm/BiosThunk/KeyboardDxe/BiosKeyboard.c
@@ -1732,98 +1732,6 @@ CheckKeyboardConnect (
   }
 }
 
-/**
-  Disable NULL pointer detection.
-**/
-VOID
-DisableNullDetection (
-  VOID
-  )
-{
-  EFI_STATUSStatus;
-  EFI_GCD_MEMORY_SPACE_DESCRIPTOR   Desc;
-
-  if ((PcdGet8 (PcdNullPointerDetectionPropertyMask) & BIT0) == 0) {
-return;
-  }
-
-  //
-  // Check current capabilities and attributes
-  //
-  Status = gDS->GetMemorySpaceDescriptor (0, );
-  ASSERT_EFI_ERROR (Status);
-
-  //
-  // Try to add EFI_MEMORY_RP support if necessary
-  //
-  if ((Desc.Capabilities & EFI_MEMORY_RP) == 0) {
-Desc.Capabilities |= EFI_MEMORY_RP;
-Status = gDS->SetMemorySpaceCapabilities (0, EFI_PAGES_TO_SIZE(1),
-  Desc.Capabilities);
-ASSERT_EFI_ERROR (Status);
-if (EFI_ERROR (Status)) {
-  return;
-}
-  }
-
-  //
-  // Don't bother if EFI_MEMORY_RP is already cleared.
-  //
-  if ((Desc.Attributes & EFI_MEMORY_RP) != 0) {
-Desc.Attributes &= ~EFI_MEMORY_RP;
-Status = gDS->SetMemorySpaceAttributes (0, EFI_PAGES_TO_SIZE(1),
-Desc.Attributes);
-ASSERT_EFI_ERROR (Status);
-  } else {
-DEBUG ((DEBUG_WARN, "!!! Page 0 is supposed to be disabled !!!\r\n"));
-  }
-}
-
-/**
-   Enable NULL pointer detection.
-**/
-VOID
-EnableNullDetection (
-  VOID
-  )
-{
-  EFI_STATUSStatus;
-  EFI_GCD_MEMORY_SPACE_DESCRIPTOR   Desc;
-
-  if ((PcdGet8 (PcdNullPointerDetectionPropertyMask) & BIT0) == 0) {
-return;
-  }
-
-  //
-  // Check current capabilities and attributes
-  //
-  Status = gDS->GetMemorySpaceDescriptor (0, );
-  ASSERT_EFI_ERROR (Status);
-
-  //
-  // Try to add EFI_MEMORY_RP support if necessary
-  //
-  if ((Desc.Capabilities & EFI_MEMORY_RP) == 0) {
-Desc.Capabilities |= EFI_MEMORY_RP;
-Status = gDS->SetMemorySpaceCapabilities (0, EFI_PAGES_TO_SIZE(1),
-  Desc.Capabilities);
-ASSERT_EFI_ERROR (Status);
-if (EFI_ERROR (Status)) {
-  return;
-}
-  }
-
-  //
-  // Don't bother if EFI_MEMORY_RP is already set.
-  //
-  if ((Desc.Attributes & EFI_MEMORY_RP) == 0) {
-Desc.Attributes |= EFI_MEMORY_RP;
-Status = gDS->SetMemorySpaceAttributes (0, EFI_PAGES_TO_SIZE(1),
-Desc.Attributes);
-ASSERT_EFI_ERROR (Status);
-  }
-}
-
 /**
   Timer event handler: read a series of key stroke from 8042
   and put them into memory key buffer. 
@@ -1931,16 +1839,13 @@ BiosKeyboardTimerHandler (
   //   0 Right Shift pressed
 
 
-  //
-  // Disable NULL pointer detection temporarily
-  //
-  DisableNullDetection ();
-
   //
   // Clear the CTRL and ALT BDA flag
   //
-  KbFlag1 = *((UINT8 *) (UINTN) 0x417);  // read the STATUS FLAGS 1
-  KbFlag2 = *((UINT8 *) (UINTN) 0x418); // read STATUS FLAGS 2
+  ACCESS_PAGE0_CODE (
+KbFlag1 = *((UINT8 *) (UINTN) 0x417); // read the STATUS FLAGS 1
+KbFlag2 = *((UINT8 *) (UINTN) 0x418); // read STATUS FLAGS 2
+  );
 
   DEBUG_CODE (
 {
@@ -2008,15 +1913,12 @@ BiosKeyboardTimerHandler (
   //
   // Clear left alt and left ctrl BDA flag
   //
-  KbFlag2 &= ~(KB_LEFT_ALT_PRESSED | KB_LEFT_CTRL_PRESSED);
-  *((UINT8 *) (UINTN) 0x418) = KbFlag2;
-  KbFlag1 &= ~0x0C;  
-  *((UINT8 *) (UINTN) 0x417) = KbFlag1; 
-
-  //
-  // Restore NULL pointer detection
-  //
-  EnableNullDetection ();
+  ACCESS_PAGE0_CODE (
+KbFlag2 &= ~(KB_LEFT_ALT_PRESSED | KB_LEFT_CTRL_PRESSED);
+

[edk2] [PATCH v2 2/3] IntelFrameworkModulePkg/LegacyBiosDxe: Use macro to enable/disable page 0

[Jian J Wang]

> v2:
> a. Remove unnecessary braces enclosing code passed to ACCESS_PAGE0_CODE

EnableNullDetection()
DisableNullDetection()

to enable/disable page 0. These two methods will check PCD
PcdNullPointerDetectionPropertyMask to know if the page 0 is disabled or not.
This is due to the fact that old GCD service doesn't provide paging related
attributes of memory block. Since this issue has been fixed, GCD services
can be used to determine the paging status of page 0. This is also make it
possible to just use a new macro

ACCESS_PAGE0_CODE(
  
);

to replace above methods to do the same job, which also makes code more
readability.

Cc: Liming Gao 
Cc: Michael D Kinney 
Cc: Ruiyu Ni 
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang 
---
 .../Csm/LegacyBiosDxe/LegacyBda.c  |  53 
 .../Csm/LegacyBiosDxe/LegacyBios.c | 135 ++---
 .../Csm/LegacyBiosDxe/LegacyBiosDxe.inf|   1 -
 .../Csm/LegacyBiosDxe/LegacyBiosInterface.h|  16 ---
 .../Csm/LegacyBiosDxe/LegacyBootSupport.c  |  80 ++--
 .../Csm/LegacyBiosDxe/LegacyPci.c  |  72 ++-
 IntelFrameworkModulePkg/Csm/LegacyBiosDxe/Thunk.c  |  51 
 7 files changed, 135 insertions(+), 273 deletions(-)

diff --git a/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBda.c 
b/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBda.c
index c6670febee..a94cba435c 100644
--- a/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBda.c
+++ b/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBda.c
@@ -34,37 +34,36 @@ LegacyBiosInitBda (
   BDA_STRUC *Bda;
   UINT8 *Ebda;
 
-  DisableNullDetection ();
-
   Bda   = (BDA_STRUC *) ((UINTN) 0x400);
   Ebda  = (UINT8 *) ((UINTN) 0x9fc00);
 
-  ZeroMem (Bda, 0x100);
+  ACCESS_PAGE0_CODE (
+ZeroMem (Bda, 0x100);
+//
+// 640k-1k for EBDA
+//
+Bda->MemSize= 0x27f;
+Bda->KeyHead= 0x1e;
+Bda->KeyTail= 0x1e;
+Bda->FloppyData = 0x00;
+Bda->FloppyTimeout  = 0xff;
+
+Bda->KeyStart   = 0x001E;
+Bda->KeyEnd = 0x003E;
+Bda->KeyboardStatus = 0x10;
+Bda->Ebda   = 0x9fc0;
+
+//
+// Move LPT time out here and zero out LPT4 since some SCSI OPROMS
+// use this as scratch pad (LPT4 is Reserved)
+//
+Bda->Lpt1_2Timeout  = 0x1414;
+Bda->Lpt3_4Timeout  = 0x1400;
+
+  );
+
   ZeroMem (Ebda, 0x400);
-  //
-  // 640k-1k for EBDA
-  //
-  Bda->MemSize= 0x27f;
-  Bda->KeyHead= 0x1e;
-  Bda->KeyTail= 0x1e;
-  Bda->FloppyData = 0x00;
-  Bda->FloppyTimeout  = 0xff;
-
-  Bda->KeyStart   = 0x001E;
-  Bda->KeyEnd = 0x003E;
-  Bda->KeyboardStatus = 0x10;
-  Bda->Ebda   = 0x9fc0;
-
-  //
-  // Move LPT time out here and zero out LPT4 since some SCSI OPROMS
-  // use this as scratch pad (LPT4 is Reserved)
-  //
-  Bda->Lpt1_2Timeout  = 0x1414;
-  Bda->Lpt3_4Timeout  = 0x1400;
-
-  *Ebda   = 0x01;
-
-  EnableNullDetection ();
+  *Ebda = 0x01;
 
   return EFI_SUCCESS;
 }
diff --git a/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBios.c 
b/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBios.c
index c6461f5547..fca08a8fa2 100644
--- a/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBios.c
+++ b/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBios.c
@@ -786,115 +786,6 @@ ToggleEndOfDxeStatus (
   return;
 }
 
-//
-// Legacy BIOS needs to access memory between 0-4095, which will cause page
-// fault exception if NULL pointer detection mechanism is enabled. Following
-// functions can be used to disable/enable NULL pointer detection before/after
-// accessing those memory.
-//
-
-/**
-   Enable NULL pointer detection.
-**/
-VOID
-EnableNullDetection (
-  VOID
-  )
-{
-  EFI_STATUSStatus;
-  EFI_GCD_MEMORY_SPACE_DESCRIPTOR   Desc;
-
-  if (((PcdGet8 (PcdNullPointerDetectionPropertyMask) & BIT0) == 0)
-  ||
-  ((mEndOfDxe)  &&
-   ((PcdGet8 (PcdNullPointerDetectionPropertyMask) & (BIT7|BIT0))
-== (BIT7|BIT0)))
- ) {
-return;
-  }
-
-  //
-  // Check current capabilities and attributes
-  //
-  Status = gDS->GetMemorySpaceDescriptor (0, );
-  ASSERT_EFI_ERROR (Status);
-
-  //
-  // Try to add EFI_MEMORY_RP support if necessary
-  //
-  if ((Desc.Capabilities & EFI_MEMORY_RP) == 0) {
-Desc.Capabilities |= EFI_MEMORY_RP;
-Status = gDS->SetMemorySpaceCapabilities (0, EFI_PAGES_TO_SIZE(1),
-  Desc.Capabilities);
-ASSERT_EFI_ERROR (Status);
-if (EFI_ERROR (Status)) {
-  return;
-}
-  }
-
-  //
-  // Don't bother if EFI_MEMORY_RP is already set.
-  //
-  if ((Desc.Attributes & EFI_MEMORY_RP) == 0) {
-Desc.Attributes |= EFI_MEMORY_RP;
-Status = gDS->SetMemorySpaceAttributes (0, EFI_PAGES_TO_SIZE(1),
-   

[edk2] [PATCH v2 1/3] IntelFrameworkPkg/LegacyBios.h: Add a macro to guarantee page 0 access

[Jian J Wang]

> v2:
> a. Fix a typo in expression in the macro ACCESS_PAGE0_CODE
> b. Fix GCC49 build error

ue to the introduction of NULL pointer detection feature, page 0 will be
disabled if the feature is enabled, which will cause legacy code failed to
update legacy data in page 0. This macro is introduced to make sure the
page 0 is enabled before those code and restore the original status of it
afterwards.

Another reason to introduce this macro is to eliminate the dependency on
the PcdNullPointerDetectionPropertyMask. Because this is a new PCD, it
could cause some backward compatibility issue for some old packages.

This macro will simply check if the page 0 is disabled or not. If it's
disabled, it will enable it before code updating page 0 and disable it
afterwards. Otherwise, this macro will do nothing to page 0.

The usage of the macro will be look like (similar to DEBUG_CODE macro):

ACCESS_PAGE0_CODE(
  
);

Cc: Liming Gao 
Cc: Michael D Kinney 
Cc: Ruiyu Ni 
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang 
---
 IntelFrameworkPkg/Include/Protocol/LegacyBios.h | 34 +
 1 file changed, 34 insertions(+)

diff --git a/IntelFrameworkPkg/Include/Protocol/LegacyBios.h 
b/IntelFrameworkPkg/Include/Protocol/LegacyBios.h
index 641f101bce..6a5f5464e7 100644
--- a/IntelFrameworkPkg/Include/Protocol/LegacyBios.h
+++ b/IntelFrameworkPkg/Include/Protocol/LegacyBios.h
@@ -1518,6 +1518,40 @@ struct _EFI_LEGACY_BIOS_PROTOCOL {
   EFI_LEGACY_BIOS_BOOT_UNCONVENTIONAL_DEVICE  BootUnconventionalDevice;
 };
 
+//
+// Legacy BIOS needs to access memory in page 0 (0-4095), which is disabled if
+// NULL pointer detection feature is enabled. Following macro can be used to
+// enable/disable page 0 before/after accessing it.
+//
+#define ACCESS_PAGE0_CODE(statements)   \
+  do {  \
+EFI_STATUSStatus_;  \
+EFI_GCD_MEMORY_SPACE_DESCRIPTOR   Desc_;\
+\
+Desc_.Attributes = 0;   \
+Status_ = gDS->GetMemorySpaceDescriptor (0, _);\
+ASSERT_EFI_ERROR (Status_); \
+if ((Desc_.Attributes & EFI_MEMORY_RP) != 0) {  \
+  Status_ = gDS->SetMemorySpaceAttributes ( \
+  0,\
+  EFI_PAGES_TO_SIZE(1), \
+  Desc_.Attributes & ~(UINT64)EFI_MEMORY_RP \
+  );\
+  ASSERT_EFI_ERROR (Status_);   \
+}   \
+\
+statements; \
+\
+if ((Desc_.Attributes & EFI_MEMORY_RP) != 0) {  \
+  Status_ = gDS->SetMemorySpaceAttributes ( \
+  0,\
+  EFI_PAGES_TO_SIZE(1), \
+  Desc_.Attributes  \
+  );\
+  ASSERT_EFI_ERROR (Status_);   \
+}   \
+  } while (FALSE)
+
 extern EFI_GUID gEfiLegacyBiosProtocolGuid;
 
 #endif
-- 
2.15.1.windows.2

___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel

[edk2] [PATCH v2 0/3] Remove dependency on PcdNullPointerDetectionPropertyMask

[Jian J Wang]

> v2:
> a. Fix a typo in expression in the macro ACCESS_PAGE0_CODE
> b. Fix GCC49 build error
> c. Remove unnecessary braces enclosing code passed to ACCESS_PAGE0_CODE

Due to the introduction of NULL pointer detection feature, page 0 will be
disabled if the feature is enabled, which will cause legacy code failed to
update legacy data in page 0.

To avoid page fault caused by above feature in legacy code, legacy related
drivers have to enable page 0 temporarily before accessing page 0 and disable
it afterwards.

Old GCD servie has a bug which paging related attributes are not awared and
managed by GCD service. The legacy code has to use PCD
PcdNullPointerDetectionPropertyMask to know if page 0 is disabled or not.
As a result, two methods

EnableNullDetection()
DisableNullDetection()

were introduced to do enable/disable job just mentioned.

But the newly added PcdNullPointerDetectionPropertyMask caused backward
compatibility issue in some packages having legcy drivers. Since the
attributes missing issue in GCD services has been fixed, it's now able to
eliminate the dependency on this PCD.

Jian J Wang (3):
  IntelFrameworkPkg/LegacyBios.h: Add a macro to guarantee page 0 access
  IntelFrameworkModulePkg/LegacyBiosDxe: Use macro to enable/disable
page 0
  IntelFrameworkModulePkg/KeyboardDxe: Use macro to enable/disable page
0

 .../Csm/BiosThunk/KeyboardDxe/BiosKeyboard.c   | 118 ++
 .../Csm/BiosThunk/KeyboardDxe/KeyboardDxe.inf  |   1 -
 .../Csm/LegacyBiosDxe/LegacyBda.c  |  53 
 .../Csm/LegacyBiosDxe/LegacyBios.c | 135 ++---
 .../Csm/LegacyBiosDxe/LegacyBiosDxe.inf|   1 -
 .../Csm/LegacyBiosDxe/LegacyBiosInterface.h|  16 ---
 .../Csm/LegacyBiosDxe/LegacyBootSupport.c  |  80 ++--
 .../Csm/LegacyBiosDxe/LegacyPci.c  |  72 ++-
 IntelFrameworkModulePkg/Csm/LegacyBiosDxe/Thunk.c  |  51 
 IntelFrameworkPkg/Include/Protocol/LegacyBios.h|  34 ++
 10 files changed, 179 insertions(+), 382 deletions(-)

-- 
2.15.1.windows.2

___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel

Re: [edk2] [Patch] UefiCpuPkg: PiSmmCpuDxeSmm Add the missing ASM_PFX in nasm code

[Yao, Jiewen]

Yes, build pass is enough. Agree.

Please make sure all NASM related modules are built and linked. :-)

Thank you
Yao Jiewen

> -Original Message-
> From: Gao, Liming
> Sent: Thursday, December 7, 2017 11:44 AM
> To: Yao, Jiewen ; edk2-devel@lists.01.org
> Cc: Dong, Eric 
> Subject: RE: [edk2] [Patch] UefiCpuPkg: PiSmmCpuDxeSmm Add the missing
> ASM_PFX in nasm code
> 
> XCODE5 tool chain reports them.  For this change, I think build pass is 
> enough.
> 
> I send another patch to fix the missing ASM_PFX in SmmCpuFeaturesLib.
> 
> Thanks
> Liming
> >-Original Message-
> >From: Yao, Jiewen
> >Sent: Thursday, December 07, 2017 11:00 AM
> >To: Gao, Liming ; edk2-devel@lists.01.org
> >Cc: Dong, Eric 
> >Subject: RE: [edk2] [Patch] UefiCpuPkg: PiSmmCpuDxeSmm Add the missing
> >ASM_PFX in nasm code
> >
> >I think so.
> >
> >May I know how this is found? And how this is validated?
> >
> >I think we need build the whole package to trigger all the failure, and fix 
> >all.
> >
> >Thank you
> >Yao Jiewen
> >
> >
> >> -Original Message-
> >> From: Gao, Liming
> >> Sent: Thursday, December 7, 2017 10:53 AM
> >> To: Yao, Jiewen ; edk2-devel@lists.01.org
> >> Cc: Dong, Eric 
> >> Subject: RE: [edk2] [Patch] UefiCpuPkg: PiSmmCpuDxeSmm Add the missing
> >> ASM_PFX in nasm code
> >>
> >> Do you mean SmmCpuFeaturesLib also has the similar issue? If yes, I will
> >provide
> >> the patch to fix it.
> >>
> >> >-Original Message-
> >> >From: Yao, Jiewen
> >> >Sent: Thursday, December 07, 2017 10:52 AM
> >> >To: Gao, Liming ; edk2-devel@lists.01.org
> >> >Cc: Dong, Eric 
> >> >Subject: RE: [edk2] [Patch] UefiCpuPkg: PiSmmCpuDxeSmm Add the
> >missing
> >> >ASM_PFX in nasm code
> >> >
> >> >Hi Liming
> >> >Reviewed-by: jiewen@intel.com
> >> >
> >> >BTW: Do you think we also need update SmmCpuFeaturesLib ?
> >> >
> >> >Thank you
> >> >Yao Jiewen
> >> >
> >> >
> >> >> -Original Message-
> >> >> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf
> >Of
> >> >Liming
> >> >> Gao
> >> >> Sent: Thursday, December 7, 2017 10:45 AM
> >> >> To: edk2-devel@lists.01.org
> >> >> Cc: Dong, Eric 
> >> >> Subject: [edk2] [Patch] UefiCpuPkg: PiSmmCpuDxeSmm Add the missing
> >> >> ASM_PFX in nasm code
> >> >>
> >> >> Contributed-under: TianoCore Contribution Agreement 1.1
> >> >> Signed-off-by: Liming Gao 
> >> >> Cc: Eric Dong 
> >> >> ---
> >> >>  UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm | 10 +-
> >> >>  1 file changed, 5 insertions(+), 5 deletions(-)
> >> >>
> >> >> diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm
> >> >> b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm
> >> >> index c3c094f..dc56dc7 100644
> >> >> --- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm
> >> >> +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm
> >> >> @@ -1,5 +1,5 @@
> >> >>  
> >> >> ;--
> >> >>  ;
> >> >> -; Copyright (c) 2016, Intel Corporation. All rights reserved.
> >> >> +; Copyright (c) 2016 - 2017, Intel Corporation. All rights 
> >> >> reserved.
> >> >>  ; This program and the accompanying materials
> >> >>  ; are licensed and made available under the terms and conditions of the
> >BSD
> >> >> License
> >> >>  ; which accompanies this distribution.  The full text of the license 
> >> >> may
> be
> >> >found
> >> >> at
> >> >> @@ -184,15 +184,15 @@ _SmiHandler:
> >> >>  add rsp, -0x20
> >> >>
> >> >>  mov rcx, rbx
> >> >> -mov rax, CpuSmmDebugEntry
> >> >> +mov rax, ASM_PFX(CpuSmmDebugEntry)
> >> >>  callrax
> >> >>
> >> >>  mov rcx, rbx
> >> >> -mov rax, SmiRendezvous  ; rax <- absolute addr of
> >> >> SmiRedezvous
> >> >> +mov rax, ASM_PFX(SmiRendezvous)  ; rax <- absolute addr of
> >> >> SmiRedezvous
> >> >>  callrax
> >> >>
> >> >>  mov rcx, rbx
> >> >> -mov rax, CpuSmmDebugExit
> >> >> +mov rax, ASM_PFX(CpuSmmDebugExit)
> >> >>  callrax
> >> >>
> >> >>  add rsp, 0x20
> >> >> @@ -220,5 +220,5 @@ _SmiHandler:
> >> >>  .1:
> >> >>  rsm
> >> >>
> >> >> -gcSmiHandlerSizeDW  $ - _SmiEntryPoint
> >> >> +ASM_PFX(gcSmiHandlerSize)DW  $ - _SmiEntryPoint
> >> >>
> >> >> --
> >> >> 2.8.0.windows.1
> >> >>
> >> >> ___
> >> >> edk2-devel mailing list
> >> >> edk2-devel@lists.01.org
> >> >> https://lists.01.org/mailman/listinfo/edk2-devel
___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel

Re: [edk2] [Patch] UefiCpuPkg: SmmCpuFeaturesLib Add the missing ASM_PFX in nasm code

[Yao, Jiewen]

Reviewed-by: jiewen@intel.com

> -Original Message-
> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Liming
> Gao
> Sent: Thursday, December 7, 2017 11:43 AM
> To: edk2-devel@lists.01.org
> Cc: Dong, Eric 
> Subject: [edk2] [Patch] UefiCpuPkg: SmmCpuFeaturesLib Add the missing
> ASM_PFX in nasm code
> 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Liming Gao 
> Cc: Eric Dong 
> ---
>  UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiEntry.nasm | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiEntry.nasm
> b/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiEntry.nasm
> index bcac643..ea2d297 100644
> --- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiEntry.nasm
> +++ b/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiEntry.nasm
> @@ -188,15 +188,15 @@ CommonHandler:
>  add rsp, -0x20
> 
>  mov rcx, rbx
> -mov rax, CpuSmmDebugEntry
> +mov rax, ASM_PFX(CpuSmmDebugEntry)
>  callrax
> 
>  mov rcx, rbx
> -mov rax, SmiRendezvous  ; rax <- absolute addr of
> SmiRedezvous
> +mov rax, ASM_PFX(SmiRendezvous)  ; rax <- absolute addr
> of SmiRedezvous
>  callrax
> 
>  mov rcx, rbx
> -mov rax, CpuSmmDebugExit
> +mov rax, ASM_PFX(CpuSmmDebugExit)
>  callrax
> 
>  add rsp, 0x20
> --
> 2.8.0.windows.1
> 
> ___
> edk2-devel mailing list
> edk2-devel@lists.01.org
> https://lists.01.org/mailman/listinfo/edk2-devel
___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel

Re: [edk2] [Patch] UefiCpuPkg: PiSmmCpuDxeSmm Add the missing ASM_PFX in nasm code

[Gao, Liming]

XCODE5 tool chain reports them.  For this change, I think build pass is enough. 

I send another patch to fix the missing ASM_PFX in SmmCpuFeaturesLib.

Thanks
Liming
>-Original Message-
>From: Yao, Jiewen
>Sent: Thursday, December 07, 2017 11:00 AM
>To: Gao, Liming ; edk2-devel@lists.01.org
>Cc: Dong, Eric 
>Subject: RE: [edk2] [Patch] UefiCpuPkg: PiSmmCpuDxeSmm Add the missing
>ASM_PFX in nasm code
>
>I think so.
>
>May I know how this is found? And how this is validated?
>
>I think we need build the whole package to trigger all the failure, and fix 
>all.
>
>Thank you
>Yao Jiewen
>
>
>> -Original Message-
>> From: Gao, Liming
>> Sent: Thursday, December 7, 2017 10:53 AM
>> To: Yao, Jiewen ; edk2-devel@lists.01.org
>> Cc: Dong, Eric 
>> Subject: RE: [edk2] [Patch] UefiCpuPkg: PiSmmCpuDxeSmm Add the missing
>> ASM_PFX in nasm code
>>
>> Do you mean SmmCpuFeaturesLib also has the similar issue? If yes, I will
>provide
>> the patch to fix it.
>>
>> >-Original Message-
>> >From: Yao, Jiewen
>> >Sent: Thursday, December 07, 2017 10:52 AM
>> >To: Gao, Liming ; edk2-devel@lists.01.org
>> >Cc: Dong, Eric 
>> >Subject: RE: [edk2] [Patch] UefiCpuPkg: PiSmmCpuDxeSmm Add the
>missing
>> >ASM_PFX in nasm code
>> >
>> >Hi Liming
>> >Reviewed-by: jiewen@intel.com
>> >
>> >BTW: Do you think we also need update SmmCpuFeaturesLib ?
>> >
>> >Thank you
>> >Yao Jiewen
>> >
>> >
>> >> -Original Message-
>> >> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf
>Of
>> >Liming
>> >> Gao
>> >> Sent: Thursday, December 7, 2017 10:45 AM
>> >> To: edk2-devel@lists.01.org
>> >> Cc: Dong, Eric 
>> >> Subject: [edk2] [Patch] UefiCpuPkg: PiSmmCpuDxeSmm Add the missing
>> >> ASM_PFX in nasm code
>> >>
>> >> Contributed-under: TianoCore Contribution Agreement 1.1
>> >> Signed-off-by: Liming Gao 
>> >> Cc: Eric Dong 
>> >> ---
>> >>  UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm | 10 +-
>> >>  1 file changed, 5 insertions(+), 5 deletions(-)
>> >>
>> >> diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm
>> >> b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm
>> >> index c3c094f..dc56dc7 100644
>> >> --- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm
>> >> +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm
>> >> @@ -1,5 +1,5 @@
>> >>  
>> >> ;--
>> >>  ;
>> >> -; Copyright (c) 2016, Intel Corporation. All rights reserved.
>> >> +; Copyright (c) 2016 - 2017, Intel Corporation. All rights reserved.
>> >>  ; This program and the accompanying materials
>> >>  ; are licensed and made available under the terms and conditions of the
>BSD
>> >> License
>> >>  ; which accompanies this distribution.  The full text of the license may 
>> >> be
>> >found
>> >> at
>> >> @@ -184,15 +184,15 @@ _SmiHandler:
>> >>  add rsp, -0x20
>> >>
>> >>  mov rcx, rbx
>> >> -mov rax, CpuSmmDebugEntry
>> >> +mov rax, ASM_PFX(CpuSmmDebugEntry)
>> >>  callrax
>> >>
>> >>  mov rcx, rbx
>> >> -mov rax, SmiRendezvous  ; rax <- absolute addr of
>> >> SmiRedezvous
>> >> +mov rax, ASM_PFX(SmiRendezvous)  ; rax <- absolute addr of
>> >> SmiRedezvous
>> >>  callrax
>> >>
>> >>  mov rcx, rbx
>> >> -mov rax, CpuSmmDebugExit
>> >> +mov rax, ASM_PFX(CpuSmmDebugExit)
>> >>  callrax
>> >>
>> >>  add rsp, 0x20
>> >> @@ -220,5 +220,5 @@ _SmiHandler:
>> >>  .1:
>> >>  rsm
>> >>
>> >> -gcSmiHandlerSizeDW  $ - _SmiEntryPoint
>> >> +ASM_PFX(gcSmiHandlerSize)DW  $ - _SmiEntryPoint
>> >>
>> >> --
>> >> 2.8.0.windows.1
>> >>
>> >> ___
>> >> edk2-devel mailing list
>> >> edk2-devel@lists.01.org
>> >> https://lists.01.org/mailman/listinfo/edk2-devel
___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel

[edk2] [Patch] UefiCpuPkg: SmmCpuFeaturesLib Add the missing ASM_PFX in nasm code

[Liming Gao]

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao 
Cc: Eric Dong 
---
 UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiEntry.nasm | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiEntry.nasm 
b/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiEntry.nasm
index bcac643..ea2d297 100644
--- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiEntry.nasm
+++ b/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiEntry.nasm
@@ -188,15 +188,15 @@ CommonHandler:
 add rsp, -0x20
 
 mov rcx, rbx
-mov rax, CpuSmmDebugEntry
+mov rax, ASM_PFX(CpuSmmDebugEntry)
 callrax
 
 mov rcx, rbx
-mov rax, SmiRendezvous  ; rax <- absolute addr of SmiRedezvous
+mov rax, ASM_PFX(SmiRendezvous)  ; rax <- absolute addr of 
SmiRedezvous
 callrax
 
 mov rcx, rbx
-mov rax, CpuSmmDebugExit
+mov rax, ASM_PFX(CpuSmmDebugExit)
 callrax
 
 add rsp, 0x20
-- 
2.8.0.windows.1

___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel

Re: [edk2] [PATCH edk2-platforms] [PATCH v3 2/9] Platform/NXP : Add support for Watchdog driver

[Meenakshi Aggarwal]

Hi Liming, Mike,


Please share your inputs on this.


Thanks,
Meenakshi

> -Original Message-
> From: Leif Lindholm [mailto:leif.lindh...@linaro.org]
> Sent: Tuesday, December 05, 2017 4:36 PM
> To: Udit Kumar 
> Cc: Gao, Liming ; Kinney, Michael D
> ; Meenakshi Aggarwal
> ; ard.biesheu...@linaro.org; edk2-
> de...@lists.01.org; Varun Sethi 
> Subject: Re: [PATCH edk2-platforms] [PATCH v3 2/9] Platform/NXP : Add
> support for Watchdog driver
> 
> On Tue, Dec 05, 2017 at 05:07:00AM +, Udit Kumar wrote:
> > >   I suggest return EFI_UNSUPPORTED for this case. The protocol
> implementation
> > > could return its status besides spec defined status.
> >
> > Thanks to help me , how core will treat this error
> > 1/  Wdt not available
> > 2/ ignoring this error
> > 3/ core is not registering handler
> > I guess 3 is valid,
> 
> Looking at Core/Dxe/Misc/SetWatchdogTimer.c:
>   //
>   // Attempt to set the timeout
>   //
>   Status = gWatchdogTimer->SetTimerPeriod (gWatchdogTimer,
>   MultU64x32 (Timeout, WATCHDOG_TIMER_CALIBRATE_PER_SECOND));
> 
>   //
>   // Check for errors
>   //
>   if (EFI_ERROR (Status)) {
> return EFI_DEVICE_ERROR;
>   }
> 
> The SetWatchdogTimer() call would always return EFI_DEVICE_ERROR.
> 
> > On side track, looks wdt is not used by core services then do we
> > really need this as part of arch protocol ?
> 
> Yes, that was ultimately what I was implying with my question
> regarding whether this protocol is relevant for a watchdog that can
> only ever reset the system on timeout.
> 
> The protocol looks to me to be designed to use a dedicated generic
> timer as backing for a software watchdog.
> 
> Liming, Mike?
> 
> If that is the case, then I agree this driver should probably not
> implement this protocol, but rather set up a timer event (or a
> dedicated timer) to stroke the watchdog.
> 
> Regards,
> 
> Leif
> 
> > regards
> > Udit
> >
> > > -Original Message-
> > > From: Gao, Liming [mailto:liming@intel.com]
> > > Sent: Monday, December 04, 2017 8:53 PM
> > > To: Leif Lindholm ; Kinney, Michael D
> > > 
> > > Cc: Meenakshi Aggarwal ;
> > > ard.biesheu...@linaro.org; edk2-devel@lists.01.org; Udit Kumar
> > > ; Varun Sethi 
> > > Subject: RE: [PATCH edk2-platforms] [PATCH v3 2/9] Platform/NXP : Add
> support
> > > for Watchdog driver
> > >
> > > Leif:
> > >   I suggest return EFI_UNSUPPORTED for this case. The protocol
> implementation
> > > could return its status besides spec defined status.
> > >
> > > Thanks
> > > Liming
> > > > -Original Message-
> > > > From: Leif Lindholm [mailto:leif.lindh...@linaro.org]
> > > > Sent: Monday, December 4, 2017 10:36 PM
> > > > To: Kinney, Michael D ; Gao, Liming
> > > > 
> > > > Cc: Meenakshi Aggarwal ;
> > > > ard.biesheu...@linaro.org; edk2-devel@lists.01.org;
> > > > udit.ku...@nxp.com; v.se...@nxp.com
> > > > Subject: Re: [PATCH edk2-platforms] [PATCH v3 2/9] Platform/NXP :
> Add
> > > > support for Watchdog driver
> > > >
> > > > Mike, Liming, as MdePkg mainteiners - one question below:
> > > >
> > > > On Mon, Nov 27, 2017 at 04:21:50PM +0530, Meenakshi Aggarwal
> wrote:
> > > > > diff --git a/Platform/NXP/Drivers/WatchDog/WatchDog.c
> > > > > b/Platform/NXP/Drivers/WatchDog/WatchDog.c
> > > > > new file mode 100644
> > > > > index 000..a9c70ef
> > > > > --- /dev/null
> > > > > +++ b/Platform/NXP/Drivers/WatchDog/WatchDog.c
> > > > > @@ -0,0 +1,421 @@
> > > >
> > > > ...
> > > >
> > > > > +/**
> > > > > +  This function registers the handler NotifyFunction so it is
> > > > > +called every time
> > > > > +  the watchdog timer expires.  It also passes the amount of time
> > > > > +since the last
> > > > > +  handler call to the NotifyFunction.
> > > > > +  If NotifyFunction is not NULL and a handler is not already
> > > > > +registered,
> > > > > +  then the new handler is registered and EFI_SUCCESS is returned.
> > > > > +  If NotifyFunction is NULL, and a handler is already registered,
> > > > > +  then that handler is unregistered.
> > > > > +  If an attempt is made to register a handler when a handler is
> > > > > +already registered,
> > > > > +  then EFI_ALREADY_STARTED is returned.
> > > > > +  If an attempt is made to unregister a handler when a handler is
> > > > > +not registered,
> > > > > +  then EFI_INVALID_PARAMETER is returned.
> > > > > +
> > > > > +  @param  This The EFI_TIMER_ARCH_PROTOCOL instance.
> > > > > +  @param  NotifyFunction   The function to call when a timer
> interrupt fires.
> > > This
> > > > > +   function executes at TPL_HIGH_LEVEL. The 
> > > > > DXE Core
> will
> > > > > +   register a handler for the 

Re: [edk2] [PATCH] MdePkg: Arm/AArch64 - filter #pragma pack() when __ASSEMBLER__

[Gao, Liming]

Reviewed-by: Liming Gao 

>-Original Message-
>From: Leif Lindholm [mailto:leif.lindh...@linaro.org]
>Sent: Thursday, December 07, 2017 1:08 AM
>To: edk2-devel@lists.01.org
>Cc: Kinney, Michael D ; Gao, Liming
>; ard.biesheu...@linaro.org
>Subject: [PATCH] MdePkg: Arm/AArch64 - filter #pragma pack() when
>__ASSEMBLER__
>
>clang, when used as a preprocessor for dtc, does not discard #pragma
>statements although -x assembler-with-cpp is specified. This causes dtc
>to barf at a #pragma pack() statement that is already filtered out for
>__GNUC__. So add a check to also filter this out if __ASSEMBLER__.
>
>Contributed-under: TianoCore Contribution Agreement 1.1
>Signed-off-by: Leif Lindholm 
>---
> MdePkg/Include/AArch64/ProcessorBind.h | 2 +-
> MdePkg/Include/Arm/ProcessorBind.h | 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
>diff --git a/MdePkg/Include/AArch64/ProcessorBind.h
>b/MdePkg/Include/AArch64/ProcessorBind.h
>index 775e7498c5..7b0f0ff32f 100644
>--- a/MdePkg/Include/AArch64/ProcessorBind.h
>+++ b/MdePkg/Include/AArch64/ProcessorBind.h
>@@ -26,7 +26,7 @@
> //
> // Make sure we are using the correct packing rules per EFI specification
> //
>-#ifndef __GNUC__
>+#if !defined(__GNUC__) && !defined(__ASSEMBLER__)
> #pragma pack()
> #endif
>
>diff --git a/MdePkg/Include/Arm/ProcessorBind.h
>b/MdePkg/Include/Arm/ProcessorBind.h
>index dde1fd1152..42ea2f3055 100644
>--- a/MdePkg/Include/Arm/ProcessorBind.h
>+++ b/MdePkg/Include/Arm/ProcessorBind.h
>@@ -24,7 +24,7 @@
> //
> // Make sure we are using the correct packing rules per EFI specification
> //
>-#ifndef __GNUC__
>+#if !defined(__GNUC__) && !defined(__ASSEMBLER__)
> #pragma pack()
> #endif
>
>--
>2.11.0

___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel

Re: [edk2] [PATCH] UefiCpuPkg PiSmmCpuDxeSmm: Only DumpCpuContext in error case

[Zeng, Star]

That will be in another patch. :)

Thanks,
Star
-Original Message-
From: Yao, Jiewen 
Sent: Thursday, December 7, 2017 11:03 AM
To: Zeng, Star ; edk2-devel@lists.01.org
Cc: Dong, Eric ; Laszlo Ersek ; Ni, 
Ruiyu 
Subject: RE: [PATCH] UefiCpuPkg PiSmmCpuDxeSmm: Only DumpCpuContext in error 
case

Good enhancement.
Reviewed-by: jiewen@intel.com

BTW: I think we should also ASSERT(FALSE) if StaticPage and Smmprofile are both 
TRUE


> -Original Message-
> From: Zeng, Star
> Sent: Thursday, December 7, 2017 9:49 AM
> To: edk2-devel@lists.01.org
> Cc: Zeng, Star ; Yao, Jiewen 
> ; Dong, Eric ; Laszlo Ersek 
> ; Ni, Ruiyu 
> Subject: [PATCH] UefiCpuPkg PiSmmCpuDxeSmm: Only DumpCpuContext in 
> error case
> 
> Only DumpCpuContext in error case, otherwise there will be too many 
> debug messages from DumpCpuContext() when SmmProfile feature is 
> enabled by setting PcdCpuSmmProfileEnable to TRUE. Those debug 
> messages are not needed for SmmProfile feature as it will record those 
> information to buffer for further dump.
> 
> Cc: Jiewen Yao 
> Cc: Eric Dong 
> Cc: Laszlo Ersek 
> Cc: Ruiyu Ni 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Star Zeng 
> ---
>  UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c | 6 --  
> UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c  | 6 --
>  2 files changed, 8 insertions(+), 4 deletions(-)
> 
> diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c
> b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c
> index 0396f2daaaed..6e1ffe7c6287 100644
> --- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c
> +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c
> @@ -134,12 +134,12 @@ SmiPFHandler (
>}
> 
>//
> -  // If a page fault occurs in SMM range
> +  // If a page fault occurs in non-SMRAM range.
>//
>if ((PFAddress < mCpuHotPlugData.SmrrBase) ||
>(PFAddress >= mCpuHotPlugData.SmrrBase +
> mCpuHotPlugData.SmrrSize)) {
> -DumpCpuContext (InterruptType, SystemContext);
>  if ((SystemContext.SystemContextIa32->ExceptionData &
> IA32_PF_EC_ID) != 0) {
> +  DumpCpuContext (InterruptType, SystemContext);
>DEBUG ((DEBUG_ERROR, "Code executed on IP(0x%x) out of SMM 
> range after SMM is locked!\n", PFAddress));
>DEBUG_CODE (
>  DumpModuleInfoByIp (*(UINTN
> *)(UINTN)SystemContext.SystemContextIa32->Esp);
> @@ -147,6 +147,7 @@ SmiPFHandler (
>CpuDeadLoop ();
>  }
>  if (IsSmmCommBufferForbiddenAddress (PFAddress)) {
> +  DumpCpuContext (InterruptType, SystemContext);
>DEBUG ((DEBUG_ERROR, "Access SMM communication forbidden 
> address (0x%x)!\n", PFAddress));
>DEBUG_CODE (
>  DumpModuleInfoByIp
> ((UINTN)SystemContext.SystemContextIa32->Eip);
> @@ -160,6 +161,7 @@ SmiPFHandler (
>//
>if ((PcdGet8 (PcdNullPointerDetectionPropertyMask) & BIT1) != 0 &&
>(PFAddress < EFI_PAGE_SIZE)) {
> +DumpCpuContext (InterruptType, SystemContext);
>  DEBUG ((DEBUG_ERROR, "!!! NULL pointer access !!!\n"));
>  DEBUG_CODE (
>DumpModuleInfoByIp
> ((UINTN)SystemContext.SystemContextIa32->Eip);
> diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
> b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
> index 79a26d7ec6a3..6478c6c3e355 100644
> --- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
> +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
> @@ -851,12 +851,12 @@ SmiPFHandler (
>}
> 
>//
> -  // If a page fault occurs in SMM range
> +  // If a page fault occurs in non-SMRAM range.
>//
>if ((PFAddress < mCpuHotPlugData.SmrrBase) ||
>(PFAddress >= mCpuHotPlugData.SmrrBase +
> mCpuHotPlugData.SmrrSize)) {
> -DumpCpuContext (InterruptType, SystemContext);
>  if ((SystemContext.SystemContextX64->ExceptionData &
> IA32_PF_EC_ID) != 0) {
> +  DumpCpuContext (InterruptType, SystemContext);
>DEBUG ((DEBUG_ERROR, "Code executed on IP(0x%lx) out of SMM 
> range after SMM is locked!\n", PFAddress));
>DEBUG_CODE (
>  DumpModuleInfoByIp (*(UINTN
> *)(UINTN)SystemContext.SystemContextX64->Rsp);
> @@ -864,6 +864,7 @@ SmiPFHandler (
>CpuDeadLoop ();
>  }
>  if (IsSmmCommBufferForbiddenAddress (PFAddress)) {
> +  DumpCpuContext (InterruptType, SystemContext);
>DEBUG ((DEBUG_ERROR, "Access SMM communication forbidden 
> address (0x%lx)!\n", PFAddress));
>DEBUG_CODE (
>  DumpModuleInfoByIp
> ((UINTN)SystemContext.SystemContextX64->Rip);
> @@ -877,6 +878,7 @@ SmiPFHandler (
>//
>if ((PcdGet8 (PcdNullPointerDetectionPropertyMask) & BIT1) != 0 &&
>(PFAddress < EFI_PAGE_SIZE)) {
> +DumpCpuContext (InterruptType, SystemContext);
>  DEBUG ((DEBUG_ERROR, "!!! NULL pointer access 

Re: [edk2] [PATCH] UefiCpuPkg PiSmmCpuDxeSmm: Only DumpCpuContext in error case

[Yao, Jiewen]

Good enhancement.
Reviewed-by: jiewen@intel.com

BTW: I think we should also ASSERT(FALSE) if StaticPage and Smmprofile are both 
TRUE


> -Original Message-
> From: Zeng, Star
> Sent: Thursday, December 7, 2017 9:49 AM
> To: edk2-devel@lists.01.org
> Cc: Zeng, Star ; Yao, Jiewen ;
> Dong, Eric ; Laszlo Ersek ; Ni, Ruiyu
> 
> Subject: [PATCH] UefiCpuPkg PiSmmCpuDxeSmm: Only DumpCpuContext in
> error case
> 
> Only DumpCpuContext in error case, otherwise there will be too many
> debug messages from DumpCpuContext() when SmmProfile feature is enabled
> by setting PcdCpuSmmProfileEnable to TRUE. Those debug messages are not
> needed for SmmProfile feature as it will record those information to
> buffer for further dump.
> 
> Cc: Jiewen Yao 
> Cc: Eric Dong 
> Cc: Laszlo Ersek 
> Cc: Ruiyu Ni 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Star Zeng 
> ---
>  UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c | 6 --
>  UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c  | 6 --
>  2 files changed, 8 insertions(+), 4 deletions(-)
> 
> diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c
> b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c
> index 0396f2daaaed..6e1ffe7c6287 100644
> --- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c
> +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c
> @@ -134,12 +134,12 @@ SmiPFHandler (
>}
> 
>//
> -  // If a page fault occurs in SMM range
> +  // If a page fault occurs in non-SMRAM range.
>//
>if ((PFAddress < mCpuHotPlugData.SmrrBase) ||
>(PFAddress >= mCpuHotPlugData.SmrrBase +
> mCpuHotPlugData.SmrrSize)) {
> -DumpCpuContext (InterruptType, SystemContext);
>  if ((SystemContext.SystemContextIa32->ExceptionData &
> IA32_PF_EC_ID) != 0) {
> +  DumpCpuContext (InterruptType, SystemContext);
>DEBUG ((DEBUG_ERROR, "Code executed on IP(0x%x) out of SMM range
> after SMM is locked!\n", PFAddress));
>DEBUG_CODE (
>  DumpModuleInfoByIp (*(UINTN
> *)(UINTN)SystemContext.SystemContextIa32->Esp);
> @@ -147,6 +147,7 @@ SmiPFHandler (
>CpuDeadLoop ();
>  }
>  if (IsSmmCommBufferForbiddenAddress (PFAddress)) {
> +  DumpCpuContext (InterruptType, SystemContext);
>DEBUG ((DEBUG_ERROR, "Access SMM communication forbidden
> address (0x%x)!\n", PFAddress));
>DEBUG_CODE (
>  DumpModuleInfoByIp
> ((UINTN)SystemContext.SystemContextIa32->Eip);
> @@ -160,6 +161,7 @@ SmiPFHandler (
>//
>if ((PcdGet8 (PcdNullPointerDetectionPropertyMask) & BIT1) != 0 &&
>(PFAddress < EFI_PAGE_SIZE)) {
> +DumpCpuContext (InterruptType, SystemContext);
>  DEBUG ((DEBUG_ERROR, "!!! NULL pointer access !!!\n"));
>  DEBUG_CODE (
>DumpModuleInfoByIp
> ((UINTN)SystemContext.SystemContextIa32->Eip);
> diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
> b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
> index 79a26d7ec6a3..6478c6c3e355 100644
> --- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
> +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
> @@ -851,12 +851,12 @@ SmiPFHandler (
>}
> 
>//
> -  // If a page fault occurs in SMM range
> +  // If a page fault occurs in non-SMRAM range.
>//
>if ((PFAddress < mCpuHotPlugData.SmrrBase) ||
>(PFAddress >= mCpuHotPlugData.SmrrBase +
> mCpuHotPlugData.SmrrSize)) {
> -DumpCpuContext (InterruptType, SystemContext);
>  if ((SystemContext.SystemContextX64->ExceptionData &
> IA32_PF_EC_ID) != 0) {
> +  DumpCpuContext (InterruptType, SystemContext);
>DEBUG ((DEBUG_ERROR, "Code executed on IP(0x%lx) out of SMM
> range after SMM is locked!\n", PFAddress));
>DEBUG_CODE (
>  DumpModuleInfoByIp (*(UINTN
> *)(UINTN)SystemContext.SystemContextX64->Rsp);
> @@ -864,6 +864,7 @@ SmiPFHandler (
>CpuDeadLoop ();
>  }
>  if (IsSmmCommBufferForbiddenAddress (PFAddress)) {
> +  DumpCpuContext (InterruptType, SystemContext);
>DEBUG ((DEBUG_ERROR, "Access SMM communication forbidden
> address (0x%lx)!\n", PFAddress));
>DEBUG_CODE (
>  DumpModuleInfoByIp
> ((UINTN)SystemContext.SystemContextX64->Rip);
> @@ -877,6 +878,7 @@ SmiPFHandler (
>//
>if ((PcdGet8 (PcdNullPointerDetectionPropertyMask) & BIT1) != 0 &&
>(PFAddress < EFI_PAGE_SIZE)) {
> +DumpCpuContext (InterruptType, SystemContext);
>  DEBUG ((DEBUG_ERROR, "!!! NULL pointer access !!!\n"));
>  DEBUG_CODE (
>DumpModuleInfoByIp
> ((UINTN)SystemContext.SystemContextX64->Rip);
> --
> 2.7.0.windows.1

___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel

Re: [edk2] [PATCH v2 0/6] Add ARM support for VS2017

[Gao, Liming]

Pete:
  This is the base step to enable VS2017 ARM tool chain. Then, user could use 
it and build ARM application first. 
  Here, I have one question. VS2017 ARM requires 4096 alignment. So, why not 
add /FILEALIGN:4096 into tools_def.txt as the default linker option for ARM?

Thanks
Liming
>-Original Message-
>From: Pete Batard [mailto:p...@akeo.ie]
>Sent: Wednesday, December 06, 2017 7:15 PM
>To: edk2-devel@lists.01.org
>Cc: Gao, Liming 
>Subject: [PATCH v2 0/6] Add ARM support for VS2017
>
>This is a v2 of the previous patch, that takes into account the alignment
>of suppressed level 4 warnings between IA32, X64 and ARM, and that also
>removes compiler options that weren't actually needed.
>
>The following series adds ARM compilation support for the VS2017 toolchain.
>* PATCH 1 targets the disabling of VS Level 4 warnings. The disabled warnings
>  for ARM are now aligned with IA32 and X64.
>* PATCH 2 adds a NULL handler for the base stack check, since this is a GCC
>  functionality.
>* PATCH 3 updates MdePkg/Library/BaseLib so that the RVCT assembly
>sources
>  are also used for MSFT.
>* PATCH 4 adds the required compiler intrinsics replacements for division,
>  shift and memset/memcpy.
>* PATCH 5 adds variable argument handlers for print output. Note that this
>  is done without relying on any external headers, with the VA_ARG macro
>  having been reverse engineered from MSFT ARM assembly output.
>* PATCH 6 enables the selection of ARM in the conf templates.
>
>With these patches, VS2017 toolchain users should be able to compile
>regular UEFI ARM applications using EDK2. Note that, unlike ARM64 support,
>ARM support does not require a specific update of Visual Studio 2017, as
>the ARM toolchain has been available from the very first release.
>
>Additional notes:
>
>We tested compiling and running the full UEFI Shell with this series, as
>well as a small set of applications and drivers, and found no issues.
>With an additional patch [1], it is also possible to use this proposal to
>compile a complete QEMU ARM firmware. As the patch shows, the changes
>that
>need to be applied to the EDK2 sources to achieve this are actually very
>minimal.
>
>However, the generated firmware does not currently boot, possibly because
>of the following warnings being generated by the MS compiler:
>- ArmCpuDxe.dll : warning LNK4072: section count 118 exceeds max (96);
>image may not run
>- UiApp.dll : warning LNK4072: section count 113 exceeds max (96); image may
>not run
>
>As far as I could see, the section count max is hardcoded so a workaround
>would be needed to address those.
>
>Also, because the VS2017 ARM compiler forces a section alignment of 4096
>bytes (which in turn forces use to use /FILEALIGN:4096 as a linker option
>for the firmware generation), the generated firmware exceeds 2MB and we
>had to double its size to 4MB.
>
>At this stage, since the goal of this series is to allow users to compile
>regular ARM UEFI applications using the VS2017 toolchain, I have non plans
>to spend more time on the QEMU firmware issues, especially as I suspect
>that reducing the firmware size back to 2 MB may not be achievable without
>Microsoft altering their compiler. I am however hopeful that ARM
>specialists can take this matter over eventually...
>
>Regards,
>
>/Pete
>
>[1]
>https://github.com/pbatard/edk2/commit/c4ce41094a46f4f3dc7ccc64a906048
>13f037b13
>
>
>Pete Batard (6):
>  MdePkg: Disable some Level 4 warnings for VS2017/ARM
>  MdePkg/Library/BaseStackCheckLib: Add Null handler for VS2017/ARM
>  MdePkg/Library/BaseLib: Enable VS2017/ARM builds
>  ArmPkg/Library/CompilerIntrinsicsLib: Enable VS2017/ARM builds
>  MdePkg/Include: Add VA list support for VS2017/ARM
>  BaseTools/Conf: Add VS2017/ARM support
>
> ArmPkg/Library/CompilerIntrinsicsLib/Arm/rtdiv.asm | 255
>
> ArmPkg/Library/CompilerIntrinsicsLib/Arm/rtsrsh.asm|  45 
> ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf |  13 +-
> ArmPkg/Library/CompilerIntrinsicsLib/memcpy_ms.c   |  34 +++
> ArmPkg/Library/CompilerIntrinsicsLib/memset_ms.c   |  33 +++
> BaseTools/Conf/build_rule.template |  31 ++-
> BaseTools/Conf/tools_def.template  |  28 +++
> MdePkg/Include/Arm/ProcessorBind.h |  96 ++--
> MdePkg/Include/Base.h  |  13 +
> MdePkg/Library/BaseLib/Arm/CpuBreakpoint.asm   |   5 +-
> MdePkg/Library/BaseLib/BaseLib.inf |  16 +-
> MdePkg/Library/BaseStackCheckLib/BaseStackCheckLib.inf |   5 +-
> MdePkg/Library/BaseStackCheckLib/BaseStackCheckNull.c  |  18 ++
> 13 files changed, 562 insertions(+), 30 deletions(-)
> create mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/Arm/rtdiv.asm
> create mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/Arm/rtsrsh.asm
> create mode 

Re: [edk2] [PATCH] UefiCpuPkg PiSmmCpuDxeSmm: Only DumpCpuContext in error case

[Dong, Eric]

Reviewed-by: Eric Dong 

-Original Message-
From: Zeng, Star 
Sent: Thursday, December 7, 2017 9:49 AM
To: edk2-devel@lists.01.org
Cc: Zeng, Star; Yao, Jiewen; Dong, Eric; Laszlo Ersek; Ni, Ruiyu
Subject: [PATCH] UefiCpuPkg PiSmmCpuDxeSmm: Only DumpCpuContext in error case

Only DumpCpuContext in error case, otherwise there will be too many debug 
messages from DumpCpuContext() when SmmProfile feature is enabled by setting 
PcdCpuSmmProfileEnable to TRUE. Those debug messages are not needed for 
SmmProfile feature as it will record those information to buffer for further 
dump.

Cc: Jiewen Yao 
Cc: Eric Dong 
Cc: Laszlo Ersek 
Cc: Ruiyu Ni 
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng 
---
 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c | 6 --  
UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c  | 6 --
 2 files changed, 8 insertions(+), 4 deletions(-)

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c 
b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c
index 0396f2daaaed..6e1ffe7c6287 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c
@@ -134,12 +134,12 @@ SmiPFHandler (
   }
 
   //
-  // If a page fault occurs in SMM range
+  // If a page fault occurs in non-SMRAM range.
   //
   if ((PFAddress < mCpuHotPlugData.SmrrBase) ||
   (PFAddress >= mCpuHotPlugData.SmrrBase + mCpuHotPlugData.SmrrSize)) {
-DumpCpuContext (InterruptType, SystemContext);
 if ((SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_ID) != 0) 
{
+  DumpCpuContext (InterruptType, SystemContext);
   DEBUG ((DEBUG_ERROR, "Code executed on IP(0x%x) out of SMM range after 
SMM is locked!\n", PFAddress));
   DEBUG_CODE (
 DumpModuleInfoByIp (*(UINTN 
*)(UINTN)SystemContext.SystemContextIa32->Esp);
@@ -147,6 +147,7 @@ SmiPFHandler (
   CpuDeadLoop ();
 }
 if (IsSmmCommBufferForbiddenAddress (PFAddress)) {
+  DumpCpuContext (InterruptType, SystemContext);
   DEBUG ((DEBUG_ERROR, "Access SMM communication forbidden address 
(0x%x)!\n", PFAddress));
   DEBUG_CODE (
 DumpModuleInfoByIp ((UINTN)SystemContext.SystemContextIa32->Eip);
@@ -160,6 +161,7 @@ SmiPFHandler (
   //
   if ((PcdGet8 (PcdNullPointerDetectionPropertyMask) & BIT1) != 0 &&
   (PFAddress < EFI_PAGE_SIZE)) {
+DumpCpuContext (InterruptType, SystemContext);
 DEBUG ((DEBUG_ERROR, "!!! NULL pointer access !!!\n"));
 DEBUG_CODE (
   DumpModuleInfoByIp ((UINTN)SystemContext.SystemContextIa32->Eip);
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c 
b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
index 79a26d7ec6a3..6478c6c3e355 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
@@ -851,12 +851,12 @@ SmiPFHandler (
   }
 
   //
-  // If a page fault occurs in SMM range
+  // If a page fault occurs in non-SMRAM range.
   //
   if ((PFAddress < mCpuHotPlugData.SmrrBase) ||
   (PFAddress >= mCpuHotPlugData.SmrrBase + mCpuHotPlugData.SmrrSize)) {
-DumpCpuContext (InterruptType, SystemContext);
 if ((SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_ID) != 0) {
+  DumpCpuContext (InterruptType, SystemContext);
   DEBUG ((DEBUG_ERROR, "Code executed on IP(0x%lx) out of SMM range after 
SMM is locked!\n", PFAddress));
   DEBUG_CODE (
 DumpModuleInfoByIp (*(UINTN 
*)(UINTN)SystemContext.SystemContextX64->Rsp);
@@ -864,6 +864,7 @@ SmiPFHandler (
   CpuDeadLoop ();
 }
 if (IsSmmCommBufferForbiddenAddress (PFAddress)) {
+  DumpCpuContext (InterruptType, SystemContext);
   DEBUG ((DEBUG_ERROR, "Access SMM communication forbidden address 
(0x%lx)!\n", PFAddress));
   DEBUG_CODE (
 DumpModuleInfoByIp ((UINTN)SystemContext.SystemContextX64->Rip);
@@ -877,6 +878,7 @@ SmiPFHandler (
   //
   if ((PcdGet8 (PcdNullPointerDetectionPropertyMask) & BIT1) != 0 &&
   (PFAddress < EFI_PAGE_SIZE)) {
+DumpCpuContext (InterruptType, SystemContext);
 DEBUG ((DEBUG_ERROR, "!!! NULL pointer access !!!\n"));
 DEBUG_CODE (
   DumpModuleInfoByIp ((UINTN)SystemContext.SystemContextX64->Rip);
--
2.7.0.windows.1

___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel

Re: [edk2] [Patch] UefiCpuPkg: PiSmmCpuDxeSmm Add the missing ASM_PFX in nasm code

[Yao, Jiewen]

I think so.

May I know how this is found? And how this is validated?

I think we need build the whole package to trigger all the failure, and fix all.

Thank you
Yao Jiewen


> -Original Message-
> From: Gao, Liming
> Sent: Thursday, December 7, 2017 10:53 AM
> To: Yao, Jiewen ; edk2-devel@lists.01.org
> Cc: Dong, Eric 
> Subject: RE: [edk2] [Patch] UefiCpuPkg: PiSmmCpuDxeSmm Add the missing
> ASM_PFX in nasm code
> 
> Do you mean SmmCpuFeaturesLib also has the similar issue? If yes, I will 
> provide
> the patch to fix it.
> 
> >-Original Message-
> >From: Yao, Jiewen
> >Sent: Thursday, December 07, 2017 10:52 AM
> >To: Gao, Liming ; edk2-devel@lists.01.org
> >Cc: Dong, Eric 
> >Subject: RE: [edk2] [Patch] UefiCpuPkg: PiSmmCpuDxeSmm Add the missing
> >ASM_PFX in nasm code
> >
> >Hi Liming
> >Reviewed-by: jiewen@intel.com
> >
> >BTW: Do you think we also need update SmmCpuFeaturesLib ?
> >
> >Thank you
> >Yao Jiewen
> >
> >
> >> -Original Message-
> >> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of
> >Liming
> >> Gao
> >> Sent: Thursday, December 7, 2017 10:45 AM
> >> To: edk2-devel@lists.01.org
> >> Cc: Dong, Eric 
> >> Subject: [edk2] [Patch] UefiCpuPkg: PiSmmCpuDxeSmm Add the missing
> >> ASM_PFX in nasm code
> >>
> >> Contributed-under: TianoCore Contribution Agreement 1.1
> >> Signed-off-by: Liming Gao 
> >> Cc: Eric Dong 
> >> ---
> >>  UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm | 10 +-
> >>  1 file changed, 5 insertions(+), 5 deletions(-)
> >>
> >> diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm
> >> b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm
> >> index c3c094f..dc56dc7 100644
> >> --- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm
> >> +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm
> >> @@ -1,5 +1,5 @@
> >>  
> >> ;--
> >>  ;
> >> -; Copyright (c) 2016, Intel Corporation. All rights reserved.
> >> +; Copyright (c) 2016 - 2017, Intel Corporation. All rights reserved.
> >>  ; This program and the accompanying materials
> >>  ; are licensed and made available under the terms and conditions of the 
> >> BSD
> >> License
> >>  ; which accompanies this distribution.  The full text of the license may 
> >> be
> >found
> >> at
> >> @@ -184,15 +184,15 @@ _SmiHandler:
> >>  add rsp, -0x20
> >>
> >>  mov rcx, rbx
> >> -mov rax, CpuSmmDebugEntry
> >> +mov rax, ASM_PFX(CpuSmmDebugEntry)
> >>  callrax
> >>
> >>  mov rcx, rbx
> >> -mov rax, SmiRendezvous  ; rax <- absolute addr of
> >> SmiRedezvous
> >> +mov rax, ASM_PFX(SmiRendezvous)  ; rax <- absolute addr of
> >> SmiRedezvous
> >>  callrax
> >>
> >>  mov rcx, rbx
> >> -mov rax, CpuSmmDebugExit
> >> +mov rax, ASM_PFX(CpuSmmDebugExit)
> >>  callrax
> >>
> >>  add rsp, 0x20
> >> @@ -220,5 +220,5 @@ _SmiHandler:
> >>  .1:
> >>  rsm
> >>
> >> -gcSmiHandlerSizeDW  $ - _SmiEntryPoint
> >> +ASM_PFX(gcSmiHandlerSize)DW  $ - _SmiEntryPoint
> >>
> >> --
> >> 2.8.0.windows.1
> >>
> >> ___
> >> edk2-devel mailing list
> >> edk2-devel@lists.01.org
> >> https://lists.01.org/mailman/listinfo/edk2-devel
___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel

Re: [edk2] [Patch] UefiCpuPkg: Update SecCore to get BFV size based on BFV header FvLength

[Dong, Eric]

Reviewed-by: Eric Dong 

-Original Message-
From: Gao, Liming 
Sent: Wednesday, December 6, 2017 4:02 PM
To: edk2-devel@lists.01.org
Cc: Dong, Eric; Zeng, Star
Subject: [Patch] UefiCpuPkg: Update SecCore to get BFV size based on BFV header 
FvLength

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao 
Cc: Eric Dong 
Cc: Star Zeng 
---
 UefiCpuPkg/SecCore/SecMain.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/UefiCpuPkg/SecCore/SecMain.c b/UefiCpuPkg/SecCore/SecMain.c index 
173bbfcfcb..c241d3704a 100644
--- a/UefiCpuPkg/SecCore/SecMain.c
+++ b/UefiCpuPkg/SecCore/SecMain.c
@@ -189,7 +189,7 @@ SecStartup (
   //
   SecCoreData.DataSize   = (UINT16) sizeof (EFI_SEC_PEI_HAND_OFF);
   SecCoreData.BootFirmwareVolumeBase = BootFirmwareVolume;
-  SecCoreData.BootFirmwareVolumeSize = (UINTN)(0x1ULL - (UINTN) 
BootFirmwareVolume);
+  SecCoreData.BootFirmwareVolumeSize = 
+ (UINTN)((EFI_FIRMWARE_VOLUME_HEADER *) BootFirmwareVolume)->FvLength;
   SecCoreData.TemporaryRamBase   = (VOID*)(UINTN) TempRamBase;
   SecCoreData.TemporaryRamSize   = SizeOfRam;
   SecCoreData.PeiTemporaryRamBase= SecCoreData.TemporaryRamBase;
--
2.11.0.windows.1

___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel

Re: [edk2] [Patch] UefiCpuPkg: PiSmmCpuDxeSmm Add the missing ASM_PFX in nasm code

[Gao, Liming]

Do you mean SmmCpuFeaturesLib also has the similar issue? If yes, I will 
provide the patch to fix it. 

>-Original Message-
>From: Yao, Jiewen
>Sent: Thursday, December 07, 2017 10:52 AM
>To: Gao, Liming ; edk2-devel@lists.01.org
>Cc: Dong, Eric 
>Subject: RE: [edk2] [Patch] UefiCpuPkg: PiSmmCpuDxeSmm Add the missing
>ASM_PFX in nasm code
>
>Hi Liming
>Reviewed-by: jiewen@intel.com
>
>BTW: Do you think we also need update SmmCpuFeaturesLib ?
>
>Thank you
>Yao Jiewen
>
>
>> -Original Message-
>> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of
>Liming
>> Gao
>> Sent: Thursday, December 7, 2017 10:45 AM
>> To: edk2-devel@lists.01.org
>> Cc: Dong, Eric 
>> Subject: [edk2] [Patch] UefiCpuPkg: PiSmmCpuDxeSmm Add the missing
>> ASM_PFX in nasm code
>>
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Liming Gao 
>> Cc: Eric Dong 
>> ---
>>  UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm | 10 +-
>>  1 file changed, 5 insertions(+), 5 deletions(-)
>>
>> diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm
>> b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm
>> index c3c094f..dc56dc7 100644
>> --- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm
>> +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm
>> @@ -1,5 +1,5 @@
>>  
>> ;--
>>  ;
>> -; Copyright (c) 2016, Intel Corporation. All rights reserved.
>> +; Copyright (c) 2016 - 2017, Intel Corporation. All rights reserved.
>>  ; This program and the accompanying materials
>>  ; are licensed and made available under the terms and conditions of the BSD
>> License
>>  ; which accompanies this distribution.  The full text of the license may be
>found
>> at
>> @@ -184,15 +184,15 @@ _SmiHandler:
>>  add rsp, -0x20
>>
>>  mov rcx, rbx
>> -mov rax, CpuSmmDebugEntry
>> +mov rax, ASM_PFX(CpuSmmDebugEntry)
>>  callrax
>>
>>  mov rcx, rbx
>> -mov rax, SmiRendezvous  ; rax <- absolute addr of
>> SmiRedezvous
>> +mov rax, ASM_PFX(SmiRendezvous)  ; rax <- absolute addr of
>> SmiRedezvous
>>  callrax
>>
>>  mov rcx, rbx
>> -mov rax, CpuSmmDebugExit
>> +mov rax, ASM_PFX(CpuSmmDebugExit)
>>  callrax
>>
>>  add rsp, 0x20
>> @@ -220,5 +220,5 @@ _SmiHandler:
>>  .1:
>>  rsm
>>
>> -gcSmiHandlerSizeDW  $ - _SmiEntryPoint
>> +ASM_PFX(gcSmiHandlerSize)DW  $ - _SmiEntryPoint
>>
>> --
>> 2.8.0.windows.1
>>
>> ___
>> edk2-devel mailing list
>> edk2-devel@lists.01.org
>> https://lists.01.org/mailman/listinfo/edk2-devel
___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel

Re: [edk2] [PATCH] UefiCpuPkg/MtrrLib: Correct debug message

[Dong, Eric]

Reviewed-by: Eric Dong 

-Original Message-
From: Ni, Ruiyu 
Sent: Thursday, December 7, 2017 10:49 AM
To: edk2-devel@lists.01.org
Cc: Dong, Eric; Shao, Ming
Subject: [PATCH] UefiCpuPkg/MtrrLib: Correct debug message

When printing the ascii format of memory attribute in debug message, %s was 
used, but %a should be used.
The patch additionally changes %x to %r for EFI_STATUS.

The whole patch doesn't impact functionality of the MtrrLib.
Just debug message fix.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni 
Cc: Eric Dong 
Cc: Ming Shao 
---
 UefiCpuPkg/Library/MtrrLib/MtrrLib.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/UefiCpuPkg/Library/MtrrLib/MtrrLib.c 
b/UefiCpuPkg/Library/MtrrLib/MtrrLib.c
index 9c66f93ac2..619b500c1d 100644
--- a/UefiCpuPkg/Library/MtrrLib/MtrrLib.c
+++ b/UefiCpuPkg/Library/MtrrLib/MtrrLib.c
@@ -2489,7 +2489,7 @@ MtrrSetMemoryAttributeInMtrrSettings (
   Range.Type= Attribute;
   ScratchSize = sizeof (Scratch);
   Status = MtrrSetMemoryAttributesInMtrrSettings (MtrrSetting, Scratch, 
, , 1);
-  DEBUG ((DEBUG_CACHE, "MtrrSetMemoryAttribute(MtrrSettings = %p) %s: [%016lx, 
%016lx) - %x\n",
+  DEBUG ((DEBUG_CACHE, "MtrrSetMemoryAttribute(MtrrSettings = %p) %a: 
+ [%016lx, %016lx) - %r\n",
   MtrrSetting,
   mMtrrMemoryCacheTypeShortName[Attribute], BaseAddress, BaseAddress + 
Length, Status));
 
--
2.15.0.gvfs.1.preview.4

___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel

Re: [edk2] [Patch] UefiCpuPkg: PiSmmCpuDxeSmm Add the missing ASM_PFX in nasm code

[Yao, Jiewen]

Hi Liming
Reviewed-by: jiewen@intel.com

BTW: Do you think we also need update SmmCpuFeaturesLib ?

Thank you
Yao Jiewen


> -Original Message-
> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Liming
> Gao
> Sent: Thursday, December 7, 2017 10:45 AM
> To: edk2-devel@lists.01.org
> Cc: Dong, Eric 
> Subject: [edk2] [Patch] UefiCpuPkg: PiSmmCpuDxeSmm Add the missing
> ASM_PFX in nasm code
> 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Liming Gao 
> Cc: Eric Dong 
> ---
>  UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm | 10 +-
>  1 file changed, 5 insertions(+), 5 deletions(-)
> 
> diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm
> b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm
> index c3c094f..dc56dc7 100644
> --- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm
> +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm
> @@ -1,5 +1,5 @@
>  
> ;--
>  ;
> -; Copyright (c) 2016, Intel Corporation. All rights reserved.
> +; Copyright (c) 2016 - 2017, Intel Corporation. All rights reserved.
>  ; This program and the accompanying materials
>  ; are licensed and made available under the terms and conditions of the BSD
> License
>  ; which accompanies this distribution.  The full text of the license may be 
> found
> at
> @@ -184,15 +184,15 @@ _SmiHandler:
>  add rsp, -0x20
> 
>  mov rcx, rbx
> -mov rax, CpuSmmDebugEntry
> +mov rax, ASM_PFX(CpuSmmDebugEntry)
>  callrax
> 
>  mov rcx, rbx
> -mov rax, SmiRendezvous  ; rax <- absolute addr of
> SmiRedezvous
> +mov rax, ASM_PFX(SmiRendezvous)  ; rax <- absolute addr of
> SmiRedezvous
>  callrax
> 
>  mov rcx, rbx
> -mov rax, CpuSmmDebugExit
> +mov rax, ASM_PFX(CpuSmmDebugExit)
>  callrax
> 
>  add rsp, 0x20
> @@ -220,5 +220,5 @@ _SmiHandler:
>  .1:
>  rsm
> 
> -gcSmiHandlerSizeDW  $ - _SmiEntryPoint
> +ASM_PFX(gcSmiHandlerSize)DW  $ - _SmiEntryPoint
> 
> --
> 2.8.0.windows.1
> 
> ___
> edk2-devel mailing list
> edk2-devel@lists.01.org
> https://lists.01.org/mailman/listinfo/edk2-devel
___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel

Re: [edk2] [Patch] UefiCpuPkg: PiSmmCpuDxeSmm Add the missing ASM_PFX in nasm code

[Dong, Eric]

Reviewed-by: Eric Dong 

You'd better add more background for the change when you check in.

Thanks,
Eric
-Original Message-
From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Liming 
Gao
Sent: Thursday, December 7, 2017 10:45 AM
To: edk2-devel@lists.01.org
Cc: Dong, Eric
Subject: [edk2] [Patch] UefiCpuPkg: PiSmmCpuDxeSmm Add the missing ASM_PFX in 
nasm code

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao 
Cc: Eric Dong 
---
 UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm | 10 +-
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm 
b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm
index c3c094f..dc56dc7 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm
@@ -1,5 +1,5 @@
 
;-- 
; -; Copyright (c) 2016, Intel Corporation. All rights reserved.
+; Copyright (c) 2016 - 2017, Intel Corporation. All rights 
+reserved.
 ; This program and the accompanying materials  ; are licensed and made 
available under the terms and conditions of the BSD License  ; which 
accompanies this distribution.  The full text of the license may be found at @@ 
-184,15 +184,15 @@ _SmiHandler:
 add rsp, -0x20
 
 mov rcx, rbx
-mov rax, CpuSmmDebugEntry
+mov rax, ASM_PFX(CpuSmmDebugEntry)
 callrax
 
 mov rcx, rbx
-mov rax, SmiRendezvous  ; rax <- absolute addr of SmiRedezvous
+mov rax, ASM_PFX(SmiRendezvous)  ; rax <- absolute addr of SmiRedezvous
 callrax
 
 mov rcx, rbx
-mov rax, CpuSmmDebugExit
+mov rax, ASM_PFX(CpuSmmDebugExit)
 callrax
 
 add rsp, 0x20
@@ -220,5 +220,5 @@ _SmiHandler:
 .1:
 rsm
 
-gcSmiHandlerSizeDW  $ - _SmiEntryPoint
+ASM_PFX(gcSmiHandlerSize)DW  $ - _SmiEntryPoint
 
--
2.8.0.windows.1

___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel
___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel

Re: [edk2] [Patch] UefiCpuPkg: Update SecCore to get BFV size based on BFV header FvLength

[Yao, Jiewen]

Reviewed-by: jiewen@intel.com

> -Original Message-
> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Liming
> Gao
> Sent: Wednesday, December 6, 2017 4:02 PM
> To: edk2-devel@lists.01.org
> Cc: Dong, Eric ; Zeng, Star 
> Subject: [edk2] [Patch] UefiCpuPkg: Update SecCore to get BFV size based on
> BFV header FvLength
> 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Liming Gao 
> Cc: Eric Dong 
> Cc: Star Zeng 
> ---
>  UefiCpuPkg/SecCore/SecMain.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/UefiCpuPkg/SecCore/SecMain.c b/UefiCpuPkg/SecCore/SecMain.c
> index 173bbfcfcb..c241d3704a 100644
> --- a/UefiCpuPkg/SecCore/SecMain.c
> +++ b/UefiCpuPkg/SecCore/SecMain.c
> @@ -189,7 +189,7 @@ SecStartup (
>//
>SecCoreData.DataSize   = (UINT16) sizeof
> (EFI_SEC_PEI_HAND_OFF);
>SecCoreData.BootFirmwareVolumeBase = BootFirmwareVolume;
> -  SecCoreData.BootFirmwareVolumeSize = (UINTN)(0x1ULL - (UINTN)
> BootFirmwareVolume);
> +  SecCoreData.BootFirmwareVolumeSize =
> (UINTN)((EFI_FIRMWARE_VOLUME_HEADER *)
> BootFirmwareVolume)->FvLength;
>SecCoreData.TemporaryRamBase   = (VOID*)(UINTN) TempRamBase;
>SecCoreData.TemporaryRamSize   = SizeOfRam;
>SecCoreData.PeiTemporaryRamBase= SecCoreData.TemporaryRamBase;
> --
> 2.11.0.windows.1
> 
> ___
> edk2-devel mailing list
> edk2-devel@lists.01.org
> https://lists.01.org/mailman/listinfo/edk2-devel
___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel

[edk2] [PATCH] UefiCpuPkg/MtrrLib: Correct debug message

[Ruiyu Ni]

When printing the ascii format of memory attribute in debug message,
%s was used, but %a should be used.
The patch additionally changes %x to %r for EFI_STATUS.

The whole patch doesn't impact functionality of the MtrrLib.
Just debug message fix.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni 
Cc: Eric Dong 
Cc: Ming Shao 
---
 UefiCpuPkg/Library/MtrrLib/MtrrLib.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/UefiCpuPkg/Library/MtrrLib/MtrrLib.c 
b/UefiCpuPkg/Library/MtrrLib/MtrrLib.c
index 9c66f93ac2..619b500c1d 100644
--- a/UefiCpuPkg/Library/MtrrLib/MtrrLib.c
+++ b/UefiCpuPkg/Library/MtrrLib/MtrrLib.c
@@ -2489,7 +2489,7 @@ MtrrSetMemoryAttributeInMtrrSettings (
   Range.Type= Attribute;
   ScratchSize = sizeof (Scratch);
   Status = MtrrSetMemoryAttributesInMtrrSettings (MtrrSetting, Scratch, 
, , 1);
-  DEBUG ((DEBUG_CACHE, "MtrrSetMemoryAttribute(MtrrSettings = %p) %s: [%016lx, 
%016lx) - %x\n",
+  DEBUG ((DEBUG_CACHE, "MtrrSetMemoryAttribute(MtrrSettings = %p) %a: [%016lx, 
%016lx) - %r\n",
   MtrrSetting,
   mMtrrMemoryCacheTypeShortName[Attribute], BaseAddress, BaseAddress + 
Length, Status));
 
-- 
2.15.0.gvfs.1.preview.4

___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel

Re: [edk2] [RFC] MdeModulePkg/Ip4Dxe: fix ICMP echo reply memory leak

[Fu, Siyuan]

Reviewed-by: Fu Siyuan 

> -Original Message-
> From: Heyi Guo [mailto:heyi@linaro.org]
> Sent: Thursday, December 7, 2017 10:22 AM
> To: linaro-u...@lists.linaro.org; edk2-devel@lists.01.org
> Cc: Heyi Guo ; Junbiao Hong ;
> Zeng, Star ; Dong, Eric ; Ni,
> Ruiyu ; Fu, Siyuan ; Wu, Jiaxin
> 
> Subject: [RFC] MdeModulePkg/Ip4Dxe: fix ICMP echo reply memory leak
> 
> When UEFI receives IPMP echo packets it will enter Ip4IcmpReplyEcho
> function, and then call Ip4Output. However, if Ip4Output gets some
> error and exits early, e.g. fails to find the route entry, memory
> buffer of "Data" gets no chance to be freed and memory leak will be
> caused. If there is such an attacker in the network, we will see UEFI
> runs out of memory and system hangs.
> 
> Network stack code is so complicated that this is just a RFC to fix
> this issue. Please provide your comments about this.
> 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Junbiao Hong 
> Signed-off-by: Heyi Guo 
> Cc: Star Zeng 
> Cc: Eric Dong 
> Cc: Ruiyu Ni 
> Cc: Siyuan Fu 
> Cc: Jiaxin Wu 
> ---
>  MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Icmp.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Icmp.c
> b/MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Icmp.c
> index b4b0864..ed6bdbe 100644
> --- a/MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Icmp.c
> +++ b/MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Icmp.c
> @@ -267,6 +267,9 @@ Ip4IcmpReplyEcho (
>   Ip4SysPacketSent,
>   NULL
>   );
> +  if (EFI_ERROR (Status)) {
> +NetbufFree (Data);
> +  }
> 
>  ON_EXIT:
>NetbufFree (Packet);
> --
> 2.7.4

___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel

[edk2] [Patch] UefiCpuPkg: PiSmmCpuDxeSmm Add the missing ASM_PFX in nasm code

[Liming Gao]

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao 
Cc: Eric Dong 
---
 UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm | 10 +-
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm 
b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm
index c3c094f..dc56dc7 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm
@@ -1,5 +1,5 @@
 
;-- 
;
-; Copyright (c) 2016, Intel Corporation. All rights reserved.
+; Copyright (c) 2016 - 2017, Intel Corporation. All rights reserved.
 ; This program and the accompanying materials
 ; are licensed and made available under the terms and conditions of the BSD 
License
 ; which accompanies this distribution.  The full text of the license may be 
found at
@@ -184,15 +184,15 @@ _SmiHandler:
 add rsp, -0x20
 
 mov rcx, rbx
-mov rax, CpuSmmDebugEntry
+mov rax, ASM_PFX(CpuSmmDebugEntry)
 callrax
 
 mov rcx, rbx
-mov rax, SmiRendezvous  ; rax <- absolute addr of SmiRedezvous
+mov rax, ASM_PFX(SmiRendezvous)  ; rax <- absolute addr of SmiRedezvous
 callrax
 
 mov rcx, rbx
-mov rax, CpuSmmDebugExit
+mov rax, ASM_PFX(CpuSmmDebugExit)
 callrax
 
 add rsp, 0x20
@@ -220,5 +220,5 @@ _SmiHandler:
 .1:
 rsm
 
-gcSmiHandlerSizeDW  $ - _SmiEntryPoint
+ASM_PFX(gcSmiHandlerSize)DW  $ - _SmiEntryPoint
 
-- 
2.8.0.windows.1

___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel

Re: [edk2] [Patch 0/3] BaseTools: Fix some bugs about hash value enable

[Gao, Liming]

Reviewed-by: Liming Gao 

>-Original Message-
>From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of
>Yonghong Zhu
>Sent: Wednesday, December 06, 2017 6:13 PM
>To: edk2-devel@lists.01.org
>Subject: [edk2] [Patch 0/3] BaseTools: Fix some bugs about hash value enable
>
>This patches fix some bugs about hash value enable feature.
>
>Yonghong Zhu (3):
>  BaseTools: Not cache the .efi file location into build option
>  BaseTools: back up the binary files when hash value is same
>  BaseTools: enable hash value check for single module build
>
> BaseTools/Source/Python/AutoGen/AutoGen.py | 25 +-
>---
> BaseTools/Source/Python/build/build.py | 10 +-
> 2 files changed, 26 insertions(+), 9 deletions(-)
>
>--
>2.6.1.windows.1
>
>___
>edk2-devel mailing list
>edk2-devel@lists.01.org
>https://lists.01.org/mailman/listinfo/edk2-devel
___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel

Re: [edk2] [PATCH v2] BaseTools: align ENCODE_ERROR macro with MdePkg version

[Gao, Liming]

Leif:
  Could you also update ENCODE_WARNING() and RETURN_ERROR() to align to MdePkg?

Thanks
Liming
>-Original Message-
>From: Leif Lindholm [mailto:leif.lindh...@linaro.org]
>Sent: Wednesday, December 06, 2017 12:10 AM
>To: edk2-devel@lists.01.org
>Cc: Zhu, Yonghong ; Gao, Liming
>
>Subject: [PATCH v2] BaseTools: align ENCODE_ERROR macro with MdePkg
>version
>
>BaseTools' BaseTypes.h defined the ENCODE_ERROR macro as
> #define ENCODE_ERROR(a)  ((RETURN_STATUS)(MAX_BIT | (a)))
>whereas MdePkg defines it as
> #define ENCODE_ERROR(StatusCode) ((RETURN_STATUS)(MAX_BIT |
>(StatusCode)))
>
>When building with GCC 6.3 (at least) the former triggers
>"error: overflow in implicit constant conversion [-Werror=overflow]"
>Resolve this by aligning it with the latter one.
>
>This also requires aligning the BaseTools typedef of RETURN_STATUS with
>the MdePkg one: INTN -> UINTN.
>
>Add an explicit initialization of *Alignment to 0 in GenFfs.c
>GetAlignmentFromFile to get rid of a warning occuring with GCC after
>this change (-Werror=maybe-uninitialized).
>
>Contributed-under: TianoCore Contribution Agreement 1.1
>Signed-off-by: Leif Lindholm 
>---
>
>Sending out a v2 because I got cought out by the leading # in the commit
>message...
>
> BaseTools/Source/C/GenFfs/GenFfs.c| 1 +
> BaseTools/Source/C/Include/Common/BaseTypes.h | 4 ++--
> 2 files changed, 3 insertions(+), 2 deletions(-)
>
>diff --git a/BaseTools/Source/C/GenFfs/GenFfs.c
>b/BaseTools/Source/C/GenFfs/GenFfs.c
>index e2fb3e0d1e..3b4a9b7761 100644
>--- a/BaseTools/Source/C/GenFfs/GenFfs.c
>+++ b/BaseTools/Source/C/GenFfs/GenFfs.c
>@@ -529,6 +529,7 @@ GetAlignmentFromFile(char *InFile, UINT32
>*Alignment)
>
>   InFileHandle= NULL;
>   PeFileBuffer= NULL;
>+  *Alignment  = 0;
>
>   memset (, 0, sizeof (ImageContext));
>
>diff --git a/BaseTools/Source/C/Include/Common/BaseTypes.h
>b/BaseTools/Source/C/Include/Common/BaseTypes.h
>index 198647ab95..5fa4e560d8 100644
>--- a/BaseTools/Source/C/Include/Common/BaseTypes.h
>+++ b/BaseTools/Source/C/Include/Common/BaseTypes.h
>@@ -170,12 +170,12 @@
> // EFI Error Codes common to all execution phases
> //
>
>-typedef INTN RETURN_STATUS;
>+typedef UINTN RETURN_STATUS;
>
> ///
> /// Set the upper bit to indicate EFI Error.
> ///
>-#define ENCODE_ERROR(a)  (MAX_BIT | (a))
>+#define ENCODE_ERROR(a)  ((RETURN_STATUS)(MAX_BIT | (a)))
>
> #define ENCODE_WARNING(a)(a)
> #define RETURN_ERROR(a)  ((a) < 0)
>--
>2.11.0

___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel

[edk2] [RFC] MdeModulePkg/Ip4Dxe: fix ICMP echo reply memory leak

[Heyi Guo]

When UEFI receives IPMP echo packets it will enter Ip4IcmpReplyEcho
function, and then call Ip4Output. However, if Ip4Output gets some
error and exits early, e.g. fails to find the route entry, memory
buffer of "Data" gets no chance to be freed and memory leak will be
caused. If there is such an attacker in the network, we will see UEFI
runs out of memory and system hangs.

Network stack code is so complicated that this is just a RFC to fix
this issue. Please provide your comments about this.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Junbiao Hong 
Signed-off-by: Heyi Guo 
Cc: Star Zeng 
Cc: Eric Dong 
Cc: Ruiyu Ni 
Cc: Siyuan Fu 
Cc: Jiaxin Wu 
---
 MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Icmp.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Icmp.c 
b/MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Icmp.c
index b4b0864..ed6bdbe 100644
--- a/MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Icmp.c
+++ b/MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Icmp.c
@@ -267,6 +267,9 @@ Ip4IcmpReplyEcho (
  Ip4SysPacketSent,
  NULL
  );
+  if (EFI_ERROR (Status)) {
+NetbufFree (Data);
+  }
 
 ON_EXIT:
   NetbufFree (Packet);
-- 
2.7.4

___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel

Re: [edk2] [PATCH] BaseTools/tools_def: add CLANG38 LTO versions for AARCH64 and ARM

[Shi, Steven]

Hi Ard,
I'm OK for the patch.
BTW, would you mind to help add the "-Wno-unused-const-variable" in the 
CLANG38_WARNING_OVERRIDES? I happen to need add it in CLANG38 
(https://bugzilla.tianocore.org/show_bug.cgi?id=790) and I see it seems a 
shared flag for ARM/AARCH64 as well.

Steven Shi
Intel\SSG\STO\UEFI Firmware

Tel: +86 021-61166522
iNet: 821-6522


> -Original Message-
> From: Ard Biesheuvel [mailto:ard.biesheu...@linaro.org]
> Sent: Wednesday, December 6, 2017 7:39 PM
> To: edk2-devel@lists.01.org
> Cc: leif.lindh...@linaro.org; Gao, Liming ; Zhu,
> Yonghong ; Shi, Steven ;
> evan.ll...@arm.com; ler...@redhat.com; Ard Biesheuvel
> 
> Subject: [PATCH] BaseTools/tools_def: add CLANG38 LTO versions for
> AARCH64 and ARM
> 
> Extend the CLANG38 toolchain definition so it can be used for
> ARM and AARCH64 as well. Note that this requires llvm-ar and
> the LLVMgold.so linker plugin.
> 
> In preparation of doing the same for GCC5, this toolchain version
> also departs from the custom of using -O0 for DEBUG builds, which
> makes them needlessly slow. Instead, let's add a NOOPT flavor as
> well, and enable optimization for DEBUG like the other architectures
> do. (Note that this will require some trivial changes to the platform
> description files)
> 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ard Biesheuvel 
> ---
>  BaseTools/Conf/tools_def.template | 98 +++-
>  1 file changed, 95 insertions(+), 3 deletions(-)
> 
> diff --git a/BaseTools/Conf/tools_def.template
> b/BaseTools/Conf/tools_def.template
> index 91b135c2e569..6ee720d7586e 100755
> --- a/BaseTools/Conf/tools_def.template
> +++ b/BaseTools/Conf/tools_def.template
> @@ -399,8 +399,8 @@ DEFINE DTC_BIN = ENV(DTC_PREFIX)dtc
>  #   Intel(r) ACPI Compiler from
>  #   https://acpica.org/downloads
>  #   CLANG38  -Linux-  Requires:
> -# Clang v3.8, LLVMgold plugin and GNU binutils 
> 2.26
> targeting x86_64-linux-gnu
> -# Clang v3.9 or later, LLVMgold plugin and GNU 
> binutils 2.28
> targeting x86_64-linux-gnu
> +# Clang v3.8, LLVMgold plugin and GNU binutils 
> 2.26
> targeting x86_64-linux-gnu, aarch64-linux-gnu or arm-linux-gnueabi
> +# Clang v3.9 or later, LLVMgold plugin and GNU 
> binutils 2.28
> targeting x86_64-linux-gnu, aarch64-linux-gnu or arm-linux-gnueabi
>  #Optional:
>  # Required to build platforms or ACPI tables:
>  #   Intel(r) ACPI Compiler from
> @@ -5652,6 +5652,7 @@ RELEASE_CLANG35_AARCH64_CC_FLAGS =
> DEF(CLANG35_AARCH64_CC_FLAGS) $(ARCHCC_FLAGS)
>  *_CLANG38_*_MAKE_PATH   = make
>  *_CLANG38_*_*_DLL   = ENV(CLANG38_DLL)
>  *_CLANG38_*_ASL_PATH= DEF(UNIX_IASL_BIN)
> +*_CLANG38_*_DTC_PATH= DEF(DTC_BIN)
> 
>  *_CLANG38_*_APP_FLAGS   =
>  *_CLANG38_*_ASL_FLAGS   = DEF(IASL_FLAGS)
> @@ -5663,7 +5664,8 @@ DEFINE CLANG38_X64_PREFIX   =
> ENV(CLANG38_BIN)
>  DEFINE CLANG38_IA32_TARGET  = -target i686-pc-linux-gnu
>  DEFINE CLANG38_X64_TARGET   = -target x86_64-pc-linux-gnu
> 
> -DEFINE CLANG38_ALL_CC_FLAGS = DEF(GCC44_ALL_CC_FLAGS) -Wno-
> empty-body -fno-stack-protector -mms-bitfields -Wno-address -Wno-shift-
> negative-value -Wno-parentheses-equality -Wno-unknown-pragmas -Wno-
> tautological-constant-out-of-range-compare -Wno-incompatible-library-
> redeclaration -fno-asynchronous-unwind-tables -mno-sse -mno-mmx -
> msoft-float -mno-implicit-float  -ftrap-
> function=undefined_behavior_has_been_optimized_away_by_clang -
> funsigned-char -fno-ms-extensions -Wno-null-dereference -Wno-
> tautological-compare -Wno-unknown-warning-option -Wno-varargs
> +DEFINE CLANG38_WARNING_OVERRIDES= -Wno-parentheses-equality -
> Wno-tautological-compare -Wno-tautological-constant-out-of-range-
> compare -Wno-empty-body  -Wno-varargs
> +DEFINE CLANG38_ALL_CC_FLAGS = DEF(GCC44_ALL_CC_FLAGS)
> DEF(CLANG38_WARNING_OVERRIDES) -fno-stack-protector -mms-bitfields -
> Wno-address -Wno-shift-negative-value -Wno-unknown-pragmas -Wno-
> incompatible-library-redeclaration -fno-asynchronous-unwind-tables -mno-
> sse -mno-mmx -msoft-float -mno-implicit-float  -ftrap-
> function=undefined_behavior_has_been_optimized_away_by_clang -
> funsigned-char -fno-ms-extensions -Wno-null-dereference -Wno-unknown-
> warning-option
> 
>  ###
>  # CLANG38 IA32 definitions
> @@ -5739,6 +5741,96 @@ NOOPT_CLANG38_X64_CC_FLAGS =
> DEF(CLANG38_ALL_CC_FLAGS) -m64 "-DEFIAPI=__
>  NOOPT_CLANG38_X64_DLINK_FLAGS  =
> DEF(GCC5_IA32_X64_DLINK_FLAGS) -Wl,-O0 -Wl,-melf_x86_64 -Wl,--
> 

[edk2] [PATCH] UefiCpuPkg PiSmmCpuDxeSmm: Only DumpCpuContext in error case

[Star Zeng]

Only DumpCpuContext in error case, otherwise there will be too many
debug messages from DumpCpuContext() when SmmProfile feature is enabled
by setting PcdCpuSmmProfileEnable to TRUE. Those debug messages are not
needed for SmmProfile feature as it will record those information to
buffer for further dump.

Cc: Jiewen Yao 
Cc: Eric Dong 
Cc: Laszlo Ersek 
Cc: Ruiyu Ni 
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng 
---
 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c | 6 --
 UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c  | 6 --
 2 files changed, 8 insertions(+), 4 deletions(-)

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c 
b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c
index 0396f2daaaed..6e1ffe7c6287 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c
@@ -134,12 +134,12 @@ SmiPFHandler (
   }
 
   //
-  // If a page fault occurs in SMM range
+  // If a page fault occurs in non-SMRAM range.
   //
   if ((PFAddress < mCpuHotPlugData.SmrrBase) ||
   (PFAddress >= mCpuHotPlugData.SmrrBase + mCpuHotPlugData.SmrrSize)) {
-DumpCpuContext (InterruptType, SystemContext);
 if ((SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_ID) != 0) 
{
+  DumpCpuContext (InterruptType, SystemContext);
   DEBUG ((DEBUG_ERROR, "Code executed on IP(0x%x) out of SMM range after 
SMM is locked!\n", PFAddress));
   DEBUG_CODE (
 DumpModuleInfoByIp (*(UINTN 
*)(UINTN)SystemContext.SystemContextIa32->Esp);
@@ -147,6 +147,7 @@ SmiPFHandler (
   CpuDeadLoop ();
 }
 if (IsSmmCommBufferForbiddenAddress (PFAddress)) {
+  DumpCpuContext (InterruptType, SystemContext);
   DEBUG ((DEBUG_ERROR, "Access SMM communication forbidden address 
(0x%x)!\n", PFAddress));
   DEBUG_CODE (
 DumpModuleInfoByIp ((UINTN)SystemContext.SystemContextIa32->Eip);
@@ -160,6 +161,7 @@ SmiPFHandler (
   //
   if ((PcdGet8 (PcdNullPointerDetectionPropertyMask) & BIT1) != 0 &&
   (PFAddress < EFI_PAGE_SIZE)) {
+DumpCpuContext (InterruptType, SystemContext);
 DEBUG ((DEBUG_ERROR, "!!! NULL pointer access !!!\n"));
 DEBUG_CODE (
   DumpModuleInfoByIp ((UINTN)SystemContext.SystemContextIa32->Eip);
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c 
b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
index 79a26d7ec6a3..6478c6c3e355 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
@@ -851,12 +851,12 @@ SmiPFHandler (
   }
 
   //
-  // If a page fault occurs in SMM range
+  // If a page fault occurs in non-SMRAM range.
   //
   if ((PFAddress < mCpuHotPlugData.SmrrBase) ||
   (PFAddress >= mCpuHotPlugData.SmrrBase + mCpuHotPlugData.SmrrSize)) {
-DumpCpuContext (InterruptType, SystemContext);
 if ((SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_ID) != 0) {
+  DumpCpuContext (InterruptType, SystemContext);
   DEBUG ((DEBUG_ERROR, "Code executed on IP(0x%lx) out of SMM range after 
SMM is locked!\n", PFAddress));
   DEBUG_CODE (
 DumpModuleInfoByIp (*(UINTN 
*)(UINTN)SystemContext.SystemContextX64->Rsp);
@@ -864,6 +864,7 @@ SmiPFHandler (
   CpuDeadLoop ();
 }
 if (IsSmmCommBufferForbiddenAddress (PFAddress)) {
+  DumpCpuContext (InterruptType, SystemContext);
   DEBUG ((DEBUG_ERROR, "Access SMM communication forbidden address 
(0x%lx)!\n", PFAddress));
   DEBUG_CODE (
 DumpModuleInfoByIp ((UINTN)SystemContext.SystemContextX64->Rip);
@@ -877,6 +878,7 @@ SmiPFHandler (
   //
   if ((PcdGet8 (PcdNullPointerDetectionPropertyMask) & BIT1) != 0 &&
   (PFAddress < EFI_PAGE_SIZE)) {
+DumpCpuContext (InterruptType, SystemContext);
 DEBUG ((DEBUG_ERROR, "!!! NULL pointer access !!!\n"));
 DEBUG_CODE (
   DumpModuleInfoByIp ((UINTN)SystemContext.SystemContextX64->Rip);
-- 
2.7.0.windows.1

___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel

Re: [edk2] [Patch 4/4 V3] BaseTools: Update Makefile to support FFS file generation

[Zhu, Yonghong]

Thanks Leif.  I will provide patch to fix it soon.

Best Regards,
Zhu Yonghong


-Original Message-
From: Leif Lindholm [mailto:leif.lindh...@linaro.org] 
Sent: Thursday, December 07, 2017 2:24 AM
To: Zhu, Yonghong 
Cc: edk2-devel@lists.01.org; Feng, YunhuaX ; Gao, 
Liming 
Subject: Re: [edk2] [Patch 4/4 V3] BaseTools: Update Makefile to support FFS 
file generation

Hi Yonghong,

I'm afraid I have come across an issue with this one as well:
When trying to build OptionRomPkg/Bus/Usb/UsbNetworking/Ax88772b
into a platform (edk2-platforms/Platform/Hisilicon/HiKey/), GenSec fails with:

Generating FVMAIN FV


Return Value = 2
GenSec: ERROR 0001: Error opening file
  
/work/git/tianocore/Build/HiKey/RELEASE_GCC5/AARCH64/OptionRomPkg/Bus/Usb/UsbNetworking/Ax88772b/Ax88772b/OUTPUT/Ax88772b.depex
GenSec: ERROR 2000: Status is not successful

If I revert commit 37de70b7, the platform builds successfully again.
D03 and D05 platforms also appear to have issues with this, but in that case 
due to drivers in edk2-non-osi.

/
Leif

On Wed, Nov 29, 2017 at 10:02:06PM +0800, Yonghong Zhu wrote:
> Update Makefile to support FFS file generation with new build option 
> --genfds-multi-thread.
> 
> Cc: Liming Gao 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Yonghong Zhu 
> Signed-off-by: Yunhua Feng 
> ---
>  BaseTools/Source/Python/AutoGen/AutoGen.py |  23 ++-
>  BaseTools/Source/Python/AutoGen/GenMake.py |  90 -
>  BaseTools/Source/Python/Common/GlobalData.py   |   1 +
>  BaseTools/Source/Python/GenFds/AprioriSection.py   |  14 +-
>  BaseTools/Source/Python/GenFds/CompressSection.py  |  10 +-
>  BaseTools/Source/Python/GenFds/DataSection.py  |  37 ++--
>  BaseTools/Source/Python/GenFds/DepexSection.py |   6 +-
>  BaseTools/Source/Python/GenFds/EfiSection.py   |  78 +---
>  BaseTools/Source/Python/GenFds/Fd.py   |  24 ++-
>  BaseTools/Source/Python/GenFds/FfsFileStatement.py |   4 +-
>  BaseTools/Source/Python/GenFds/FfsInfStatement.py  | 202 
> -
>  BaseTools/Source/Python/GenFds/Fv.py   | 189 ++-
>  BaseTools/Source/Python/GenFds/FvImageSection.py   |   8 +-
>  BaseTools/Source/Python/GenFds/GenFds.py   |  20 ++
>  .../Source/Python/GenFds/GenFdsGlobalVariable.py   | 174 ++
>  BaseTools/Source/Python/GenFds/GuidSection.py  | 168 +
>  .../Source/Python/GenFds/OptRomFileStatement.py|   4 +-
>  .../Source/Python/GenFds/OptRomInfStatement.py |  12 +-
>  BaseTools/Source/Python/GenFds/OptionRom.py|  25 +--
>  BaseTools/Source/Python/GenFds/Region.py   |  49 +++--
>  BaseTools/Source/Python/GenFds/Section.py  |   4 +-
>  BaseTools/Source/Python/GenFds/UiSection.py|   5 +-
>  BaseTools/Source/Python/GenFds/VerSection.py   |   9 +-
>  BaseTools/Source/Python/build/build.py |  48 -
>  24 files changed, 793 insertions(+), 411 deletions(-)
___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel

Re: [edk2] [PATCH] EmbeddedPkg: AndroidBootApp: fix clang compilation

[Leif Lindholm]

On Wed, Dec 06, 2017 at 08:36:48PM +, Ard Biesheuvel wrote:
> On 6 December 2017 at 20:31, Leif Lindholm  wrote:
> > Address an incorrect function prototype (using ; instead of ,)
> > in AndroidBootImg.h.
> >
> > Also restructure code slightly to avoid a "may be used uninitialized"
> > warning.
> >
> > Contributed-under: TianoCore Contribution Agreement 1.1
> > Signed-off-by: Leif Lindholm 
> 
> Reviewed-by: Ard Biesheuvel 

Thanks!
Pushed as ac811846f2.

> > ---
> >  EmbeddedPkg/Include/Protocol/AndroidBootImg.h | 4 ++--
> >  EmbeddedPkg/Library/AndroidBootImgLib/AndroidBootImgLib.c | 9 +
> >  2 files changed, 7 insertions(+), 6 deletions(-)
> >
> > diff --git a/EmbeddedPkg/Include/Protocol/AndroidBootImg.h 
> > b/EmbeddedPkg/Include/Protocol/AndroidBootImg.h
> > index 1c458d0255..cd3c42e858 100644
> > --- a/EmbeddedPkg/Include/Protocol/AndroidBootImg.h
> > +++ b/EmbeddedPkg/Include/Protocol/AndroidBootImg.h
> > @@ -33,8 +33,8 @@ EFI_STATUS
> >  typedef
> >  EFI_STATUS
> >  (EFIAPI *ANDROID_BOOTIMG_UPDATE_DTB) (
> > -  IN  EFI_PHYSICAL_ADDRESSOrigDtbBase;
> > -  OUT EFI_PHYSICAL_ADDRESS   *NewDtbBase;
> > +  IN  EFI_PHYSICAL_ADDRESSOrigDtbBase,
> > +  OUT EFI_PHYSICAL_ADDRESS   *NewDtbBase
> >);
> >
> >  struct _ANDROID_BOOTIMG_PROTOCOL {
> > diff --git a/EmbeddedPkg/Library/AndroidBootImgLib/AndroidBootImgLib.c 
> > b/EmbeddedPkg/Library/AndroidBootImgLib/AndroidBootImgLib.c
> > index 09c4d924f1..2e50cedf6a 100644
> > --- a/EmbeddedPkg/Library/AndroidBootImgLib/AndroidBootImgLib.c
> > +++ b/EmbeddedPkg/Library/AndroidBootImgLib/AndroidBootImgLib.c
> > @@ -357,12 +357,13 @@ AndroidBootImgUpdateFdt (
> >  if (EFI_ERROR (Status)) {
> >goto Fdt_Exit;
> >  }
> > +
> > +Status = gBS->InstallConfigurationTable (
> > +,
> > +(VOID *)(UINTN)NewFdtBase
> > +);
> >}
> >
> > -  Status = gBS->InstallConfigurationTable (
> > -  ,
> > -  (VOID *)(UINTN)NewFdtBase
> > -  );
> >if (!EFI_ERROR (Status)) {
> >  return EFI_SUCCESS;
> >}
> > --
> > 2.11.0
> >
___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel

Re: [edk2] [PATCH] ArmVirtPkg: add NOOPT target to platform .DSCs

[Ard Biesheuvel]

On 6 December 2017 at 14:14, Laszlo Ersek  wrote:
> On 12/06/17 12:37, Ard Biesheuvel wrote:
>> In order to allow the ArmVirtPkg platforms to be built using the
>> NOOPT target, add it explicitly to the BUILD_TARGETS define.
>>
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Ard Biesheuvel 
>> ---
>>  ArmVirtPkg/ArmVirtQemu.dsc   | 2 +-
>>  ArmVirtPkg/ArmVirtQemuKernel.dsc | 2 +-
>>  ArmVirtPkg/ArmVirtXen.dsc| 2 +-
>>  3 files changed, 3 insertions(+), 3 deletions(-)
>>
>> diff --git a/ArmVirtPkg/ArmVirtQemu.dsc b/ArmVirtPkg/ArmVirtQemu.dsc
>> index f09226671827..76a83b99a303 100644
>> --- a/ArmVirtPkg/ArmVirtQemu.dsc
>> +++ b/ArmVirtPkg/ArmVirtQemu.dsc
>> @@ -25,7 +25,7 @@ [Defines]
>>DSC_SPECIFICATION  = 0x00010005
>>OUTPUT_DIRECTORY   = Build/ArmVirtQemu-$(ARCH)
>>SUPPORTED_ARCHITECTURES= AARCH64|ARM
>> -  BUILD_TARGETS  = DEBUG|RELEASE
>> +  BUILD_TARGETS  = DEBUG|RELEASE|NOOPT
>>SKUID_IDENTIFIER   = DEFAULT
>>FLASH_DEFINITION   = ArmVirtPkg/ArmVirtQemu.fdf
>>
>> diff --git a/ArmVirtPkg/ArmVirtQemuKernel.dsc 
>> b/ArmVirtPkg/ArmVirtQemuKernel.dsc
>> index cc2c5a50c925..7d9a9196d640 100644
>> --- a/ArmVirtPkg/ArmVirtQemuKernel.dsc
>> +++ b/ArmVirtPkg/ArmVirtQemuKernel.dsc
>> @@ -25,7 +25,7 @@ [Defines]
>>DSC_SPECIFICATION  = 0x00010005
>>OUTPUT_DIRECTORY   = Build/ArmVirtQemuKernel-$(ARCH)
>>SUPPORTED_ARCHITECTURES= AARCH64|ARM
>> -  BUILD_TARGETS  = DEBUG|RELEASE
>> +  BUILD_TARGETS  = DEBUG|RELEASE|NOOPT
>>SKUID_IDENTIFIER   = DEFAULT
>>FLASH_DEFINITION   = ArmVirtPkg/ArmVirtQemuKernel.fdf
>>
>> diff --git a/ArmVirtPkg/ArmVirtXen.dsc b/ArmVirtPkg/ArmVirtXen.dsc
>> index 9b3cc2bd5a10..175b56d10c8f 100644
>> --- a/ArmVirtPkg/ArmVirtXen.dsc
>> +++ b/ArmVirtPkg/ArmVirtXen.dsc
>> @@ -25,7 +25,7 @@ [Defines]
>>DSC_SPECIFICATION  = 0x00010005
>>OUTPUT_DIRECTORY   = Build/ArmVirtXen-$(ARCH)
>>SUPPORTED_ARCHITECTURES= AARCH64|ARM
>> -  BUILD_TARGETS  = DEBUG|RELEASE
>> +  BUILD_TARGETS  = DEBUG|RELEASE|NOOPT
>>SKUID_IDENTIFIER   = DEFAULT
>>FLASH_DEFINITION   = ArmVirtPkg/ArmVirtXen.fdf
>>
>>
>
> Reviewed-by: Laszlo Ersek 

Thanks. Pushed as 80ee06cee70c
___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel

Re: [edk2] [PATCH] EmbeddedPkg: AndroidBootApp: fix clang compilation

[Ard Biesheuvel]

On 6 December 2017 at 20:31, Leif Lindholm  wrote:
> Address an incorrect function prototype (using ; instead of ,)
> in AndroidBootImg.h.
>
> Also restructure code slightly to avoid a "may be used uninitialized"
> warning.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Leif Lindholm 

Reviewed-by: Ard Biesheuvel 

> ---
>  EmbeddedPkg/Include/Protocol/AndroidBootImg.h | 4 ++--
>  EmbeddedPkg/Library/AndroidBootImgLib/AndroidBootImgLib.c | 9 +
>  2 files changed, 7 insertions(+), 6 deletions(-)
>
> diff --git a/EmbeddedPkg/Include/Protocol/AndroidBootImg.h 
> b/EmbeddedPkg/Include/Protocol/AndroidBootImg.h
> index 1c458d0255..cd3c42e858 100644
> --- a/EmbeddedPkg/Include/Protocol/AndroidBootImg.h
> +++ b/EmbeddedPkg/Include/Protocol/AndroidBootImg.h
> @@ -33,8 +33,8 @@ EFI_STATUS
>  typedef
>  EFI_STATUS
>  (EFIAPI *ANDROID_BOOTIMG_UPDATE_DTB) (
> -  IN  EFI_PHYSICAL_ADDRESSOrigDtbBase;
> -  OUT EFI_PHYSICAL_ADDRESS   *NewDtbBase;
> +  IN  EFI_PHYSICAL_ADDRESSOrigDtbBase,
> +  OUT EFI_PHYSICAL_ADDRESS   *NewDtbBase
>);
>
>  struct _ANDROID_BOOTIMG_PROTOCOL {
> diff --git a/EmbeddedPkg/Library/AndroidBootImgLib/AndroidBootImgLib.c 
> b/EmbeddedPkg/Library/AndroidBootImgLib/AndroidBootImgLib.c
> index 09c4d924f1..2e50cedf6a 100644
> --- a/EmbeddedPkg/Library/AndroidBootImgLib/AndroidBootImgLib.c
> +++ b/EmbeddedPkg/Library/AndroidBootImgLib/AndroidBootImgLib.c
> @@ -357,12 +357,13 @@ AndroidBootImgUpdateFdt (
>  if (EFI_ERROR (Status)) {
>goto Fdt_Exit;
>  }
> +
> +Status = gBS->InstallConfigurationTable (
> +,
> +(VOID *)(UINTN)NewFdtBase
> +);
>}
>
> -  Status = gBS->InstallConfigurationTable (
> -  ,
> -  (VOID *)(UINTN)NewFdtBase
> -  );
>if (!EFI_ERROR (Status)) {
>  return EFI_SUCCESS;
>}
> --
> 2.11.0
>
___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel

[edk2] [PATCH] EmbeddedPkg: AndroidBootApp: fix clang compilation

[Leif Lindholm]

Address an incorrect function prototype (using ; instead of ,)
in AndroidBootImg.h.

Also restructure code slightly to avoid a "may be used uninitialized"
warning.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Leif Lindholm 
---
 EmbeddedPkg/Include/Protocol/AndroidBootImg.h | 4 ++--
 EmbeddedPkg/Library/AndroidBootImgLib/AndroidBootImgLib.c | 9 +
 2 files changed, 7 insertions(+), 6 deletions(-)

diff --git a/EmbeddedPkg/Include/Protocol/AndroidBootImg.h 
b/EmbeddedPkg/Include/Protocol/AndroidBootImg.h
index 1c458d0255..cd3c42e858 100644
--- a/EmbeddedPkg/Include/Protocol/AndroidBootImg.h
+++ b/EmbeddedPkg/Include/Protocol/AndroidBootImg.h
@@ -33,8 +33,8 @@ EFI_STATUS
 typedef
 EFI_STATUS
 (EFIAPI *ANDROID_BOOTIMG_UPDATE_DTB) (
-  IN  EFI_PHYSICAL_ADDRESSOrigDtbBase;
-  OUT EFI_PHYSICAL_ADDRESS   *NewDtbBase;
+  IN  EFI_PHYSICAL_ADDRESSOrigDtbBase,
+  OUT EFI_PHYSICAL_ADDRESS   *NewDtbBase
   );
 
 struct _ANDROID_BOOTIMG_PROTOCOL {
diff --git a/EmbeddedPkg/Library/AndroidBootImgLib/AndroidBootImgLib.c 
b/EmbeddedPkg/Library/AndroidBootImgLib/AndroidBootImgLib.c
index 09c4d924f1..2e50cedf6a 100644
--- a/EmbeddedPkg/Library/AndroidBootImgLib/AndroidBootImgLib.c
+++ b/EmbeddedPkg/Library/AndroidBootImgLib/AndroidBootImgLib.c
@@ -357,12 +357,13 @@ AndroidBootImgUpdateFdt (
 if (EFI_ERROR (Status)) {
   goto Fdt_Exit;
 }
+
+Status = gBS->InstallConfigurationTable (
+,
+(VOID *)(UINTN)NewFdtBase
+);
   }
 
-  Status = gBS->InstallConfigurationTable (
-  ,
-  (VOID *)(UINTN)NewFdtBase
-  );
   if (!EFI_ERROR (Status)) {
 return EFI_SUCCESS;
   }
-- 
2.11.0

___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel

Re: [edk2] [Patch 4/4 V3] BaseTools: Update Makefile to support FFS file generation

[Leif Lindholm]

Hi Yonghong,

I'm afraid I have come across an issue with this one as well:
When trying to build OptionRomPkg/Bus/Usb/UsbNetworking/Ax88772b
into a platform (edk2-platforms/Platform/Hisilicon/HiKey/), GenSec
fails with:

Generating FVMAIN FV


Return Value = 2
GenSec: ERROR 0001: Error opening file
  
/work/git/tianocore/Build/HiKey/RELEASE_GCC5/AARCH64/OptionRomPkg/Bus/Usb/UsbNetworking/Ax88772b/Ax88772b/OUTPUT/Ax88772b.depex
GenSec: ERROR 2000: Status is not successful

If I revert commit 37de70b7, the platform builds successfully again.
D03 and D05 platforms also appear to have issues with this, but in
that case due to drivers in edk2-non-osi.

/
Leif

On Wed, Nov 29, 2017 at 10:02:06PM +0800, Yonghong Zhu wrote:
> Update Makefile to support FFS file generation with new build option
> --genfds-multi-thread.
> 
> Cc: Liming Gao 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Yonghong Zhu 
> Signed-off-by: Yunhua Feng 
> ---
>  BaseTools/Source/Python/AutoGen/AutoGen.py |  23 ++-
>  BaseTools/Source/Python/AutoGen/GenMake.py |  90 -
>  BaseTools/Source/Python/Common/GlobalData.py   |   1 +
>  BaseTools/Source/Python/GenFds/AprioriSection.py   |  14 +-
>  BaseTools/Source/Python/GenFds/CompressSection.py  |  10 +-
>  BaseTools/Source/Python/GenFds/DataSection.py  |  37 ++--
>  BaseTools/Source/Python/GenFds/DepexSection.py |   6 +-
>  BaseTools/Source/Python/GenFds/EfiSection.py   |  78 +---
>  BaseTools/Source/Python/GenFds/Fd.py   |  24 ++-
>  BaseTools/Source/Python/GenFds/FfsFileStatement.py |   4 +-
>  BaseTools/Source/Python/GenFds/FfsInfStatement.py  | 202 
> -
>  BaseTools/Source/Python/GenFds/Fv.py   | 189 ++-
>  BaseTools/Source/Python/GenFds/FvImageSection.py   |   8 +-
>  BaseTools/Source/Python/GenFds/GenFds.py   |  20 ++
>  .../Source/Python/GenFds/GenFdsGlobalVariable.py   | 174 ++
>  BaseTools/Source/Python/GenFds/GuidSection.py  | 168 +
>  .../Source/Python/GenFds/OptRomFileStatement.py|   4 +-
>  .../Source/Python/GenFds/OptRomInfStatement.py |  12 +-
>  BaseTools/Source/Python/GenFds/OptionRom.py|  25 +--
>  BaseTools/Source/Python/GenFds/Region.py   |  49 +++--
>  BaseTools/Source/Python/GenFds/Section.py  |   4 +-
>  BaseTools/Source/Python/GenFds/UiSection.py|   5 +-
>  BaseTools/Source/Python/GenFds/VerSection.py   |   9 +-
>  BaseTools/Source/Python/build/build.py |  48 -
>  24 files changed, 793 insertions(+), 411 deletions(-)
___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel

Re: [edk2] [PATCH] MdePkg: Arm/AArch64 - filter #pragma pack() when __ASSEMBLER__

[Ard Biesheuvel]

On 6 December 2017 at 17:07, Leif Lindholm  wrote:
> clang, when used as a preprocessor for dtc, does not discard #pragma
> statements although -x assembler-with-cpp is specified. This causes dtc
> to barf at a #pragma pack() statement that is already filtered out for
> __GNUC__. So add a check to also filter this out if __ASSEMBLER__.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Leif Lindholm 

Reviewed-by: Ard Biesheuvel 

> ---
>  MdePkg/Include/AArch64/ProcessorBind.h | 2 +-
>  MdePkg/Include/Arm/ProcessorBind.h | 2 +-
>  2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/MdePkg/Include/AArch64/ProcessorBind.h 
> b/MdePkg/Include/AArch64/ProcessorBind.h
> index 775e7498c5..7b0f0ff32f 100644
> --- a/MdePkg/Include/AArch64/ProcessorBind.h
> +++ b/MdePkg/Include/AArch64/ProcessorBind.h
> @@ -26,7 +26,7 @@
>  //
>  // Make sure we are using the correct packing rules per EFI specification
>  //
> -#ifndef __GNUC__
> +#if !defined(__GNUC__) && !defined(__ASSEMBLER__)
>  #pragma pack()
>  #endif
>
> diff --git a/MdePkg/Include/Arm/ProcessorBind.h 
> b/MdePkg/Include/Arm/ProcessorBind.h
> index dde1fd1152..42ea2f3055 100644
> --- a/MdePkg/Include/Arm/ProcessorBind.h
> +++ b/MdePkg/Include/Arm/ProcessorBind.h
> @@ -24,7 +24,7 @@
>  //
>  // Make sure we are using the correct packing rules per EFI specification
>  //
> -#ifndef __GNUC__
> +#if !defined(__GNUC__) && !defined(__ASSEMBLER__)
>  #pragma pack()
>  #endif
>
> --
> 2.11.0
>
___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel

[edk2] [PATCH] MdePkg: Arm/AArch64 - filter #pragma pack() when __ASSEMBLER__

[Leif Lindholm]

clang, when used as a preprocessor for dtc, does not discard #pragma
statements although -x assembler-with-cpp is specified. This causes dtc
to barf at a #pragma pack() statement that is already filtered out for
__GNUC__. So add a check to also filter this out if __ASSEMBLER__.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Leif Lindholm 
---
 MdePkg/Include/AArch64/ProcessorBind.h | 2 +-
 MdePkg/Include/Arm/ProcessorBind.h | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/MdePkg/Include/AArch64/ProcessorBind.h 
b/MdePkg/Include/AArch64/ProcessorBind.h
index 775e7498c5..7b0f0ff32f 100644
--- a/MdePkg/Include/AArch64/ProcessorBind.h
+++ b/MdePkg/Include/AArch64/ProcessorBind.h
@@ -26,7 +26,7 @@
 //
 // Make sure we are using the correct packing rules per EFI specification
 //
-#ifndef __GNUC__
+#if !defined(__GNUC__) && !defined(__ASSEMBLER__)
 #pragma pack()
 #endif
 
diff --git a/MdePkg/Include/Arm/ProcessorBind.h 
b/MdePkg/Include/Arm/ProcessorBind.h
index dde1fd1152..42ea2f3055 100644
--- a/MdePkg/Include/Arm/ProcessorBind.h
+++ b/MdePkg/Include/Arm/ProcessorBind.h
@@ -24,7 +24,7 @@
 //
 // Make sure we are using the correct packing rules per EFI specification
 //
-#ifndef __GNUC__
+#if !defined(__GNUC__) && !defined(__ASSEMBLER__)
 #pragma pack()
 #endif
 
-- 
2.11.0

___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel

Re: [edk2] [PATCH] BaseTools/tools_def: add CLANG38 LTO versions for AARCH64 and ARM

[Ard Biesheuvel]

On 6 December 2017 at 14:28, Laszlo Ersek  wrote:
> On 12/06/17 15:16, Ard Biesheuvel wrote:
>> On 6 December 2017 at 14:12, Laszlo Ersek  wrote:
>>> On 12/06/17 12:39, Ard Biesheuvel wrote:
 Extend the CLANG38 toolchain definition so it can be used for
 ARM and AARCH64 as well. Note that this requires llvm-ar and
 the LLVMgold.so linker plugin.

 In preparation of doing the same for GCC5, this toolchain version
 also departs from the custom of using -O0 for DEBUG builds, which
 makes them needlessly slow. Instead, let's add a NOOPT flavor as
 well, and enable optimization for DEBUG like the other architectures
 do. (Note that this will require some trivial changes to the platform
 description files)

 Contributed-under: TianoCore Contribution Agreement 1.1
 Signed-off-by: Ard Biesheuvel 
 ---
  BaseTools/Conf/tools_def.template | 98 +++-
  1 file changed, 95 insertions(+), 3 deletions(-)

 diff --git a/BaseTools/Conf/tools_def.template 
 b/BaseTools/Conf/tools_def.template
 index 91b135c2e569..6ee720d7586e 100755
 --- a/BaseTools/Conf/tools_def.template
 +++ b/BaseTools/Conf/tools_def.template
 @@ -399,8 +399,8 @@ DEFINE DTC_BIN = ENV(DTC_PREFIX)dtc
  #   Intel(r) ACPI Compiler from
  #   https://acpica.org/downloads
  #   CLANG38  -Linux-  Requires:
 -# Clang v3.8, LLVMgold plugin and GNU 
 binutils 2.26 targeting x86_64-linux-gnu
 -# Clang v3.9 or later, LLVMgold plugin and 
 GNU binutils 2.28 targeting x86_64-linux-gnu
 +# Clang v3.8, LLVMgold plugin and GNU 
 binutils 2.26 targeting x86_64-linux-gnu, aarch64-linux-gnu or 
 arm-linux-gnueabi
 +# Clang v3.9 or later, LLVMgold plugin and 
 GNU binutils 2.28 targeting x86_64-linux-gnu, aarch64-linux-gnu or 
 arm-linux-gnueabi
  #Optional:
  # Required to build platforms or ACPI tables:
  #   Intel(r) ACPI Compiler from
 @@ -5652,6 +5652,7 @@ RELEASE_CLANG35_AARCH64_CC_FLAGS = 
 DEF(CLANG35_AARCH64_CC_FLAGS) $(ARCHCC_FLAGS)
  *_CLANG38_*_MAKE_PATH   = make
  *_CLANG38_*_*_DLL   = ENV(CLANG38_DLL)
  *_CLANG38_*_ASL_PATH= DEF(UNIX_IASL_BIN)
 +*_CLANG38_*_DTC_PATH= DEF(DTC_BIN)

  *_CLANG38_*_APP_FLAGS   =
  *_CLANG38_*_ASL_FLAGS   = DEF(IASL_FLAGS)
 @@ -5663,7 +5664,8 @@ DEFINE CLANG38_X64_PREFIX   = 
 ENV(CLANG38_BIN)
  DEFINE CLANG38_IA32_TARGET  = -target i686-pc-linux-gnu
  DEFINE CLANG38_X64_TARGET   = -target x86_64-pc-linux-gnu

 -DEFINE CLANG38_ALL_CC_FLAGS = DEF(GCC44_ALL_CC_FLAGS) 
 -Wno-empty-body -fno-stack-protector -mms-bitfields -Wno-address 
 -Wno-shift-negative-value -Wno-parentheses-equality -Wno-unknown-pragmas 
 -Wno-tautological-constant-out-of-range-compare 
 -Wno-incompatible-library-redeclaration -fno-asynchronous-unwind-tables 
 -mno-sse -mno-mmx -msoft-float -mno-implicit-float  
 -ftrap-function=undefined_behavior_has_been_optimized_away_by_clang 
 -funsigned-char -fno-ms-extensions -Wno-null-dereference 
 -Wno-tautological-compare -Wno-unknown-warning-option -Wno-varargs
 +DEFINE CLANG38_WARNING_OVERRIDES= -Wno-parentheses-equality 
 -Wno-tautological-compare -Wno-tautological-constant-out-of-range-compare 
 -Wno-empty-body  -Wno-varargs
 +DEFINE CLANG38_ALL_CC_FLAGS = DEF(GCC44_ALL_CC_FLAGS) 
 DEF(CLANG38_WARNING_OVERRIDES) -fno-stack-protector -mms-bitfields 
 -Wno-address -Wno-shift-negative-value -Wno-unknown-pragmas 
 -Wno-incompatible-library-redeclaration -fno-asynchronous-unwind-tables 
 -mno-sse -mno-mmx -msoft-float -mno-implicit-float  
 -ftrap-function=undefined_behavior_has_been_optimized_away_by_clang 
 -funsigned-char -fno-ms-extensions -Wno-null-dereference 
 -Wno-unknown-warning-option
>>>
>>> At a quite superficial look, the patch seems OK to me. I'm just curious
>>> about one thing: what decides if a -Wno... option goes into
>>> CLANG38_WARNING_OVERRIDES? You left some -Wno... options out of it (kept
>>> them explicitly in the CLANG38_ALL_CC_FLAGS define).
>>>
>>
>> I split off some warning overrides that are shared between all
>> architectures, and left the x86 only ones in CLANG38_ALL_CC_FLAGS
>
> That's what I suspected; it just seemed strange that we wanted to
> suppress e.g. "-Waddress" for x86 only.
>
> ... I do see the point though -- suppressing warnings is always a messy
> business, so whenever we can opt for *enabling* warnings, we should. Not
> 

Re: [edk2] [PATCH] BaseTools/tools_def: add CLANG38 LTO versions for AARCH64 and ARM

[Laszlo Ersek]

On 12/06/17 15:16, Ard Biesheuvel wrote:
> On 6 December 2017 at 14:12, Laszlo Ersek  wrote:
>> On 12/06/17 12:39, Ard Biesheuvel wrote:
>>> Extend the CLANG38 toolchain definition so it can be used for
>>> ARM and AARCH64 as well. Note that this requires llvm-ar and
>>> the LLVMgold.so linker plugin.
>>>
>>> In preparation of doing the same for GCC5, this toolchain version
>>> also departs from the custom of using -O0 for DEBUG builds, which
>>> makes them needlessly slow. Instead, let's add a NOOPT flavor as
>>> well, and enable optimization for DEBUG like the other architectures
>>> do. (Note that this will require some trivial changes to the platform
>>> description files)
>>>
>>> Contributed-under: TianoCore Contribution Agreement 1.1
>>> Signed-off-by: Ard Biesheuvel 
>>> ---
>>>  BaseTools/Conf/tools_def.template | 98 +++-
>>>  1 file changed, 95 insertions(+), 3 deletions(-)
>>>
>>> diff --git a/BaseTools/Conf/tools_def.template 
>>> b/BaseTools/Conf/tools_def.template
>>> index 91b135c2e569..6ee720d7586e 100755
>>> --- a/BaseTools/Conf/tools_def.template
>>> +++ b/BaseTools/Conf/tools_def.template
>>> @@ -399,8 +399,8 @@ DEFINE DTC_BIN = ENV(DTC_PREFIX)dtc
>>>  #   Intel(r) ACPI Compiler from
>>>  #   https://acpica.org/downloads
>>>  #   CLANG38  -Linux-  Requires:
>>> -# Clang v3.8, LLVMgold plugin and GNU binutils 
>>> 2.26 targeting x86_64-linux-gnu
>>> -# Clang v3.9 or later, LLVMgold plugin and GNU 
>>> binutils 2.28 targeting x86_64-linux-gnu
>>> +# Clang v3.8, LLVMgold plugin and GNU binutils 
>>> 2.26 targeting x86_64-linux-gnu, aarch64-linux-gnu or arm-linux-gnueabi
>>> +# Clang v3.9 or later, LLVMgold plugin and GNU 
>>> binutils 2.28 targeting x86_64-linux-gnu, aarch64-linux-gnu or 
>>> arm-linux-gnueabi
>>>  #Optional:
>>>  # Required to build platforms or ACPI tables:
>>>  #   Intel(r) ACPI Compiler from
>>> @@ -5652,6 +5652,7 @@ RELEASE_CLANG35_AARCH64_CC_FLAGS = 
>>> DEF(CLANG35_AARCH64_CC_FLAGS) $(ARCHCC_FLAGS)
>>>  *_CLANG38_*_MAKE_PATH   = make
>>>  *_CLANG38_*_*_DLL   = ENV(CLANG38_DLL)
>>>  *_CLANG38_*_ASL_PATH= DEF(UNIX_IASL_BIN)
>>> +*_CLANG38_*_DTC_PATH= DEF(DTC_BIN)
>>>
>>>  *_CLANG38_*_APP_FLAGS   =
>>>  *_CLANG38_*_ASL_FLAGS   = DEF(IASL_FLAGS)
>>> @@ -5663,7 +5664,8 @@ DEFINE CLANG38_X64_PREFIX   = ENV(CLANG38_BIN)
>>>  DEFINE CLANG38_IA32_TARGET  = -target i686-pc-linux-gnu
>>>  DEFINE CLANG38_X64_TARGET   = -target x86_64-pc-linux-gnu
>>>
>>> -DEFINE CLANG38_ALL_CC_FLAGS = DEF(GCC44_ALL_CC_FLAGS) 
>>> -Wno-empty-body -fno-stack-protector -mms-bitfields -Wno-address 
>>> -Wno-shift-negative-value -Wno-parentheses-equality -Wno-unknown-pragmas 
>>> -Wno-tautological-constant-out-of-range-compare 
>>> -Wno-incompatible-library-redeclaration -fno-asynchronous-unwind-tables 
>>> -mno-sse -mno-mmx -msoft-float -mno-implicit-float  
>>> -ftrap-function=undefined_behavior_has_been_optimized_away_by_clang 
>>> -funsigned-char -fno-ms-extensions -Wno-null-dereference 
>>> -Wno-tautological-compare -Wno-unknown-warning-option -Wno-varargs
>>> +DEFINE CLANG38_WARNING_OVERRIDES= -Wno-parentheses-equality 
>>> -Wno-tautological-compare -Wno-tautological-constant-out-of-range-compare 
>>> -Wno-empty-body  -Wno-varargs
>>> +DEFINE CLANG38_ALL_CC_FLAGS = DEF(GCC44_ALL_CC_FLAGS) 
>>> DEF(CLANG38_WARNING_OVERRIDES) -fno-stack-protector -mms-bitfields 
>>> -Wno-address -Wno-shift-negative-value -Wno-unknown-pragmas 
>>> -Wno-incompatible-library-redeclaration -fno-asynchronous-unwind-tables 
>>> -mno-sse -mno-mmx -msoft-float -mno-implicit-float  
>>> -ftrap-function=undefined_behavior_has_been_optimized_away_by_clang 
>>> -funsigned-char -fno-ms-extensions -Wno-null-dereference 
>>> -Wno-unknown-warning-option
>>
>> At a quite superficial look, the patch seems OK to me. I'm just curious
>> about one thing: what decides if a -Wno... option goes into
>> CLANG38_WARNING_OVERRIDES? You left some -Wno... options out of it (kept
>> them explicitly in the CLANG38_ALL_CC_FLAGS define).
>>
> 
> I split off some warning overrides that are shared between all
> architectures, and left the x86 only ones in CLANG38_ALL_CC_FLAGS

That's what I suspected; it just seemed strange that we wanted to
suppress e.g. "-Waddress" for x86 only.

... I do see the point though -- suppressing warnings is always a messy
business, so whenever we can opt for *enabling* warnings, we should. Not
inheriting a -Wno... flag does just that.


>> ... It seems like the CLANG38_ALL_CC_FLAGS is not used for the ARM /
>> AARCH64 toolchains. "ALL" becomes sort of a misnomer then. Is 

Re: [edk2] [PATCH] BaseTools/tools_def: add CLANG38 LTO versions for AARCH64 and ARM

[Ard Biesheuvel]

On 6 December 2017 at 14:12, Laszlo Ersek  wrote:
> On 12/06/17 12:39, Ard Biesheuvel wrote:
>> Extend the CLANG38 toolchain definition so it can be used for
>> ARM and AARCH64 as well. Note that this requires llvm-ar and
>> the LLVMgold.so linker plugin.
>>
>> In preparation of doing the same for GCC5, this toolchain version
>> also departs from the custom of using -O0 for DEBUG builds, which
>> makes them needlessly slow. Instead, let's add a NOOPT flavor as
>> well, and enable optimization for DEBUG like the other architectures
>> do. (Note that this will require some trivial changes to the platform
>> description files)
>>
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Ard Biesheuvel 
>> ---
>>  BaseTools/Conf/tools_def.template | 98 +++-
>>  1 file changed, 95 insertions(+), 3 deletions(-)
>>
>> diff --git a/BaseTools/Conf/tools_def.template 
>> b/BaseTools/Conf/tools_def.template
>> index 91b135c2e569..6ee720d7586e 100755
>> --- a/BaseTools/Conf/tools_def.template
>> +++ b/BaseTools/Conf/tools_def.template
>> @@ -399,8 +399,8 @@ DEFINE DTC_BIN = ENV(DTC_PREFIX)dtc
>>  #   Intel(r) ACPI Compiler from
>>  #   https://acpica.org/downloads
>>  #   CLANG38  -Linux-  Requires:
>> -# Clang v3.8, LLVMgold plugin and GNU binutils 
>> 2.26 targeting x86_64-linux-gnu
>> -# Clang v3.9 or later, LLVMgold plugin and GNU 
>> binutils 2.28 targeting x86_64-linux-gnu
>> +# Clang v3.8, LLVMgold plugin and GNU binutils 
>> 2.26 targeting x86_64-linux-gnu, aarch64-linux-gnu or arm-linux-gnueabi
>> +# Clang v3.9 or later, LLVMgold plugin and GNU 
>> binutils 2.28 targeting x86_64-linux-gnu, aarch64-linux-gnu or 
>> arm-linux-gnueabi
>>  #Optional:
>>  # Required to build platforms or ACPI tables:
>>  #   Intel(r) ACPI Compiler from
>> @@ -5652,6 +5652,7 @@ RELEASE_CLANG35_AARCH64_CC_FLAGS = 
>> DEF(CLANG35_AARCH64_CC_FLAGS) $(ARCHCC_FLAGS)
>>  *_CLANG38_*_MAKE_PATH   = make
>>  *_CLANG38_*_*_DLL   = ENV(CLANG38_DLL)
>>  *_CLANG38_*_ASL_PATH= DEF(UNIX_IASL_BIN)
>> +*_CLANG38_*_DTC_PATH= DEF(DTC_BIN)
>>
>>  *_CLANG38_*_APP_FLAGS   =
>>  *_CLANG38_*_ASL_FLAGS   = DEF(IASL_FLAGS)
>> @@ -5663,7 +5664,8 @@ DEFINE CLANG38_X64_PREFIX   = ENV(CLANG38_BIN)
>>  DEFINE CLANG38_IA32_TARGET  = -target i686-pc-linux-gnu
>>  DEFINE CLANG38_X64_TARGET   = -target x86_64-pc-linux-gnu
>>
>> -DEFINE CLANG38_ALL_CC_FLAGS = DEF(GCC44_ALL_CC_FLAGS) 
>> -Wno-empty-body -fno-stack-protector -mms-bitfields -Wno-address 
>> -Wno-shift-negative-value -Wno-parentheses-equality -Wno-unknown-pragmas 
>> -Wno-tautological-constant-out-of-range-compare 
>> -Wno-incompatible-library-redeclaration -fno-asynchronous-unwind-tables 
>> -mno-sse -mno-mmx -msoft-float -mno-implicit-float  
>> -ftrap-function=undefined_behavior_has_been_optimized_away_by_clang 
>> -funsigned-char -fno-ms-extensions -Wno-null-dereference 
>> -Wno-tautological-compare -Wno-unknown-warning-option -Wno-varargs
>> +DEFINE CLANG38_WARNING_OVERRIDES= -Wno-parentheses-equality 
>> -Wno-tautological-compare -Wno-tautological-constant-out-of-range-compare 
>> -Wno-empty-body  -Wno-varargs
>> +DEFINE CLANG38_ALL_CC_FLAGS = DEF(GCC44_ALL_CC_FLAGS) 
>> DEF(CLANG38_WARNING_OVERRIDES) -fno-stack-protector -mms-bitfields 
>> -Wno-address -Wno-shift-negative-value -Wno-unknown-pragmas 
>> -Wno-incompatible-library-redeclaration -fno-asynchronous-unwind-tables 
>> -mno-sse -mno-mmx -msoft-float -mno-implicit-float  
>> -ftrap-function=undefined_behavior_has_been_optimized_away_by_clang 
>> -funsigned-char -fno-ms-extensions -Wno-null-dereference 
>> -Wno-unknown-warning-option
>
> At a quite superficial look, the patch seems OK to me. I'm just curious
> about one thing: what decides if a -Wno... option goes into
> CLANG38_WARNING_OVERRIDES? You left some -Wno... options out of it (kept
> them explicitly in the CLANG38_ALL_CC_FLAGS define).
>

I split off some warning overrides that are shared between all
architectures, and left the x86 only ones in CLANG38_ALL_CC_FLAGS

> ... It seems like the CLANG38_ALL_CC_FLAGS is not used for the ARM /
> AARCH64 toolchains. "ALL" becomes sort of a misnomer then. Is that OK?
>

Yes. In tools_def land, ALL still means 'both IA32 and X64', and I
have wasted too many cycles on trying to refactor the GCC toolchains
to care about it.
___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel

Re: [edk2] [PATCH] ArmVirtPkg: add NOOPT target to platform .DSCs

[Laszlo Ersek]

On 12/06/17 12:37, Ard Biesheuvel wrote:
> In order to allow the ArmVirtPkg platforms to be built using the
> NOOPT target, add it explicitly to the BUILD_TARGETS define.
> 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ard Biesheuvel 
> ---
>  ArmVirtPkg/ArmVirtQemu.dsc   | 2 +-
>  ArmVirtPkg/ArmVirtQemuKernel.dsc | 2 +-
>  ArmVirtPkg/ArmVirtXen.dsc| 2 +-
>  3 files changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/ArmVirtPkg/ArmVirtQemu.dsc b/ArmVirtPkg/ArmVirtQemu.dsc
> index f09226671827..76a83b99a303 100644
> --- a/ArmVirtPkg/ArmVirtQemu.dsc
> +++ b/ArmVirtPkg/ArmVirtQemu.dsc
> @@ -25,7 +25,7 @@ [Defines]
>DSC_SPECIFICATION  = 0x00010005
>OUTPUT_DIRECTORY   = Build/ArmVirtQemu-$(ARCH)
>SUPPORTED_ARCHITECTURES= AARCH64|ARM
> -  BUILD_TARGETS  = DEBUG|RELEASE
> +  BUILD_TARGETS  = DEBUG|RELEASE|NOOPT
>SKUID_IDENTIFIER   = DEFAULT
>FLASH_DEFINITION   = ArmVirtPkg/ArmVirtQemu.fdf
>  
> diff --git a/ArmVirtPkg/ArmVirtQemuKernel.dsc 
> b/ArmVirtPkg/ArmVirtQemuKernel.dsc
> index cc2c5a50c925..7d9a9196d640 100644
> --- a/ArmVirtPkg/ArmVirtQemuKernel.dsc
> +++ b/ArmVirtPkg/ArmVirtQemuKernel.dsc
> @@ -25,7 +25,7 @@ [Defines]
>DSC_SPECIFICATION  = 0x00010005
>OUTPUT_DIRECTORY   = Build/ArmVirtQemuKernel-$(ARCH)
>SUPPORTED_ARCHITECTURES= AARCH64|ARM
> -  BUILD_TARGETS  = DEBUG|RELEASE
> +  BUILD_TARGETS  = DEBUG|RELEASE|NOOPT
>SKUID_IDENTIFIER   = DEFAULT
>FLASH_DEFINITION   = ArmVirtPkg/ArmVirtQemuKernel.fdf
>  
> diff --git a/ArmVirtPkg/ArmVirtXen.dsc b/ArmVirtPkg/ArmVirtXen.dsc
> index 9b3cc2bd5a10..175b56d10c8f 100644
> --- a/ArmVirtPkg/ArmVirtXen.dsc
> +++ b/ArmVirtPkg/ArmVirtXen.dsc
> @@ -25,7 +25,7 @@ [Defines]
>DSC_SPECIFICATION  = 0x00010005
>OUTPUT_DIRECTORY   = Build/ArmVirtXen-$(ARCH)
>SUPPORTED_ARCHITECTURES= AARCH64|ARM
> -  BUILD_TARGETS  = DEBUG|RELEASE
> +  BUILD_TARGETS  = DEBUG|RELEASE|NOOPT
>SKUID_IDENTIFIER   = DEFAULT
>FLASH_DEFINITION   = ArmVirtPkg/ArmVirtXen.fdf
>  
> 

Reviewed-by: Laszlo Ersek 
___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel

Re: [edk2] [PATCH] BaseTools/tools_def: add CLANG38 LTO versions for AARCH64 and ARM

[Laszlo Ersek]

On 12/06/17 12:39, Ard Biesheuvel wrote:
> Extend the CLANG38 toolchain definition so it can be used for
> ARM and AARCH64 as well. Note that this requires llvm-ar and
> the LLVMgold.so linker plugin.
> 
> In preparation of doing the same for GCC5, this toolchain version
> also departs from the custom of using -O0 for DEBUG builds, which
> makes them needlessly slow. Instead, let's add a NOOPT flavor as
> well, and enable optimization for DEBUG like the other architectures
> do. (Note that this will require some trivial changes to the platform
> description files)
> 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ard Biesheuvel 
> ---
>  BaseTools/Conf/tools_def.template | 98 +++-
>  1 file changed, 95 insertions(+), 3 deletions(-)
> 
> diff --git a/BaseTools/Conf/tools_def.template 
> b/BaseTools/Conf/tools_def.template
> index 91b135c2e569..6ee720d7586e 100755
> --- a/BaseTools/Conf/tools_def.template
> +++ b/BaseTools/Conf/tools_def.template
> @@ -399,8 +399,8 @@ DEFINE DTC_BIN = ENV(DTC_PREFIX)dtc
>  #   Intel(r) ACPI Compiler from
>  #   https://acpica.org/downloads
>  #   CLANG38  -Linux-  Requires:
> -# Clang v3.8, LLVMgold plugin and GNU binutils 
> 2.26 targeting x86_64-linux-gnu
> -# Clang v3.9 or later, LLVMgold plugin and GNU 
> binutils 2.28 targeting x86_64-linux-gnu
> +# Clang v3.8, LLVMgold plugin and GNU binutils 
> 2.26 targeting x86_64-linux-gnu, aarch64-linux-gnu or arm-linux-gnueabi
> +# Clang v3.9 or later, LLVMgold plugin and GNU 
> binutils 2.28 targeting x86_64-linux-gnu, aarch64-linux-gnu or 
> arm-linux-gnueabi
>  #Optional:
>  # Required to build platforms or ACPI tables:
>  #   Intel(r) ACPI Compiler from
> @@ -5652,6 +5652,7 @@ RELEASE_CLANG35_AARCH64_CC_FLAGS = 
> DEF(CLANG35_AARCH64_CC_FLAGS) $(ARCHCC_FLAGS)
>  *_CLANG38_*_MAKE_PATH   = make
>  *_CLANG38_*_*_DLL   = ENV(CLANG38_DLL)
>  *_CLANG38_*_ASL_PATH= DEF(UNIX_IASL_BIN)
> +*_CLANG38_*_DTC_PATH= DEF(DTC_BIN)
>  
>  *_CLANG38_*_APP_FLAGS   =
>  *_CLANG38_*_ASL_FLAGS   = DEF(IASL_FLAGS)
> @@ -5663,7 +5664,8 @@ DEFINE CLANG38_X64_PREFIX   = ENV(CLANG38_BIN)
>  DEFINE CLANG38_IA32_TARGET  = -target i686-pc-linux-gnu
>  DEFINE CLANG38_X64_TARGET   = -target x86_64-pc-linux-gnu
>  
> -DEFINE CLANG38_ALL_CC_FLAGS = DEF(GCC44_ALL_CC_FLAGS) 
> -Wno-empty-body -fno-stack-protector -mms-bitfields -Wno-address 
> -Wno-shift-negative-value -Wno-parentheses-equality -Wno-unknown-pragmas 
> -Wno-tautological-constant-out-of-range-compare 
> -Wno-incompatible-library-redeclaration -fno-asynchronous-unwind-tables 
> -mno-sse -mno-mmx -msoft-float -mno-implicit-float  
> -ftrap-function=undefined_behavior_has_been_optimized_away_by_clang 
> -funsigned-char -fno-ms-extensions -Wno-null-dereference 
> -Wno-tautological-compare -Wno-unknown-warning-option -Wno-varargs
> +DEFINE CLANG38_WARNING_OVERRIDES= -Wno-parentheses-equality 
> -Wno-tautological-compare -Wno-tautological-constant-out-of-range-compare 
> -Wno-empty-body  -Wno-varargs
> +DEFINE CLANG38_ALL_CC_FLAGS = DEF(GCC44_ALL_CC_FLAGS) 
> DEF(CLANG38_WARNING_OVERRIDES) -fno-stack-protector -mms-bitfields 
> -Wno-address -Wno-shift-negative-value -Wno-unknown-pragmas 
> -Wno-incompatible-library-redeclaration -fno-asynchronous-unwind-tables 
> -mno-sse -mno-mmx -msoft-float -mno-implicit-float  
> -ftrap-function=undefined_behavior_has_been_optimized_away_by_clang 
> -funsigned-char -fno-ms-extensions -Wno-null-dereference 
> -Wno-unknown-warning-option

At a quite superficial look, the patch seems OK to me. I'm just curious
about one thing: what decides if a -Wno... option goes into
CLANG38_WARNING_OVERRIDES? You left some -Wno... options out of it (kept
them explicitly in the CLANG38_ALL_CC_FLAGS define).

... It seems like the CLANG38_ALL_CC_FLAGS is not used for the ARM /
AARCH64 toolchains. "ALL" becomes sort of a misnomer then. Is that OK?

Thanks
Laszlo

>  
>  ###
>  # CLANG38 IA32 definitions
> @@ -5739,6 +5741,96 @@ NOOPT_CLANG38_X64_CC_FLAGS = 
> DEF(CLANG38_ALL_CC_FLAGS) -m64 "-DEFIAPI=__
>  NOOPT_CLANG38_X64_DLINK_FLAGS  = DEF(GCC5_IA32_X64_DLINK_FLAGS) -Wl,-O0 
> -Wl,-melf_x86_64 -Wl,--oformat=elf64-x86-64 -Wl,-pie -mcmodel=small
>  NOOPT_CLANG38_X64_DLINK2_FLAGS = DEF(GCC5_X64_DLINK2_FLAGS) -O0
>  
> +##
> +# CLANG38 ARM definitions
> +##
> +DEFINE CLANG38_ARM_TARGET= -target arm-linux-gnueabihf
> +DEFINE CLANG38_ARM_CC_FLAGS  = DEF(GCC_ARM_CC_FLAGS) 
> DEF(CLANG38_ARM_TARGET) DEF(CLANG38_WARNING_OVERRIDES) -mno-movt
> +DEFINE 

Re: [edk2] [PATCH v3 1/2] MdeModulePkg/DxeIpl: Mark page table as read-only

[Wang, Jian J]

Hi,

> -Original Message-
> From: Ni, Ruiyu
> Sent: Wednesday, December 06, 2017 6:05 PM
> To: Wang, Jian J ; edk2-devel@lists.01.org
> Cc: Yao, Jiewen ; Dong, Eric ;
> Zeng, Star 
> Subject: Re: [edk2] [PATCH v3 1/2] MdeModulePkg/DxeIpl: Mark page table as
> read-only
> 
> On 12/5/2017 4:16 PM, Jian J Wang wrote:
> >> v3:
> >> Remove the public definition of PAGE_TABLE_POOL_HEADER but keep
> similar
> >> concept locally. CpuDxe has its own page table pool.
> >
> >> v2:
> >> Introduce page table pool to ease the page table memory allocation and
> >> protection, which replaces the direct calling of AllocatePages().
> >
> > This patch will set the memory pages used for page table as read-only
> > memory after the paging is setup. CR0.WP must set to let it take into
> > effect.
> >
> > A simple page table memory management mechanism, page table pool
> concept,
> > is introduced to simplify the page table memory allocation and protection.
> > It will also help to reduce the potential recursive "split" action during
> > updating memory paging attributes.
> >
> > The basic idea is to allocate a bunch of continuous pages of memory in
> > advance as one or more page table pools, and all future page tables
> > consumption will happen in those pool instead of system memory. If the page
> > pool is reserved at the boundary of 2MB page and with same size of 2MB page,
> > there's no page granularity "split" operation will be needed, because the
> > memory of new page tables (if needed) will be usually in the same page as
> > target page table you're working on.
> >
> > And since we have centralized page tables (a few 2MB pages), it's easier
> > to protect them by changing their attributes to be read-only once and for
> > all. There's no need to apply the protection for new page tables any more
> > as long as the pool has free pages available.
> >
> > Once current page table pool has been used up, one can allocate another 2MB
> > memory pool and just set this new 2MB memory block to be read-only instead
> of
> > setting the new page tables one page by one page.
> >
> > Two new PCDs PcdPageTablePoolUnitSize and PcdPageTablePoolAlignment
> are used
> > to specify the size and alignment for page table pool. For IA32 processor
> > 0x20 (2MB) is the only choice for both of them to meet the requirement
> of
> > page table pool.
> >
> > Cc: Jiewen Yao 
> > Cc: Star Zeng 
> > Cc: Eric Dong 
> > Cc: Ruiyu Ni 
> > Contributed-under: TianoCore Contribution Agreement 1.1
> > Signed-off-by: Jian J Wang 
> > ---
> >   MdeModulePkg/Core/DxeIplPeim/DxeIpl.h|  34 +++
> >   MdeModulePkg/Core/DxeIplPeim/Ia32/DxeLoadFunc.c  |   8 +-
> >   MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c | 301
> ++-
> >   MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.h |  26 ++
> >   4 files changed, 365 insertions(+), 4 deletions(-)
> >
> > diff --git a/MdeModulePkg/Core/DxeIplPeim/DxeIpl.h
> b/MdeModulePkg/Core/DxeIplPeim/DxeIpl.h
> > index f3aabdb7e0..9dc80b1508 100644
> > --- a/MdeModulePkg/Core/DxeIplPeim/DxeIpl.h
> > +++ b/MdeModulePkg/Core/DxeIplPeim/DxeIpl.h
> > @@ -265,4 +265,38 @@ IsNullDetectionEnabled (
> > VOID
> > );
> >
> > +/**
> > +  Prevent the memory pages used for page table from been overwritten.
> > +
> > +  @param[in] PageTableBaseBase address of page table (CR3).
> > +
> > +**/
> > +VOID
> > +EnablePageTableProtection (
> > +  IN  UINTN PageTableBase,
> > +  IN  BOOLEAN   Level4Paging
> > +  );
> > +
> > +/**
> > +  This API provides a way to allocate memory for page table.
> > +
> > +  This API can be called more than once to allocate memory for page tables.
> > +
> > +  Allocates the number of 4KB pages and returns a pointer to the allocated
> > +  buffer. The buffer returned is aligned on a 4KB boundary.
> > +
> > +  If Pages is 0, then NULL is returned.
> > +  If there is not enough memory remaining to satisfy the request, then 
> > NULL is
> > +  returned.
> > +
> > +  @param  Pages The number of 4 KB pages to allocate.
> > +
> > +  @return A pointer to the allocated buffer or NULL if allocation fails.
> > +
> > +**/
> > +VOID *
> > +AllocatePageTableMemory (
> > +  IN UINTN   Pages
> > +  );
> > +
> >   #endif
> > diff --git a/MdeModulePkg/Core/DxeIplPeim/Ia32/DxeLoadFunc.c
> b/MdeModulePkg/Core/DxeIplPeim/Ia32/DxeLoadFunc.c
> > index 5649265367..13fff28e93 100644
> > --- a/MdeModulePkg/Core/DxeIplPeim/Ia32/DxeLoadFunc.c
> > +++ b/MdeModulePkg/Core/DxeIplPeim/Ia32/DxeLoadFunc.c
> > @@ -99,7 +99,7 @@ Create4GPageTablesIa32Pae (
> > NumberOfPdpEntriesNeeded = (UINT32) LShiftU64 (1, (PhysicalAddressBits -
> 30));
> >
> > TotalPagesNum = NumberOfPdpEntriesNeeded + 1;
> > -  PageAddress = (UINTN) AllocatePages (TotalPagesNum);
> > +  

Re: [edk2] [PATCH 2/3] IntelFrameworkModulePkg/LegacyBiosDxe: Use macro to enable/disable page 0

[Wang, Jian J]

You're right that {} are not necessary. I'm wondering why I can't pass build 
without them before.
They'll be removed in v2.

> -Original Message-
> From: Ni, Ruiyu
> Sent: Wednesday, December 06, 2017 5:32 PM
> To: Wang, Jian J ; edk2-devel@lists.01.org
> Cc: Kinney, Michael D ; Gao, Liming
> 
> Subject: Re: [edk2] [PATCH 2/3] IntelFrameworkModulePkg/LegacyBiosDxe: Use
> macro to enable/disable page 0
> 
> On 12/6/2017 3:31 PM, Jian J Wang wrote:
> > Current implementation uses following two methods
> >
> >  EnableNullDetection()
> >  DisableNullDetection()
> >
> > to enable/disable page 0. These two methods will check PCD
> > PcdNullPointerDetectionPropertyMask to know if the page 0 is disabled or 
> > not.
> > This is due to the fact that old GCD service doesn't provide paging related
> > attributes of memory block. Since this issue has been fixed, GCD services
> > can be used to determine the paging status of page 0. This is also make it
> > possible to just use a new macro
> >
> >  ACCESS_PAGE0_CODE(
> >{
> >
> >}
> >  );
> >
> > to replace above methods to do the same job, which also makes code more
> > readability.
> >
> > Cc: Liming Gao 
> > Cc: Michael D Kinney 
> > Contributed-under: TianoCore Contribution Agreement 1.1
> > Signed-off-by: Jian J Wang 
> > ---
> >   .../Csm/LegacyBiosDxe/LegacyBda.c  |  53 
> >   .../Csm/LegacyBiosDxe/LegacyBios.c | 135 
> > ++---
> >   .../Csm/LegacyBiosDxe/LegacyBiosDxe.inf|   1 -
> >   .../Csm/LegacyBiosDxe/LegacyBiosInterface.h|  16 ---
> >   .../Csm/LegacyBiosDxe/LegacyBootSupport.c  |  80 ++--
> >   .../Csm/LegacyBiosDxe/LegacyPci.c  |  72 ++-
> >   IntelFrameworkModulePkg/Csm/LegacyBiosDxe/Thunk.c  |  51 
> >   7 files changed, 135 insertions(+), 273 deletions(-)
> >
> > diff --git a/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBda.c
> b/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBda.c
> > index c6670febee..9667dc2a0f 100644
> > --- a/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBda.c
> > +++ b/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBda.c
> > @@ -34,37 +34,36 @@ LegacyBiosInitBda (
> > BDA_STRUC *Bda;
> > UINT8 *Ebda;
> >
> > -  DisableNullDetection ();
> > -
> > Bda   = (BDA_STRUC *) ((UINTN) 0x400);
> > Ebda  = (UINT8 *) ((UINTN) 0x9fc00);
> >
> > -  ZeroMem (Bda, 0x100);
> > +  ACCESS_PAGE0_CODE ({
> > +ZeroMem (Bda, 0x100);
> > +//
> > +// 640k-1k for EBDA
> > +//
> > +Bda->MemSize= 0x27f;
> > +Bda->KeyHead= 0x1e;
> > +Bda->KeyTail= 0x1e;
> > +Bda->FloppyData = 0x00;
> > +Bda->FloppyTimeout  = 0xff;
> > +
> > +Bda->KeyStart   = 0x001E;
> > +Bda->KeyEnd = 0x003E;
> > +Bda->KeyboardStatus = 0x10;
> > +Bda->Ebda   = 0x9fc0;
> > +
> > +//
> > +// Move LPT time out here and zero out LPT4 since some SCSI OPROMS
> > +// use this as scratch pad (LPT4 is Reserved)
> > +//
> > +Bda->Lpt1_2Timeout  = 0x1414;
> > +Bda->Lpt3_4Timeout  = 0x1400;
> > +
> > +  });
> > +
> > ZeroMem (Ebda, 0x400);
> > -  //
> > -  // 640k-1k for EBDA
> > -  //
> > -  Bda->MemSize= 0x27f;
> > -  Bda->KeyHead= 0x1e;
> > -  Bda->KeyTail= 0x1e;
> > -  Bda->FloppyData = 0x00;
> > -  Bda->FloppyTimeout  = 0xff;
> > -
> > -  Bda->KeyStart   = 0x001E;
> > -  Bda->KeyEnd = 0x003E;
> > -  Bda->KeyboardStatus = 0x10;
> > -  Bda->Ebda   = 0x9fc0;
> > -
> > -  //
> > -  // Move LPT time out here and zero out LPT4 since some SCSI OPROMS
> > -  // use this as scratch pad (LPT4 is Reserved)
> > -  //
> > -  Bda->Lpt1_2Timeout  = 0x1414;
> > -  Bda->Lpt3_4Timeout  = 0x1400;
> > -
> > -  *Ebda   = 0x01;
> > -
> > -  EnableNullDetection ();
> > +  *Ebda = 0x01;
> >
> > return EFI_SUCCESS;
> >   }
> > diff --git a/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBios.c
> b/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBios.c
> > index c6461f5547..d50c15eacb 100644
> > --- a/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBios.c
> > +++ b/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBios.c
> > @@ -786,115 +786,6 @@ ToggleEndOfDxeStatus (
> > return;
> >   }
> >
> > -//
> > -// Legacy BIOS needs to access memory between 0-4095, which will cause
> page
> > -// fault exception if NULL pointer detection mechanism is enabled. 
> > Following
> > -// functions can be used to disable/enable NULL pointer detection
> before/after
> > -// accessing those memory.
> > -//
> > -
> > -/**
> > -   Enable NULL pointer detection.
> > -**/
> > -VOID
> > -EnableNullDetection (
> > -  VOID
> > -  )
> > -{
> > -  EFI_STATUSStatus;
> > -  

Re: [edk2] [PATCH 1/3] IntelFrameworkPkg/LegacyBios.h: Add a macro to guarantee page 0 access

[Wang, Jian J]

Good catch. I think it's a typo not on purpose. Many thanks!

> -Original Message-
> From: Ni, Ruiyu
> Sent: Wednesday, December 06, 2017 5:31 PM
> To: Wang, Jian J ; edk2-devel@lists.01.org
> Cc: Kinney, Michael D ; Gao, Liming
> 
> Subject: Re: [edk2] [PATCH 1/3] IntelFrameworkPkg/LegacyBios.h: Add a macro
> to guarantee page 0 access
> 
> On 12/6/2017 3:31 PM, Jian J Wang wrote:
> > Due to the introduction of NULL pointer detection feature, page 0 will be
> > disabled if the feature is enabled, which will cause legacy code failed to
> > update legacy data in page 0. This macro is introduced to make sure the
> > page 0 is enabled before those code and restore the original status of it
> > afterwards.
> >
> > Another reason to introduce this macro is to eliminate the dependency on
> > the PcdNullPointerDetectionPropertyMask. Because this is a new PCD, it
> > could cause some backward compatibility issue for some old packages.
> >
> > This macro will simply check if the page 0 is disabled or not. If it's
> > disabled, it will enable it before code updating page 0 and disable it
> > afterwards. Otherwise, this macro will do nothing to page 0.
> >
> > The usage of the macro will be look like (similar to DEBUG_CODE macro):
> >
> >  ACCESS_PAGE0_CODE(
> >{
> >
> >}
> >  );
> >
> > Cc: Liming Gao 
> > Cc: Michael D Kinney 
> > Contributed-under: TianoCore Contribution Agreement 1.1
> > Signed-off-by: Jian J Wang 
> > ---
> >   IntelFrameworkPkg/Include/Protocol/LegacyBios.h | 34
> +
> >   1 file changed, 34 insertions(+)
> >
> > diff --git a/IntelFrameworkPkg/Include/Protocol/LegacyBios.h
> b/IntelFrameworkPkg/Include/Protocol/LegacyBios.h
> > index 641f101bce..f77c92ba21 100644
> > --- a/IntelFrameworkPkg/Include/Protocol/LegacyBios.h
> > +++ b/IntelFrameworkPkg/Include/Protocol/LegacyBios.h
> > @@ -1518,6 +1518,40 @@ struct _EFI_LEGACY_BIOS_PROTOCOL {
> > EFI_LEGACY_BIOS_BOOT_UNCONVENTIONAL_DEVICE
> BootUnconventionalDevice;
> >   };
> >
> > +//
> > +// Legacy BIOS needs to access memory in page 0 (0-4095), which is disabled
> if
> > +// NULL pointer detection feature is enabled. Following macro can be used 
> > to
> > +// enable/disable page 0 before/after accessing it.
> > +//
> > +#define ACCESS_PAGE0_CODE(statements)   \
> > +  do {  \
> > +EFI_STATUSStatus_;  \
> > +EFI_GCD_MEMORY_SPACE_DESCRIPTOR   Desc_;\
> > +\
> > +Status_ = gDS->GetMemorySpaceDescriptor (0, _);\
> > +if (!EFI_ERROR (Status_)) { \
> > +  if ((Desc_.Attributes & EFI_MEMORY_RP) != 0) {\
> > +Status_ = gDS->SetMemorySpaceAttributes (   \
> > +0,  \
> > +EFI_PAGES_TO_SIZE(1),   \
> > +Desc_.Attributes &= ~EFI_MEMORY_RP  \
> 
> &= is used here so Desc_.Attributes is updated to have RP cleared.
> Then the below if will be always FALSE.
> 
> > +);  \
> > +ASSERT_EFI_ERROR (Status_); \
> > +  } \
> > +\
> > +  statements;   \
> > +\
> > +  if ((Desc_.Attributes & EFI_MEMORY_RP) != 0) {\
> > +Status_ = gDS->SetMemorySpaceAttributes (   \
> > +0,  \
> > +EFI_PAGES_TO_SIZE(1),   \
> > +Desc_.Attributes\
> > +);  \
> > +ASSERT_EFI_ERROR (Status_); \
> > +  } \
> > +}   \
> > +  } while (FALSE)
> > +
> >   extern EFI_GUID gEfiLegacyBiosProtocolGuid;
> >
> >   #endif
> >
> 
> 
> --
> Thanks,
> Ray
___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel

[edk2] [PATCH] BaseTools/tools_def: add CLANG38 LTO versions for AARCH64 and ARM

[Ard Biesheuvel]

Extend the CLANG38 toolchain definition so it can be used for
ARM and AARCH64 as well. Note that this requires llvm-ar and
the LLVMgold.so linker plugin.

In preparation of doing the same for GCC5, this toolchain version
also departs from the custom of using -O0 for DEBUG builds, which
makes them needlessly slow. Instead, let's add a NOOPT flavor as
well, and enable optimization for DEBUG like the other architectures
do. (Note that this will require some trivial changes to the platform
description files)

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel 
---
 BaseTools/Conf/tools_def.template | 98 +++-
 1 file changed, 95 insertions(+), 3 deletions(-)

diff --git a/BaseTools/Conf/tools_def.template 
b/BaseTools/Conf/tools_def.template
index 91b135c2e569..6ee720d7586e 100755
--- a/BaseTools/Conf/tools_def.template
+++ b/BaseTools/Conf/tools_def.template
@@ -399,8 +399,8 @@ DEFINE DTC_BIN = ENV(DTC_PREFIX)dtc
 #   Intel(r) ACPI Compiler from
 #   https://acpica.org/downloads
 #   CLANG38  -Linux-  Requires:
-# Clang v3.8, LLVMgold plugin and GNU binutils 
2.26 targeting x86_64-linux-gnu
-# Clang v3.9 or later, LLVMgold plugin and GNU 
binutils 2.28 targeting x86_64-linux-gnu
+# Clang v3.8, LLVMgold plugin and GNU binutils 
2.26 targeting x86_64-linux-gnu, aarch64-linux-gnu or arm-linux-gnueabi
+# Clang v3.9 or later, LLVMgold plugin and GNU 
binutils 2.28 targeting x86_64-linux-gnu, aarch64-linux-gnu or arm-linux-gnueabi
 #Optional:
 # Required to build platforms or ACPI tables:
 #   Intel(r) ACPI Compiler from
@@ -5652,6 +5652,7 @@ RELEASE_CLANG35_AARCH64_CC_FLAGS = 
DEF(CLANG35_AARCH64_CC_FLAGS) $(ARCHCC_FLAGS)
 *_CLANG38_*_MAKE_PATH   = make
 *_CLANG38_*_*_DLL   = ENV(CLANG38_DLL)
 *_CLANG38_*_ASL_PATH= DEF(UNIX_IASL_BIN)
+*_CLANG38_*_DTC_PATH= DEF(DTC_BIN)
 
 *_CLANG38_*_APP_FLAGS   =
 *_CLANG38_*_ASL_FLAGS   = DEF(IASL_FLAGS)
@@ -5663,7 +5664,8 @@ DEFINE CLANG38_X64_PREFIX   = ENV(CLANG38_BIN)
 DEFINE CLANG38_IA32_TARGET  = -target i686-pc-linux-gnu
 DEFINE CLANG38_X64_TARGET   = -target x86_64-pc-linux-gnu
 
-DEFINE CLANG38_ALL_CC_FLAGS = DEF(GCC44_ALL_CC_FLAGS) -Wno-empty-body 
-fno-stack-protector -mms-bitfields -Wno-address -Wno-shift-negative-value 
-Wno-parentheses-equality -Wno-unknown-pragmas 
-Wno-tautological-constant-out-of-range-compare 
-Wno-incompatible-library-redeclaration -fno-asynchronous-unwind-tables 
-mno-sse -mno-mmx -msoft-float -mno-implicit-float  
-ftrap-function=undefined_behavior_has_been_optimized_away_by_clang 
-funsigned-char -fno-ms-extensions -Wno-null-dereference 
-Wno-tautological-compare -Wno-unknown-warning-option -Wno-varargs
+DEFINE CLANG38_WARNING_OVERRIDES= -Wno-parentheses-equality 
-Wno-tautological-compare -Wno-tautological-constant-out-of-range-compare 
-Wno-empty-body  -Wno-varargs
+DEFINE CLANG38_ALL_CC_FLAGS = DEF(GCC44_ALL_CC_FLAGS) 
DEF(CLANG38_WARNING_OVERRIDES) -fno-stack-protector -mms-bitfields -Wno-address 
-Wno-shift-negative-value -Wno-unknown-pragmas 
-Wno-incompatible-library-redeclaration -fno-asynchronous-unwind-tables 
-mno-sse -mno-mmx -msoft-float -mno-implicit-float  
-ftrap-function=undefined_behavior_has_been_optimized_away_by_clang 
-funsigned-char -fno-ms-extensions -Wno-null-dereference 
-Wno-unknown-warning-option
 
 ###
 # CLANG38 IA32 definitions
@@ -5739,6 +5741,96 @@ NOOPT_CLANG38_X64_CC_FLAGS = 
DEF(CLANG38_ALL_CC_FLAGS) -m64 "-DEFIAPI=__
 NOOPT_CLANG38_X64_DLINK_FLAGS  = DEF(GCC5_IA32_X64_DLINK_FLAGS) -Wl,-O0 
-Wl,-melf_x86_64 -Wl,--oformat=elf64-x86-64 -Wl,-pie -mcmodel=small
 NOOPT_CLANG38_X64_DLINK2_FLAGS = DEF(GCC5_X64_DLINK2_FLAGS) -O0
 
+##
+# CLANG38 ARM definitions
+##
+DEFINE CLANG38_ARM_TARGET= -target arm-linux-gnueabihf
+DEFINE CLANG38_ARM_CC_FLAGS  = DEF(GCC_ARM_CC_FLAGS) 
DEF(CLANG38_ARM_TARGET) DEF(CLANG38_WARNING_OVERRIDES) -mno-movt
+DEFINE CLANG38_ARM_DLINK_FLAGS   = DEF(CLANG38_ARM_TARGET) 
DEF(GCC_ARM_DLINK_FLAGS)
+
+*_CLANG38_ARM_PP_FLAGS   = DEF(GCC_PP_FLAGS)
+*_CLANG38_ARM_ASLCC_FLAGS= DEF(GCC_ASLCC_FLAGS)
+*_CLANG38_ARM_APP_FLAGS  =
+*_CLANG38_ARM_ASL_FLAGS  = DEF(IASL_FLAGS)
+*_CLANG38_ARM_ASL_OUTFLAGS   = DEF(IASL_OUTFLAGS)
+*_CLANG38_ARM_DTCPP_FLAGS= DEF(GCC_DTCPP_FLAGS)
+
+*_CLANG38_ARM_CC_PATH= ENV(CLANG38_BIN)clang
+*_CLANG38_ARM_ASM_PATH   = ENV(CLANG38_BIN)clang
+*_CLANG38_ARM_PP_PATH= ENV(CLANG38_BIN)clang
+*_CLANG38_ARM_VFRPP_PATH = ENV(CLANG38_BIN)clang

[edk2] [PATCH] ArmVirtPkg: add NOOPT target to platform .DSCs

[Ard Biesheuvel]

In order to allow the ArmVirtPkg platforms to be built using the
NOOPT target, add it explicitly to the BUILD_TARGETS define.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel 
---
 ArmVirtPkg/ArmVirtQemu.dsc   | 2 +-
 ArmVirtPkg/ArmVirtQemuKernel.dsc | 2 +-
 ArmVirtPkg/ArmVirtXen.dsc| 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/ArmVirtPkg/ArmVirtQemu.dsc b/ArmVirtPkg/ArmVirtQemu.dsc
index f09226671827..76a83b99a303 100644
--- a/ArmVirtPkg/ArmVirtQemu.dsc
+++ b/ArmVirtPkg/ArmVirtQemu.dsc
@@ -25,7 +25,7 @@ [Defines]
   DSC_SPECIFICATION  = 0x00010005
   OUTPUT_DIRECTORY   = Build/ArmVirtQemu-$(ARCH)
   SUPPORTED_ARCHITECTURES= AARCH64|ARM
-  BUILD_TARGETS  = DEBUG|RELEASE
+  BUILD_TARGETS  = DEBUG|RELEASE|NOOPT
   SKUID_IDENTIFIER   = DEFAULT
   FLASH_DEFINITION   = ArmVirtPkg/ArmVirtQemu.fdf
 
diff --git a/ArmVirtPkg/ArmVirtQemuKernel.dsc b/ArmVirtPkg/ArmVirtQemuKernel.dsc
index cc2c5a50c925..7d9a9196d640 100644
--- a/ArmVirtPkg/ArmVirtQemuKernel.dsc
+++ b/ArmVirtPkg/ArmVirtQemuKernel.dsc
@@ -25,7 +25,7 @@ [Defines]
   DSC_SPECIFICATION  = 0x00010005
   OUTPUT_DIRECTORY   = Build/ArmVirtQemuKernel-$(ARCH)
   SUPPORTED_ARCHITECTURES= AARCH64|ARM
-  BUILD_TARGETS  = DEBUG|RELEASE
+  BUILD_TARGETS  = DEBUG|RELEASE|NOOPT
   SKUID_IDENTIFIER   = DEFAULT
   FLASH_DEFINITION   = ArmVirtPkg/ArmVirtQemuKernel.fdf
 
diff --git a/ArmVirtPkg/ArmVirtXen.dsc b/ArmVirtPkg/ArmVirtXen.dsc
index 9b3cc2bd5a10..175b56d10c8f 100644
--- a/ArmVirtPkg/ArmVirtXen.dsc
+++ b/ArmVirtPkg/ArmVirtXen.dsc
@@ -25,7 +25,7 @@ [Defines]
   DSC_SPECIFICATION  = 0x00010005
   OUTPUT_DIRECTORY   = Build/ArmVirtXen-$(ARCH)
   SUPPORTED_ARCHITECTURES= AARCH64|ARM
-  BUILD_TARGETS  = DEBUG|RELEASE
+  BUILD_TARGETS  = DEBUG|RELEASE|NOOPT
   SKUID_IDENTIFIER   = DEFAULT
   FLASH_DEFINITION   = ArmVirtPkg/ArmVirtXen.fdf
 
-- 
2.11.0

___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel

[edk2] [PATCH v2 3/6] MdePkg/Library/BaseLib: Enable VS2017/ARM builds

[Pete Batard]

Most of the RVCT assembly can be reused as is for MSFT except
for CpuBreakpoint.asm, which we need to force to Arm mode.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Pete Batard 
---
 MdePkg/Library/BaseLib/Arm/CpuBreakpoint.asm |  5 -
 MdePkg/Library/BaseLib/BaseLib.inf   | 16 +---
 2 files changed, 17 insertions(+), 4 deletions(-)

diff --git a/MdePkg/Library/BaseLib/Arm/CpuBreakpoint.asm 
b/MdePkg/Library/BaseLib/Arm/CpuBreakpoint.asm
index 8a8065159bf2..2e508d6f1ad8 100644
--- a/MdePkg/Library/BaseLib/Arm/CpuBreakpoint.asm
+++ b/MdePkg/Library/BaseLib/Arm/CpuBreakpoint.asm
@@ -16,7 +16,10 @@
 
 EXPORT CpuBreakpoint
 
-  AREA Cpu_Breakpoint, CODE, READONLY
+; Force ARM mode for this section, as MSFT assembler defaults to THUMB
+  AREA Cpu_Breakpoint, CODE, READONLY, ARM
+
+ARM
 
 ;/**
 ;  Generates a breakpoint on the CPU.
diff --git a/MdePkg/Library/BaseLib/BaseLib.inf 
b/MdePkg/Library/BaseLib/BaseLib.inf
index 320ac457ea3d..a81d56f61421 100644
--- a/MdePkg/Library/BaseLib/BaseLib.inf
+++ b/MdePkg/Library/BaseLib/BaseLib.inf
@@ -821,8 +821,9 @@ [Sources.EBC]
 [Sources.ARM]
   Arm/InternalSwitchStack.c
   Arm/Unaligned.c
-  Math64.c   | RVCT 
-
+  Math64.c   | RVCT
+  Math64.c   | MSFT
+
   Arm/SwitchStack.asm| RVCT
   Arm/SetJumpLongJump.asm| RVCT
   Arm/DisableInterrupts.asm  | RVCT
@@ -831,7 +832,16 @@ [Sources.ARM]
   Arm/CpuPause.asm   | RVCT
   Arm/CpuBreakpoint.asm  | RVCT
   Arm/MemoryFence.asm| RVCT
- 
+
+  Arm/SwitchStack.asm| MSFT
+  Arm/SetJumpLongJump.asm| MSFT
+  Arm/DisableInterrupts.asm  | MSFT
+  Arm/EnableInterrupts.asm   | MSFT
+  Arm/GetInterruptsState.asm | MSFT
+  Arm/CpuPause.asm   | MSFT
+  Arm/CpuBreakpoint.asm  | MSFT
+  Arm/MemoryFence.asm| MSFT
+
   Arm/Math64.S  | GCC
   Arm/SwitchStack.S | GCC
   Arm/EnableInterrupts.S| GCC
-- 
2.9.3.windows.2

___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel

[edk2] [PATCH v2 5/6] MdePkg/Include: Add VA list support for VS2017/ARM

[Pete Batard]

VA_START, VA_END and VA_COPY are the same as the generic macros.
VA_ARG was reverse engineered from MS ARM assembly output.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Pete Batard 
---
 MdePkg/Include/Base.h | 13 +
 1 file changed, 13 insertions(+)

diff --git a/MdePkg/Include/Base.h b/MdePkg/Include/Base.h
index 02140a5ac2ee..f3467ecdc22f 100644
--- a/MdePkg/Include/Base.h
+++ b/MdePkg/Include/Base.h
@@ -631,6 +631,19 @@ struct _LIST_ENTRY {
 
 #define VA_COPY(Dest, Start)  __va_copy (Dest, Start)
 
+#elif defined(_M_ARM)
+//
+// MSFT ARM variable argument list support.
+// Same as the generic macros below, except for VA_ARG that needs extra 
adjustment.
+//
+
+typedef char* VA_LIST;
+
+#define VA_START(Marker, Parameter) (Marker = (VA_LIST) ((UINTN) & 
(Parameter) + _INT_SIZE_OF(Parameter)))
+#define VA_ARG(Marker, TYPE)(*(TYPE *) ((Marker += 
_INT_SIZE_OF(TYPE) + ((-(INTN)Marker) & (sizeof(TYPE) - 1))) - _INT_SIZE_OF 
(TYPE)))
+#define VA_END(Marker)  (Marker = (VA_LIST) 0)
+#define VA_COPY(Dest, Start)((void)((Dest) = (Start)))
+
 #elif defined(__GNUC__)
 
 #if defined(MDE_CPU_X64) && !defined(NO_MSABI_VA_FUNCS)
-- 
2.9.3.windows.2

___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel

[edk2] [PATCH v2 6/6] BaseTools/Conf: Add VS2017/ARM support

[Pete Batard]

We duplicate the Assembly-Code-File section from build_rule.template
because --convert-hex cannot be used with the MSFT ARM assembler.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Pete Batard 
---
 BaseTools/Conf/build_rule.template | 31 +++-
 BaseTools/Conf/tools_def.template  | 28 ++
 2 files changed, 58 insertions(+), 1 deletion(-)

diff --git a/BaseTools/Conf/build_rule.template 
b/BaseTools/Conf/build_rule.template
index 3e6aa8ff0f34..6ea14fb7aa02 100755
--- a/BaseTools/Conf/build_rule.template
+++ b/BaseTools/Conf/build_rule.template
@@ -182,7 +182,6 @@
 
 
 
-
 [Assembly-Code-File.COMMON.COMMON]
 
 ?.asm, ?.Asm, ?.ASM
@@ -207,6 +206,36 @@
 # For RVCTCYGWIN ASM_FLAGS must be first to work around pathing issues
 "$(ASM)" $(ASM_FLAGS) -o ${dst} $(INC) ${d_path}(+)${s_base}.iii
 
+[Assembly-Code-File.COMMON.ARM]
+# Remove --convert-hex for ARM as it breaks MSFT assemblers
+
+?.asm, ?.Asm, ?.ASM
+
+
+?.S, ?.s
+
+
+$(MAKE_FILE)
+
+
+$(OUTPUT_DIR)(+)${s_dir}(+)${s_base}.obj
+
+
+"$(PP)" $(PP_FLAGS) $(INC) ${src} > ${d_path}(+)${s_base}.i
+Trim --source-code --convert-hex --trim-long -o 
${d_path}(+)${s_base}.iii ${d_path}(+)${s_base}.i
+"$(ASM)" /Fo${dst} $(ASM_FLAGS) /I${s_path} $(INC) 
${d_path}(+)${s_base}.iii
+
+
+"$(PP)" $(PP_FLAGS) $(INC) ${src} > ${d_path}(+)${s_base}.i
+Trim --source-code --trim-long -o ${d_path}(+)${s_base}.iii 
${d_path}(+)${s_base}.i
+"$(ASM)" /Fo${dst} $(ASM_FLAGS) /I${s_path} $(INC) 
${d_path}(+)${s_base}.iii
+
+
+"$(PP)" $(PP_FLAGS) $(INC) ${src} > ${d_path}(+)${s_base}.i
+Trim --trim-long --source-code -o ${d_path}(+)${s_base}.iii 
${d_path}(+)${s_base}.i
+# For RVCTCYGWIN ASM_FLAGS must be first to work around pathing issues
+"$(ASM)" $(ASM_FLAGS) -o ${dst} $(INC) ${d_path}(+)${s_base}.iii
+
 [Nasm-Assembly-Code-File.COMMON.COMMON]
 
 ?.nasm
diff --git a/BaseTools/Conf/tools_def.template 
b/BaseTools/Conf/tools_def.template
index 91b135c2e569..1b888aa842e2 100755
--- a/BaseTools/Conf/tools_def.template
+++ b/BaseTools/Conf/tools_def.template
@@ -79,6 +79,7 @@ DEFINE VS2017_HOST= x86
 DEFINE VS2017_BIN_HOST= 
DEF(VS2017_BIN)\HostDEF(VS2017_HOST)\DEF(VS2017_HOST)
 DEFINE VS2017_BIN_IA32= DEF(VS2017_BIN)\HostDEF(VS2017_HOST)\x86
 DEFINE VS2017_BIN_X64 = DEF(VS2017_BIN)\HostDEF(VS2017_HOST)\x64
+DEFINE VS2017_BIN_ARM = DEF(VS2017_BIN)\HostDEF(VS2017_HOST)\arm
 
 DEFINE WINSDK_BIN   = ENV(WINSDK_PREFIX)
 DEFINE WINSDKx86_BIN= ENV(WINSDKx86_PREFIX)
@@ -4169,6 +4170,33 @@ NOOPT_VS2017_X64_NASM_FLAGS = -O0 -f win64 -g
 RELEASE_VS2017_X64_DLINK_FLAGS  = /NOLOGO /NODEFAULTLIB /IGNORE:4001 
/IGNORE:4254 /OPT:REF /OPT:ICF=10 /MAP /ALIGN:32 /SECTION:.xdata,D 
/SECTION:.pdata,D /Machine:X64 /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) 
/SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER 
/MERGE:.rdata=.data
 NOOPT_VS2017_X64_DLINK_FLAGS= /NOLOGO /NODEFAULTLIB /IGNORE:4001 /OPT:REF 
/OPT:ICF=10 /MAP /ALIGN:32 /SECTION:.xdata,D /SECTION:.pdata,D /Machine:X64 
/LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER 
/SAFESEH:NO /BASE:0 /DRIVER /DEBUG
 
+#
+# ARM definitions
+#
+*_VS2017_ARM_CC_PATH  = DEF(VS2017_BIN_ARM)\cl.exe
+*_VS2017_ARM_VFRPP_PATH   = DEF(VS2017_BIN_ARM)\cl.exe
+*_VS2017_ARM_SLINK_PATH   = DEF(VS2017_BIN_ARM)\lib.exe
+*_VS2017_ARM_DLINK_PATH   = DEF(VS2017_BIN_ARM)\link.exe
+*_VS2017_ARM_APP_PATH = DEF(VS2017_BIN_ARM)\cl.exe
+*_VS2017_ARM_PP_PATH  = DEF(VS2017_BIN_ARM)\cl.exe
+*_VS2017_ARM_ASM_PATH = DEF(VS2017_BIN_ARM)\armasm.exe
+*_VS2017_ARM_ASLCC_PATH   = DEF(VS2017_BIN_ARM)\cl.exe
+*_VS2017_ARM_ASLPP_PATH   = DEF(VS2017_BIN_ARM)\cl.exe
+*_VS2017_ARM_ASLDLINK_PATH= DEF(VS2017_BIN_ARM)\link.exe
+
+  *_VS2017_ARM_MAKE_FLAGS = /nologo
+  DEBUG_VS2017_ARM_CC_FLAGS   = /nologo /c /WX /GS- /W4 /Gs32768 /D 
UNICODE /O1b2 /GL /FIAutoGen.h /EHs-c- /GR- /GF /Gy /Zi /Gm /Gw /Oi-
+RELEASE_VS2017_ARM_CC_FLAGS   = /nologo /c /WX /GS- /W4 /Gs32768 /D 
UNICODE /O1b2 /GL /FIAutoGen.h /EHs-c- /GR- /GF /Gw /Oi-
+NOOPT_VS2017_ARM_CC_FLAGS = /nologo /c /WX /GS- /W4 /Gs32768 /D 
UNICODE /FIAutoGen.h /EHs-c- /GR- /GF /Gy /Zi /Gm /Od /Oi-
+
+  DEBUG_VS2017_ARM_ASM_FLAGS  = /nologo /g
+RELEASE_VS2017_ARM_ASM_FLAGS  = /nologo
+NOOPT_VS2017_ARM_ASM_FLAGS= /nologo
+
+  DEBUG_VS2017_ARM_DLINK_FLAGS= /NOLOGO /NODEFAULTLIB /IGNORE:4001 
/OPT:REF /OPT:ICF=10 /MAP /SECTION:.xdata,D /SECTION:.pdata,D /MACHINE:ARM 
/LTCG /DLL 

[edk2] [PATCH v2 4/6] ArmPkg/Library/CompilerIntrinsicsLib: Enable VS2017/ARM builds

[Pete Batard]

Introduce CRT assembly replacements for __rt_sdiv, __rt_udiv,
__rt_udiv64, __rt_sdiv64, __rt_srsh, memcpy and memset.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Pete Batard 
---
 ArmPkg/Library/CompilerIntrinsicsLib/Arm/rtdiv.asm | 255 

 ArmPkg/Library/CompilerIntrinsicsLib/Arm/rtsrsh.asm|  45 
 ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf |  13 +-
 ArmPkg/Library/CompilerIntrinsicsLib/memcpy_ms.c   |  34 +++
 ArmPkg/Library/CompilerIntrinsicsLib/memset_ms.c   |  33 +++
 5 files changed, 378 insertions(+), 2 deletions(-)

diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/rtdiv.asm 
b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/rtdiv.asm
new file mode 100644
index ..096dc6317318
--- /dev/null
+++ b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/rtdiv.asm
@@ -0,0 +1,255 @@
+///** @file
+//
+//  This code provides replacement for MSVC CRT division functions
+//
+//  Copyright (c) 2017, Pete Batard. All rights reserved.
+//  Based on generated assembly of ReactOS' sdk/lib/crt/math/arm/__rt_###div.c,
+//  Copyright (c) Timo Kreuzer. All rights reserved.
+//
+//  This program and the accompanying materials
+//  are licensed and made available under the terms and conditions of the BSD 
License
+//  which accompanies this distribution.  The full text of the license may be 
found at
+//  http://opensource.org/licenses/bsd-license.php
+//
+//  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+//  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR 
IMPLIED.
+//
+//**/
+
+  EXPORT _fltused
+  EXPORT __brkdiv0
+
+  EXPORT __rt_sdiv
+  EXPORT __rt_udiv
+  EXPORT __rt_udiv64
+  EXPORT __rt_sdiv64
+
+  AREA  Math, CODE, READONLY
+
+_fltused
+dcd 0x9875
+
+__brkdiv0
+udf #249
+
+//
+// uint64_t __rt_udiv(uint32_t divisor, uint32_t dividend)
+//
+
+__rt_udiv
+  cmp r0, #0
+  beq __brkdiv0
+  push{r3-r5,lr}
+  mov r5,r0
+  mov r4,r1
+  cmp r5,r4
+  it  hi
+  movhi   r0,#0
+  bhi __rt_udiv_label3
+  clz r2,r5
+  clz r3,r4
+  subsr3,r2,r3
+  movsr1,#1
+  lsl r2,r5,r3
+  lsl r3,r1,r3
+  movsr0,#0
+__rt_udiv_label1
+  cmp r4,r2
+  bcc __rt_udiv_label2
+  orrsr0,r0,r3
+  subsr4,r4,r2
+__rt_udiv_label2
+  lsrsr2,r2,#1
+  lsrsr3,r3,#1
+  bne __rt_udiv_label1
+__rt_udiv_label3
+  mov r1,r4
+  pop {r3-r5,pc}
+
+//
+// uint64_t __rt_sdiv(int32_t divisor, int32_t dividend)
+//
+
+__rt_sdiv
+  cmp r0, #0
+  beq __brkdiv0
+  push{r4-r6,lr}
+  mov r4,r1
+  andsr6,r0,#0x8000
+  it  ne
+  rsbne   r4,r4,#0
+  mov r5,r0
+  rsbsr5,r5,#0
+  cmp r5,r4
+  it  hi
+  movhi   r0,#0
+  bhi __rt_sdiv_label3
+  clz r2,r5
+  clz r3,r4
+  subsr3,r2,r3
+  movsr1,#1
+  lsl r2,r5,r3
+  lsl r3,r1,r3
+  movsr0,#0
+__rt_sdiv_label1
+  cmp r4,r2
+  bcc __rt_sdiv_label2
+  orrsr0,r0,r3
+  subsr4,r4,r2
+__rt_sdiv_label2
+  lsrsr2,r2,#1
+  lsrsr3,r3,#1
+  bne __rt_sdiv_label1
+__rt_sdiv_label3
+  cbz r6,__rt_sdiv_label4
+  rsbsr4,r4,#0
+__rt_sdiv_label4
+  mov r1,r4
+  pop {r4-r6,pc}
+
+//
+// typedef struct {
+//   uint64_t quotient;
+//   uint64_t modulus;
+// } udiv64_result_t;
+//
+// void __rt_udiv64_internal(udiv64_result_t *result, uint64_t divisor, 
uint64_t dividend)
+//
+
+__rt_udiv64_internal
+  orrsr1,r2,r3
+  beq __brkdiv0
+  push{r4-r8,lr}
+  mov r7,r3
+  mov r6,r2
+  mov r4,r0
+  ldrdr0,r5,[sp,#0x18]
+  cmp r7,r5
+  bcc __rt_udiv64_internal_label2
+  bhi __rt_udiv64_internal_label1
+  cmp r6,r0
+  bls __rt_udiv64_internal_label2
+__rt_udiv64_internal_label1
+  movsr3,#0
+  strdr3,r3,[r4]
+  b   __rt_udiv64_internal_label8
+__rt_udiv64_internal_label2
+  clz r2,r7
+  cmp r2,#0x20
+  bne __rt_udiv64_internal_label3
+  clz r3,r6
+  add r2,r2,r3
+__rt_udiv64_internal_label3
+  clz r1,r5 ;
+  cmp r1,#0x20
+  bne __rt_udiv64_internal_label4
+  clz r3,r0
+  add r1,r1,r3
+__rt_udiv64_internal_label4
+  subsr1,r2,r1
+  rsb r3,r1,#0x20
+  lsr r3,r6,r3
+  lsl r2,r7,r1
+  orrsr2,r2,r3
+  sub r3,r1,#0x20
+  lsl r3,r6,r3
+  orrsr2,r2,r3
+  lsl r7,r6,r1
+  sub r3,r1,#0x20
+  movsr6,#1
+  lslsr6,r6,r3
+  movsr3,#1
+  mov lr,#0
+  lsl r1,r3,r1
+  mov r8,lr
+__rt_udiv64_internal_label5
+  cmp r5,r2
+  bcc 

[edk2] [PATCH v2 1/6] MdePkg: Disable some Level 4 warnings for VS2017/ARM

[Pete Batard]

We disable the exact same warnings as IA32 and X64.

Also create a dummy macro for PRESERVE8, as this is not supported by
the Microsoft ARM assembler.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Pete Batard 
---
 MdePkg/Include/Arm/ProcessorBind.h | 96 +++-
 1 file changed, 75 insertions(+), 21 deletions(-)

diff --git a/MdePkg/Include/Arm/ProcessorBind.h 
b/MdePkg/Include/Arm/ProcessorBind.h
index dde1fd1152ba..0700e4a4c50a 100644
--- a/MdePkg/Include/Arm/ProcessorBind.h
+++ b/MdePkg/Include/Arm/ProcessorBind.h
@@ -1,15 +1,15 @@
 /** @file
   Processor or Compiler specific defines and types for ARM.
 
-  Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.
+  Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.
   Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
-  This program and the accompanying materials  
-  are licensed and made available under the terms and conditions of the BSD 
License 
-  which accompanies this distribution.  The full text of the license may be 
found at
-  http://opensource.org/licenses/bsd-license.php   
 
+  This program and the accompanying materials
+  are licensed and made available under the terms and conditions of the BSD 
License
+  which accompanies this distribution.  The full text of the license may be 
found at
+  http://opensource.org/licenses/bsd-license.php
 
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
 
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR 
IMPLIED. 
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 
 **/
 
@@ -28,14 +28,63 @@
 #pragma pack()
 #endif
 
+#if defined(_MSC_EXTENSIONS)
+
 //
-// RVCT does not support the __builtin_unreachable() macro
+// Disable some level 4 compilation warnings (same as IA32 and X64)
 //
-#ifdef __ARMCC_VERSION
+
+//
+// Disabling bitfield type checking warnings.
+//
+#pragma warning ( disable : 4214 )
+
+//
+// Disabling the unreferenced formal parameter warnings.
+//
+#pragma warning ( disable : 4100 )
+
+//
+// Disable slightly different base types warning as CHAR8 * can not be set
+// to a constant string.
+//
+#pragma warning ( disable : 4057 )
+
+//
+// ASSERT(FALSE) or while (TRUE) are legal constructs so suppress this warning
+//
+#pragma warning ( disable : 4127 )
+
+//
+// This warning is caused by functions defined but not used. For precompiled 
header only.
+//
+#pragma warning ( disable : 4505 )
+
+//
+// This warning is caused by empty (after preprocessing) source file. For 
precompiled header only.
+//
+#pragma warning ( disable : 4206 )
+
+//
+// Disable 'potentially uninitialized local variable X used' warnings
+//
+#pragma warning ( disable : 4701 )
+
+//
+// Disable 'potentially uninitialized local pointer variable X used' warnings
+//
+#pragma warning ( disable : 4703 )
+
+#endif
+
+//
+// RVCT and MSFT don't support the __builtin_unreachable() macro
+//
+#if defined(__ARMCC_VERSION) || defined(_MSC_EXTENSIONS)
 #define UNREACHABLE()
 #endif
 
-#if _MSC_EXTENSIONS 
+#if defined(_MSC_EXTENSIONS)
   //
   // use Microsoft* C compiler dependent integer width types
   //
@@ -52,7 +101,7 @@
   typedef signed char INT8;
 #else
   //
-  // Assume standard ARM alignment. 
+  // Assume standard ARM alignment.
   // Need to check portability of long long
   //
   typedef unsigned long long  UINT64;
@@ -121,7 +170,7 @@ typedef INT32   INTN;
 // use the correct C calling convention. All protocol member functions and
 // EFI intrinsics are required to modify their member functions with EFIAPI.
 //
-#define EFIAPI
+#define EFIAPI
 
 // When compiling with Clang, we still use GNU as for the assembler, so we 
still
 // need to define the GCC_ASM* macros.
@@ -142,34 +191,39 @@ typedef INT32   INTN;
 
 #define GCC_ASM_EXPORT(func__)  \
  .global  _CONCATENATE (__USER_LABEL_PREFIX__, func__);\
- .type ASM_PFX(func__), %function  
+ .type ASM_PFX(func__), %function
 
 #define GCC_ASM_IMPORT(func__)  \
  .extern  _CONCATENATE (__USER_LABEL_PREFIX__, func__)
- 
+
   #else
 //
-// .type not supported by Apple Xcode tools 
+// .type not supported by Apple Xcode tools
 //
-#define INTERWORK_FUNC(func__)  
+#define INTERWORK_FUNC(func__)
 
 #define GCC_ASM_EXPORT(func__)  \
  .globl  _CONCATENATE (__USER_LABEL_PREFIX__, func__)\
-  
-#define GCC_ASM_IMPORT(name)  
+
+#define GCC_ASM_IMPORT(name)
 
   #endif
+#elif defined(_MSC_EXTENSIONS)
+  //
+  // PRESERVE8 is not supported by the MSFT assembler.
+  //
+  #define PRESERVE8
 #endif
 
 /**
   Return the pointer to the first instruction of a function given a function 

[edk2] [PATCH v2 2/6] MdePkg/Library/BaseStackCheckLib: Add Null handler for VS2017/ARM

[Pete Batard]

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Pete Batard 
---
 MdePkg/Library/BaseStackCheckLib/BaseStackCheckLib.inf |  5 +++--
 MdePkg/Library/BaseStackCheckLib/BaseStackCheckNull.c  | 18 ++
 2 files changed, 21 insertions(+), 2 deletions(-)

diff --git a/MdePkg/Library/BaseStackCheckLib/BaseStackCheckLib.inf 
b/MdePkg/Library/BaseStackCheckLib/BaseStackCheckLib.inf
index d02d97107b08..e280651b1199 100644
--- a/MdePkg/Library/BaseStackCheckLib/BaseStackCheckLib.inf
+++ b/MdePkg/Library/BaseStackCheckLib/BaseStackCheckLib.inf
@@ -30,8 +30,9 @@ [Defines]
 #
 
 [Sources]
-  BaseStackCheckGcc.c | GCC
-  BaseStackCheckGcc.c | RVCT
+  BaseStackCheckGcc.c  | GCC
+  BaseStackCheckGcc.c  | RVCT
+  BaseStackCheckNull.c | MSFT
 
 [Packages]
   MdePkg/MdePkg.dec
diff --git a/MdePkg/Library/BaseStackCheckLib/BaseStackCheckNull.c 
b/MdePkg/Library/BaseStackCheckLib/BaseStackCheckNull.c
new file mode 100644
index ..fb2f65929d3e
--- /dev/null
+++ b/MdePkg/Library/BaseStackCheckLib/BaseStackCheckNull.c
@@ -0,0 +1,18 @@
+/*++
+
+ Copyright (c) 2017, Intel Corporation. All rights reserved.
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD 
License
+ which accompanies this distribution.  The full text of the license may be 
found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+Abstract:
+
+  This file is purely empty as a work around for BaseStackCheck to pass MSVC 
build.
+
+**/
+
+extern int __BaseStackCheckNull;
-- 
2.9.3.windows.2

___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel

[edk2] [PATCH v2 0/6] Add ARM support for VS2017

[Pete Batard]

This is a v2 of the previous patch, that takes into account the alignment
of suppressed level 4 warnings between IA32, X64 and ARM, and that also
removes compiler options that weren't actually needed.

The following series adds ARM compilation support for the VS2017 toolchain.
* PATCH 1 targets the disabling of VS Level 4 warnings. The disabled warnings
  for ARM are now aligned with IA32 and X64.
* PATCH 2 adds a NULL handler for the base stack check, since this is a GCC
  functionality.
* PATCH 3 updates MdePkg/Library/BaseLib so that the RVCT assembly sources
  are also used for MSFT.
* PATCH 4 adds the required compiler intrinsics replacements for division,
  shift and memset/memcpy.
* PATCH 5 adds variable argument handlers for print output. Note that this
  is done without relying on any external headers, with the VA_ARG macro
  having been reverse engineered from MSFT ARM assembly output.
* PATCH 6 enables the selection of ARM in the conf templates.

With these patches, VS2017 toolchain users should be able to compile
regular UEFI ARM applications using EDK2. Note that, unlike ARM64 support,
ARM support does not require a specific update of Visual Studio 2017, as
the ARM toolchain has been available from the very first release.

Additional notes:

We tested compiling and running the full UEFI Shell with this series, as
well as a small set of applications and drivers, and found no issues.
With an additional patch [1], it is also possible to use this proposal to
compile a complete QEMU ARM firmware. As the patch shows, the changes that
need to be applied to the EDK2 sources to achieve this are actually very
minimal.

However, the generated firmware does not currently boot, possibly because
of the following warnings being generated by the MS compiler:
- ArmCpuDxe.dll : warning LNK4072: section count 118 exceeds max (96); image 
may not run
- UiApp.dll : warning LNK4072: section count 113 exceeds max (96); image may 
not run

As far as I could see, the section count max is hardcoded so a workaround
would be needed to address those.

Also, because the VS2017 ARM compiler forces a section alignment of 4096
bytes (which in turn forces use to use /FILEALIGN:4096 as a linker option
for the firmware generation), the generated firmware exceeds 2MB and we
had to double its size to 4MB.

At this stage, since the goal of this series is to allow users to compile
regular ARM UEFI applications using the VS2017 toolchain, I have non plans
to spend more time on the QEMU firmware issues, especially as I suspect 
that reducing the firmware size back to 2 MB may not be achievable without
Microsoft altering their compiler. I am however hopeful that ARM
specialists can take this matter over eventually...

Regards,

/Pete

[1] 
https://github.com/pbatard/edk2/commit/c4ce41094a46f4f3dc7ccc64a90604813f037b13


Pete Batard (6):
  MdePkg: Disable some Level 4 warnings for VS2017/ARM
  MdePkg/Library/BaseStackCheckLib: Add Null handler for VS2017/ARM
  MdePkg/Library/BaseLib: Enable VS2017/ARM builds
  ArmPkg/Library/CompilerIntrinsicsLib: Enable VS2017/ARM builds
  MdePkg/Include: Add VA list support for VS2017/ARM
  BaseTools/Conf: Add VS2017/ARM support

 ArmPkg/Library/CompilerIntrinsicsLib/Arm/rtdiv.asm | 255 

 ArmPkg/Library/CompilerIntrinsicsLib/Arm/rtsrsh.asm|  45 
 ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf |  13 +-
 ArmPkg/Library/CompilerIntrinsicsLib/memcpy_ms.c   |  34 +++
 ArmPkg/Library/CompilerIntrinsicsLib/memset_ms.c   |  33 +++
 BaseTools/Conf/build_rule.template |  31 ++-
 BaseTools/Conf/tools_def.template  |  28 +++
 MdePkg/Include/Arm/ProcessorBind.h |  96 ++--
 MdePkg/Include/Base.h  |  13 +
 MdePkg/Library/BaseLib/Arm/CpuBreakpoint.asm   |   5 +-
 MdePkg/Library/BaseLib/BaseLib.inf |  16 +-
 MdePkg/Library/BaseStackCheckLib/BaseStackCheckLib.inf |   5 +-
 MdePkg/Library/BaseStackCheckLib/BaseStackCheckNull.c  |  18 ++
 13 files changed, 562 insertions(+), 30 deletions(-)
 create mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/Arm/rtdiv.asm
 create mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/Arm/rtsrsh.asm
 create mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/memcpy_ms.c
 create mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/memset_ms.c
 create mode 100644 MdePkg/Library/BaseStackCheckLib/BaseStackCheckNull.c

-- 
2.9.3.windows.2

___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel

[edk2] [Patch 3/3] BaseTools: enable hash value check for single module build

[Yonghong Zhu]

This patch enables hash value check for single module build to decide
whether we can skip to build this module.

Cc: Liming Gao 
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Yonghong Zhu 
---
 BaseTools/Source/Python/build/build.py | 5 -
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/BaseTools/Source/Python/build/build.py 
b/BaseTools/Source/Python/build/build.py
index 457f6c9..8cf139c 100644
--- a/BaseTools/Source/Python/build/build.py
+++ b/BaseTools/Source/Python/build/build.py
@@ -1843,10 +1843,14 @@ class Build():
 Pa = PlatformAutoGen(Wa, self.PlatformFile, BuildTarget, 
ToolChain, Arch)
 for Module in Pa.Platform.Modules:
 if self.ModuleFile.Dir == Module.Dir and 
self.ModuleFile.Name == Module.Name:
 Ma = ModuleAutoGen(Wa, Module, BuildTarget, 
ToolChain, Arch, self.PlatformFile)
 if Ma == None: continue
+MaList.append(Ma)
+if Ma.CanSkipbyHash():
+self.HashSkipModules.append(Ma)
+continue
 # Not to auto-gen for targets 'clean', 'cleanlib', 
'cleanall', 'run', 'fds'
 if self.Target not in ['clean', 'cleanlib', 
'cleanall', 'run', 'fds']:
 # for target which must generate AutoGen code 
and makefile
 if not self.SkipAutoGen or self.Target == 
'genc':
 Ma.CreateCodeFile(True)
@@ -1854,11 +1858,10 @@ class Build():
 if CmdListDict and self.Fdf and 
(Module.File, Arch) in CmdListDict:
 Ma.CreateMakeFile(True, 
CmdListDict[Module.File, Arch])
 del CmdListDict[Module.File, Arch]
 else:
 Ma.CreateMakeFile(True)
-MaList.append(Ma)
 self.BuildModules.append(Ma)
 self.AutoGenTime += int(round((time.time() - 
AutoGenStart)))
 MakeStart = time.time()
 for Ma in self.BuildModules:
 if not Ma.IsBinaryModule:
-- 
2.6.1.windows.1

___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel

[edk2] [Patch 2/3] BaseTools: back up the binary files when hash value is same

[Yonghong Zhu]

We meet the case that first build with --hash option, then build it
again with --hash and --binary-destination option, since the hash value
is same, tool will not build the driver again, it cause the binary
files are not backed up.

Cc: Liming Gao 
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Yonghong Zhu 
---
 BaseTools/Source/Python/AutoGen/AutoGen.py | 22 +-
 BaseTools/Source/Python/build/build.py |  5 +
 2 files changed, 22 insertions(+), 5 deletions(-)

diff --git a/BaseTools/Source/Python/AutoGen/AutoGen.py 
b/BaseTools/Source/Python/AutoGen/AutoGen.py
index 8ad385a..740bd4f 100644
--- a/BaseTools/Source/Python/AutoGen/AutoGen.py
+++ b/BaseTools/Source/Python/AutoGen/AutoGen.py
@@ -2706,21 +2706,21 @@ class ModuleAutoGen(AutoGen):
 #   @param  Target  Build target (DEBUG, RELEASE)
 #   @param  Toolchain   Name of tool chain
 #   @param  ArchThe arch the module supports
 #   @param  PlatformFilePlatform meta-file
 #
-def _Init(self, Workspace, ModuleFile, Target, Toolchain, Arch, 
PlatformFile):
+def _Init(self, Workspace, ModuleFile, Target, Toolchain, Arch, 
PlatformFile, Flag=False):
 EdkLogger.debug(EdkLogger.DEBUG_9, "AutoGen module [%s] [%s]" % 
(ModuleFile, Arch))
 GlobalData.gProcessingFile = "%s [%s, %s, %s]" % (ModuleFile, Arch, 
Toolchain, Target)
 
 self.Workspace = Workspace
 self.WorkspaceDir = Workspace.WorkspaceDir
-
+self.Flag = Flag
 self.MetaFile = ModuleFile
 self.PlatformInfo = PlatformAutoGen(Workspace, PlatformFile, Target, 
Toolchain, Arch)
 # check if this module is employed by active platform
-if not self.PlatformInfo.ValidModule(self.MetaFile):
+if not self.Flag and not self.PlatformInfo.ValidModule(self.MetaFile):
 EdkLogger.verbose("Module [%s] for [%s] is not employed by active 
platform\n" \
   % (self.MetaFile, Arch))
 return False
 
 self.SourceDir = self.MetaFile.SubDir
@@ -2828,10 +2828,13 @@ class ModuleAutoGen(AutoGen):
 
 return self._FixedAtBuildPcds
 
 def _GetUniqueBaseName(self):
 BaseName = self.Name
+# when self.Flag is true, the module is Asbuilt inf in the build output
+if self.Flag:
+return BaseName
 for Module in self.PlatformInfo.ModuleAutoGenList:
 if Module.MetaFile == self.MetaFile:
 continue
 if Module.Name == self.Name:
 if uuid.UUID(Module.Guid) == uuid.UUID(self.Guid):
@@ -3836,11 +3839,17 @@ class ModuleAutoGen(AutoGen):
 fInputfile.close ()
 return OutputName
 
 ## Create AsBuilt INF file the module
 #
-def CreateAsBuiltInf(self):
+def CreateAsBuiltInf(self, IsOnlyCopy = False):
+self.OutputFile = []
+if IsOnlyCopy:
+if GlobalData.gBinCacheDest:
+self.CopyModuleToCache()
+return
+
 if self.IsAsBuiltInfCreated:
 return
 
 # Skip the following code for EDK I inf
 if self.AutoGenVersion < 0x00010005:
@@ -3969,11 +3978,10 @@ class ModuleAutoGen(AutoGen):
 AsBuiltInfDict['module_uefi_specification_version'] += 
[self.Specification['UEFI_SPECIFICATION_VERSION']]
 if 'PI_SPECIFICATION_VERSION' in self.Specification:
 AsBuiltInfDict['module_pi_specification_version'] += 
[self.Specification['PI_SPECIFICATION_VERSION']]
 
 OutputDir = self.OutputDir.replace('\\', '/').strip('/')
-self.OutputFile = []
 for Item in self.CodaTargetList:
 File = Item.Target.Path.replace('\\', 
'/').strip('/').replace(OutputDir, '').strip('/')
 if File not in self.OutputFile:
 self.OutputFile.append(File)
 if Item.Target.Ext.lower() == '.aml':
@@ -4196,12 +4204,16 @@ class ModuleAutoGen(AutoGen):
 ModuleFile = path.join(self.OutputDir, self.Name + '.inf')
 if os.path.exists(HashFile):
 shutil.copy2(HashFile, FileDir)
 if os.path.exists(ModuleFile):
 shutil.copy2(ModuleFile, FileDir)
+if not self.OutputFile:
+Ma = ModuleAutoGen(self.Workspace, PathClass(ModuleFile), 
self.BuildTarget, self.ToolChain, self.Arch, self.Workspace.Platform.MetaFile, 
True)
+self.OutputFile = Ma.BinaryFileList
 if self.OutputFile:
 for File in self.OutputFile:
+File = str(File)
 if not os.path.isabs(File):
 File = os.path.join(self.OutputDir, File)
 if os.path.exists(File):
 shutil.copy2(File, FileDir)
 
diff --git a/BaseTools/Source/Python/build/build.py 
b/BaseTools/Source/Python/build/build.py
index 

[edk2] [Patch 1/3] BaseTools: Not cache the .efi file location into build option

[Yonghong Zhu]

We don't need cache the .efi file location into build option, otherwise
when we change the --binary-destination location, it would cause the
hash value is different.

Cc: Liming Gao 
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Yonghong Zhu 
---
 BaseTools/Source/Python/AutoGen/AutoGen.py | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/BaseTools/Source/Python/AutoGen/AutoGen.py 
b/BaseTools/Source/Python/AutoGen/AutoGen.py
index 1c4c395..8ad385a 100644
--- a/BaseTools/Source/Python/AutoGen/AutoGen.py
+++ b/BaseTools/Source/Python/AutoGen/AutoGen.py
@@ -684,13 +684,10 @@ class WorkspaceAutoGen(AutoGen):
 content += os.linesep
 if self.FdfFile:
 content += 'Flash Image Definition: '
 content += str(self.FdfFile)
 content += os.linesep
-if GlobalData.gBinCacheDest:
-content += 'Cache of .efi location: '
-content += str(GlobalData.gBinCacheDest)
 SaveFileOnChange(os.path.join(self.BuildDir, 'BuildOptions'), content, 
False)
 
 #
 # Create PcdToken Number file for Dynamic/DynamicEx Pcd.
 #
-- 
2.6.1.windows.1

___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel

Re: [edk2] [PATCH v3 1/2] MdeModulePkg/DxeIpl: Mark page table as read-only

[Ni, Ruiyu]

On 12/5/2017 4:16 PM, Jian J Wang wrote:

v3:
Remove the public definition of PAGE_TABLE_POOL_HEADER but keep similar
concept locally. CpuDxe has its own page table pool.



v2:
Introduce page table pool to ease the page table memory allocation and
protection, which replaces the direct calling of AllocatePages().


This patch will set the memory pages used for page table as read-only
memory after the paging is setup. CR0.WP must set to let it take into
effect.

A simple page table memory management mechanism, page table pool concept,
is introduced to simplify the page table memory allocation and protection.
It will also help to reduce the potential recursive "split" action during
updating memory paging attributes.

The basic idea is to allocate a bunch of continuous pages of memory in
advance as one or more page table pools, and all future page tables
consumption will happen in those pool instead of system memory. If the page
pool is reserved at the boundary of 2MB page and with same size of 2MB page,
there's no page granularity "split" operation will be needed, because the
memory of new page tables (if needed) will be usually in the same page as
target page table you're working on.

And since we have centralized page tables (a few 2MB pages), it's easier
to protect them by changing their attributes to be read-only once and for
all. There's no need to apply the protection for new page tables any more
as long as the pool has free pages available.

Once current page table pool has been used up, one can allocate another 2MB
memory pool and just set this new 2MB memory block to be read-only instead of
setting the new page tables one page by one page.

Two new PCDs PcdPageTablePoolUnitSize and PcdPageTablePoolAlignment are used
to specify the size and alignment for page table pool. For IA32 processor
0x20 (2MB) is the only choice for both of them to meet the requirement of
page table pool.

Cc: Jiewen Yao 
Cc: Star Zeng 
Cc: Eric Dong 
Cc: Ruiyu Ni 
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang 
---
  MdeModulePkg/Core/DxeIplPeim/DxeIpl.h|  34 +++
  MdeModulePkg/Core/DxeIplPeim/Ia32/DxeLoadFunc.c  |   8 +-
  MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c | 301 ++-
  MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.h |  26 ++
  4 files changed, 365 insertions(+), 4 deletions(-)

diff --git a/MdeModulePkg/Core/DxeIplPeim/DxeIpl.h 
b/MdeModulePkg/Core/DxeIplPeim/DxeIpl.h
index f3aabdb7e0..9dc80b1508 100644
--- a/MdeModulePkg/Core/DxeIplPeim/DxeIpl.h
+++ b/MdeModulePkg/Core/DxeIplPeim/DxeIpl.h
@@ -265,4 +265,38 @@ IsNullDetectionEnabled (
VOID
);
  
+/**

+  Prevent the memory pages used for page table from been overwritten.
+
+  @param[in] PageTableBaseBase address of page table (CR3).
+
+**/
+VOID
+EnablePageTableProtection (
+  IN  UINTN PageTableBase,
+  IN  BOOLEAN   Level4Paging
+  );
+
+/**
+  This API provides a way to allocate memory for page table.
+
+  This API can be called more than once to allocate memory for page tables.
+
+  Allocates the number of 4KB pages and returns a pointer to the allocated
+  buffer. The buffer returned is aligned on a 4KB boundary.
+
+  If Pages is 0, then NULL is returned.
+  If there is not enough memory remaining to satisfy the request, then NULL is
+  returned.
+
+  @param  Pages The number of 4 KB pages to allocate.
+
+  @return A pointer to the allocated buffer or NULL if allocation fails.
+
+**/
+VOID *
+AllocatePageTableMemory (
+  IN UINTN   Pages
+  );
+
  #endif
diff --git a/MdeModulePkg/Core/DxeIplPeim/Ia32/DxeLoadFunc.c 
b/MdeModulePkg/Core/DxeIplPeim/Ia32/DxeLoadFunc.c
index 5649265367..13fff28e93 100644
--- a/MdeModulePkg/Core/DxeIplPeim/Ia32/DxeLoadFunc.c
+++ b/MdeModulePkg/Core/DxeIplPeim/Ia32/DxeLoadFunc.c
@@ -99,7 +99,7 @@ Create4GPageTablesIa32Pae (
NumberOfPdpEntriesNeeded = (UINT32) LShiftU64 (1, (PhysicalAddressBits - 
30));
  
TotalPagesNum = NumberOfPdpEntriesNeeded + 1;

-  PageAddress = (UINTN) AllocatePages (TotalPagesNum);
+  PageAddress = (UINTN) AllocatePageTableMemory (TotalPagesNum);
ASSERT (PageAddress != 0);
  
PageMap = (VOID *) PageAddress;

@@ -149,6 +149,12 @@ Create4GPageTablesIa32Pae (
);
}
  
+  //

+  // Protect the page table by marking the memory used for page table to be
+  // read-only.
+  //
+  EnablePageTableProtection ((UINTN)PageMap, FALSE);
+
return (UINTN) PageMap;
  }
  
diff --git a/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c b/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c

index 29b6205e88..4ef3521224 100644
--- a/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c
+++ b/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c
@@ -31,6 +31,11 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER 
EXPRESS OR IMPLIED.
  #include "DxeIpl.h"
  #include 

Re: [edk2] [PATCH 2/3] IntelFrameworkModulePkg/LegacyBiosDxe: Use macro to enable/disable page 0

[Ni, Ruiyu]

On 12/6/2017 3:31 PM, Jian J Wang wrote:

Current implementation uses following two methods

 EnableNullDetection()
 DisableNullDetection()

to enable/disable page 0. These two methods will check PCD
PcdNullPointerDetectionPropertyMask to know if the page 0 is disabled or not.
This is due to the fact that old GCD service doesn't provide paging related
attributes of memory block. Since this issue has been fixed, GCD services
can be used to determine the paging status of page 0. This is also make it
possible to just use a new macro

 ACCESS_PAGE0_CODE(
   {
   
   }
 );

to replace above methods to do the same job, which also makes code more
readability.

Cc: Liming Gao 
Cc: Michael D Kinney 
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang 
---
  .../Csm/LegacyBiosDxe/LegacyBda.c  |  53 
  .../Csm/LegacyBiosDxe/LegacyBios.c | 135 ++---
  .../Csm/LegacyBiosDxe/LegacyBiosDxe.inf|   1 -
  .../Csm/LegacyBiosDxe/LegacyBiosInterface.h|  16 ---
  .../Csm/LegacyBiosDxe/LegacyBootSupport.c  |  80 ++--
  .../Csm/LegacyBiosDxe/LegacyPci.c  |  72 ++-
  IntelFrameworkModulePkg/Csm/LegacyBiosDxe/Thunk.c  |  51 
  7 files changed, 135 insertions(+), 273 deletions(-)

diff --git a/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBda.c 
b/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBda.c
index c6670febee..9667dc2a0f 100644
--- a/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBda.c
+++ b/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBda.c
@@ -34,37 +34,36 @@ LegacyBiosInitBda (
BDA_STRUC *Bda;
UINT8 *Ebda;
  
-  DisableNullDetection ();

-
Bda   = (BDA_STRUC *) ((UINTN) 0x400);
Ebda  = (UINT8 *) ((UINTN) 0x9fc00);
  
-  ZeroMem (Bda, 0x100);

+  ACCESS_PAGE0_CODE ({
+ZeroMem (Bda, 0x100);
+//
+// 640k-1k for EBDA
+//
+Bda->MemSize= 0x27f;
+Bda->KeyHead= 0x1e;
+Bda->KeyTail= 0x1e;
+Bda->FloppyData = 0x00;
+Bda->FloppyTimeout  = 0xff;
+
+Bda->KeyStart   = 0x001E;
+Bda->KeyEnd = 0x003E;
+Bda->KeyboardStatus = 0x10;
+Bda->Ebda   = 0x9fc0;
+
+//
+// Move LPT time out here and zero out LPT4 since some SCSI OPROMS
+// use this as scratch pad (LPT4 is Reserved)
+//
+Bda->Lpt1_2Timeout  = 0x1414;
+Bda->Lpt3_4Timeout  = 0x1400;
+
+  });
+
ZeroMem (Ebda, 0x400);
-  //
-  // 640k-1k for EBDA
-  //
-  Bda->MemSize= 0x27f;
-  Bda->KeyHead= 0x1e;
-  Bda->KeyTail= 0x1e;
-  Bda->FloppyData = 0x00;
-  Bda->FloppyTimeout  = 0xff;
-
-  Bda->KeyStart   = 0x001E;
-  Bda->KeyEnd = 0x003E;
-  Bda->KeyboardStatus = 0x10;
-  Bda->Ebda   = 0x9fc0;
-
-  //
-  // Move LPT time out here and zero out LPT4 since some SCSI OPROMS
-  // use this as scratch pad (LPT4 is Reserved)
-  //
-  Bda->Lpt1_2Timeout  = 0x1414;
-  Bda->Lpt3_4Timeout  = 0x1400;
-
-  *Ebda   = 0x01;
-
-  EnableNullDetection ();
+  *Ebda = 0x01;
  
return EFI_SUCCESS;

  }
diff --git a/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBios.c 
b/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBios.c
index c6461f5547..d50c15eacb 100644
--- a/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBios.c
+++ b/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBios.c
@@ -786,115 +786,6 @@ ToggleEndOfDxeStatus (
return;
  }
  
-//

-// Legacy BIOS needs to access memory between 0-4095, which will cause page
-// fault exception if NULL pointer detection mechanism is enabled. Following
-// functions can be used to disable/enable NULL pointer detection before/after
-// accessing those memory.
-//
-
-/**
-   Enable NULL pointer detection.
-**/
-VOID
-EnableNullDetection (
-  VOID
-  )
-{
-  EFI_STATUSStatus;
-  EFI_GCD_MEMORY_SPACE_DESCRIPTOR   Desc;
-
-  if (((PcdGet8 (PcdNullPointerDetectionPropertyMask) & BIT0) == 0)
-  ||
-  ((mEndOfDxe)  &&
-   ((PcdGet8 (PcdNullPointerDetectionPropertyMask) & (BIT7|BIT0))
-== (BIT7|BIT0)))
- ) {
-return;
-  }
-
-  //
-  // Check current capabilities and attributes
-  //
-  Status = gDS->GetMemorySpaceDescriptor (0, );
-  ASSERT_EFI_ERROR (Status);
-
-  //
-  // Try to add EFI_MEMORY_RP support if necessary
-  //
-  if ((Desc.Capabilities & EFI_MEMORY_RP) == 0) {
-Desc.Capabilities |= EFI_MEMORY_RP;
-Status = gDS->SetMemorySpaceCapabilities (0, EFI_PAGES_TO_SIZE(1),
-  Desc.Capabilities);
-ASSERT_EFI_ERROR (Status);
-if (EFI_ERROR (Status)) {
-  return;
-}
-  }
-
-  //
-  // Don't bother if EFI_MEMORY_RP is already set.
-  //
-  if ((Desc.Attributes & EFI_MEMORY_RP) == 0) {
-Desc.Attributes |= EFI_MEMORY_RP;
-Status = gDS->SetMemorySpaceAttributes (0, 

Re: [edk2] [PATCH 1/3] IntelFrameworkPkg/LegacyBios.h: Add a macro to guarantee page 0 access

[Ni, Ruiyu]

On 12/6/2017 3:31 PM, Jian J Wang wrote:

Due to the introduction of NULL pointer detection feature, page 0 will be
disabled if the feature is enabled, which will cause legacy code failed to
update legacy data in page 0. This macro is introduced to make sure the
page 0 is enabled before those code and restore the original status of it
afterwards.

Another reason to introduce this macro is to eliminate the dependency on
the PcdNullPointerDetectionPropertyMask. Because this is a new PCD, it
could cause some backward compatibility issue for some old packages.

This macro will simply check if the page 0 is disabled or not. If it's
disabled, it will enable it before code updating page 0 and disable it
afterwards. Otherwise, this macro will do nothing to page 0.

The usage of the macro will be look like (similar to DEBUG_CODE macro):

 ACCESS_PAGE0_CODE(
   {
   
   }
 );

Cc: Liming Gao 
Cc: Michael D Kinney 
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang 
---
  IntelFrameworkPkg/Include/Protocol/LegacyBios.h | 34 +
  1 file changed, 34 insertions(+)

diff --git a/IntelFrameworkPkg/Include/Protocol/LegacyBios.h 
b/IntelFrameworkPkg/Include/Protocol/LegacyBios.h
index 641f101bce..f77c92ba21 100644
--- a/IntelFrameworkPkg/Include/Protocol/LegacyBios.h
+++ b/IntelFrameworkPkg/Include/Protocol/LegacyBios.h
@@ -1518,6 +1518,40 @@ struct _EFI_LEGACY_BIOS_PROTOCOL {
EFI_LEGACY_BIOS_BOOT_UNCONVENTIONAL_DEVICE  BootUnconventionalDevice;
  };
  
+//

+// Legacy BIOS needs to access memory in page 0 (0-4095), which is disabled if
+// NULL pointer detection feature is enabled. Following macro can be used to
+// enable/disable page 0 before/after accessing it.
+//
+#define ACCESS_PAGE0_CODE(statements)   \
+  do {  \
+EFI_STATUSStatus_;  \
+EFI_GCD_MEMORY_SPACE_DESCRIPTOR   Desc_;\
+\
+Status_ = gDS->GetMemorySpaceDescriptor (0, _);\
+if (!EFI_ERROR (Status_)) { \
+  if ((Desc_.Attributes & EFI_MEMORY_RP) != 0) {\
+Status_ = gDS->SetMemorySpaceAttributes (   \
+0,  \
+EFI_PAGES_TO_SIZE(1),   \
+Desc_.Attributes &= ~EFI_MEMORY_RP  \


&= is used here so Desc_.Attributes is updated to have RP cleared.
Then the below if will be always FALSE.


+);  \
+ASSERT_EFI_ERROR (Status_); \
+  } \
+\
+  statements;   \
+\
+  if ((Desc_.Attributes & EFI_MEMORY_RP) != 0) {\
+Status_ = gDS->SetMemorySpaceAttributes (   \
+0,  \
+EFI_PAGES_TO_SIZE(1),   \
+Desc_.Attributes\
+);  \
+ASSERT_EFI_ERROR (Status_); \
+  } \
+}   \
+  } while (FALSE)
+
  extern EFI_GUID gEfiLegacyBiosProtocolGuid;
  
  #endif





--
Thanks,
Ray
___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel

[edk2] [PATCH 2/2] MdeModulePkg PiSmmIpl: Handle CommSize OPTIONAL case

[Star Zeng]

Handle CommSize OPTIONAL case for SmmCommunicate.
And return EFI_ACCESS_DENIED when CommunicationBuffer
is not valid for SMM to access.

Cc: Jiewen Yao 
Cc: Liming Gao 
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng 
---
 MdeModulePkg/Core/PiSmmCore/PiSmmCore.c |  2 +-
 MdeModulePkg/Core/PiSmmCore/PiSmmIpl.c  | 61 +
 2 files changed, 40 insertions(+), 23 deletions(-)

diff --git a/MdeModulePkg/Core/PiSmmCore/PiSmmCore.c 
b/MdeModulePkg/Core/PiSmmCore/PiSmmCore.c
index a7467aca2012..4c1e3e719524 100644
--- a/MdeModulePkg/Core/PiSmmCore/PiSmmCore.c
+++ b/MdeModulePkg/Core/PiSmmCore/PiSmmCore.c
@@ -544,7 +544,7 @@ SmmEntryPoint (
 // return EFI_INVALID_PARAMETER
 //
 gSmmCorePrivate->CommunicationBuffer = NULL;
-gSmmCorePrivate->ReturnStatus = EFI_INVALID_PARAMETER;
+gSmmCorePrivate->ReturnStatus = EFI_ACCESS_DENIED;
   } else {
 CommunicateHeader = (EFI_SMM_COMMUNICATE_HEADER *)CommunicationBuffer;
 BufferSize -= OFFSET_OF (EFI_SMM_COMMUNICATE_HEADER, Data);
diff --git a/MdeModulePkg/Core/PiSmmCore/PiSmmIpl.c 
b/MdeModulePkg/Core/PiSmmCore/PiSmmIpl.c
index 2601275ab85f..31d2c9e45e1f 100644
--- a/MdeModulePkg/Core/PiSmmCore/PiSmmIpl.c
+++ b/MdeModulePkg/Core/PiSmmCore/PiSmmIpl.c
@@ -440,37 +440,55 @@ SmmBase2GetSmstLocation (
   after SetVirtualAddressMap().
 
   @param[in] ThisThe EFI_SMM_COMMUNICATION_PROTOCOL instance.
-  @param[in, out] CommBuffer  A pointer to the buffer to convey into 
SMRAM.
-  @param[in, out] CommSizeThe size of the data buffer being passed 
in.On exit, the size of data
+  @param[in, out] CommBuffer A pointer to the buffer to convey into SMRAM.
+  @param[in, out] CommSize   The size of the data buffer being passed in. 
On exit, the size of data
  being returned. Zero if the handler does not 
wish to reply with any data.
+ This parameter is optional and may be NULL.
 
   @retval EFI_SUCCESSThe message was successfully posted.
   @retval EFI_INVALID_PARAMETER  The CommBuffer was NULL.
+  @retval EFI_BAD_BUFFER_SIZEThe buffer is too large for the MM 
implementation.
+ If this error is returned, the MessageLength 
field
+ in the CommBuffer header or the integer 
pointed by
+ CommSize, are updated to reflect the maximum 
payload
+ size the implementation can accommodate.
+  @retval EFI_ACCESS_DENIED  The CommunicateBuffer parameter or CommSize 
parameter,
+ if not omitted, are in address range that 
cannot be
+ accessed by the MM environment.
+
 **/
 EFI_STATUS
 EFIAPI
 SmmCommunicationCommunicate (
   IN CONST EFI_SMM_COMMUNICATION_PROTOCOL  *This,
   IN OUT VOID  *CommBuffer,
-  IN OUT UINTN *CommSize
+  IN OUT UINTN *CommSize OPTIONAL
   )
 {
   EFI_STATUS  Status;
   EFI_SMM_COMMUNICATE_HEADER  *CommunicateHeader;
   BOOLEAN OldInSmm;
+  UINTN   TempCommSize;
 
   //
   // Check parameters
   //
-  if ((CommBuffer == NULL) || (CommSize == NULL)) {
+  if (CommBuffer == NULL) {
 return EFI_INVALID_PARAMETER;
   }
 
-  //
-  // CommSize must hold HeaderGuid and MessageLength
-  //
-  if (*CommSize < OFFSET_OF (EFI_SMM_COMMUNICATE_HEADER, Data)) {
-return EFI_INVALID_PARAMETER;
+  CommunicateHeader = (EFI_SMM_COMMUNICATE_HEADER *) CommBuffer;
+
+  if (CommSize == NULL) {
+TempCommSize = OFFSET_OF (EFI_SMM_COMMUNICATE_HEADER, Data) + 
CommunicateHeader->MessageLength;
+  } else {
+TempCommSize = *CommSize;
+//
+// CommSize must hold HeaderGuid and MessageLength
+//
+if (TempCommSize < OFFSET_OF (EFI_SMM_COMMUNICATE_HEADER, Data)) {
+  return EFI_INVALID_PARAMETER;
+}
   }
 
   //
@@ -481,7 +499,7 @@ SmmCommunicationCommunicate (
 // Put arguments for Software SMI in gSmmCorePrivate
 //
 gSmmCorePrivate->CommunicationBuffer = CommBuffer;
-gSmmCorePrivate->BufferSize  = *CommSize;
+gSmmCorePrivate->BufferSize  = TempCommSize;
 
 //
 // Generate Software SMI
@@ -494,15 +512,17 @@ SmmCommunicationCommunicate (
 //
 // Return status from software SMI 
 //
-*CommSize = gSmmCorePrivate->BufferSize;
+if (CommSize != NULL) {
+  *CommSize = gSmmCorePrivate->BufferSize;
+}
 return gSmmCorePrivate->ReturnStatus;
   }
 
   //
   // If we are in SMM, then the execution mode must be physical, which means 
that
   // OS established virtual addresses can not be used.  If 
SetVirtualAddressMap()
-  // has been called, then a direct invocation of the 

[edk2] [PATCH 0/2] Follow PI spec to update EFI_MM_COMMUNICATE

[Star Zeng]

Follow PI spec (>= 1.5) to add new return status code description
and make CommSize OPTIONAL.

Handle CommSize OPTIONAL case for SmmCommunicate.
And return EFI_ACCESS_DENIED when CommunicationBuffer
is not valid for SMM to access.

Cc: Jiewen Yao 
Cc: Liming Gao 
Cc: Michael D Kinney 

Star Zeng (2):
  MdePkg MmCommunication.h: Follow PI spec to update EFI_MM_COMMUNICATE
  MdeModulePkg PiSmmIpl: Handle CommSize OPTIONAL case

 MdeModulePkg/Core/PiSmmCore/PiSmmCore.c   |  2 +-
 MdeModulePkg/Core/PiSmmCore/PiSmmIpl.c| 61 ---
 MdePkg/Include/Protocol/MmCommunication.h | 14 ++-
 3 files changed, 52 insertions(+), 25 deletions(-)

-- 
2.7.0.windows.1

___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel

[edk2] [PATCH 1/2] MdePkg MmCommunication.h: Follow PI spec to update EFI_MM_COMMUNICATE

[Star Zeng]

Follow PI spec (>= 1.5) to add new return status code description
and make CommSize OPTIONAL.

Cc: Jiewen Yao 
Cc: Liming Gao 
Cc: Michael D Kinney 
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng 
---
 MdePkg/Include/Protocol/MmCommunication.h | 14 --
 1 file changed, 12 insertions(+), 2 deletions(-)

diff --git a/MdePkg/Include/Protocol/MmCommunication.h 
b/MdePkg/Include/Protocol/MmCommunication.h
index 16450e3445b0..774686ba3e7f 100644
--- a/MdePkg/Include/Protocol/MmCommunication.h
+++ b/MdePkg/Include/Protocol/MmCommunication.h
@@ -55,18 +55,28 @@ typedef struct _EFI_MM_COMMUNICATION_PROTOCOL  
EFI_MM_COMMUNICATION_PROTOCOL;
 
   @param[in] ThisThe EFI_MM_COMMUNICATION_PROTOCOL instance.
   @param[in] CommBuffer  A pointer to the buffer to convey into MMRAM.
-  @param[in] CommSizeThe size of the data buffer being passed 
in.On exit, the size of data
+  @param[in] CommSizeThe size of the data buffer being passed in. 
On exit, the size of data
  being returned. Zero if the handler does not 
wish to reply with any data.
+ This parameter is optional and may be NULL.
 
   @retval EFI_SUCCESSThe message was successfully posted.
   @retval EFI_INVALID_PARAMETER  The CommBuffer was NULL.
+  @retval EFI_BAD_BUFFER_SIZEThe buffer is too large for the MM 
implementation.
+ If this error is returned, the MessageLength 
field
+ in the CommBuffer header or the integer 
pointed by
+ CommSize, are updated to reflect the maximum 
payload
+ size the implementation can accommodate.
+  @retval EFI_ACCESS_DENIED  The CommunicateBuffer parameter or CommSize 
parameter,
+ if not omitted, are in address range that 
cannot be
+ accessed by the MM environment.
+
 **/
 typedef
 EFI_STATUS
 (EFIAPI *EFI_MM_COMMUNICATE)(
   IN CONST EFI_MM_COMMUNICATION_PROTOCOL   *This,
   IN OUT VOID  *CommBuffer,
-  IN OUT UINTN *CommSize
+  IN OUT UINTN *CommSize OPTIONAL
   );
 
 ///
-- 
2.7.0.windows.1

___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel

[edk2] [PATCH v4 09/11] UefiCpuPkg/CpuDxe: Initialize stack switch for MP

[Jian J Wang]

> v4:
> Update related code using CPU_EXCEPTION_INIT_DATA_EX which has been
> changed to CPU_EXCEPTION_INIT_DATA.

> v3:
>  a. Remove definition of EXCEPTION_STACK_SWITCH_DATA.
> Use CPU_EXCEPTION_INIT_DATA_EX defined in CpuExceptionHandlerLib.h
> intead.
>  b. Call new API InitializeCpuExceptionHandlersEx instead to initialize
> stack switch for BSP and AP

> v2:
>Add code to reserve resources and initialize AP exception with stack
>switch besides BSP, if PcdCpuStackGuard is enabled.

In current MP implementation, BSP and AP shares the same exception
configuration. Stack switch required by Stack Guard feature needs that BSP
and AP have their own configuration. This patch adds code to ask BSP and AP
to do exception handler initialization separately.

Since AP is not supposed to do memory allocation, all memory needed to
setup stack switch will be reserved in BSP and pass to AP via new API

  EFI_STATUS
  EFIAPI
  InitializeCpuExceptionHandlersEx (
IN EFI_VECTOR_HANDOFF_INFO*VectorInfo OPTIONAL,
IN CPU_EXCEPTION_INIT_DATA*InitData OPTIONAL
);

Following two new PCDs are introduced to configure how to setup new stack
for specified exception handlers.

  gUefiCpuPkgTokenSpaceGuid.PcdCpuStackSwitchExceptionList
  gUefiCpuPkgTokenSpaceGuid.PcdCpuKnownGoodStackSize

Cc: Eric Dong 
Cc: Laszlo Ersek 
Cc: Jiewen Yao 
Cc: Michael Kinney 
Suggested-by: Ayellet Wolman 
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang 
---
 UefiCpuPkg/CpuDxe/CpuDxe.inf |   3 +
 UefiCpuPkg/CpuDxe/CpuMp.c| 188 +++
 2 files changed, 191 insertions(+)

diff --git a/UefiCpuPkg/CpuDxe/CpuDxe.inf b/UefiCpuPkg/CpuDxe/CpuDxe.inf
index 3e8d196739..02f86b774c 100644
--- a/UefiCpuPkg/CpuDxe/CpuDxe.inf
+++ b/UefiCpuPkg/CpuDxe/CpuDxe.inf
@@ -81,6 +81,9 @@
 
 [Pcd]
   gEfiMdeModulePkgTokenSpaceGuid.PcdPteMemoryEncryptionAddressOrMask## 
CONSUMES
+  gEfiMdeModulePkgTokenSpaceGuid.PcdCpuStackGuard   ## 
CONSUMES
+  gUefiCpuPkgTokenSpaceGuid.PcdCpuStackSwitchExceptionList  ## 
CONSUMES
+  gUefiCpuPkgTokenSpaceGuid.PcdCpuKnownGoodStackSize## 
CONSUMES
 
 [Depex]
   TRUE
diff --git a/UefiCpuPkg/CpuDxe/CpuMp.c b/UefiCpuPkg/CpuDxe/CpuMp.c
index b3c0178d07..1d057aeff2 100644
--- a/UefiCpuPkg/CpuDxe/CpuMp.c
+++ b/UefiCpuPkg/CpuDxe/CpuMp.c
@@ -601,6 +601,189 @@ CollectBistDataFromHob (
   }
 }
 
+/**
+  Get GDT register value.
+
+  This function is mainly for AP purpose because AP may have different GDT
+  table than BSP.
+
+  @param[in,out] Buffer  The pointer to private data buffer.
+
+**/
+VOID
+EFIAPI
+GetGdtr (
+  IN OUT VOID *Buffer
+  )
+{
+  AsmReadGdtr ((IA32_DESCRIPTOR *)Buffer);
+}
+
+/**
+  Initializes CPU exceptions handlers for the sake of stack switch requirement.
+
+  This function is a wrapper of InitializeCpuExceptionHandlersEx. It's mainly
+  for the sake of AP's init because of EFI_AP_PROCEDURE API requirement.
+
+  @param[in,out] Buffer  The pointer to private data buffer.
+
+**/
+VOID
+EFIAPI
+InitializeExceptionStackSwitchHandlers (
+  IN OUT VOID *Buffer
+  )
+{
+  CPU_EXCEPTION_INIT_DATA   *EssData;
+  IA32_DESCRIPTOR   Idtr;
+  EFI_STATUSStatus;
+
+  EssData = Buffer;
+  //
+  // We don't plan to replace IDT table with a new one, but we should not 
assume
+  // the AP's IDT is the same as BSP's IDT either.
+  //
+  AsmReadIdtr ();
+  EssData->Ia32.IdtTable = (VOID *)Idtr.Base;
+  EssData->Ia32.IdtTableSize = Idtr.Limit + 1;
+  Status = InitializeCpuExceptionHandlersEx (NULL, EssData);
+  ASSERT_EFI_ERROR (Status);
+}
+
+/**
+  Initializes MP exceptions handlers for the sake of stack switch requirement.
+
+  This function will allocate required resources required to setup stack switch
+  and pass them through CPU_EXCEPTION_INIT_DATA to each logic processor.
+
+**/
+VOID
+InitializeMpExceptionStackSwitchHandlers (
+  VOID
+  )
+{
+  UINTN   Index;
+  UINTN   Bsp;
+  UINTN   ExceptionNumber;
+  UINTN   OldGdtSize;
+  UINTN   NewGdtSize;
+  UINTN   NewStackSize;
+  IA32_DESCRIPTOR Gdtr;
+  CPU_EXCEPTION_INIT_DATA EssData;
+  UINT8   *GdtBuffer;
+  UINT8   *StackTop;
+
+  if (!PcdGetBool (PcdCpuStackGuard)) {
+return;
+  }
+
+  ExceptionNumber = FixedPcdGetSize (PcdCpuStackSwitchExceptionList);
+  NewStackSize = FixedPcdGet32 (PcdCpuKnownGoodStackSize) * ExceptionNumber;
+
+  StackTop = AllocateRuntimeZeroPool (NewStackSize * mNumberOfProcessors);
+  ASSERT (StackTop != NULL);
+  StackTop += NewStackSize  * mNumberOfProcessors;
+
+  //
+  // The 

[edk2] [PATCH v4 10/11] MdeModulePkg/Core/Dxe: Call new API InitializeCpuExceptionHandlersEx instead

[Jian J Wang]

> v4:
>

> v3:
>Newly added

Original API InitializeCpuExceptionHandlers is used in DxeMain to initialize
exception handlers but it does not support setting up stack switch required
by Stack Guard feature. Using the new API instead to make sure Stack Guard
feature is applicable to most part of code.

Since this API is called before memory service initialization, there's no
way to call AllocateXxx API to reserve memory. Global variables are used
for this special case. GDT table is reserved at least 2KB which should be
big enough for all current use cases.

Cc: Star Zeng 
Cc: Eric Dong 
Cc: Jiewen Yao 
Suggested-by: Ayellet Wolman 
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang 
---
 MdeModulePkg/Core/Dxe/DxeMain/DxeMain.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/MdeModulePkg/Core/Dxe/DxeMain/DxeMain.c 
b/MdeModulePkg/Core/Dxe/DxeMain/DxeMain.c
index 433cca3a80..62a597edaf 100644
--- a/MdeModulePkg/Core/Dxe/DxeMain/DxeMain.c
+++ b/MdeModulePkg/Core/Dxe/DxeMain/DxeMain.c
@@ -258,7 +258,7 @@ DxeMain (
   if (GuidHob != NULL) {
 VectorInfoList = (EFI_VECTOR_HANDOFF_INFO *) (GET_GUID_HOB_DATA(GuidHob));
   }
-  Status = InitializeCpuExceptionHandlers (VectorInfoList);
+  Status = InitializeCpuExceptionHandlersEx (VectorInfoList, NULL);
   ASSERT_EFI_ERROR (Status);
   
   //
-- 
2.15.1.windows.2

___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel

[edk2] [PATCH v4 08/11] UefiCpuPkg/MpLib: Add GDTR, IDTR and TR in saved AP data

[Jian J Wang]

> v3/v4:
>No change

> v2:
>Add code to save/restore GDTR, IDTR and TR for AP.

In current implementation of CPU MP service, AP is initialized with data
copied from BSP. Stack switch required by Stack Guard feature needs different
GDT, IDT table and task gates for each logic processor. This patch adds GDTR,
IDTR and TR into structure CPU_VOLATILE_REGISTERS and related code in save
and restore methods. This can make sure that any changes to GDT, IDT and task
gate for an AP will be kept from overwritten by BSP settings.

Cc: Eric Dong 
Cc: Laszlo Ersek 
Cc: Jiewen Yao 
Suggested-by: Ayellet Wolman 
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang 
---
 UefiCpuPkg/Library/MpInitLib/MpLib.c | 17 +
 UefiCpuPkg/Library/MpInitLib/MpLib.h |  3 +++
 2 files changed, 20 insertions(+)

diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c 
b/UefiCpuPkg/Library/MpInitLib/MpLib.c
index 61b14c9843..0c2058a7b0 100644
--- a/UefiCpuPkg/Library/MpInitLib/MpLib.c
+++ b/UefiCpuPkg/Library/MpInitLib/MpLib.c
@@ -195,6 +195,10 @@ SaveVolatileRegisters (
 VolatileRegisters->Dr6 = AsmReadDr6 ();
 VolatileRegisters->Dr7 = AsmReadDr7 ();
   }
+
+  AsmReadGdtr (>Gdtr);
+  AsmReadIdtr (>Idtr);
+  VolatileRegisters->Tr = AsmReadTr ();
 }
 
 /**
@@ -211,6 +215,7 @@ RestoreVolatileRegisters (
   )
 {
   CPUID_VERSION_INFO_EDXVersionInfoEdx;
+  IA32_TSS_DESCRIPTOR   *Tss;
 
   AsmWriteCr0 (VolatileRegisters->Cr0);
   AsmWriteCr3 (VolatileRegisters->Cr3);
@@ -231,6 +236,18 @@ RestoreVolatileRegisters (
   AsmWriteDr7 (VolatileRegisters->Dr7);
 }
   }
+
+  AsmWriteGdtr (>Gdtr);
+  AsmWriteIdtr (>Idtr);
+  if (VolatileRegisters->Tr != 0 &&
+  VolatileRegisters->Tr < VolatileRegisters->Gdtr.Limit) {
+Tss = (IA32_TSS_DESCRIPTOR *)(VolatileRegisters->Gdtr.Base +
+  VolatileRegisters->Tr);
+if (Tss->Bits.P == 1) {
+  Tss->Bits.Type &= 0xD;  // 1101 - Clear busy bit just in case
+  AsmWriteTr (VolatileRegisters->Tr);
+}
+  }
 }
 
 /**
diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.h 
b/UefiCpuPkg/Library/MpInitLib/MpLib.h
index d13d5c06f5..685e96cbac 100644
--- a/UefiCpuPkg/Library/MpInitLib/MpLib.h
+++ b/UefiCpuPkg/Library/MpInitLib/MpLib.h
@@ -102,6 +102,9 @@ typedef struct {
   UINTN  Dr3;
   UINTN  Dr6;
   UINTN  Dr7;
+  IA32_DESCRIPTORGdtr;
+  IA32_DESCRIPTORIdtr;
+  UINT16 Tr;
 } CPU_VOLATILE_REGISTERS;
 
 //
-- 
2.15.1.windows.2

___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel

[edk2] [PATCH v4 03/11] MdeModulePkg/CpuExceptionHandlerLib.h: Add a new API InitializeCpuExceptionHandlersEx

[Jian J Wang]

> v4:
>  a. Change name of new data structure from CPU_EXCEPTION_INIT_DATA_EX
> to CPU_EXCEPTION_INIT_DATA
>  b. Add "size" field for all "buffer" fields in CPU_EXCEPTION_INIT_DATA
>  c. Add separate fields for IA32 and X64 in CPU_EXCEPTION_INIT_DATA

> v3:
>   a. Change InitializeCpuExceptionStackSwitchHandlers() to
>  InitializeCpuExceptionHandlersEx() to be more general.
>   b. Add structure definition CPU_EXCEPTION_INIT_DATA_EX for new API

> v2:
>Add prototype definition of InitializeCpuExceptionStackSwitchHandlers()

A new API InitializeCpuExceptionHandlersEx() is introduced to support
initializing exception handlers with extra functionalities which need
extra init data, such as stack switch for Stack Guard feature.

EFI_STATUS
  EFIAPI
  InitializeCpuExceptionHandlersEx (
IN EFI_VECTOR_HANDOFF_INFO*VectorInfo OPTIONAL,
IN CPU_EXCEPTION_INIT_DATA*InitData OPTIONAL
);

By default, this method should include all functionalities implemented by
InitializeCpuExceptionHandlers(), plus extra initialization works, if any.
This is could be done by calling InitializeCpuExceptionHandlers() directly
in this method besides the extra works.

InitData is optional and its use and content are processor arch dependent.
The typical usage of it is to convey resources which have to be reserved
elsewhere and are necessary for the extra initialization of exception.

Cc: Star Zeng 
Cc: Eric Dong 
Cc: Jiewen Yao 
Suggested-by: Ayellet Wolman 
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang 
---
 .../Include/Library/CpuExceptionHandlerLib.h   | 91 ++
 1 file changed, 91 insertions(+)

diff --git a/MdeModulePkg/Include/Library/CpuExceptionHandlerLib.h 
b/MdeModulePkg/Include/Library/CpuExceptionHandlerLib.h
index 6cd8230127..4b7b09440e 100644
--- a/MdeModulePkg/Include/Library/CpuExceptionHandlerLib.h
+++ b/MdeModulePkg/Include/Library/CpuExceptionHandlerLib.h
@@ -19,6 +19,67 @@
 #include 
 #include 
 
+typedef union {
+  struct {
+//
+// The address of top of known good stack reserved for *ALL* exceptions
+// listed in field StackSwitchExceptions.
+//
+UINTN KnownGoodStackTop;
+//
+// The size of known good stack for *ONE* exception only.
+//
+UINTN KnownGoodStackSize;
+//
+// Buffer of exception vector list for stack switch.
+//
+UINT8 *StackSwitchExceptions;
+//
+// Number of exception vectors in StackSwitchExceptions.
+//
+UINTN StackSwitchExceptionNumber;
+//
+// Buffer of IDT table. It must be type of IA32_IDT_GATE_DESCRIPTOR.
+// Normally there's no need to change IDT table size.
+//
+VOID  *IdtTable;
+//
+// Size of buffer for IdtTable.
+//
+UINTN IdtTableSize;
+//
+// Buffer of GDT table. It must be type of IA32_SEGMENT_DESCRIPTOR.
+//
+VOID  *GdtTable;
+//
+// Size of buffer for GdtTable.
+//
+UINTN GdtTableSize;
+//
+// Pointer to start address of descriptor of exception task gate in the
+// GDT table. It must be type of IA32_TSS_DESCRIPTOR.
+//
+VOID  *ExceptionTssDesc;
+//
+// Size of buffer for ExceptionTssDesc.
+//
+UINTN ExceptionTssDescSize;
+//
+// Buffer of task-state segment for exceptions. It must be type of
+// IA32_TASK_STATE_SEGMENT.
+//
+VOID  *ExceptionTss;
+//
+// Size of buffer for ExceptionTss.
+//
+UINTN ExceptionTssSize;
+//
+// Flag to indicate if default handlers should be initialized or not.
+//
+BOOLEAN   InitDefaultHandlers;
+  } Ia32, X64;
+} CPU_EXCEPTION_INIT_DATA;
+
 /**
   Initializes all CPU exceptions entries and provides the default exception 
handlers.
   
@@ -41,6 +102,36 @@ InitializeCpuExceptionHandlers (
   IN EFI_VECTOR_HANDOFF_INFO   *VectorInfo OPTIONAL
   );
 
+/**
+  Initializes all CPU exceptions entries with optional extra initializations.
+
+  By default, this method should include all functionalities implemented by
+  InitializeCpuExceptionHandlers(), plus extra initialization works, if any.
+  This could be done by calling InitializeCpuExceptionHandlers() directly
+  in this method besides the extra works.
+
+  InitData is optional and its use and content are processor arch dependent.
+  The typical usage of it is to convey resources which have to be reserved
+  elsewhere and are necessary for the extra initializations of exception.
+
+  @param[in]  VectorInfoPointer to reserved vector list.
+  @param[in]  InitData  Pointer to data optional for extra initializations
+   

[edk2] [PATCH v4 11/11] MdeModulePkg/DxeIpl: Enable paging for Stack Guard

[Jian J Wang]

> v2/v3/v4:
>

Stack guard feature makes use of paging mechanism to monitor if there's a
stack overflow occurred during boot.

This patch will check setting of PCD PcdCpuStackGuard. If it's TRUE, DxeIpl
will setup page table and set the page at which the stack base locates to be
NOT PRESENT. If stack is used up and memory access cross into the last page
of it, #PF exception will be triggered.

Cc: Star Zeng 
Cc: Eric Dong 
Cc: Jiewen Yao 
Suggested-by: Ayellet Wolman 
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang 
---
 MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf  |  5 ++-
 MdeModulePkg/Core/DxeIplPeim/Ia32/DxeLoadFunc.c  |  4 ++
 MdeModulePkg/Core/DxeIplPeim/X64/DxeLoadFunc.c   |  1 +
 MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c | 51 ++--
 4 files changed, 46 insertions(+), 15 deletions(-)

diff --git a/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf 
b/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
index a1b8748432..ba1d9c6b05 100644
--- a/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
+++ b/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
@@ -49,7 +49,7 @@
 [Sources.X64]
   X64/VirtualMemory.h
   X64/VirtualMemory.c
-  X64/DxeLoadFunc.c
+  X64/DxeLoadFunc.c
 
 [Sources.IPF]
   Ipf/DxeLoadFunc.c
@@ -117,6 +117,7 @@
   gEfiMdeModulePkgTokenSpaceGuid.PcdPteMemoryEncryptionAddressOrMask## 
CONSUMES
   gEfiMdeModulePkgTokenSpaceGuid.PcdNullPointerDetectionPropertyMask## 
CONSUMES
   gEfiMdeModulePkgTokenSpaceGuid.PcdHeapGuardPropertyMask   ## 
CONSUMES
+  gEfiMdeModulePkgTokenSpaceGuid.PcdCpuStackGuard   ## 
CONSUMES
 
 [Pcd.IA32,Pcd.X64,Pcd.ARM,Pcd.AARCH64]
   gEfiMdeModulePkgTokenSpaceGuid.PcdSetNxForStack   ## 
SOMETIMES_CONSUMES
@@ -132,7 +133,7 @@
 #
 # [Hob]
 # MEMORY_ALLOCATION ## SOMETIMES_PRODUCES # 
MEMORY_ALLOCATION_MODULE for DxeCore
-# MEMORY_ALLOCATION ## SOMETIMES_PRODUCES # New Stack HoB   
+# MEMORY_ALLOCATION ## SOMETIMES_PRODUCES # New Stack HoB
 # MEMORY_ALLOCATION ## SOMETIMES_PRODUCES # Old Stack HOB
 #
 # [Hob.IPF]
diff --git a/MdeModulePkg/Core/DxeIplPeim/Ia32/DxeLoadFunc.c 
b/MdeModulePkg/Core/DxeIplPeim/Ia32/DxeLoadFunc.c
index 5649265367..441096ad0f 100644
--- a/MdeModulePkg/Core/DxeIplPeim/Ia32/DxeLoadFunc.c
+++ b/MdeModulePkg/Core/DxeIplPeim/Ia32/DxeLoadFunc.c
@@ -235,6 +235,10 @@ ToBuildPageTable (
 return TRUE;
   }
 
+  if (PcdGetBool (PcdCpuStackGuard)) {
+return TRUE;
+  }
+
   if (PcdGetBool (PcdSetNxForStack) && IsExecuteDisableBitAvailable ()) {
 return TRUE;
   }
diff --git a/MdeModulePkg/Core/DxeIplPeim/X64/DxeLoadFunc.c 
b/MdeModulePkg/Core/DxeIplPeim/X64/DxeLoadFunc.c
index f613221b81..b75a4489bf 100644
--- a/MdeModulePkg/Core/DxeIplPeim/X64/DxeLoadFunc.c
+++ b/MdeModulePkg/Core/DxeIplPeim/X64/DxeLoadFunc.c
@@ -95,6 +95,7 @@ HandOffToDxeCore (
 // for the DxeIpl and the DxeCore are both X64.
 //
 ASSERT (PcdGetBool (PcdSetNxForStack) == FALSE);
+ASSERT (PcdGetBool (PcdCpuStackGuard) == FALSE);
   }
   
   //
diff --git a/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c 
b/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c
index 29b6205e88..a2466b7766 100644
--- a/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c
+++ b/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c
@@ -117,6 +117,39 @@ EnableExecuteDisableBit (
   AsmWriteMsr64 (0xC080, MsrRegisters);
 }
 
+/**
+  The function will check if page table entry should be splitted to smaller
+  granularity.
+
+  @retval TRUE  Page table should be created.
+  @retval FALSE Page table should not be created.
+**/
+BOOLEAN
+ToSplitPageTable (
+  IN EFI_PHYSICAL_ADDRESS   Address,
+  IN UINTN  Size,
+  IN EFI_PHYSICAL_ADDRESS   StackBase,
+  IN UINTN  StackSize
+  )
+{
+  if (IsNullDetectionEnabled () && Address == 0) {
+return TRUE;
+  }
+
+  if (PcdGetBool (PcdCpuStackGuard)) {
+if (StackBase >= Address && StackBase < (Address + Size)) {
+  return TRUE;
+}
+  }
+
+  if (PcdGetBool (PcdSetNxForStack)) {
+if ((Address < StackBase + StackSize) && ((Address + Size) > StackBase)) {
+  return TRUE;
+}
+  }
+
+  return FALSE;
+}
 /**
   Split 2M page to 4K.
 
@@ -160,7 +193,8 @@ Split2MPageTo4K (
 PageTableEntry->Uint64 = (UINT64) PhysicalAddress4K | AddressEncMask;
 PageTableEntry->Bits.ReadWrite = 1;
 
-if (IsNullDetectionEnabled () && PhysicalAddress4K == 0) {
+if ((IsNullDetectionEnabled () && PhysicalAddress4K == 0) ||
+(PcdGetBool (PcdCpuStackGuard) && PhysicalAddress4K == StackBase)) {
   PageTableEntry->Bits.Present = 0;
 } else {
   PageTableEntry->Bits.Present = 1;
@@ -214,10 +248,7 @@ Split1GPageTo2M (
 
   PhysicalAddress2M = PhysicalAddress;
   for 

[edk2] [PATCH v4 04/11] MdePkg/BaseLib: Add stack switch related definitions for IA32

[Jian J Wang]

> v4:
>

> v3:
>Move two general macros here from CpuExceptionHandlerLib

> v2:
>Add new definitions required by stack switch in IA32

The new definitions include two structures

  IA32_TASK_STATE_SEGMENT
  IA32_TSS_DESCRIPTOR

two macros

  IA32_GDT_TYPE_TSS
  IA32_GDT_ALIGNMENT

and one API

  VOID
  EFIAPI
  AsmWriteTr (
IN UINT16 Selector
);

They're needed to setup task gate and interrupt stack table for stack switch.

Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Jiewen Yao 
Suggested-by: Ayellet Wolman 
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang 
---
 MdePkg/Include/Library/BaseLib.h | 117 +++
 MdePkg/Library/BaseLib/BaseLib.inf   |   3 +
 MdePkg/Library/BaseLib/Ia32/WriteTr.nasm |  36 ++
 MdePkg/Library/BaseLib/X64/WriteTr.nasm  |  37 ++
 4 files changed, 193 insertions(+)
 create mode 100644 MdePkg/Library/BaseLib/Ia32/WriteTr.nasm
 create mode 100644 MdePkg/Library/BaseLib/X64/WriteTr.nasm

diff --git a/MdePkg/Include/Library/BaseLib.h b/MdePkg/Include/Library/BaseLib.h
index d33c3b6b38..2b98af4cd1 100644
--- a/MdePkg/Include/Library/BaseLib.h
+++ b/MdePkg/Include/Library/BaseLib.h
@@ -6647,6 +6647,8 @@ typedef struct {
 #define IA32_IDT_GATE_TYPE_INTERRUPT_32  0x8E
 #define IA32_IDT_GATE_TYPE_TRAP_32   0x8F
 
+#define IA32_GDT_TYPE_TSS   0x9
+#define IA32_GDT_ALIGNMENT  8
 
 #if defined (MDE_CPU_IA32)
 ///
@@ -6663,6 +6665,70 @@ typedef union {
   UINT64  Uint64;
 } IA32_IDT_GATE_DESCRIPTOR;
 
+#pragma pack (1)
+//
+// IA32 Task-State Segment Definition
+//
+typedef struct {
+  UINT16PreviousTaskLink;
+  UINT16Reserved_2;
+  UINT32ESP0;
+  UINT16SS0;
+  UINT16Reserved_10;
+  UINT32ESP1;
+  UINT16SS1;
+  UINT16Reserved_18;
+  UINT32ESP2;
+  UINT16SS2;
+  UINT16Reserved_26;
+  UINT32CR3;
+  UINT32EIP;
+  UINT32EFLAGS;
+  UINT32EAX;
+  UINT32ECX;
+  UINT32EDX;
+  UINT32EBX;
+  UINT32ESP;
+  UINT32EBP;
+  UINT32ESI;
+  UINT32EDI;
+  UINT16ES;
+  UINT16Reserved_74;
+  UINT16CS;
+  UINT16Reserved_78;
+  UINT16SS;
+  UINT16Reserved_82;
+  UINT16DS;
+  UINT16Reserved_86;
+  UINT16FS;
+  UINT16Reserved_90;
+  UINT16GS;
+  UINT16Reserved_94;
+  UINT16LDTSegmentSelector;
+  UINT16Reserved_98;
+  UINT16T;
+  UINT16IOMapBaseAddress;
+} IA32_TASK_STATE_SEGMENT;
+
+typedef union {
+  struct {
+UINT32  LimitLow:16;///< Segment Limit 15..00
+UINT32  BaseLow:16; ///< Base Address  15..00
+UINT32  BaseMid:8;  ///< Base Address  23..16
+UINT32  Type:4; ///< Type (1 0 B 1)
+UINT32  Reserved_43:1;  ///< 0
+UINT32  DPL:2;  ///< Descriptor Privilege Level
+UINT32  P:1;///< Segment Present
+UINT32  LimitHigh:4;///< Segment Limit 19..16
+UINT32  AVL:1;  ///< Available for use by system software
+UINT32  Reserved_52:2;  ///< 0 0
+UINT32  G:1;///< Granularity
+UINT32  BaseHigh:8; ///< Base Address 31..24
+  } Bits;
+  UINT64  Uint64;
+} IA32_TSS_DESCRIPTOR;
+#pragma pack ()
+
 #endif
 
 #if defined (MDE_CPU_X64)
@@ -6685,6 +6751,46 @@ typedef union {
   } Uint128;   
 } IA32_IDT_GATE_DESCRIPTOR;
 
+#pragma pack (1)
+//
+// IA32 Task-State Segment Definition
+//
+typedef struct {
+  UINT32Reserved_0;
+  UINT64RSP0;
+  UINT64RSP1;
+  UINT64RSP2;
+  UINT64Reserved_28;
+  UINT64IST[7];
+  UINT64Reserved_92;
+  UINT16Reserved_100;
+  UINT16IOMapBaseAddress;
+} IA32_TASK_STATE_SEGMENT;
+
+typedef union {
+  struct {
+UINT32  LimitLow:16;///< Segment Limit 15..00
+UINT32  BaseLow:16; ///< Base Address  15..00
+UINT32  BaseMidl:8; ///< Base Address  23..16
+UINT32  Type:4; ///< Type (1 0 B 1)
+UINT32  Reserved_43:1;  ///< 0
+UINT32  DPL:2;  ///< Descriptor Privilege Level
+UINT32  P:1;///< Segment Present
+UINT32  LimitHigh:4;///< Segment Limit 19..16
+UINT32  AVL:1;  ///< Available for use by system software
+UINT32  Reserved_52:2;  ///< 0 0
+UINT32  G:1;///< Granularity
+UINT32  BaseMidh:8; ///< Base Address  31..24
+UINT32  BaseHigh:32;///< Base Address  63..32
+UINT32  Reserved_96:32; ///< Reserved
+  } Bits;
+  struct {
+UINT64  Uint64;
+UINT64  Uint64_1;
+  } Uint128;
+} IA32_TSS_DESCRIPTOR;
+#pragma pack ()
+
 #endif
 
 ///
@@ -8950,6 +9056,17 @@ AsmRdRand64  (
   OUT UINT64*Rand
   );
 
+/**
+  Load given selector into TR register
+
+  @param[in] Selector Task segment selector
+**/
+VOID
+EFIAPI
+AsmWriteTr (
+  IN UINT16 Selector
+  );
+
 #endif
 #endif
 
diff --git a/MdePkg/Library/BaseLib/BaseLib.inf 

[edk2] [PATCH v4 01/11] MdeModulePkg/metafile: Add PCD PcdCpuStackGuard

[Jian J Wang]

> v2/v3/v4:
>

PcdCpuStackGuard is introduced to enable/disable Stack Guard feature.
Its value is FALSE by default. This feature is suggested to be enabled
only if the cpu driver and CpuExceptionHandlerLib have supported stack
switch for the processor used in platform. Otherwise the exception dump
message won't be printed out when there's a stack overflow happened.

Cc: Star Zeng 
Cc: Eric Dong 
Suggested-by: Ayellet Wolman 
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang 
---
 MdeModulePkg/MdeModulePkg.dec | 7 +++
 MdeModulePkg/MdeModulePkg.uni | 7 +++
 2 files changed, 14 insertions(+)

diff --git a/MdeModulePkg/MdeModulePkg.dec b/MdeModulePkg/MdeModulePkg.dec
index 856d67aceb..b3831a21ad 100644
--- a/MdeModulePkg/MdeModulePkg.dec
+++ b/MdeModulePkg/MdeModulePkg.dec
@@ -949,6 +949,13 @@
   # @Prompt The Heap Guard feature mask
   gEfiMdeModulePkgTokenSpaceGuid.PcdHeapGuardPropertyMask|0x0|UINT8|0x30001054
 
+  ## Indicates if UEFI Stack Guard will be enabled.
+  #  If enabled, stack overflow in UEFI can be caught, preventing chaotic 
consequences.
+  #   TRUE  - UEFI Stack Guard will be enabled.
+  #   FALSE - UEFI Stack Guard will be disabled.
+  # @Prompt Enable UEFI Stack Guard.
+  gEfiMdeModulePkgTokenSpaceGuid.PcdCpuStackGuard|FALSE|BOOLEAN|0x30001055
+
 [PcdsFixedAtBuild, PcdsPatchableInModule]
   ## Dynamic type PCD can be registered callback function for Pcd setting 
action.
   #  PcdMaxPeiPcdCallBackNumberPerPcdEntry indicates the maximum number of 
callback function
diff --git a/MdeModulePkg/MdeModulePkg.uni b/MdeModulePkg/MdeModulePkg.uni
index 588905a9a1..43dd5103be 100644
--- a/MdeModulePkg/MdeModulePkg.uni
+++ b/MdeModulePkg/MdeModulePkg.uni
@@ -1204,3 +1204,10 @@

 "  0 - The returned pool is adjacent to the bottom guard 
page.\n"

 "  1 - The returned pool is adjacent to the top guard 
page."
 
+#string STR_gEfiMdeModulePkgTokenSpaceGuid_PcdCpuStackGuard_PROMPT  #language 
en-US "Enable UEFI Stack Guard"
+
+#string STR_gEfiMdeModulePkgTokenSpaceGuid_PcdCpuStackGuard_HELP#language 
en-US "Indicates if UEFI Stack Guard will be enabled.\n"
+   
 "  If enabled, stack overflow in UEFI can be caught, preventing chaotic 
consequences.\n"
+   
 "   TRUE  - UEFI Stack Guard will be enabled.\n"
+   
 "   FALSE - UEFI Stack Guard will be disabled."
+
-- 
2.15.1.windows.2

___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel

[edk2] [PATCH v4 05/11] UefiCpuPkg/CpuExceptionHandlerLib: Add stack switch support

[Jian J Wang]

> v4:
> Update related code using CPU_EXCEPTION_INIT_DATA_EX which has been
> changed to CPU_EXCEPTION_INIT_DATA.

> v3:
>  a. Move more general definitions to BaseLib.h
>  b. Update code to use new data structure CPU_EXCEPTION_INIT_DATA_EX
>  c. Implement new API InitializeCpuExceptionHandlersEx for DxeException
>  d. Add dummy InitializeCpuExceptionHandlersEx for SEC, PEI and SMM

> v2:
>  a. Move common TSS structure and API definitions to BaseLib.h
>  b. Add EXCEPTION_STACK_SWITCH_DATA to convery data used to setup stack
> switch. This can avoid allocating memory for it in this library.
>  c. Add globals to reserve memory for stack switch initialized in early
> phase of DXE core.
>  d. Remove the filter code used to exclude boot modes which doesn't support
> memory allocation because those memory can passed in by parameter now.
>  e. Remove the nasm macro to define exception handler one by one and add a
> function to return the start address of each handler.

If Stack Guard is enabled and there's really a stack overflow happened during
boot, a Page Fault exception will be triggered. Because the stack is out of
usage, the exception handler, which shares the stack with normal UEFI driver,
cannot be executed and cannot dump the processor information.

Without those information, it's very difficult for the BIOS developers locate
the root cause of stack overflow. And without a workable stack, the developer
cannot event use single step to debug the UEFI driver with JTAG debugger.

In order to make sure the exception handler to execute normally after stack
overflow. We need separate stacks for exception handlers in case of unusable
stack.

IA processor allows to switch to a new stack during handling interrupt and
exception. But X64 and IA32 provides different ways to make it. X64 provides
interrupt stack table (IST) to allow maximum 7 different exceptions to have
new stack for its handler. IA32 doesn't have IST mechanism and can only use
task gate to do it since task switch allows to load a new stack through its
task-state segment (TSS).

The new API, InitializeCpuExceptionHandlersEx, is implemented to complete
extra initialization for stack switch of exception handler. Since setting
up stack switch needs allocating new memory for new stack, new GDT table
and task-state segment but the initialization method will be called in
different phases which have no consistent way to reserve those memory, this
new API is allowed to pass the reserved resources to complete the extra
works. This is cannot be done by original InitializeCpuExceptionHandlers.

Considering exception handler initialization for MP situation, this new API
is also necessary, because AP is not supposed to allocate memory. So the
memory needed for stack switch have to be reserved in BSP before waking up
AP and then pass them to InitializeCpuExceptionHandlersEx afterwards.

Since Stack Guard feature is available only for DXE phase at this time, the
new API is fully implemented for DXE only. Other phases implement a dummy
one which just calls InitializeCpuExceptionHandlers().

Cc: Jiewen Yao 
Cc: Eric Dong 
Cc: Laszlo Ersek 
Cc: Michael Kinney 
Suggested-by: Ayellet Wolman 
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang 
---
 .../CpuExceptionHandlerLib/CpuExceptionCommon.h|  39 ++
 .../DxeCpuExceptionHandlerLib.inf  |   6 +
 .../Library/CpuExceptionHandlerLib/DxeException.c  |  83 +
 .../Ia32/ArchExceptionHandler.c| 187 ++
 .../Ia32/ArchInterruptDefs.h   |   8 +
 .../Ia32/ExceptionTssEntryAsm.nasm | 398 +
 .../CpuExceptionHandlerLib/PeiCpuException.c   |  34 +-
 .../PeiCpuExceptionHandlerLib.inf  |   1 +
 .../CpuExceptionHandlerLib/SecPeiCpuException.c|  34 +-
 .../SecPeiCpuExceptionHandlerLib.inf   |   1 +
 .../SmmCpuExceptionHandlerLib.inf  |   1 +
 .../Library/CpuExceptionHandlerLib/SmmException.c  |  34 +-
 .../X64/ArchExceptionHandler.c | 155 
 .../CpuExceptionHandlerLib/X64/ArchInterruptDefs.h |   3 +
 14 files changed, 981 insertions(+), 3 deletions(-)
 create mode 100644 
UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ExceptionTssEntryAsm.nasm

diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.h 
b/UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.h
index 740a58828b..e10d9379d5 100644
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.h
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.h
@@ -48,6 +48,17 @@
 0xb21d9148, 0x9211, 0x4d8f, { 0xad, 0xd3, 0x66, 0xb1, 0x89, 0xc9, 0x2c, 
0x83 } \
   }
 
+#define CPU_STACK_SWITCH_EXCEPTION_NUMBER \
+  FixedPcdGetSize (PcdCpuStackSwitchExceptionList)
+

[edk2] [PATCH v4 06/11] MdeModulePkg/CpuExceptionHandlerLibNull: Add new API implementation

[Jian J Wang]

> v4:
>Change CPU_EXCEPTION_INIT_DATA_EX to CPU_EXCEPTION_INIT_DATA

> v3:
>Newly added

This patch add implementation of new API InitializeCpuExceptionHandlersEx
introduced into CpuExceptionHandlerLib on behalf of Stack Guard feature.

Cc: Star Zeng 
Cc: Eric Dong 
Cc: Jiewen Yao 
Suggested-by: Ayellet Wolman 
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang 
---
 .../CpuExceptionHandlerLibNull.c   | 34 ++
 1 file changed, 34 insertions(+)

diff --git 
a/MdeModulePkg/Library/CpuExceptionHandlerLibNull/CpuExceptionHandlerLibNull.c 
b/MdeModulePkg/Library/CpuExceptionHandlerLibNull/CpuExceptionHandlerLibNull.c
index cbe4768633..723e644e38 100644
--- 
a/MdeModulePkg/Library/CpuExceptionHandlerLibNull/CpuExceptionHandlerLibNull.c
+++ 
b/MdeModulePkg/Library/CpuExceptionHandlerLibNull/CpuExceptionHandlerLibNull.c
@@ -111,3 +111,37 @@ DumpCpuContext (
   )
 {
 }
+
+/**
+  Initializes all CPU exceptions entries with optional extra initializations.
+
+  By default, this method should include all functionalities implemented by
+  InitializeCpuExceptionHandlers(), plus extra initialization works, if any.
+  This could be done by calling InitializeCpuExceptionHandlers() directly
+  in this method besides the extra works.
+
+  InitData is optional and its use and content are processor arch dependent.
+  The typical usage of it is to convey resources which have to be reserved
+  elsewhere and are necessary for the extra initializations of exception.
+
+  @param[in]  VectorInfoPointer to reserved vector list.
+  @param[in]  InitData  Pointer to data optional for extra initializations
+of exception.
+
+  @retval EFI_SUCCESS The exceptions have been successfully
+  initialized.
+  @retval EFI_INVALID_PARAMETER   VectorInfo or InitData contains invalid
+  content.
+  @retval EFI_UNSUPPORTED This function is not supported.
+
+**/
+EFI_STATUS
+EFIAPI
+InitializeCpuExceptionHandlersEx (
+  IN EFI_VECTOR_HANDOFF_INFO*VectorInfo OPTIONAL,
+  IN CPU_EXCEPTION_INIT_DATA*InitData OPTIONAL
+  )
+{
+  return InitializeCpuExceptionHandlers (VectorInfo);
+}
+
-- 
2.15.1.windows.2

___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel

[edk2] [PATCH v4 00/11] Implement stack guard feature

[Jian J Wang]

> v4:
>  a. Change name of new data structure from CPU_EXCEPTION_INIT_DATA_EX
> to CPU_EXCEPTION_INIT_DATA
>  b. Add "size" field for all "buffer" fields in CPU_EXCEPTION_INIT_DATA
>  c. Add separate fields for IA32 and X64 in CPU_EXCEPTION_INIT_DATA
>  d. Change related code per changes in CPU_EXCEPTION_INIT_DATA

> v3:
>  a. Change new API InitializeCpuExceptionStackSwitchHandlers() to
> InitializeCpuExceptionHandlersEx(). Related code are updated accordingly.
>  b. Move EXCEPTION_STACK_SWITCH_DATA to CpuExceptionHandlerLib.h
> and change the name to CPU_EXCEPTION_INIT_DATA_EX for the sake
> of the API name change.
>  c. Add more general macros in BaseLib.h.
>  d. Add dummy implementation of InitializeCpuExceptionHandlersEx for
> SEC, PEI and SMM but implement a full version for DXE.
>  e. Add dummy InitializeCpuExceptionHandlersEx for ARM's 
> CpuExceptionHandlerLib
> and NULL version of CpuExceptionHandlerLib
>  f. Call InitializeCpuExceptionHandlersEx() in DxeMain instead of 
> InitializeCpuExceptionHandlers().


> v2:
>  a. Introduce and implement new API 
> InitializeCpuExceptionStackSwitchHandlers().
>  b. Add stack switch related general definitions of IA32 in BaseLib.h.
>  c. Add two new PCDs to configure exception vector list and stack size.
>  d. Add code to save/restore GDTR, IDTR and TR for AP.
>  e. Refactor exception handler code for stack switch.
>  f. Add code to setup stack switch for AP besides BSP.

Stack guard feature makes use of paging mechanism to monitor if there's a
stack overflow occurred during boot. A new PCD PcdCpuStackGuard is added to
enable/disable this feature. PCD PcdCpuStackSwitchExceptionList and
PcdCpuKnownGoodStackSize are introduced to configure the required exceptions
and stack size.

If this feature is enabled, DxeIpl will setup page tables and set page where
the stack bottom is at to be NON-PRESENT. If stack overflow occurs, Page
Fault exception will be triggered.

In order to make sure exception handler works normally even when the stack
is corrupted, stack switching is implemented in exception library.

Due to the mechanism behind Stack Guard, this feature is only avaiable for
UEFI drivers (memory avaiable). That also means it doesn't support NT32 
emulated platform (paging not supported).

Jian J Wang (11):
  MdeModulePkg/metafile: Add PCD PcdCpuStackGuard
  UefiCpuPkg/UefiCpuPkg.dec: Add two new PCDs for stack switch
  MdeModulePkg/CpuExceptionHandlerLib.h: Add a new API
InitializeCpuExceptionHandlersEx
  MdePkg/BaseLib: Add stack switch related definitions for IA32
  UefiCpuPkg/CpuExceptionHandlerLib: Add stack switch support
  MdeModulePkg/CpuExceptionHandlerLibNull: Add new API implementation
  ArmPkg/ArmExceptionLib: Add implementation of new API
  UefiCpuPkg/MpLib: Add GDTR, IDTR and TR in saved AP data
  UefiCpuPkg/CpuDxe: Initialize stack switch for MP
  MdeModulePkg/Core/Dxe: Call new API InitializeCpuExceptionHandlersEx
instead
  MdeModulePkg/DxeIpl: Enable paging for Stack Guard

 ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.c   |  33 ++
 MdeModulePkg/Core/Dxe/DxeMain/DxeMain.c|   2 +-
 MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf|   5 +-
 MdeModulePkg/Core/DxeIplPeim/Ia32/DxeLoadFunc.c|   4 +
 MdeModulePkg/Core/DxeIplPeim/X64/DxeLoadFunc.c |   1 +
 MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c   |  51 ++-
 .../Include/Library/CpuExceptionHandlerLib.h   |  91 +
 .../CpuExceptionHandlerLibNull.c   |  34 ++
 MdeModulePkg/MdeModulePkg.dec  |   7 +
 MdeModulePkg/MdeModulePkg.uni  |   7 +
 MdePkg/Include/Library/BaseLib.h   | 117 ++
 MdePkg/Library/BaseLib/BaseLib.inf |   3 +
 MdePkg/Library/BaseLib/Ia32/WriteTr.nasm   |  36 ++
 MdePkg/Library/BaseLib/X64/WriteTr.nasm|  37 ++
 UefiCpuPkg/CpuDxe/CpuDxe.inf   |   3 +
 UefiCpuPkg/CpuDxe/CpuMp.c  | 188 ++
 .../CpuExceptionHandlerLib/CpuExceptionCommon.h|  39 ++
 .../DxeCpuExceptionHandlerLib.inf  |   6 +
 .../Library/CpuExceptionHandlerLib/DxeException.c  |  83 +
 .../Ia32/ArchExceptionHandler.c| 187 ++
 .../Ia32/ArchInterruptDefs.h   |   8 +
 .../Ia32/ExceptionTssEntryAsm.nasm | 398 +
 .../CpuExceptionHandlerLib/PeiCpuException.c   |  34 +-
 .../PeiCpuExceptionHandlerLib.inf  |   1 +
 .../CpuExceptionHandlerLib/SecPeiCpuException.c|  34 +-
 .../SecPeiCpuExceptionHandlerLib.inf   |   1 +
 .../SmmCpuExceptionHandlerLib.inf  |   1 +
 .../Library/CpuExceptionHandlerLib/SmmException.c  |  34 +-
 .../X64/ArchExceptionHandler.c | 155 
 .../CpuExceptionHandlerLib/X64/ArchInterruptDefs.h |   3 +
 UefiCpuPkg/Library/MpInitLib/MpLib.c   |  17 +
 UefiCpuPkg/Library/MpInitLib/MpLib.h 

[edk2] [PATCH v4 07/11] ArmPkg/ArmExceptionLib: Add implementation of new API

[Jian J Wang]

> v4:
>Change CPU_EXCEPTION_INIT_DATA_EX to CPU_EXCEPTION_INIT_DATA

> v3:
>Newly added

This patch add implementation of following new API introduced into
CpuExceptionHandlerLib. Since this lib hasn't support Stack Guard
and stack switch, the new method just calls original
InitializeCpuExceptionHandlers.

  EFI_STATUS
  EFIAPI
  InitializeCpuExceptionHandlersEx (
IN EFI_VECTOR_HANDOFF_INFO*VectorInfo OPTIONAL,
IN CPU_EXCEPTION_INIT_DATA*InitDataEx OPTIONAL
);

Cc: Leif Lindholm 
Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Suggested-by: Ayellet Wolman 
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang 
Reviewed-by: Ard Biesheuvel 
---
 ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.c | 33 
 1 file changed, 33 insertions(+)

diff --git a/ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.c 
b/ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.c
index e8ea1f159d..cebb26a4ce 100644
--- a/ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.c
+++ b/ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.c
@@ -320,3 +320,36 @@ CommonCExceptionHandler(
 
   DefaultExceptionHandler(ExceptionType, SystemContext);
 }
+
+/**
+  Initializes all CPU exceptions entries with optional extra initializations.
+
+  By default, this method should include all functionalities implemented by
+  InitializeCpuExceptionHandlers(), plus extra initialization works, if any.
+  This could be done by calling InitializeCpuExceptionHandlers() directly
+  in this method besides the extra works.
+
+  InitData is optional and its use and content are processor arch dependent.
+  The typical usage of it is to convey resources which have to be reserved
+  elsewhere and are necessary for the extra initializations of exception.
+
+  @param[in]  VectorInfoPointer to reserved vector list.
+  @param[in]  InitData  Pointer to data optional for extra initializations
+of exception.
+
+  @retval EFI_SUCCESS The exceptions have been successfully
+  initialized.
+  @retval EFI_INVALID_PARAMETER   VectorInfo or InitData contains invalid
+  content.
+
+**/
+EFI_STATUS
+EFIAPI
+InitializeCpuExceptionHandlersEx (
+  IN EFI_VECTOR_HANDOFF_INFO*VectorInfo OPTIONAL,
+  IN CPU_EXCEPTION_INIT_DATA*InitData OPTIONAL
+  )
+{
+  return InitializeCpuExceptionHandlers (VectorInfo);
+}
+
-- 
2.15.1.windows.2

___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel

[edk2] [PATCH v4 02/11] UefiCpuPkg/UefiCpuPkg.dec: Add two new PCDs for stack switch

[Jian J Wang]

> v2/v3/v4:
>

Stack switch is required by Stack Guard feature. Following two PCDs are
introduced to simplify the resource allocation for initializing stack switch.

  gUefiCpuPkgTokenSpaceGuid.PcdCpuStackSwitchExceptionList
  gUefiCpuPkgTokenSpaceGuid.PcdCpuKnownGoodStackSize

PcdCpuStackSwitchExceptionList is used to specify which exception will
have separate stack for its handler. For Stack Guard feature, #PF must
be specified at least.

PcdCpuKnownGoodStackSize is used to specify the size of knwon good stack for an
exception handler. Cpu driver or other drivers should use this PCD to reserve
new stack memory for exceptions specified by above PCD.

Cc: Eric Dong 
Cc: Laszlo Ersek 
Cc: Jiewen Yao 
Suggested-by: Ayellet Wolman 
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang 
---
 UefiCpuPkg/UefiCpuPkg.dec | 12 
 1 file changed, 12 insertions(+)

diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec
index d2965ba14c..83eb6eed40 100644
--- a/UefiCpuPkg/UefiCpuPkg.dec
+++ b/UefiCpuPkg/UefiCpuPkg.dec
@@ -137,6 +137,18 @@
   # @Prompt Lock SMM Feature Control MSR.
   
gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmFeatureControlMsrLock|TRUE|BOOLEAN|0x3213210B
 
+[PcdsFixedAtBuild]
+  ## List of exception vectors which need switching stack.
+  #  This PCD will only take into effect if PcdCpuStackGuard is enabled.
+  #  By default exception #DD(8), #PF(14) are supported.
+  # @Prompt Specify exception vectors which need switching stack.
+  gUefiCpuPkgTokenSpaceGuid.PcdCpuStackSwitchExceptionList|{0x08, 
0x0E}|VOID*|0x30002000
+
+  ## Size of good stack for an exception.
+  #  This PCD will only take into effect if PcdCpuStackGuard is enabled.
+  # @Prompt Specify size of good stack of exception which need switching stack.
+  gUefiCpuPkgTokenSpaceGuid.PcdCpuKnownGoodStackSize|2048|UINT32|0x30002001
+
 [PcdsFixedAtBuild, PcdsPatchableInModule]
   ## This value is the CPU Local APIC base address, which aligns the address 
on a 4-KByte boundary.
   # @Prompt Configure base address of CPU Local APIC
-- 
2.15.1.windows.2

___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel

Re: [edk2] [Patch] UefiCpuPkg: Update SecCore to get BFV size based on BFV header FvLength

[Zeng, Star]

Reviewed-by: Star Zeng 

-Original Message-
From: Gao, Liming 
Sent: Wednesday, December 6, 2017 4:02 PM
To: edk2-devel@lists.01.org
Cc: Dong, Eric ; Zeng, Star 
Subject: [Patch] UefiCpuPkg: Update SecCore to get BFV size based on BFV header 
FvLength

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao 
Cc: Eric Dong 
Cc: Star Zeng 
---
 UefiCpuPkg/SecCore/SecMain.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/UefiCpuPkg/SecCore/SecMain.c b/UefiCpuPkg/SecCore/SecMain.c index 
173bbfcfcb..c241d3704a 100644
--- a/UefiCpuPkg/SecCore/SecMain.c
+++ b/UefiCpuPkg/SecCore/SecMain.c
@@ -189,7 +189,7 @@ SecStartup (
   //
   SecCoreData.DataSize   = (UINT16) sizeof (EFI_SEC_PEI_HAND_OFF);
   SecCoreData.BootFirmwareVolumeBase = BootFirmwareVolume;
-  SecCoreData.BootFirmwareVolumeSize = (UINTN)(0x1ULL - (UINTN) 
BootFirmwareVolume);
+  SecCoreData.BootFirmwareVolumeSize = 
+ (UINTN)((EFI_FIRMWARE_VOLUME_HEADER *) BootFirmwareVolume)->FvLength;
   SecCoreData.TemporaryRamBase   = (VOID*)(UINTN) TempRamBase;
   SecCoreData.TemporaryRamSize   = SizeOfRam;
   SecCoreData.PeiTemporaryRamBase= SecCoreData.TemporaryRamBase;
--
2.11.0.windows.1

___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel

[edk2] [Patch] UefiCpuPkg: Update SecCore to get BFV size based on BFV header FvLength

[Liming Gao]

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao 
Cc: Eric Dong 
Cc: Star Zeng 
---
 UefiCpuPkg/SecCore/SecMain.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/UefiCpuPkg/SecCore/SecMain.c b/UefiCpuPkg/SecCore/SecMain.c
index 173bbfcfcb..c241d3704a 100644
--- a/UefiCpuPkg/SecCore/SecMain.c
+++ b/UefiCpuPkg/SecCore/SecMain.c
@@ -189,7 +189,7 @@ SecStartup (
   //
   SecCoreData.DataSize   = (UINT16) sizeof (EFI_SEC_PEI_HAND_OFF);
   SecCoreData.BootFirmwareVolumeBase = BootFirmwareVolume;
-  SecCoreData.BootFirmwareVolumeSize = (UINTN)(0x1ULL - (UINTN) 
BootFirmwareVolume);
+  SecCoreData.BootFirmwareVolumeSize = (UINTN)((EFI_FIRMWARE_VOLUME_HEADER *) 
BootFirmwareVolume)->FvLength;
   SecCoreData.TemporaryRamBase   = (VOID*)(UINTN) TempRamBase;
   SecCoreData.TemporaryRamSize   = SizeOfRam;
   SecCoreData.PeiTemporaryRamBase= SecCoreData.TemporaryRamBase;
-- 
2.11.0.windows.1

___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel