[edk2] [PATCH] MdePkg/DevicePathToText: Fix iSCSI.Lun byte order issue
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni
Cc: Liming Gao
---
MdePkg/Library/UefiDevicePathLib/DevicePathToText.c | 14 --
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/MdePkg/Library/UefiDevicePathLib/DevicePathToText.c
b/MdePkg/Library/UefiDevicePathLib/DevicePathToText.c
index 63542dba96..df1f218776 100644
--- a/MdePkg/Library/UefiDevicePathLib/DevicePathToText.c
+++ b/MdePkg/Library/UefiDevicePathLib/DevicePathToText.c
@@ -2,7 +2,7 @@
DevicePathToText protocol as defined in the UEFI 2.0 specification.
(C) Copyright 2015 Hewlett-Packard Development Company, L.P.
-Copyright (c) 2013 - 2017, Intel Corporation. All rights reserved.
+Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD
License
which accompanies this distribution. The full text of the license may be
found at
@@ -1539,18 +1539,20 @@ DevPathToTextiSCSI (
{
ISCSI_DEVICE_PATH_WITH_NAME *ISCSIDevPath;
UINT16 Options;
+ UINTN Index;
ISCSIDevPath = DevPath;
UefiDevicePathLibCatPrint (
Str,
-L"iSCSI(%a,0x%x,0x%lx,",
+L"iSCSI(%a,0x%x,0x",
ISCSIDevPath->TargetName,
-ISCSIDevPath->TargetPortalGroupTag,
-ISCSIDevPath->Lun
+ISCSIDevPath->TargetPortalGroupTag
);
-
+ for (Index = 0; Index < ARRAY_SIZE (ISCSIDevPath->Lun); Index++) {
+UefiDevicePathLibCatPrint (Str, L"%02x", ISCSIDevPath->Lun[Index]);
+ }
Options = ISCSIDevPath->LoginOption;
- UefiDevicePathLibCatPrint (Str, L"%s,", (((Options >> 1) & 0x0001) != 0) ?
L"CRC32C" : L"None");
+ UefiDevicePathLibCatPrint (Str, L",%s,", (((Options >> 1) & 0x0001) != 0) ?
L"CRC32C" : L"None");
UefiDevicePathLibCatPrint (Str, L"%s,", (((Options >> 3) & 0x0001) != 0) ?
L"CRC32C" : L"None");
if (((Options >> 11) & 0x0001) != 0) {
UefiDevicePathLibCatPrint (Str, L"%s,", L"None");
--
2.16.1.windows.1
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Re: [edk2] [PATCH v1 21/27] BaseTools: replace string with predefined constant
Should use DT.PLATFORM_COMPONENT_TYPE_LIBRARY_CLASS, because current in the
file header it use "import Common.DataType as DT".
Best Regards,
Zhu Yonghong
-Original Message-
From: Carsey, Jaben
Sent: Friday, April 20, 2018 11:52 PM
To: edk2-devel@lists.01.org
Cc: Gao, Liming ; Zhu, Yonghong
Subject: [PATCH v1 21/27] BaseTools: replace string with predefined constant
Cc: Liming Gao
Cc: Yonghong Zhu
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jaben Carsey
---
BaseTools/Source/Python/Ecc/Check.py | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/BaseTools/Source/Python/Ecc/Check.py
b/BaseTools/Source/Python/Ecc/Check.py
index c0e8006dcc51..6490670b0ddb 100644
--- a/BaseTools/Source/Python/Ecc/Check.py
+++ b/BaseTools/Source/Python/Ecc/Check.py
@@ -787,7 +787,7 @@ class Check(object):
continue
SqlCommand = """select Value3 from Inf where BelongsToFile
=
(select ID from File where lower(FullPath)
= lower('%s'))
-and Value2 = '%s'""" % (LibraryIns,
'LIBRARY_CLASS')
+and Value2 = '%s'""" % (LibraryIns,
PLATFORM_COMPONENT_TYPE_LIBRARY_CLASS)
RecordSet = EccGlobalData.gDb.TblInf.Exec(SqlCommand)
IsFound = False
for Record in RecordSet:
--
2.16.2.windows.1
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Re: [edk2] [PATCH v1 18/27] BaseTools: Replace PCD type strings with predefined constant
GenFdsGlobalVariable.py: should use DataType.TAB_PCDS_FIXED_AT_BUILD format,
because it use import Common.DataType as DataType in file header.
Best Regards,
Zhu Yonghong
-Original Message-
From: Carsey, Jaben
Sent: Friday, April 20, 2018 11:52 PM
To: edk2-devel@lists.01.org
Cc: Gao, Liming ; Zhu, Yonghong
Subject: [PATCH v1 18/27] BaseTools: Replace PCD type strings with predefined
constant
Cc: Liming Gao
Cc: Yonghong Zhu
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jaben Carsey
---
BaseTools/Source/Python/AutoGen/AutoGen.py | 4 +--
BaseTools/Source/Python/AutoGen/GenC.py| 4 +--
BaseTools/Source/Python/AutoGen/GenPcdDb.py| 2 +-
BaseTools/Source/Python/Common/DataType.py | 3 ++
BaseTools/Source/Python/Common/MigrationUtilities.py | 2 +-
BaseTools/Source/Python/GenFds/FfsInfStatement.py | 2 +-
BaseTools/Source/Python/GenFds/GenFdsGlobalVariable.py | 4 +--
BaseTools/Source/Python/Workspace/DecBuildData.py | 22 +++---
BaseTools/Source/Python/Workspace/DscBuildData.py | 22 +++---
BaseTools/Source/Python/Workspace/InfBuildData.py | 26 -
BaseTools/Source/Python/build/BuildReport.py | 30
++--
11 files changed, 62 insertions(+), 59 deletions(-)
diff --git a/BaseTools/Source/Python/AutoGen/AutoGen.py
b/BaseTools/Source/Python/AutoGen/AutoGen.py
index 2f60c17439c0..9b2164ed8216 100644
--- a/BaseTools/Source/Python/AutoGen/AutoGen.py
+++ b/BaseTools/Source/Python/AutoGen/AutoGen.py
@@ -870,8 +870,8 @@ class WorkspaceAutoGen(AutoGen):
def _CheckPcdDefineAndType(self):
PcdTypeList = [
TAB_PCDS_FIXED_AT_BUILD, TAB_PCDS_PATCHABLE_IN_MODULE,
TAB_PCDS_FEATURE_FLAG,
-TAB_PCDS_DYNAMIC, #"DynamicHii", "DynamicVpd",
-TAB_PCDS_DYNAMIC_EX, # "DynamicExHii", "DynamicExVpd"
+TAB_PCDS_DYNAMIC, #TAB_PCDS_DYNAMIC_HII, TAB_PCDS_DYNAMIC_VPD,
+TAB_PCDS_DYNAMIC_EX, # TAB_PCDS_DYNAMIC_EX_HII,
+ TAB_PCDS_DYNAMIC_EX_VPD
]
# This dict store PCDs which are not used by any modules with
specified arches diff --git a/BaseTools/Source/Python/AutoGen/GenC.py
b/BaseTools/Source/Python/AutoGen/GenC.py
index 86b21de31eee..6b2ee87b2211 100644
--- a/BaseTools/Source/Python/AutoGen/GenC.py
+++ b/BaseTools/Source/Python/AutoGen/GenC.py
@@ -28,8 +28,8 @@ from IdfClassObject import *
## PCD type string
gItemTypeStringDatabase = {
-TAB_PCDS_FEATURE_FLAG : 'FixedAtBuild',
-TAB_PCDS_FIXED_AT_BUILD : 'FixedAtBuild',
+TAB_PCDS_FEATURE_FLAG : TAB_PCDS_FIXED_AT_BUILD,
+TAB_PCDS_FIXED_AT_BUILD : TAB_PCDS_FIXED_AT_BUILD,
TAB_PCDS_PATCHABLE_IN_MODULE: 'BinaryPatch',
TAB_PCDS_DYNAMIC: '',
TAB_PCDS_DYNAMIC_DEFAULT: '',
diff --git a/BaseTools/Source/Python/AutoGen/GenPcdDb.py
b/BaseTools/Source/Python/AutoGen/GenPcdDb.py
index afd690bc5b1b..9374ca4820ef 100644
--- a/BaseTools/Source/Python/AutoGen/GenPcdDb.py
+++ b/BaseTools/Source/Python/AutoGen/GenPcdDb.py
@@ -1217,7 +1217,7 @@ def CreatePcdDatabasePhaseSpecificAutoGen (Platform,
DynamicPcdList, Phase):
Pcd.InitString = 'UNINIT'
if Pcd.DatumType == 'VOID*':
-if Pcd.Type not in ["DynamicVpd", "DynamicExVpd"]:
+if Pcd.Type not in [TAB_PCDS_DYNAMIC_VPD, TAB_PCDS_DYNAMIC_EX_VPD]:
Pcd.TokenTypeList = ['PCD_TYPE_STRING']
else:
Pcd.TokenTypeList = []
diff --git a/BaseTools/Source/Python/Common/DataType.py
b/BaseTools/Source/Python/Common/DataType.py
index 13e9c96dd51b..40a162adf33c 100644
--- a/BaseTools/Source/Python/Common/DataType.py
+++ b/BaseTools/Source/Python/Common/DataType.py
@@ -218,6 +218,9 @@ TAB_PCDS_DYNAMIC_HII = 'DynamicHii'
PCD_DYNAMIC_TYPE_SET = {TAB_PCDS_DYNAMIC, TAB_PCDS_DYNAMIC_DEFAULT,
TAB_PCDS_DYNAMIC_VPD, TAB_PCDS_DYNAMIC_HII} PCD_DYNAMIC_EX_TYPE_SET =
{TAB_PCDS_DYNAMIC_EX, TAB_PCDS_DYNAMIC_EX_DEFAULT, TAB_PCDS_DYNAMIC_EX_VPD,
TAB_PCDS_DYNAMIC_EX_HII}
+# leave as a list for order
+PCD_TYPE_LIST = [TAB_PCDS_FIXED_AT_BUILD, TAB_PCDS_PATCHABLE_IN_MODULE,
+TAB_PCDS_FEATURE_FLAG, TAB_PCDS_DYNAMIC, TAB_PCDS_DYNAMIC_EX]
+
TAB_PCDS_FIXED_AT_BUILD_NULL = TAB_PCDS + TAB_PCDS_FIXED_AT_BUILD
TAB_PCDS_FIXED_AT_BUILD_COMMON = TAB_PCDS + TAB_PCDS_FIXED_AT_BUILD + TAB_SPLIT
+ TAB_ARCH_COMMON
TAB_PCDS_FIXED_AT_BUILD_IA32 = TAB_PCDS + TAB_PCDS_FIXED_AT_BUILD + TAB_SPLIT
+ TAB_ARCH_IA32 diff --git
a/BaseTools/Source/Python/Common/MigrationUtilities.py
b/BaseTools/Source/Python/Common/MigrationUtilities.py
index e9f1cabcb794..0c93c72a60f6 100644
--- a/BaseTools/Source/Python/Common/MigrationUtilities.py
+++ b/BaseTools/Source/Python/Common/MigrationUtilities.py
@@ -34,7 +34,7 @@ def SetCommon(Common, XmlCommon):
XmlTag = "Usage"
Common.Usage = XmlAttribute(XmlCommon, XmlTag).split()
-XmlTag = "FeatureFlag"
+XmlTag = T
Re: [edk2] [PATCH v1 13/27] BaseTools: replace string constants used for module types
Hi Jaben,
two comments on this patch, please check it. thanks.
1. Check.py: it should use DT.SUP_MODULE_BASE
2. DataSection.py: need import DataType file, and update copyright year.
Best Regards,
Zhu Yonghong
-Original Message-
From: Carsey, Jaben
Sent: Friday, April 20, 2018 11:52 PM
To: edk2-devel@lists.01.org
Cc: Gao, Liming ; Zhu, Yonghong
Subject: [PATCH v1 13/27] BaseTools: replace string constants used for module
types
replace raw strings in the code (note: except UPT) with constants.
SUP_MODULE_BASE was 'BASE'
SUP_MODULE_SEC was 'SEC'
SUP_MODULE_PEI_CORE was 'PEI_CORE'
SUP_MODULE_PEIM was 'PEIM'
SUP_MODULE_DXE_CORE was 'DXE_CORE'
SUP_MODULE_DXE_DRIVER was 'DXE_DRIVER'
SUP_MODULE_DXE_RUNTIME_DRIVER was 'DXE_RUNTIME_DRIVER'
SUP_MODULE_DXE_SAL_DRIVER was 'DXE_SAL_DRIVER'
SUP_MODULE_DXE_SMM_DRIVER was 'DXE_SMM_DRIVER'
SUP_MODULE_UEFI_DRIVER was 'UEFI_DRIVER'
SUP_MODULE_UEFI_APPLICATION was 'UEFI_APPLICATION'
SUP_MODULE_USER_DEFINED was 'USER_DEFINED'
SUP_MODULE_SMM_CORE was 'SMM_CORE'
SUP_MODULE_MM_STANDALONE was 'MM_STANDALONE'
SUP_MODULE_MM_CORE_STANDALONE was 'MM_CORE_STANDALONE'
Cc: Liming Gao
Cc: Yonghong Zhu
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jaben Carsey
---
BaseTools/Source/Python/AutoGen/AutoGen.py | 20 ++--
BaseTools/Source/Python/AutoGen/BuildEngine.py | 10 +-
BaseTools/Source/Python/AutoGen/GenC.py | 120 ++--
BaseTools/Source/Python/AutoGen/GenDepex.py | 33 +++---
BaseTools/Source/Python/Common/DataType.py | 2 +-
BaseTools/Source/Python/Ecc/Check.py | 4 +-
BaseTools/Source/Python/GenFds/CompressSection.py| 3 +-
BaseTools/Source/Python/GenFds/DataSection.py| 2 +-
BaseTools/Source/Python/GenFds/DepexSection.py | 11 +-
BaseTools/Source/Python/GenFds/EfiSection.py | 17 +--
BaseTools/Source/Python/GenFds/FdfParser.py | 16 +--
BaseTools/Source/Python/GenFds/Ffs.py| 41 +++
BaseTools/Source/Python/GenFds/FfsInfStatement.py| 30 ++---
BaseTools/Source/Python/GenFds/FvImageSection.py | 5 +-
BaseTools/Source/Python/GenFds/GuidSection.py| 5 +-
BaseTools/Source/Python/GenFds/UiSection.py | 3 +-
BaseTools/Source/Python/GenFds/VerSection.py | 3 +-
BaseTools/Source/Python/Workspace/InfBuildData.py| 48
BaseTools/Source/Python/Workspace/WorkspaceCommon.py | 2 +-
BaseTools/Source/Python/build/BuildReport.py | 56 -
BaseTools/Source/Python/build/build.py | 10 +-
21 files changed, 225 insertions(+), 216 deletions(-)
diff --git a/BaseTools/Source/Python/AutoGen/AutoGen.py
b/BaseTools/Source/Python/AutoGen/AutoGen.py
index 3a2976181ac1..9c3bf864e360 100644
--- a/BaseTools/Source/Python/AutoGen/AutoGen.py
+++ b/BaseTools/Source/Python/AutoGen/AutoGen.py
@@ -1431,7 +1431,7 @@ class PlatformAutoGen(AutoGen):
# used by DXE module, it should be stored in DXE PCD
database.
# The default Phase is DXE
#
-if M.ModuleType in ["PEIM", "PEI_CORE"]:
+if M.ModuleType in [SUP_MODULE_PEIM, SUP_MODULE_PEI_CORE]:
PcdFromModule.Phase = "PEI"
if PcdFromModule not in self._DynaPcdList_:
self._DynaPcdList_.append(PcdFromModule)
@@ -1473,7 +1473,7 @@ class PlatformAutoGen(AutoGen):
# make sure that the "VOID*" kind of datum has
MaxDatumSize set
if PcdFromModule.DatumType == "VOID*" and
PcdFromModule.MaxDatumSize in [None, '']:
NoDatumTypePcdList.add("%s.%s [%s]" %
(PcdFromModule.TokenSpaceGuidCName, PcdFromModule.TokenCName, InfName))
-if M.ModuleType in ["PEIM", "PEI_CORE"]:
+if M.ModuleType in [SUP_MODULE_PEIM, SUP_MODULE_PEI_CORE]:
PcdFromModule.Phase = "PEI"
if PcdFromModule not in self._DynaPcdList_ and
PcdFromModule.Type in GenC.gDynamicExPcd:
self._DynaPcdList_.append(PcdFromModule)
@@ -2204,7 +2204,7 @@ class PlatformAutoGen(AutoGen):
LibraryModule.LibraryClass.append(LibraryClassObject(LibraryClassName,
[ModuleType]))
elif LibraryModule.LibraryClass is None \
or len(LibraryModule.LibraryClass) == 0 \
- or (ModuleType != 'USER_DEFINED'
+ or (ModuleType != SUP_MODULE_USER_DEFINED
and ModuleType not in
LibraryModule.LibraryClass[0].SupModList):
# only USER_DEFINED can link against any library
instance despite of its SupModList
EdkLogger.error("build", OPTION_MISSING,
@@ -3970,8 +3970,8 @@ class ModuleAutoGen(AutoGen):
break
ModuleType =
[edk2] [PATCH] MdeModulePkg/Bds: Validate the device path stored in Boot####
The patch adds additional check to the device path when loading
the Boot/Driver variable data.
If the device path is invalid, InvalidParameter is returned.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni
Cc: Star Zeng
Cc: Chao B Zhang
---
MdeModulePkg/Library/UefiBootManagerLib/BmLoadOption.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/MdeModulePkg/Library/UefiBootManagerLib/BmLoadOption.c
b/MdeModulePkg/Library/UefiBootManagerLib/BmLoadOption.c
index 32918caf32..b48a3cbd37 100644
--- a/MdeModulePkg/Library/UefiBootManagerLib/BmLoadOption.c
+++ b/MdeModulePkg/Library/UefiBootManagerLib/BmLoadOption.c
@@ -1,7 +1,7 @@
/** @file
Load option library functions which relate with creating and processing load
options.
-Copyright (c) 2011 - 2017, Intel Corporation. All rights reserved.
+Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.
(C) Copyright 2015-2016 Hewlett Packard Enterprise Development LP
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD
License
@@ -922,10 +922,14 @@ EfiBootManagerVariableToLoadOptionEx (
VariablePtr += StrSize ((CHAR16 *) VariablePtr);
//
- // Get the option's device path
+ // Get the option's device path and validate it.
//
FilePath = (EFI_DEVICE_PATH_PROTOCOL *) VariablePtr;
VariablePtr += FilePathSize;
+ if (!IsDevicePathValid (FilePath, FilePathSize)) {
+FreePool (Variable);
+return EFI_INVALID_PARAMETER;
+ }
OptionalDataSize = (UINT32) (VariableSize - ((UINTN) VariablePtr - (UINTN)
Variable));
if (OptionalDataSize == 0) {
--
2.16.1.windows.1
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[edk2] [PATCH] MdeModulePkg/ConPlatform: Support short-form USB device path
Today's implementation does an exact device path match to check
whether the device path of a console is in ConIn/ConOut/ErrOut.
But that doesn't work for the USB keyboard.
Because when a platform have multiple USB port, ConIn needs to
carry all device paths corresponding to each port.
Even worse, today's BDS core logic removes the device path from
ConIn/ConOut/ErrOut when the connection to that device path fails.
So if user switches the USB keyboard from one port to another across
boot, the USB keyboard doesn't work in the second boot.
ConPlatform driver solved this problem by adding the
IsHotPlugDevice() function. So that for USB keyboard, ConPlatform
doesn't care whether its device path is in ConIn or not.
But the rule is too loose, and now causes platform BDS cannot control
whether to enable USB keyboard as an active console.
The patch changes ConPlatform to support USB short-form device path
when checking whether the device path of a console is in
ConIn/ConOut/ErrOut.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni
Cc: Hao A Wu
Cc: Michael D Kinney
Cc: Star Zeng
---
.../Universal/Console/ConPlatformDxe/ConPlatform.c | 526 ++---
.../Universal/Console/ConPlatformDxe/ConPlatform.h | 20 +-
2 files changed, 353 insertions(+), 193 deletions(-)
diff --git a/MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatform.c
b/MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatform.c
index 6b53e8ac74..a509d0e3a5 100644
--- a/MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatform.c
+++ b/MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatform.c
@@ -2,7 +2,7 @@
Console Platform DXE Driver, install Console Device Guids and update Console
Environment Variables.
-Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD
License
which accompanies this distribution. The full text of the license may be
found at
@@ -270,58 +270,33 @@ ConPlatformTextInDriverBindingStart (
}
//
- // Check the device path, if it is a hot plug device,
- // do not put the device path into ConInDev, and install
- // gEfiConsoleInDeviceGuid to the device handle directly.
- // The policy is, make hot plug device plug in and play immediately.
+ // If it is not a hot-plug device, append the device path to the
+ // ConInDev environment variable
//
- if (IsHotPlugDevice (DevicePath)) {
+ ConPlatformUpdateDeviceVariable (
+L"ConInDev",
+DevicePath,
+Append
+);
+
+ //
+ // If the device path is an instance in the ConIn environment variable,
+ // then install EfiConsoleInDeviceGuid onto ControllerHandle
+ //
+ if (IsInConInVariable) {
gBS->InstallMultipleProtocolInterfaces (
&ControllerHandle,
&gEfiConsoleInDeviceGuid,
NULL,
NULL
);
-//
-// Append the device path to ConInDev only if it is in ConIn variable.
-//
-if (IsInConInVariable) {
- ConPlatformUpdateDeviceVariable (
-L"ConInDev",
-DevicePath,
-Append
-);
-}
} else {
-//
-// If it is not a hot-plug device, append the device path to the
-// ConInDev environment variable
-//
-ConPlatformUpdateDeviceVariable (
- L"ConInDev",
- DevicePath,
- Append
- );
-
-//
-// If the device path is an instance in the ConIn environment variable,
-// then install EfiConsoleInDeviceGuid onto ControllerHandle
-//
-if (IsInConInVariable) {
- gBS->InstallMultipleProtocolInterfaces (
- &ControllerHandle,
- &gEfiConsoleInDeviceGuid,
- NULL,
- NULL
- );
-} else {
- gBS->CloseProtocol (
- ControllerHandle,
- &gEfiSimpleTextInProtocolGuid,
- This->DriverBindingHandle,
- ControllerHandle
- );
-}
+gBS->CloseProtocol (
+ ControllerHandle,
+ &gEfiSimpleTextInProtocolGuid,
+ This->DriverBindingHandle,
+ ControllerHandle
+ );
}
return EFI_SUCCESS;
@@ -416,95 +391,60 @@ ConPlatformTextOutDriverBindingStart (
}
//
- // Check the device path, if it is a hot plug device,
- // do not put the device path into ConOutDev and ErrOutDev,
- // and install gEfiConsoleOutDeviceGuid to the device handle directly.
- // The policy is, make hot plug device plug in and play immediately.
+ // If it is not a hot-plug device, append the device path to
+ // the ConOutDev and ErrOutDev environment variable.
+ // For GOP device path, append the sibling device path as well.
+ //
+ if (!ConPlatformUpdateGopCandidate (DevicePath)) {
+ConPlatformUpdateDeviceVariable (
+ L"ConOutDev",
+ DevicePath,
+ Append
+ );
+//
+// Then app
[edk2] [PATCH edk2-platforms v5 1/2] Platform/HiKey960: register predefined boot options
Create 4 boot options on HiKey960 platform. They're "Boot from SD",
"Grub", "Android Boot" and "Android Fastboot".
Cc: Laszlo Ersek
Cc: Leif Lindholm
Cc: Ard Biesheuvel
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Haojian Zhuang
---
Platform/Hisilicon/HiKey960/HiKey960.dec | 35 +
Platform/Hisilicon/HiKey960/HiKey960.dsc | 6 +
.../Hisilicon/HiKey960/HiKey960Dxe/HiKey960Dxe.c | 172 +
.../Hisilicon/HiKey960/HiKey960Dxe/HiKey960Dxe.inf | 11 ++
4 files changed, 224 insertions(+)
create mode 100644 Platform/Hisilicon/HiKey960/HiKey960.dec
diff --git a/Platform/Hisilicon/HiKey960/HiKey960.dec
b/Platform/Hisilicon/HiKey960/HiKey960.dec
new file mode 100644
index ..922d7199c5a5
--- /dev/null
+++ b/Platform/Hisilicon/HiKey960/HiKey960.dec
@@ -0,0 +1,35 @@
+#
+# Copyright (c) 2018, Linaro Limited. All rights reserved.
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD
License
+# which accompanies this distribution. The full text of the license may be
found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
IMPLIED.
+#
+
+[Defines]
+ DEC_SPECIFICATION = 0x00010019
+ PACKAGE_NAME = HiKey960
+ PACKAGE_GUID = 1892b5b5-d18d-47a3-8fab-e3ae6b4226b0
+ PACKAGE_VERSION= 0.1
+
+
+#
+# Include Section - list of Include Paths that are provided by this package.
+# Comments are used for Keywords and Module Types.
+#
+# Supported Module Types:
+# BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER
DXE_SMM_DRIVER DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION
+#
+
+[Guids.common]
+ gHiKey960TokenSpaceGuid= { 0x99a14446, 0xaad7, 0xe460, {0xb4, 0xe5,
0x1f, 0x79, 0xaa, 0xa4, 0x93, 0xfd } }
+
+[PcdsFixedAtBuild.common]
+ gHiKey960TokenSpaceGuid.PcdAndroidBootDevicePath|L""|VOID*|0x0001
+ gHiKey960TokenSpaceGuid.PcdAndroidBootFile|{ 0x36, 0x8b, 0x73, 0x3a, 0xc5,
0xb9, 0x63, 0x47, 0xab, 0xbd, 0x6c, 0xbd, 0x4b, 0x25, 0xf9, 0xff
}|VOID*|0x0002
+ gHiKey960TokenSpaceGuid.PcdAndroidFastbootFile|{ 0x2a, 0x50, 0x88, 0x95,
0x70, 0x53, 0xe3, 0x11, 0x86, 0x31, 0xd7, 0xc5, 0x95, 0x13, 0x64, 0xc8
}|VOID*|0x0003
+ gHiKey960TokenSpaceGuid.PcdSdBootDevicePath|L""|VOID*|0x0004
diff --git a/Platform/Hisilicon/HiKey960/HiKey960.dsc
b/Platform/Hisilicon/HiKey960/HiKey960.dsc
index 859ab84f8415..4097fbfd77f5 100644
--- a/Platform/Hisilicon/HiKey960/HiKey960.dsc
+++ b/Platform/Hisilicon/HiKey960/HiKey960.dsc
@@ -132,6 +132,12 @@ [PcdsFixedAtBuild.common]
gEmbeddedTokenSpaceGuid.PcdAndroidFastbootUsbVendorId|0x18d1
gEmbeddedTokenSpaceGuid.PcdAndroidFastbootUsbProductId|0xd00d
+ #
+ # Android Loader
+ #
+
gHiKey960TokenSpaceGuid.PcdAndroidBootDevicePath|L"VenHw(0D51905B-B77E-452A-A2C0-ECA0CC8D514A,3BFF00)/UFS(0x0,0x3)/HD(7,GPT,D3340696-9B95-4C64-8DF6-E6D4548FBA41,0x12100,0x4000)/\\EFI\\BOOT\\GRUBAA64.EFI"
+
gHiKey960TokenSpaceGuid.PcdSdBootDevicePath|L"VenHw(0D51905B-B77E-452A-A2C0-ECA0CC8D514A,00F037FF00)/SD(0x0)"
+
#
# Components Section - list of all EDK II Modules needed by this Platform
diff --git a/Platform/Hisilicon/HiKey960/HiKey960Dxe/HiKey960Dxe.c
b/Platform/Hisilicon/HiKey960/HiKey960Dxe/HiKey960Dxe.c
index 473d61ed384e..413423e75569 100644
--- a/Platform/Hisilicon/HiKey960/HiKey960Dxe/HiKey960Dxe.c
+++ b/Platform/Hisilicon/HiKey960/HiKey960Dxe/HiKey960Dxe.c
@@ -30,10 +30,16 @@
#include
#include
#include
+#include
#include
+#include
#include
+#include
+#include
#include
+#include
+#include
#include
#define ADC_ADCIN0 0
@@ -86,6 +92,10 @@
#define DETECT_SW_FASTBOOT 68// GPIO8_4
+#define HIKEY960_BOOT_OPTION_NUM 4
+
+#define GRUB_FILE_NAME L"\\EFI\\BOOT\\GRUBAA64.EFI"
+
typedef struct {
UINT64Magic;
UINT64Data;
@@ -359,6 +369,158 @@ OnEndOfDxe (
}
}
+STATIC
+EFI_STATUS
+CreatePlatformBootOptionFromPath (
+ IN CHAR16 *PathStr,
+ IN CHAR16 *Description,
+ IN OUT EFI_BOOT_MANAGER_LOAD_OPTION*BootOption
+ )
+{
+ EFI_STATUS Status;
+ EFI_DEVICE_PATH *DevicePath;
+
+ DevicePath = (EFI_DEVICE_PATH *)ConvertTextToDevicePath (PathStr);
+ ASSERT (DevicePath != NULL);
+ Status = EfiBootManagerInitializeLoadOption (
+ BootOption,
+ LoadOptionNumberUnassigned,
+ LoadOp
[edk2] [PATCH edk2-platforms v5 0/2] add platform boot options
Changelog:
v5:
* Avoid to merge device path and grub's file path in driver.
Merge them directly in DSC file.
* Avoid duplicated code to create boot options.
* Use goto to handle error condition.
v4:
* Add BootCount parameter in the interface.
v3:
* Move in initilization of boot entry.
* Update the name of interface in platform boot manager protocol.
v2:
* Update with platform boot manager protocol.
Haojian Zhuang (2):
Platform/HiKey960: register predefined boot options
Platform/HiKey: create 4 boot options
Platform/Hisilicon/HiKey/HiKey.dec | 8 +-
Platform/Hisilicon/HiKey/HiKey.dsc | 7 +
Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.c | 171
Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.inf | 11 ++
.../{HiKey/HiKey.dec => HiKey960/HiKey960.dec} | 17 +-
Platform/Hisilicon/HiKey960/HiKey960.dsc | 6 +
.../Hisilicon/HiKey960/HiKey960Dxe/HiKey960Dxe.c | 172 +
.../Hisilicon/HiKey960/HiKey960Dxe/HiKey960Dxe.inf | 11 ++
8 files changed, 391 insertions(+), 12 deletions(-)
copy Platform/Hisilicon/{HiKey/HiKey.dec => HiKey960/HiKey960.dec} (56%)
--
2.7.4
___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel
[edk2] [PATCH edk2-platforms v5 2/2] Platform/HiKey: create 4 boot options
Create 4 predefined boot options for HiKey. They're
"Boot from SD", "Grub", "Android Boot" and "Android Fastboot".
Cc: Laszlo Ersek
Cc: Leif Lindholm
Cc: Ard Biesheuvel
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Haojian Zhuang
---
Platform/Hisilicon/HiKey/HiKey.dec | 8 +-
Platform/Hisilicon/HiKey/HiKey.dsc | 7 +
Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.c | 171 +
Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.inf | 11 ++
4 files changed, 194 insertions(+), 3 deletions(-)
diff --git a/Platform/Hisilicon/HiKey/HiKey.dec
b/Platform/Hisilicon/HiKey/HiKey.dec
index 537138eb45a1..bb94c5cab13f 100644
--- a/Platform/Hisilicon/HiKey/HiKey.dec
+++ b/Platform/Hisilicon/HiKey/HiKey.dec
@@ -1,5 +1,5 @@
#
-# Copyright (c) 2014-2017, Linaro Limited. All rights reserved.
+# Copyright (c) 2014-2018, Linaro Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD
License
@@ -32,5 +32,7 @@ [Guids.common]
gHiKeyTokenSpaceGuid = { 0x91148425, 0xcdd2, 0x4830, { 0x8b, 0xd0,
0xc6, 0x1c, 0x6d, 0xea, 0x36, 0x21 } }
[PcdsFixedAtBuild.common]
- gHiKeyTokenSpaceGuid.PcdAndroidFastbootNvmDevicePath|L""|VOID*|0x0001
- gHiKeyTokenSpaceGuid.PcdArmFastbootFlashLimit|L""|VOID*|0x0002
+ gHiKeyTokenSpaceGuid.PcdAndroidBootDevicePath|L""|VOID*|0x0001
+ gHiKeyTokenSpaceGuid.PcdAndroidBootFile|{ 0x36, 0x8b, 0x73, 0x3a, 0xc5,
0xb9, 0x63, 0x47, 0xab, 0xbd, 0x6c, 0xbd, 0x4b, 0x25, 0xf9, 0xff
}|VOID*|0x0002
+ gHiKeyTokenSpaceGuid.PcdAndroidFastbootFile|{ 0x2a, 0x50, 0x88, 0x95, 0x70,
0x53, 0xe3, 0x11, 0x86, 0x31, 0xd7, 0xc5, 0x95, 0x13, 0x64, 0xc8
}|VOID*|0x0003
+ gHiKeyTokenSpaceGuid.PcdSdBootDevicePath|L""|VOID*|0x0004
diff --git a/Platform/Hisilicon/HiKey/HiKey.dsc
b/Platform/Hisilicon/HiKey/HiKey.dsc
index 83dd68a820b1..9c1fc2e1b40d 100644
--- a/Platform/Hisilicon/HiKey/HiKey.dsc
+++ b/Platform/Hisilicon/HiKey/HiKey.dsc
@@ -138,6 +138,13 @@ [PcdsFixedAtBuild.common]
gEmbeddedTokenSpaceGuid.PcdAndroidFastbootUsbVendorId|0x18d1
gEmbeddedTokenSpaceGuid.PcdAndroidFastbootUsbProductId|0xd00d
+ #
+ # Android Loader
+ #
+
gHiKeyTokenSpaceGuid.PcdAndroidBootDevicePath|L"VenHw(0D51905B-B77E-452A-A2C0-ECA0CC8D514A,00D023F700)/eMMC(0x0)/Ctrl(0x0)/HD(6,GPT,5C0F213C-17E1-4149-88C8-8B50FB4EC70E,0x7000,0x2)/\\EFI\\BOOT\\GRUBAA64.EFI"
+
gHiKeyTokenSpaceGuid.PcdSdBootDevicePath|L"VenHw(0D51905B-B77E-452A-A2C0-ECA0CC8D514A,00E023F700)/SD(0x0)"
+
+
#
# Components Section - list of all EDK II Modules needed by this Platform
diff --git a/Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.c
b/Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.c
index 65e800116b76..e20538bd77bf 100644
--- a/Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.c
+++ b/Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.c
@@ -18,12 +18,18 @@
#include
#include
#include
+#include
#include
+#include
#include
#include
#include
+#include
+#include
#include
+#include
+#include
#include
#include
@@ -42,6 +48,9 @@
#define ADB_REBOOT_BOOTLOADER0x77665500
#define ADB_REBOOT_NONE 0x77665501
+#define HIKEY_BOOT_OPTION_NUM4
+
+#define GRUB_FILE_NAME L"\\EFI\\BOOT\\GRUBAA64.EFI"
typedef struct {
UINT64Magic;
@@ -121,6 +130,158 @@ HiKeyInitPeripherals (
return EFI_SUCCESS;
}
+STATIC
+EFI_STATUS
+CreatePlatformBootOptionFromPath (
+ IN CHAR16 *PathStr,
+ IN CHAR16 *Description,
+ IN OUT EFI_BOOT_MANAGER_LOAD_OPTION*BootOption
+ )
+{
+ EFI_STATUS Status;
+ EFI_DEVICE_PATH *DevicePath;
+
+ DevicePath = (EFI_DEVICE_PATH *)ConvertTextToDevicePath (PathStr);
+ ASSERT (DevicePath != NULL);
+ Status = EfiBootManagerInitializeLoadOption (
+ BootOption,
+ LoadOptionNumberUnassigned,
+ LoadOptionTypeBoot,
+ LOAD_OPTION_ACTIVE,
+ Description,
+ DevicePath,
+ NULL,
+ 0
+ );
+ if (EFI_ERROR (Status)) {
+return Status;
+ }
+ FreePool (DevicePath);
+ return Status;
+}
+
+STATIC
+EFI_STATUS
+CreatePlatformBootOptionFromGuid (
+ IN EFI_GUID*FileGuid,
+ IN CHAR16 *Description,
+ IN OUT EFI_BOOT_MANAGER_LOAD_OPTION*BootOption
+ )
+{
+ EFI_STATUS Status;
+ EFI_DEVICE_PATH*DevicePath;
+ EFI_DEVICE_PATH*TempDevicePath;
+ EFI_LOADED_IMAGE_PROTOCOL *LoadedImage;
+ MEDIA_FW_VOL_FILEPATH_DEVICE_PATH FileNode;
+
+ Status = gBS->HandleProtocol (
+ gImageHandle,
+ &gEfiLoadedImageP
Re: [edk2] [PATCH edk2-platforms v4 1/2] Platform/HiKey960: register predefined boot options
Hi Laszlo,
Thanks a lot. Fix them in v5.
Best Regards
Haojian
From: Laszlo Ersek
Sent: Monday, April 23, 2018 9:24 PM
To: Haojian Zhuang; edk2-devel@lists.01.org
Cc: Leif Lindholm; Ard Biesheuvel
Subject: Re: [edk2] [PATCH edk2-platforms v4 1/2] Platform/HiKey960: register
predefined boot options
Hello Haojian,
On 04/23/18 08:22, Haojian Zhuang wrote:
> Create 4 boot options on HiKey960 platform. They're "Boot from SD",
> "Grub", "Android Boot" and "Android Fastboot".
>
> Cc: Laszlo Ersek
> Cc: Leif Lindholm
> Cc: Ard Biesheuvel
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Haojian Zhuang
> ---
> Platform/Hisilicon/HiKey960/HiKey960.dec | 35
> Platform/Hisilicon/HiKey960/HiKey960.dsc | 6 +
> .../Hisilicon/HiKey960/HiKey960Dxe/HiKey960Dxe.c | 182
+
> .../Hisilicon/HiKey960/HiKey960Dxe/HiKey960Dxe.inf | 11 ++
> 4 files changed, 234 insertions(+)
> create mode 100644 Platform/Hisilicon/HiKey960/HiKey960.dec
This patch looks good to me in general, but there are a number of small
warts / improvements that I might as well point out. I will leave it up
to you to address or ignore each of these points, as you see fit.
> diff --git a/Platform/Hisilicon/HiKey960/HiKey960.dec
b/Platform/Hisilicon/HiKey960/HiKey960.dec
> new file mode 100644
> index ..922d7199c5a5
> --- /dev/null
> +++ b/Platform/Hisilicon/HiKey960/HiKey960.dec
> @@ -0,0 +1,35 @@
> +#
> +# Copyright (c) 2018, Linaro Limited. All rights reserved.
> +#
> +# This program and the accompanying materials
> +# are licensed and made available under the terms and conditions of the
BSD License
> +# which accompanies this distribution. The full text of the license may
be found at
> +# http://opensource.org/licenses/bsd-license.php
> +#
> +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
IMPLIED.
> +#
> +
> +[Defines]
> + DEC_SPECIFICATION = 0x00010019
> + PACKAGE_NAME = HiKey960
> + PACKAGE_GUID = 1892b5b5-d18d-47a3-8fab-e3ae6b4226b0
> + PACKAGE_VERSION= 0.1
> +
>
+
> +#
> +# Include Section - list of Include Paths that are provided by this
package.
> +# Comments are used for Keywords and Module Types.
> +#
> +# Supported Module Types:
> +# BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER
DXE_SMM_DRIVER DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION
> +#
>
+
> +[Guids.common]
> + gHiKey960TokenSpaceGuid= { 0x99a14446, 0xaad7, 0xe460, {0xb4,
0xe5, 0x1f, 0x79, 0xaa, 0xa4, 0x93, 0xfd } }
> +
> +[PcdsFixedAtBuild.common]
> + gHiKey960TokenSpaceGuid.PcdAndroidBootDevicePath|L""|VOID*|0x0001
> + gHiKey960TokenSpaceGuid.PcdAndroidBootFile|{ 0x36, 0x8b, 0x73, 0x3a,
0xc5, 0xb9, 0x63, 0x47, 0xab, 0xbd, 0x6c, 0xbd, 0x4b, 0x25, 0xf9, 0xff
}|VOID*|0x0002
> + gHiKey960TokenSpaceGuid.PcdAndroidFastbootFile|{ 0x2a, 0x50, 0x88,
0x95, 0x70, 0x53, 0xe3, 0x11, 0x86, 0x31, 0xd7, 0xc5, 0x95, 0x13, 0x64, 0xc8
}|VOID*|0x0003
> + gHiKey960TokenSpaceGuid.PcdSdBootDevicePath|L""|VOID*|0x0004
> diff --git a/Platform/Hisilicon/HiKey960/HiKey960.dsc
b/Platform/Hisilicon/HiKey960/HiKey960.dsc
> index 859ab84f8415..475d39916262 100644
> --- a/Platform/Hisilicon/HiKey960/HiKey960.dsc
> +++ b/Platform/Hisilicon/HiKey960/HiKey960.dsc
> @@ -132,6 +132,12 @@ [PcdsFixedAtBuild.common]
>gEmbeddedTokenSpaceGuid.PcdAndroidFastbootUsbVendorId|0x18d1
>gEmbeddedTokenSpaceGuid.PcdAndroidFastbootUsbProductId|0xd00d
>
> + #
> + # Android Loader
> + #
> +
gHiKey960TokenSpaceGuid.PcdAndroidBootDevicePath|L"VenHw(0D51905B-B77E-452A-A2C0-ECA0CC8D514A,3BFF00)/UFS(0x0,0x3)/HD(7,GPT,D3340696-9B95-4C64-8DF6-E6D4548FBA41,0x12100,0x4000)"
> +
gHiKey960TokenSpaceGuid.PcdSdBootDevicePath|L"VenHw(0D51905B-B77E-452A-A2C0-ECA0CC8D514A,00F037FF00)/SD(0x0)"
> +
>
> #
> # Components Section - list of all EDK II Modules needed by this Platform
> diff --git a/Platform/Hisilicon/HiKey960/HiKey960Dxe/HiKey960Dxe.c
b/Platform/Hisilicon/HiKey960/HiKey960Dxe/HiKey960Dxe.c
> index 473d61ed384e..da5e3d5a80ce 100644
> --- a/Platform/Hisilicon/HiKey960/HiKey960Dxe/HiKey960Dxe.c
> +++ b/Platform/Hisilicon/HiKey960/HiKey960Dxe/HiKey960Dxe.c
> @@ -30,10 +30,16 @@
> #include
> #include
> #include
> +#include
> #include
> +#include
> #include
>
> +#include
> +#include
> #include
> +#include
> +#include
> #include
>
> #define ADC_ADCIN0 0
> @@ -86,6 +92,10 @@
>
> #define DETECT_SW_FASTBOOT 68// GPIO8_4
>
> +#def
[edk2] [Patch] BaseTools: Fix one invalid change in 6be94743
From: Yunhua Feng Roll back one change in 6be94743, it was updated incorrect. Cc: Liming Gao Cc: Yonghong Zhu Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Yunhua Feng --- BaseTools/Source/Python/AutoGen/AutoGen.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/BaseTools/Source/Python/AutoGen/AutoGen.py b/BaseTools/Source/Python/AutoGen/AutoGen.py index 56b5d39..ba83d5a 100644 --- a/BaseTools/Source/Python/AutoGen/AutoGen.py +++ b/BaseTools/Source/Python/AutoGen/AutoGen.py @@ -3914,11 +3914,11 @@ class ModuleAutoGen(AutoGen): # Skip the following code for modules with no source files if not self.SourceFileList: return # Skip the following code for modules without any binary files -if not self.BinaryFileList: +if self.BinaryFileList: return ### TODO: How to handles mixed source and binary modules # Find all DynamicEx and PatchableInModule PCDs used by this module and dependent libraries -- 2.6.1.windows.1 ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
Re: [edk2] [PATCH 1/1] BaseTools/Conf: Add /Gw optimisation option for VS2017 IA32 and X64
Reviewed-by: Liming Gao >-Original Message- >From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of >Pete Batard >Sent: Wednesday, April 25, 2018 12:10 AM >To: edk2-devel@lists.01.org >Cc: Gao, Liming >Subject: [edk2] [PATCH 1/1] BaseTools/Conf: Add /Gw optimisation option for >VS2017 IA32 and X64 > >This option, which is used in VS2015 and earlier toolchains, was missing >for VS2017. Applying it greatly reduces the size of generated binaries. > >Contributed-under: TianoCore Contribution Agreement 1.1 >Signed-off-by: Pete Batard >--- > BaseTools/Conf/tools_def.template | 8 > 1 file changed, 4 insertions(+), 4 deletions(-) > >diff --git a/BaseTools/Conf/tools_def.template >b/BaseTools/Conf/tools_def.template >index 5da229a715fa..03d700018550 100755 >--- a/BaseTools/Conf/tools_def.template >+++ b/BaseTools/Conf/tools_def.template >@@ -4129,8 +4129,8 @@ NOOPT_VS2015x86xASL_X64_DLINK_FLAGS= >/NOLOGO /NODEFAULTLIB /IGNORE:4001 /OPT > *_VS2017_IA32_ASM_PATH = DEF(VS2017_BIN_IA32)\ml.exe > > *_VS2017_IA32_MAKE_FLAGS = /nologo >- DEBUG_VS2017_IA32_CC_FLAGS= /nologo /arch:IA32 /c /WX /GS- /W4 >/Gs32768 /D UNICODE /O1b2 /GL /FIAutoGen.h /EHs-c- /GR- /GF /Gy /Zi /Gm >-RELEASE_VS2017_IA32_CC_FLAGS= /nologo /arch:IA32 /c /WX /GS- /W4 >/Gs32768 /D UNICODE /O1b2 /GL /FIAutoGen.h /EHs-c- /GR- /GF >+ DEBUG_VS2017_IA32_CC_FLAGS= /nologo /arch:IA32 /c /WX /GS- /W4 >/Gs32768 /D UNICODE /O1b2 /GL /FIAutoGen.h /EHs-c- /GR- /GF /Gy /Zi /Gm >/Gw >+RELEASE_VS2017_IA32_CC_FLAGS= /nologo /arch:IA32 /c /WX /GS- /W4 >/Gs32768 /D UNICODE /O1b2 /GL /FIAutoGen.h /EHs-c- /GR- /GF /Gw > NOOPT_VS2017_IA32_CC_FLAGS = /nologo /arch:IA32 /c /WX /GS- /W4 >/Gs32768 /D UNICODE /FIAutoGen.h /EHs-c- /GR- /GF /Gy /Zi /Gm /Od > > DEBUG_VS2017_IA32_ASM_FLAGS = /nologo /c /WX /W3 /Cx /coff /Zd /Zi >@@ -4159,8 +4159,8 @@ NOOPT_VS2017_IA32_DLINK_FLAGS = /NOLOGO >/NODEFAULTLIB /IGNORE:4001 /OPT:REF /O > *_VS2017_X64_DLINK_PATH= DEF(VS2017_BIN_X64)\link.exe > *_VS2017_X64_ASLDLINK_PATH = DEF(VS2017_BIN_X64)\link.exe > >- DEBUG_VS2017_X64_CC_FLAGS = /nologo /c /WX /GS- /W4 /Gs32768 /D >UNICODE /O1b2s /GL /Gy /FIAutoGen.h /EHs-c- /GR- /GF /Zi /Gm >-RELEASE_VS2017_X64_CC_FLAGS = /nologo /c /WX /GS- /W4 /Gs32768 /D >UNICODE /O1b2s /GL /Gy /FIAutoGen.h /EHs-c- /GR- /GF >+ DEBUG_VS2017_X64_CC_FLAGS = /nologo /c /WX /GS- /W4 /Gs32768 /D >UNICODE /O1b2s /GL /Gy /FIAutoGen.h /EHs-c- /GR- /GF /Zi /Gm /Gw >+RELEASE_VS2017_X64_CC_FLAGS = /nologo /c /WX /GS- /W4 /Gs32768 /D >UNICODE /O1b2s /GL /Gy /FIAutoGen.h /EHs-c- /GR- /GF /Gw > NOOPT_VS2017_X64_CC_FLAGS = /nologo /c /WX /GS- /W4 /Gs32768 /D >UNICODE /Gy /FIAutoGen.h /EHs-c- /GR- /GF /Zi /Gm /Od > > DEBUG_VS2017_X64_ASM_FLAGS= /nologo /c /WX /W3 /Cx /Zd /Zi >-- >2.17.0.windows.1 > >___ >edk2-devel mailing list >edk2-devel@lists.01.org >https://lists.01.org/mailman/listinfo/edk2-devel ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
[edk2] [PATCH 0/1] BaseTools/Conf: Add /Gw optimisation option for VS2017 IA32 and X64
It looks like we forgot to carry over the /Gw optimisation option when adding VS2017 support for IA32 and X64, whereas it is present in VS2015 and earlier. Binaries without /Gw can be almost twice as large as when the option is used: https://docs.microsoft.com/en-gb/cpp/build/reference/gw-optimize-global-data Note that ARM and ARM64 are unaffected, as they already have the flag. Pete Batard (1): BaseTools/Conf: Add /Gw optimisation option for VS2017 IA32 and X64 BaseTools/Conf/tools_def.template | 8 1 file changed, 4 insertions(+), 4 deletions(-) -- 2.17.0.windows.1 ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
[edk2] [PATCH 1/1] BaseTools/Conf: Add /Gw optimisation option for VS2017 IA32 and X64
This option, which is used in VS2015 and earlier toolchains, was missing for VS2017. Applying it greatly reduces the size of generated binaries. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Pete Batard --- BaseTools/Conf/tools_def.template | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/BaseTools/Conf/tools_def.template b/BaseTools/Conf/tools_def.template index 5da229a715fa..03d700018550 100755 --- a/BaseTools/Conf/tools_def.template +++ b/BaseTools/Conf/tools_def.template @@ -4129,8 +4129,8 @@ NOOPT_VS2015x86xASL_X64_DLINK_FLAGS= /NOLOGO /NODEFAULTLIB /IGNORE:4001 /OPT *_VS2017_IA32_ASM_PATH = DEF(VS2017_BIN_IA32)\ml.exe *_VS2017_IA32_MAKE_FLAGS = /nologo - DEBUG_VS2017_IA32_CC_FLAGS= /nologo /arch:IA32 /c /WX /GS- /W4 /Gs32768 /D UNICODE /O1b2 /GL /FIAutoGen.h /EHs-c- /GR- /GF /Gy /Zi /Gm -RELEASE_VS2017_IA32_CC_FLAGS= /nologo /arch:IA32 /c /WX /GS- /W4 /Gs32768 /D UNICODE /O1b2 /GL /FIAutoGen.h /EHs-c- /GR- /GF + DEBUG_VS2017_IA32_CC_FLAGS= /nologo /arch:IA32 /c /WX /GS- /W4 /Gs32768 /D UNICODE /O1b2 /GL /FIAutoGen.h /EHs-c- /GR- /GF /Gy /Zi /Gm /Gw +RELEASE_VS2017_IA32_CC_FLAGS= /nologo /arch:IA32 /c /WX /GS- /W4 /Gs32768 /D UNICODE /O1b2 /GL /FIAutoGen.h /EHs-c- /GR- /GF /Gw NOOPT_VS2017_IA32_CC_FLAGS = /nologo /arch:IA32 /c /WX /GS- /W4 /Gs32768 /D UNICODE /FIAutoGen.h /EHs-c- /GR- /GF /Gy /Zi /Gm /Od DEBUG_VS2017_IA32_ASM_FLAGS = /nologo /c /WX /W3 /Cx /coff /Zd /Zi @@ -4159,8 +4159,8 @@ NOOPT_VS2017_IA32_DLINK_FLAGS = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /OPT:REF /O *_VS2017_X64_DLINK_PATH= DEF(VS2017_BIN_X64)\link.exe *_VS2017_X64_ASLDLINK_PATH = DEF(VS2017_BIN_X64)\link.exe - DEBUG_VS2017_X64_CC_FLAGS = /nologo /c /WX /GS- /W4 /Gs32768 /D UNICODE /O1b2s /GL /Gy /FIAutoGen.h /EHs-c- /GR- /GF /Zi /Gm -RELEASE_VS2017_X64_CC_FLAGS = /nologo /c /WX /GS- /W4 /Gs32768 /D UNICODE /O1b2s /GL /Gy /FIAutoGen.h /EHs-c- /GR- /GF + DEBUG_VS2017_X64_CC_FLAGS = /nologo /c /WX /GS- /W4 /Gs32768 /D UNICODE /O1b2s /GL /Gy /FIAutoGen.h /EHs-c- /GR- /GF /Zi /Gm /Gw +RELEASE_VS2017_X64_CC_FLAGS = /nologo /c /WX /GS- /W4 /Gs32768 /D UNICODE /O1b2s /GL /Gy /FIAutoGen.h /EHs-c- /GR- /GF /Gw NOOPT_VS2017_X64_CC_FLAGS = /nologo /c /WX /GS- /W4 /Gs32768 /D UNICODE /Gy /FIAutoGen.h /EHs-c- /GR- /GF /Zi /Gm /Od DEBUG_VS2017_X64_ASM_FLAGS= /nologo /c /WX /W3 /Cx /Zd /Zi -- 2.17.0.windows.1 ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
[edk2] [PATCH v1] Platform/ARM: Fix platform timer offset in GTDT
The FVP_PLATFORM_TIMER_COUNT is the sum of the memory
mapped platform timers and the watchdog timers.
The watchdog timers can be disabled by setting the
FVP_WATCHDOG_COUNT (defined by PcdWatchdogCount)
to zero.
On the VExpress platform, if the FVP_WATCHDOG_COUNT is
set to zero, the FVP_PLATFORM_TIMER_COUNT is 1 as
VExpress has one memory mapped timer.
The code however incorrectly sets the platform timer
offset to zero in the GTDT. This causes the OS to read
the platform timer information from an invalid offset,
and may crash.
Updated the GTDT table to set the platform timer offset
to zero only when the FVP_PLATFORM_TIMER_COUNT is zero.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Sami Mujawar
Reviewed-by: Evan Lloyd
---
Notes:
v1:
- Fix platform timer offset in GTDT for FVP [SAMI]
Platform/ARM/VExpressPkg/AcpiTables/Gtdt.aslc | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Platform/ARM/VExpressPkg/AcpiTables/Gtdt.aslc
b/Platform/ARM/VExpressPkg/AcpiTables/Gtdt.aslc
index
ae570574b298094ff468f30b78fbd8c98db506c5..1cb4b498300cf1a08514835677154eace1dd1803
100644
--- a/Platform/ARM/VExpressPkg/AcpiTables/Gtdt.aslc
+++ b/Platform/ARM/VExpressPkg/AcpiTables/Gtdt.aslc
@@ -108,7 +108,7 @@ FVP_GENERIC_TIMER_DESCRIPTION_TABLES Gtdt = {
FVP_GTDT_GTIMER_FLAGS,// UINT32
NonSecurePL2TimerFlags
FVP_CNT_READ_BASE_ADDRESS,// UINT64
CntReadBasePhysicalAddress
FVP_PLATFORM_TIMER_COUNT, // UINT32
PlatformTimerCount
-#if (FVP_WATCHDOG_COUNT != 0)
+#if (FVP_PLATFORM_TIMER_COUNT != 0)
sizeof (EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLE) // UINT32
PlatfromTimerOffset
#else
0
--
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'
___
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Re: [edk2] [PATCH v1 16/27] BaseTools: Replace EDK Component strings with predefined constant
Sure. We could make a new constant that is defined to the same value. Do you
want to propose a name?
> -Original Message-
> From: Zhu, Yonghong
> Sent: Tuesday, April 24, 2018 12:42 AM
> To: Carsey, Jaben ; edk2-devel@lists.01.org
> Cc: Gao, Liming ; Zhu, Yonghong
>
> Subject: RE: [PATCH v1 16/27] BaseTools: Replace EDK Component strings
> with predefined constant
> Importance: High
>
> Hi Jaben,
>
> For build.py (-Y option) and BuildReport.py, use
> EDK_COMPONENT_TYPE_LIBRARY to replace "LIBRARY" may be confusion.
> One is component type, another is report type though they use same
> keyword.
> If we really want to do this replacement, how about use another constant
> name ? besides, whether we need cover the other report type, not only the
> "LIBRARY" ?
>
> Best Regards,
> Zhu Yonghong
>
>
> -Original Message-
> From: Carsey, Jaben
> Sent: Friday, April 20, 2018 11:52 PM
> To: edk2-devel@lists.01.org
> Cc: Gao, Liming ; Zhu, Yonghong
>
> Subject: [PATCH v1 16/27] BaseTools: Replace EDK Component strings with
> predefined constant
>
> EDK_COMPONENT_TYPE_LIBRARY was 'LIBRARY'
> EDK_COMPONENT_TYPE_SECURITY_CORE was 'SECURITY_CORE'
> EDK_COMPONENT_TYPE_COMBINED_PEIM_DRIVER was
> 'COMBINED_PEIM_DRIVER'
> EDK_COMPONENT_TYPE_PIC_PEIM was 'PIC_PEIM'
> EDK_COMPONENT_TYPE_RELOCATABLE_PEIM was 'RELOCATABLE_PEIM'
> EDK_COMPONENT_TYPE_BS_DRIVER was 'BS_DRIVER'
> EDK_COMPONENT_TYPE_RT_DRIVER was 'RT_DRIVER'
> EDK_COMPONENT_TYPE_SAL_RT_DRIVER was 'SAL_RT_DRIVER'
> EDK_COMPONENT_TYPE_APPLICATION was 'APPLICATION'
>
> Cc: Liming Gao
> Cc: Yonghong Zhu
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Jaben Carsey
> ---
> BaseTools/Source/Python/Common/DataType.py| 28 ++--
>
> BaseTools/Source/Python/GenFds/FdfParser.py | 6 ++---
> BaseTools/Source/Python/GenFds/Ffs.py | 2 +-
> BaseTools/Source/Python/Workspace/InfBuildData.py | 2 +-
> BaseTools/Source/Python/build/BuildReport.py | 6 ++---
> BaseTools/Source/Python/build/build.py| 8 +++---
> 6 files changed, 26 insertions(+), 26 deletions(-)
>
> diff --git a/BaseTools/Source/Python/Common/DataType.py
> b/BaseTools/Source/Python/Common/DataType.py
> index ab9acb417331..74ed711abc52 100644
> --- a/BaseTools/Source/Python/Common/DataType.py
> +++ b/BaseTools/Source/Python/Common/DataType.py
> @@ -80,7 +80,7 @@ SUP_MODULE_LIST_STRING =
> TAB_VALUE_SPLIT.join(SUP_MODULE_LIST)
> SUP_MODULE_SET_PEI = {SUP_MODULE_PEIM, SUP_MODULE_PEI_CORE}
>
> EDK_COMPONENT_TYPE_LIBRARY = 'LIBRARY'
> -EDK_COMPONENT_TYPE_SECUARITY_CORE = 'SECUARITY_CORE'
> +EDK_COMPONENT_TYPE_SECURITY_CORE = 'SECURITY_CORE'
> EDK_COMPONENT_TYPE_PEI_CORE = SUP_MODULE_PEI_CORE
> EDK_COMPONENT_TYPE_COMBINED_PEIM_DRIVER =
> 'COMBINED_PEIM_DRIVER'
> EDK_COMPONENT_TYPE_PIC_PEIM = 'PIC_PEIM'
> @@ -93,18 +93,18 @@ EDK_NAME = 'EDK'
> EDKII_NAME = 'EDKII'
>
> COMPONENT_TO_MODULE_MAP_DICT = {
> -"LIBRARY" : SUP_MODULE_BASE,
> -"SECURITY_CORE" : SUP_MODULE_SEC,
> -SUP_MODULE_PEI_CORE : SUP_MODULE_PEI_CORE,
> -"COMBINED_PEIM_DRIVER" : SUP_MODULE_PEIM,
> -"PIC_PEIM" : SUP_MODULE_PEIM,
> -"RELOCATABLE_PEIM" : SUP_MODULE_PEIM,
> -"PE32_PEIM" : SUP_MODULE_PEIM,
> -"BS_DRIVER" : SUP_MODULE_DXE_DRIVER,
> -"RT_DRIVER" : SUP_MODULE_DXE_RUNTIME_DRIVER,
> -"SAL_RT_DRIVER" : SUP_MODULE_DXE_SAL_DRIVER,
> -"APPLICATION" : SUP_MODULE_UEFI_APPLICATION,
> -"LOGO" : SUP_MODULE_BASE,
> +EDK_COMPONENT_TYPE_LIBRARY : SUP_MODULE_BASE,
> +EDK_COMPONENT_TYPE_SECURITY_CORE : SUP_MODULE_SEC,
> +EDK_COMPONENT_TYPE_PEI_CORE : SUP_MODULE_PEI_CORE,
> +EDK_COMPONENT_TYPE_COMBINED_PEIM_DRIVER :
> SUP_MODULE_PEIM,
> +EDK_COMPONENT_TYPE_PIC_PEIM : SUP_MODULE_PEIM,
> +EDK_COMPONENT_TYPE_RELOCATABLE_PEIM : SUP_MODULE_PEIM,
> +"PE32_PEIM" : SUP_MODULE_PEIM,
> +EDK_COMPONENT_TYPE_BS_DRIVER :
> SUP_MODULE_DXE_DRIVER,
> +EDK_COMPONENT_TYPE_RT_DRIVER :
> SUP_MODULE_DXE_RUNTIME_DRIVER,
> +EDK_COMPONENT_TYPE_SAL_RT_DRIVER :
> SUP_MODULE_DXE_SAL_DRIVER,
> +EDK_COMPONENT_TYPE_APPLICATION :
> SUP_MODULE_UEFI_APPLICATION,
> +"LOGO" : SUP_MODULE_BASE,
> }
>
> BINARY_FILE_TYPE_FW = 'FW'
> @@ -125,7 +125,7 @@ BINARY_FILE_TYPE_UI = 'UI'
> BINARY_FILE_TYPE_BIN = 'BIN'
> BINARY_FILE_TYPE_FV = 'FV'
>
> -PLATFORM_COMPONENT_TYPE_LIBRARY = 'LIBRARY'
> +PLATFORM_COMPONENT_TYPE_LIBRARY =
> EDK_COMPONENT_TYPE_LIBRARY
> PLATFORM_COMPONENT_TYPE_LIBRARY_CLASS = 'LIBRARY_CLASS'
> PLATFORM_COMPONENT_TYPE_MODULE = 'MODULE'
>
> diff --git a/BaseTools/Source/Python/GenFds/FdfParser.py
> b/BaseTools/Source/Python/GenFds/FdfParser.py
> index 4ec114a
Re: [edk2] [PATCH v1 19/27] BaseTools: Replace Binary File type strings with predefined constant
1) I disagree. We defined a string constant for 'FV' already, why do we not want to use it? 2) I didn't make any of these names. I was only using what was already defined. We can certainly change or add to them, but here I was just trying to actually use what we define. > -Original Message- > From: Zhu, Yonghong > Sent: Tuesday, April 24, 2018 12:38 AM > To: Carsey, Jaben ; edk2-devel@lists.01.org > Cc: Gao, Liming ; Zhu, Yonghong > > Subject: RE: [PATCH v1 19/27] BaseTools: Replace Binary File type strings with > predefined constant > Importance: High > > Hi Jaben, > 1. use the BINARY_FILE_TYPE_FV to replace 'FV' in the file path may be > strange. How about we still keep to use 'FV' ? > 2. how about we create another constant name for 'GUID' ? I think some > place's replacement is a little odd, eg: > Value.startswith(BINARY_FILE_TYPE_GUID). Do you have any suggestions > on the naming conventions ? > > > Best Regards, > Zhu Yonghong > > > -Original Message- > From: Carsey, Jaben > Sent: Friday, April 20, 2018 11:52 PM > To: edk2-devel@lists.01.org > Cc: Gao, Liming ; Zhu, Yonghong > > Subject: [PATCH v1 19/27] BaseTools: Replace Binary File type strings with > predefined constant > > BINARY_FILE_TYPE_FW was 'FW' > BINARY_FILE_TYPE_GUID was 'GUID' > BINARY_FILE_TYPE_PREEFORM was 'PREEFORM' > BINARY_FILE_TYPE_UEFI_APP was 'UEFI_APP' > BINARY_FILE_TYPE_UNI_UI was 'UNI_UI' > BINARY_FILE_TYPE_UNI_VER was 'UNI_VER' > BINARY_FILE_TYPE_LIB was 'LIB' > BINARY_FILE_TYPE_PE32 was 'PE32' > BINARY_FILE_TYPE_PIC was 'PIC' > BINARY_FILE_TYPE_PEI_DEPEX was 'PEI_DEPEX' > BINARY_FILE_TYPE_DXE_DEPEX was 'DXE_DEPEX' > BINARY_FILE_TYPE_SMM_DEPEX was 'SMM_DEPEX' > BINARY_FILE_TYPE_TE was 'TE' > BINARY_FILE_TYPE_VER was 'VER' > BINARY_FILE_TYPE_UI was 'UI' > BINARY_FILE_TYPE_BIN was 'BIN' > BINARY_FILE_TYPE_FV was 'FV' > > Cc: Liming Gao > Cc: Yonghong Zhu > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Jaben Carsey > --- > BaseTools/Source/Python/AutoGen/AutoGen.py | 12 +-- > BaseTools/Source/Python/AutoGen/GenC.py| 8 +- > BaseTools/Source/Python/AutoGen/GenPcdDb.py| 4 +- > BaseTools/Source/Python/Common/Expression.py | 2 +- > BaseTools/Source/Python/Common/Misc.py | 4 +- > BaseTools/Source/Python/GenFds/DataSection.py | 6 +- > BaseTools/Source/Python/GenFds/DepexSection.py | 6 +- > BaseTools/Source/Python/GenFds/EfiSection.py | 10 +-- > BaseTools/Source/Python/GenFds/Fd.py | 3 +- > BaseTools/Source/Python/GenFds/FdfParser.py| 92 ++- > - > BaseTools/Source/Python/GenFds/Ffs.py | 14 +-- > BaseTools/Source/Python/GenFds/FfsInfStatement.py | 22 ++--- > BaseTools/Source/Python/GenFds/Fv.py | 4 +- > BaseTools/Source/Python/GenFds/GenFds.py | 10 +-- > BaseTools/Source/Python/GenFds/GenFdsGlobalVariable.py | 4 +- > BaseTools/Source/Python/GenFds/OptRomInfStatement.py | 2 +- > BaseTools/Source/Python/GenFds/Region.py | 5 +- > BaseTools/Source/Python/GenFds/Section.py | 46 +- > BaseTools/Source/Python/GenFds/UiSection.py| 2 +- > BaseTools/Source/Python/Trim/Trim.py | 2 +- > BaseTools/Source/Python/Workspace/DscBuildData.py | 2 +- > BaseTools/Source/Python/Workspace/InfBuildData.py | 2 +- > BaseTools/Source/Python/build/BuildReport.py | 12 +-- > 23 files changed, 138 insertions(+), 136 deletions(-) > > diff --git a/BaseTools/Source/Python/AutoGen/AutoGen.py > b/BaseTools/Source/Python/AutoGen/AutoGen.py > index 9b2164ed8216..534fbe79fad9 100644 > --- a/BaseTools/Source/Python/AutoGen/AutoGen.py > +++ b/BaseTools/Source/Python/AutoGen/AutoGen.py > @@ -923,7 +923,7 @@ class WorkspaceAutoGen(AutoGen): > ## Return the directory to store FV files > def _GetFvDir(self): > if self._FvDir is None: > -self._FvDir = path.join(self.BuildDir, 'FV') > +self._FvDir = path.join(self.BuildDir, BINARY_FILE_TYPE_FV) > return self._FvDir > > ## Return the directory to store all intermediate and final files built > @@ -1326,7 +1326,7 @@ class PlatformAutoGen(AutoGen): > > def UpdateNVStoreMaxSize(self,OrgVpdFile): > if self.VariableInfo: > -VpdMapFilePath = os.path.join(self.BuildDir, "FV", "%s.map" % > self.Platform.VpdToolGuid) > +VpdMapFilePath = os.path.join(self.BuildDir, BINARY_FILE_TYPE_FV, > "%s.map" % self.Platform.VpdToolGuid) > PcdNvStoreDfBuffer = [item for item in self._DynamicPcdList if > item.TokenCName == "PcdNvStoreDefaultValueBuffer" and > item.TokenSpaceGuidCName == "gEfiMdeModulePkgTokenSpaceGuid"] > > if PcdNvStoreDfBuffer: > @@ -1719,7 +1719,7 @@ class PlatformAutoGen(AutoGen): > > # Process VPD map file generated by
Re: [edk2] [PATCH edk2-platforms 34/39] Silicon/NXP: Implement EFI_CPU_IO2_PROTOCOL
On 24 April 2018 at 15:36, Vabhav Sharma wrote: > > >>-Original Message- >>From: Ard Biesheuvel [mailto:ard.biesheu...@linaro.org] >>Sent: Tuesday, April 24, 2018 6:04 PM >>To: Vabhav Sharma >>Cc: Meenakshi Aggarwal ; Leif Lindholm >>; Kinney, Michael D ; >>edk2-devel@lists.01.org; Udit Kumar ; Varun Sethi >> >>Subject: Re: [PATCH edk2-platforms 34/39] Silicon/NXP: Implement >>EFI_CPU_IO2_PROTOCOL >> >>On 24 April 2018 at 14:26, Vabhav Sharma wrote: >>> >>> -Original Message- From: Ard Biesheuvel [mailto:ard.biesheu...@linaro.org] Sent: Friday, April 20, 2018 2:11 PM To: Meenakshi Aggarwal Cc: Leif Lindholm ; Kinney, Michael D ; edk2-devel@lists.01.org; Udit Kumar ; Varun Sethi ; Vabhav Sharma Subject: Re: [PATCH edk2-platforms 34/39] Silicon/NXP: Implement EFI_CPU_IO2_PROTOCOL On 16 February 2018 at 09:50, Meenakshi wrote: > From: Vabhav > > NXP SOC has mutiple PCIe RCs,Adding respective implementation of > EFI_CPU_IO2_PROTOCOL to provide Memory Space Read/Write functions > used by generic Host Bridge Driver including correct value for the > translation offset during MMIO accesses > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Vabhav > Signed-off-by: Meenakshi Aggarwal This driver looks completely wrong to me: MMIO access is memory mapped, and given that you don't implement PCI to CPU translation of MMIO accesses, the memory read and write functions should not perform any translation at all, and just relay the accesses. On the other hand, the I/O accessors are not implemented at all, and these are the ones that require translation, given that the I/O port addresses in the CPU >>space need translation to MMIO addressess. >>> >>> On NXP SoC, Mapping between CPU view and PCIe view is not 1:1 and require >>CPU view translation for MMIO regions access, Accordingly translation is added >>during memory read/write services. >>> Bus driver relays the address range where PCIe device Bar region is split >>> from, >>Translation is required for relaying it to correct PCIe controller cpu view >>address. >>> >> >>You cannot implement this only in the EFI_CPU_IO2_PROTOCOL driver. >>That way, EFI_PCI_IO_PROTOCOL.GetBarAttributes() will return resource >>descriptors with untranslated addresses, breaking drivers that rely on this >>information. >> >>If your PCIe implementation relies on MMIO translation, please refer to the >>recently merged code in EDK2 and edk2-platforms implementing this for >>Socionext SynQuacer. > Ok, PciIo->GetBarAttributes is expected to return CPU view address. Yes > Are you referring to edk2 commit 74d0a33(Address translation support added to > generic PciHostBridge driver)? Submitted patch development is done prior to > this commit. I understand. But that does not make your code correct. > I will refer the commits for Socionext SynQuacer in edk2-platforms for MMIO > translation. Yes please. And I/O translation needs to be implemented as well. Also, you don't seem to be using the PcdPciExp?BaseAddr PCDs anywhere, so you can drop them from the .dsc >>> No, It's used for checking the access to MMIO32 region and CPU view >>> base address varies between different NXP SoCs > --- > Silicon/NXP/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.c | 529 ++ > Silicon/NXP/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.inf | 48 ++ > 2 files changed, 577 insertions(+) > create mode 100644 Silicon/NXP/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.c > create mode 100644 > Silicon/NXP/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.inf > > diff --git a/Silicon/NXP/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.c > b/Silicon/NXP/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.c > new file mode 100644 > index 000..b5fb72c > --- /dev/null > +++ b/Silicon/NXP/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.c > @@ -0,0 +1,529 @@ > +/** @file > + Produces the CPU I/O 2 Protocol. > + > + Copyright (c) 2009 - 2012, Intel Corporation. All rights > + reserved. Copyright (c) 2016, Linaro Ltd. All rights > + reserved. Copyright 2018 NXP > + > + This program and the accompanying materials are licensed and > + made available under the terms and conditions of the BSD License > + which accompanies this distribution. The full text of the license > + may be found at > + > + https://emea01.safelinks.protection.outlook.com/?url=http%3A%2F%2F > + op > + ensource.org%2Flicenses%2Fbsd- >>license.php&data=02%7C01%7Cvabhav.sh > + ar > + ma%40nxp.com%7C4507c0726b244ad6476d08d5a69a64ee%7C686ea1d3bc2b >>4c 6fa9 > + 2cd99c5c301635%7C0%7C0%7C636598104414046440&sdata=IFSU0%2FeTdW >>rw gg0f > + 0Lq2qSVGgogG68tYZevrRmC%2BkV8%3D&reserved=0 > + > + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" > + BASIS, WITHOUT WARR
Re: [edk2] [PATCH edk2-platforms 34/39] Silicon/NXP: Implement EFI_CPU_IO2_PROTOCOL
>-Original Message- >From: Ard Biesheuvel [mailto:ard.biesheu...@linaro.org] >Sent: Tuesday, April 24, 2018 6:04 PM >To: Vabhav Sharma >Cc: Meenakshi Aggarwal ; Leif Lindholm >; Kinney, Michael D ; >edk2-devel@lists.01.org; Udit Kumar ; Varun Sethi > >Subject: Re: [PATCH edk2-platforms 34/39] Silicon/NXP: Implement >EFI_CPU_IO2_PROTOCOL > >On 24 April 2018 at 14:26, Vabhav Sharma wrote: >> >> >>>-Original Message- >>>From: Ard Biesheuvel [mailto:ard.biesheu...@linaro.org] >>>Sent: Friday, April 20, 2018 2:11 PM >>>To: Meenakshi Aggarwal >>>Cc: Leif Lindholm ; Kinney, Michael D >>>; edk2-devel@lists.01.org; Udit Kumar >>>; Varun Sethi ; Vabhav Sharma >>> >>>Subject: Re: [PATCH edk2-platforms 34/39] Silicon/NXP: Implement >>>EFI_CPU_IO2_PROTOCOL >>> >>>On 16 February 2018 at 09:50, Meenakshi >>>wrote: From: Vabhav NXP SOC has mutiple PCIe RCs,Adding respective implementation of EFI_CPU_IO2_PROTOCOL to provide Memory Space Read/Write functions used by generic Host Bridge Driver including correct value for the translation offset during MMIO accesses Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Vabhav Signed-off-by: Meenakshi Aggarwal >>> >>>This driver looks completely wrong to me: MMIO access is memory >>>mapped, and given that you don't implement PCI to CPU translation of >>>MMIO accesses, the memory read and write functions should not perform >>>any translation at all, and just relay the accesses. On the other >>>hand, the I/O accessors are not implemented at all, and these are the >>>ones that require translation, given that the I/O port addresses in the CPU >space need translation to MMIO addressess. >> >> On NXP SoC, Mapping between CPU view and PCIe view is not 1:1 and require >CPU view translation for MMIO regions access, Accordingly translation is added >during memory read/write services. >> Bus driver relays the address range where PCIe device Bar region is split >> from, >Translation is required for relaying it to correct PCIe controller cpu view >address. >> > >You cannot implement this only in the EFI_CPU_IO2_PROTOCOL driver. >That way, EFI_PCI_IO_PROTOCOL.GetBarAttributes() will return resource >descriptors with untranslated addresses, breaking drivers that rely on this >information. > >If your PCIe implementation relies on MMIO translation, please refer to the >recently merged code in EDK2 and edk2-platforms implementing this for >Socionext SynQuacer. Ok, PciIo->GetBarAttributes is expected to return CPU view address. Are you referring to edk2 commit 74d0a33(Address translation support added to generic PciHostBridge driver)? Submitted patch development is done prior to this commit. I will refer the commits for Socionext SynQuacer in edk2-platforms for MMIO translation. > > >>> >>>Also, you don't seem to be using the PcdPciExp?BaseAddr PCDs anywhere, >>>so you can drop them from the .dsc >> No, It's used for checking the access to MMIO32 region and CPU view >> base address varies between different NXP SoCs >>> --- Silicon/NXP/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.c | 529 >>>++ Silicon/NXP/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.inf | 48 ++ 2 files changed, 577 insertions(+) create mode 100644 Silicon/NXP/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.c create mode 100644 Silicon/NXP/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.inf diff --git a/Silicon/NXP/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.c b/Silicon/NXP/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.c new file mode 100644 index 000..b5fb72c --- /dev/null +++ b/Silicon/NXP/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.c @@ -0,0 +1,529 @@ +/** @file + Produces the CPU I/O 2 Protocol. + + Copyright (c) 2009 - 2012, Intel Corporation. All rights + reserved. Copyright (c) 2016, Linaro Ltd. All rights + reserved. Copyright 2018 NXP + + This program and the accompanying materials are licensed and + made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license + may be found at + + https://emea01.safelinks.protection.outlook.com/?url=http%3A%2F%2F + op + ensource.org%2Flicenses%2Fbsd- >license.php&data=02%7C01%7Cvabhav.sh + ar + >>>ma%40nxp.com%7C4507c0726b244ad6476d08d5a69a64ee%7C686ea1d3bc2b >4c >>>6fa9 + >>>2cd99c5c301635%7C0%7C0%7C636598104414046440&sdata=IFSU0%2FeTdW >rw >>>gg0f + 0Lq2qSVGgogG68tYZevrRmC%2BkV8%3D&reserved=0 + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" + BASIS, WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, >EITHER >>>EXPRESS OR IMPLIED. + +**/ + +#include +#include +#include +#include +#include +#include +#include + +#define MAX_IO_PORT_ADDRESS PCI_SEG2_PORTIO_MAX + +// +// Handle for the
Re: [edk2] [PATCH edk2-platforms 39/39] Platform/NXP:PCIe enablement for LS2088A RDB
>-Original Message-
>From: Leif Lindholm [mailto:leif.lindh...@linaro.org]
>Sent: Friday, April 20, 2018 9:06 PM
>To: Meenakshi Aggarwal
>Cc: ard.biesheu...@linaro.org; edk2-devel@lists.01.org; Udit Kumar
>; Varun Sethi ; Vabhav Sharma
>
>Subject: Re: [PATCH edk2-platforms 39/39] Platform/NXP:PCIe enablement for
>LS2088A RDB
>
>On Fri, Feb 16, 2018 at 02:20:35PM +0530, Meenakshi wrote:
>> From: Vabhav
>>
>> Compilation: Update the fdf, dsc and dec files.
>>
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Vabhav
>> ---
>> Platform/NXP/LS2088aRdbPkg/LS2088aRdbPkg.dsc| 17
>+
>> Platform/NXP/LS2088aRdbPkg/LS2088aRdbPkg.fdf| 9 +
>> .../Library/PlatformLib/ArmPlatformLib.inf | 2 ++
>> .../LS2088aRdbPkg/Library/PlatformLib/NxpQoriqLsMem.c | 6 ++
>> Silicon/NXP/LS2088A/LS2088A.dsc | 3 +++
>> 5 files changed, 37 insertions(+)
>>
>> diff --git a/Platform/NXP/LS2088aRdbPkg/LS2088aRdbPkg.dsc
>> b/Platform/NXP/LS2088aRdbPkg/LS2088aRdbPkg.dsc
>> index 4d32ea5..1ae55d4 100755
>> --- a/Platform/NXP/LS2088aRdbPkg/LS2088aRdbPkg.dsc
>> +++ b/Platform/NXP/LS2088aRdbPkg/LS2088aRdbPkg.dsc
>> @@ -43,6 +43,8 @@
>>BoardLib|Platform/NXP/LS2088aRdbPkg/Library/BoardLib/BoardLib.inf
>>FpgaLib|Platform/NXP/LS2088aRdbPkg/Library/FpgaLib/FpgaLib.inf
>>NorFlashLib|Silicon/NXP/Library/NorFlashLib/NorFlashLib.inf
>> + PciSegmentLib|Silicon/NXP/Library/PciSegmentLib/PciSegmentLib.inf
>> +
>> + PciHostBridgeLib|Silicon/NXP/Library/PciHostBridgeLib/PciHostBridgeL
>> + ib.inf
>>
>> [PcdsFixedAtBuild.common]
>>
>> @@ -97,6 +99,13 @@
>>gNxpQoriqLsTokenSpaceGuid.PcdFlashDeviceBase64|0x58000
>>gNxpQoriqLsTokenSpaceGuid.PcdFlashReservedRegionBase64|0x58030
>>
>> + #
>> + # PCI PCDs.
>> + #
>> + gNxpQoriqLsTokenSpaceGuid.PcdPciDebug|FALSE
>> + gNxpQoriqLsTokenSpaceGuid.PcdPcieLutBase|0x8
>> + gNxpQoriqLsTokenSpaceGuid.PcdPcieLutDbg|0x407FC
>> +
>>
>>
>##
>
>> ##
>> #
>> # Components Section - list of all EDK II Modules needed by this
>> Platform @@ -115,3 +124,11 @@
>>Silicon/NXP/Drivers/I2cDxe/I2cDxe.inf
>>Silicon/NXP/Drivers/NorFlashDxe/NorFlashDxe.inf
>>Silicon/NXP/Drivers/UsbHcdInitDxe/UsbHcd.inf
>> + Silicon/NXP/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.inf
>> + MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf {
>> +
>> + gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x8010004F
>> + }
>> + MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
>> +
>> + ##
>> diff --git a/Platform/NXP/LS2088aRdbPkg/LS2088aRdbPkg.fdf
>> b/Platform/NXP/LS2088aRdbPkg/LS2088aRdbPkg.fdf
>> index 8688d85..35a79bd 100644
>> --- a/Platform/NXP/LS2088aRdbPkg/LS2088aRdbPkg.fdf
>> +++ b/Platform/NXP/LS2088aRdbPkg/LS2088aRdbPkg.fdf
>> @@ -127,6 +127,13 @@ READ_LOCK_STATUS = TRUE
>>INF Silicon/NXP/Drivers/NorFlashDxe/NorFlashDxe.inf
>>
>>#
>> + # PCI
>> + #
>> + INF Silicon/NXP/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.inf
>> + INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf
>> + INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
>> +
>> + #
>># Network modules
>>#
>>INF MdeModulePkg/Universal/Network/SnpDxe/SnpDxe.inf
>> @@ -153,6 +160,8 @@ READ_LOCK_STATUS = TRUE
>>
>>INF
>>
>MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDev
>> iceDxe.inf
>>
>> + INF
>> +
>ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf
>> +
>
>Same comment as previously platforms: please conditionalise and mention in
>commit message.
>(Please add some detail to commit message in general about what is being
>enabled.)
>
>/
>Leif
Ok , Updated in header
I will update in commit message
Thanks.
>
>>#
>># USB Support
>>#
>> diff --git
>> a/Platform/NXP/LS2088aRdbPkg/Library/PlatformLib/ArmPlatformLib.inf
>> b/Platform/NXP/LS2088aRdbPkg/Library/PlatformLib/ArmPlatformLib.inf
>> index f5e5abd..0b836a8 100644
>> ---
>> a/Platform/NXP/LS2088aRdbPkg/Library/PlatformLib/ArmPlatformLib.inf
>> +++ b/Platform/NXP/LS2088aRdbPkg/Library/PlatformLib/ArmPlatformLib.in
>> +++ f
>> @@ -44,6 +44,8 @@
>>gArmTokenSpaceGuid.PcdArmPrimaryCore
>>gNxpQoriqLsTokenSpaceGuid.PcdCcsrBaseAddr
>>gNxpQoriqLsTokenSpaceGuid.PcdCcsrSize
>> + gNxpQoriqLsTokenSpaceGuid.PcdRomBaseAddr
>> + gNxpQoriqLsTokenSpaceGuid.PcdRomSize
>>gNxpQoriqLsTokenSpaceGuid.PcdIfcRegion1BaseAddr
>>gNxpQoriqLsTokenSpaceGuid.PcdIfcRegion1Size
>>gNxpQoriqLsTokenSpaceGuid.PcdIfcRegion2BaseAddr
>> diff --git
>> a/Platform/NXP/LS2088aRdbPkg/Library/PlatformLib/NxpQoriqLsMem.c
>> b/Platform/NXP/LS2088aRdbPkg/Library/PlatformLib/NxpQoriqLsMem.c
>> index ccb49f6..8b2145b 100644
>> --- a/Platform/NXP/LS2088aRdbPkg/Library/PlatformLib/NxpQoriqLsMem.c
>> +++ b/Platform/NXP/LS2088aRdbPkg/Library/PlatformLib/NxpQoriqLsMem.c
>> @@ -80,6 +80,12 @@ ArmPlatformGetVirtualMemoryMap (
>>Vir
Re: [edk2] [PATCH edk2-platforms 38/39] Platform/NXP:PCIe enablement for LS1046A RDB
>-Original Message-
>From: Leif Lindholm [mailto:leif.lindh...@linaro.org]
>Sent: Friday, April 20, 2018 9:03 PM
>To: Meenakshi Aggarwal
>Cc: ard.biesheu...@linaro.org; edk2-devel@lists.01.org; Udit Kumar
>; Varun Sethi ; Vabhav Sharma
>
>Subject: Re: [PATCH edk2-platforms 38/39] Platform/NXP:PCIe enablement for
>LS1046A RDB
>
>On Fri, Feb 16, 2018 at 02:20:34PM +0530, Meenakshi wrote:
>> From: Vabhav
>>
>> Compilation: Update the fdf, dsc and dec files.
>>
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Vabhav
>> ---
>> Platform/NXP/LS1046aRdbPkg/LS1046aRdbPkg.dsc | 15
>+++
>> Platform/NXP/LS1046aRdbPkg/LS1046aRdbPkg.fdf | 9 +
>> .../LS1046aRdbPkg/Library/PlatformLib/ArmPlatformLib.inf | 2 ++
>> .../NXP/LS1046aRdbPkg/Library/PlatformLib/NxpQoriqLsMem.c | 6 ++
>> Silicon/NXP/LS1046A/LS1046A.dsc | 3 +++
>> 5 files changed, 35 insertions(+)
>>
>> diff --git a/Platform/NXP/LS1046aRdbPkg/LS1046aRdbPkg.dsc
>> b/Platform/NXP/LS1046aRdbPkg/LS1046aRdbPkg.dsc
>> index 36002d5..231207d 100644
>> --- a/Platform/NXP/LS1046aRdbPkg/LS1046aRdbPkg.dsc
>> +++ b/Platform/NXP/LS1046aRdbPkg/LS1046aRdbPkg.dsc
>> @@ -41,6 +41,8 @@
>>IfcLib|Silicon/NXP/Library/IfcLib/IfcLib.inf
>>BoardLib|Platform/NXP/LS1046aRdbPkg/Library/BoardLib/BoardLib.inf
>>FpgaLib|Platform/NXP/LS1046aRdbPkg/Library/FpgaLib/FpgaLib.inf
>> + PciSegmentLib|Silicon/NXP/Library/PciSegmentLib/PciSegmentLib.inf
>> +
>> + PciHostBridgeLib|Silicon/NXP/Library/PciHostBridgeLib/PciHostBridgeL
>> + ib.inf
>>
>> [PcdsFixedAtBuild.common]
>>
>> @@ -65,6 +67,7 @@
>>gNxpQoriqLsTokenSpaceGuid.PcdGurBigEndian|TRUE
>>gNxpQoriqLsTokenSpaceGuid.PcdWdogBigEndian|TRUE
>>gNxpQoriqLsTokenSpaceGuid.PcdIfcBigEndian|TRUE
>> + gNxpQoriqLsTokenSpaceGuid.PcdPciLutBigEndian|TRUE
>>
>>#
>># I2C controller Pcds
>> @@ -77,6 +80,12 @@
>>gNxpQoriqLsTokenSpaceGuid.PcdI2cSlaveAddress|0x51
>>gNxpQoriqLsTokenSpaceGuid.PcdI2cSpeed|10
>>
>> + #
>> + # PCI PCDs.
>> + #
>> + gNxpQoriqLsTokenSpaceGuid.PcdPciDebug|FALSE
>> + gNxpQoriqLsTokenSpaceGuid.PcdPcieLutBase|0x8
>> + gNxpQoriqLsTokenSpaceGuid.PcdPcieLutDbg|0x407FC
>>
>>
>##
>
>> ##
>> #
>> # Components Section - list of all EDK II Modules needed by this
>> Platform @@ -90,5 +99,11 @@
>>
>>Silicon/NXP/Drivers/WatchDog/WatchDogDxe.inf
>>Silicon/NXP/Drivers/I2cDxe/I2cDxe.inf
>> + Silicon/NXP/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.inf
>> + MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf {
>> +
>> + gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x8010004F
>> + }
>> + MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
>>
>> ##
>> diff --git a/Platform/NXP/LS1046aRdbPkg/LS1046aRdbPkg.fdf
>> b/Platform/NXP/LS1046aRdbPkg/LS1046aRdbPkg.fdf
>> index 834e3a4..3351a06 100644
>> --- a/Platform/NXP/LS1046aRdbPkg/LS1046aRdbPkg.fdf
>> +++ b/Platform/NXP/LS1046aRdbPkg/LS1046aRdbPkg.fdf
>> @@ -123,6 +123,13 @@ READ_LOCK_STATUS = TRUE
>>INF EmbeddedPkg/SimpleTextInOutSerial/SimpleTextInOutSerial.inf
>>
>>#
>> + # PCI
>> + #
>> + INF Silicon/NXP/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.inf
>> + INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf
>> + INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
>> +
>> + #
>># Network modules
>>#
>>INF MdeModulePkg/Universal/Network/SnpDxe/SnpDxe.inf
>> @@ -147,6 +154,8 @@ READ_LOCK_STATUS = TRUE
>>INF MdeModulePkg/Universal/Network/Tcp4Dxe/Tcp4Dxe.inf
>> !endif
>>
>> + INF
>> +
>ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf
>> +
>
>Same comment as for previous platform(s): please conditionalise and mention in
>commit message.
>
>/
>Leif
Ok, I will update it.
>
>>#
>># FAT filesystem + GPT/MBR partitioning
>>#
>> diff --git
>> a/Platform/NXP/LS1046aRdbPkg/Library/PlatformLib/ArmPlatformLib.inf
>> b/Platform/NXP/LS1046aRdbPkg/Library/PlatformLib/ArmPlatformLib.inf
>> index 49b57fc..5e09757 100644
>> ---
>> a/Platform/NXP/LS1046aRdbPkg/Library/PlatformLib/ArmPlatformLib.inf
>> +++ b/Platform/NXP/LS1046aRdbPkg/Library/PlatformLib/ArmPlatformLib.in
>> +++ f
>> @@ -42,6 +42,8 @@
>>gArmTokenSpaceGuid.PcdArmPrimaryCore
>>gNxpQoriqLsTokenSpaceGuid.PcdCcsrBaseAddr
>>gNxpQoriqLsTokenSpaceGuid.PcdCcsrSize
>> + gNxpQoriqLsTokenSpaceGuid.PcdRomBaseAddr
>> + gNxpQoriqLsTokenSpaceGuid.PcdRomSize
>>gNxpQoriqLsTokenSpaceGuid.PcdIfcRegion1BaseAddr
>>gNxpQoriqLsTokenSpaceGuid.PcdIfcRegion1Size
>>gNxpQoriqLsTokenSpaceGuid.PcdIfcRegion2BaseAddr
>> diff --git
>> a/Platform/NXP/LS1046aRdbPkg/Library/PlatformLib/NxpQoriqLsMem.c
>> b/Platform/NXP/LS1046aRdbPkg/Library/PlatformLib/NxpQoriqLsMem.c
>> index 64c5612..1ef3292 100644
>> --- a/Platform/NXP/LS1046aRdbPkg/Library/PlatformLib/NxpQoriqLsMem.c
>> +++ b/Platform/NXP/LS1046aRdbPkg/Library/PlatformLib/NxpQoriqLsMem.c
>
Re: [edk2] [PATCH edk2-platforms 35/39] Compilation: Update the fdf, dsc and dec files.
>-Original Message-
>From: Leif Lindholm [mailto:leif.lindh...@linaro.org]
>Sent: Friday, April 20, 2018 8:53 PM
>To: Meenakshi Aggarwal
>Cc: ard.biesheu...@linaro.org; edk2-devel@lists.01.org; Udit Kumar
>; Varun Sethi ; Vabhav Sharma
>
>Subject: Re: [PATCH edk2-platforms 35/39] Compilation: Update the fdf, dsc and
>dec files.
>
>On Fri, Feb 16, 2018 at 02:20:31PM +0530, Meenakshi wrote:
>> From: Meenakshi Aggarwal
>>
>> LS1043A PCIe compilation and update firmware device, description and
>> declaration files.Defining Embedded Package PCD which should be at
>> least 20 for 64K PCIe IO size required for CPU hob during PEI phase to
>> Add IO space post PEI phase.
>>
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Vabhav
>> Signed-off-by: Meenakshi Aggarwal
>> ---
>> Platform/NXP/LS1043aRdbPkg/LS1043aRdbPkg.dsc | 16
>
>> Platform/NXP/LS1043aRdbPkg/LS1043aRdbPkg.fdf | 9 +
>> .../LS1043aRdbPkg/Library/PlatformLib/ArmPlatformLib.inf | 2 ++
>> .../LS1043aRdbPkg/Library/PlatformLib/NxpQoriqLsMem.c| 6 ++
>> Platform/NXP/NxpQoriqLs.dsc | 7 +++
>> Silicon/NXP/LS1043A/LS1043A.dsc | 4
>> Silicon/NXP/NxpQoriqLs.dec | 10 ++
>> 7 files changed, 54 insertions(+)
>>
>> diff --git a/Platform/NXP/LS1043aRdbPkg/LS1043aRdbPkg.dsc
>> b/Platform/NXP/LS1043aRdbPkg/LS1043aRdbPkg.dsc
>> index b2b514e..8cbaf88 100644
>> --- a/Platform/NXP/LS1043aRdbPkg/LS1043aRdbPkg.dsc
>> +++ b/Platform/NXP/LS1043aRdbPkg/LS1043aRdbPkg.dsc
>> @@ -42,6 +42,8 @@
>>BoardLib|Platform/NXP/LS1043aRdbPkg/Library/BoardLib/BoardLib.inf
>>FpgaLib|Platform/NXP/LS1043aRdbPkg/Library/FpgaLib/FpgaLib.inf
>>NorFlashLib|Silicon/NXP/Library/NorFlashLib/NorFlashLib.inf
>> + PciSegmentLib|Silicon/NXP/Library/PciSegmentLib/PciSegmentLib.inf
>> +
>> + PciHostBridgeLib|Silicon/NXP/Library/PciHostBridgeLib/PciHostBridgeL
>> + ib.inf
>>
>> [PcdsFixedAtBuild.common]
>>
>> @@ -79,6 +81,13 @@
>>gNxpQoriqLsTokenSpaceGuid.PcdFlashDeviceBase64|0x06000
>>gNxpQoriqLsTokenSpaceGuid.PcdFlashReservedRegionBase64|0x6030
>>
>> + #
>> + # PCI PCDs.
>> + #
>> + gNxpQoriqLsTokenSpaceGuid.PcdPciDebug|FALSE
>> + gNxpQoriqLsTokenSpaceGuid.PcdPcieLutBase|0x1
>> + gNxpQoriqLsTokenSpaceGuid.PcdPcieLutDbg|0x7FC
>> +
>>
>>
>##
>
>> ##
>> #
>> # Components Section - list of all EDK II Modules needed by this
>> Platform @@ -99,4 +108,11 @@
>>Silicon/NXP/Drivers/I2cDxe/I2cDxe.inf
>>Silicon/NXP/Drivers/NorFlashDxe/NorFlashDxe.inf
>>
>> + Silicon/NXP/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.inf
>> + MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf {
>> +
>> + gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x8010004F
>> + }
>> + MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
>> +
>> ##
>> diff --git a/Platform/NXP/LS1043aRdbPkg/LS1043aRdbPkg.fdf
>> b/Platform/NXP/LS1043aRdbPkg/LS1043aRdbPkg.fdf
>> index 6b5b63f..7993bf1 100644
>> --- a/Platform/NXP/LS1043aRdbPkg/LS1043aRdbPkg.fdf
>> +++ b/Platform/NXP/LS1043aRdbPkg/LS1043aRdbPkg.fdf
>> @@ -130,6 +130,13 @@ READ_LOCK_STATUS = TRUE
>>INF Silicon/NXP/Drivers/NorFlashDxe/NorFlashDxe.inf
>>
>>#
>> + # PCI
>> + #
>> + INF Silicon/NXP/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.inf
>> + INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf
>> + INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
>> +
>> + #
>># Network modules
>>#
>>INF MdeModulePkg/Universal/Network/SnpDxe/SnpDxe.inf
>> @@ -154,6 +161,8 @@ READ_LOCK_STATUS = TRUE
>>INF MdeModulePkg/Universal/Network/Tcp4Dxe/Tcp4Dxe.inf
>> !endif
>>
>> + INF
>> +
>ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf
>> +
>
>I'm pretty OK with most of these random updates squashed into one file, but the
>TftpDynamicCommand is something I generally don't like to see included by
>default.
>
>Other platforms put this inside a conditional statement:
>
>!ifdef $(INCLUDE_TFTP_COMMAND)
> INF
>ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf
>!endif
>
>so that it can be included when -D INCLUDE_TFTP_COMMAND=1 is added to the
>build command line.
>
>But beyond that, there is no mention of this addition in the commit message. So
>please add a notice, or break this specific item out as a separate patch.
Alright agree, I will update for conditional inclusion and submit as separate
patch.
>
>>#
>># FAT filesystem + GPT/MBR partitioning
>>#
>> diff --git
>> a/Platform/NXP/LS1043aRdbPkg/Library/PlatformLib/ArmPlatformLib.inf
>> b/Platform/NXP/LS1043aRdbPkg/Library/PlatformLib/ArmPlatformLib.inf
>> index 7feac56..f2c8b66 100644
>> ---
>> a/Platform/NXP/LS1043aRdbPkg/Library/PlatformLib/ArmPlatformLib.inf
>> +++ b/Platform/NXP/LS1043aRdbPkg/Library/PlatformLib/ArmPlatformLib.in
>> +++ f
>> @@ -65,3 +65,5
Re: [edk2] [PATCH edk2-platforms 34/39] Silicon/NXP: Implement EFI_CPU_IO2_PROTOCOL
>-Original Message-
>From: Leif Lindholm [mailto:leif.lindh...@linaro.org]
>Sent: Friday, April 20, 2018 8:46 PM
>To: Meenakshi Aggarwal
>Cc: ard.biesheu...@linaro.org; edk2-devel@lists.01.org; Udit Kumar
>; Varun Sethi ; Vabhav Sharma
>
>Subject: Re: [PATCH edk2-platforms 34/39] Silicon/NXP: Implement
>EFI_CPU_IO2_PROTOCOL
>
>On Fri, Feb 16, 2018 at 02:20:30PM +0530, Meenakshi wrote:
>> From: Vabhav
>>
>> NXP SOC has mutiple PCIe RCs,Adding respective implementation of
>> EFI_CPU_IO2_PROTOCOL to provide Memory Space Read/Write functions used
>> by generic Host Bridge Driver including correct value for the
>> translation offset during MMIO accesses
>>
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Vabhav
>> Signed-off-by: Meenakshi Aggarwal
>> ---
>> Silicon/NXP/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.c | 529
>++
>> Silicon/NXP/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.inf | 48 ++
>> 2 files changed, 577 insertions(+)
>> create mode 100644 Silicon/NXP/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.c
>> create mode 100644 Silicon/NXP/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.inf
>>
>> diff --git a/Silicon/NXP/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.c
>> b/Silicon/NXP/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.c
>> new file mode 100644
>> index 000..b5fb72c
>> --- /dev/null
>> +++ b/Silicon/NXP/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.c
>> @@ -0,0 +1,529 @@
>> +/** @file
>> + Produces the CPU I/O 2 Protocol.
>> +
>> + Copyright (c) 2009 - 2012, Intel Corporation. All rights
>> + reserved. Copyright (c) 2016, Linaro Ltd. All rights
>> + reserved. Copyright 2018 NXP
>> +
>> + This program and the accompanying materials are licensed and made
>> + available under the terms and conditions of the BSD License which
>> + accompanies this distribution. The full text of the license may be
>> + found at
>> +
>> + https://emea01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fop
>> + ensource.org%2Flicenses%2Fbsd-license.php&data=02%7C01%7Cvabhav.shar
>> +
>ma%40nxp.com%7C42500fab2cd1447bbe6308d5a6d19d8b%7C686ea1d3bc2b4c
>6fa9
>> +
>2cd99c5c301635%7C0%7C0%7C636598341623135085&sdata=Zo6s2LhxPSElw4F
>XsV
>> + 7%2Bx3Veb5yptglf1UQiA%2FNRRc4%3D&reserved=0
>> +
>> + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS"
>> + BASIS, WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER
>EXPRESS OR IMPLIED.
>> +
>> +**/
>> +
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +
>> +#define MAX_IO_PORT_ADDRESS PCI_SEG2_PORTIO_MAX
>> +
>> +//
>> +// Handle for the CPU I/O 2 Protocol
>> +//
>> +STATIC EFI_HANDLE mHandle;
>> +
>> +//
>> +// Lookup table for increment values based on transfer widths //
>> +STATIC CONST UINT8 mInStride[] = {
>> + 1, // EfiCpuIoWidthUint8
>> + 2, // EfiCpuIoWidthUint16
>> + 4, // EfiCpuIoWidthUint32
>> + 8, // EfiCpuIoWidthUint64
>> + 0, // EfiCpuIoWidthFifoUint8
>> + 0, // EfiCpuIoWidthFifoUint16
>> + 0, // EfiCpuIoWidthFifoUint32
>> + 0, // EfiCpuIoWidthFifoUint64
>> + 1, // EfiCpuIoWidthFillUint8
>> + 2, // EfiCpuIoWidthFillUint16
>> + 4, // EfiCpuIoWidthFillUint32
>> + 8 // EfiCpuIoWidthFillUint64
>> +};
>> +
>> +//
>> +// Lookup table for increment values based on transfer widths //
>> +STATIC CONST UINT8 mOutStride[] = {
>> + 1, // EfiCpuIoWidthUint8
>> + 2, // EfiCpuIoWidthUint16
>> + 4, // EfiCpuIoWidthUint32
>> + 8, // EfiCpuIoWidthUint64
>> + 1, // EfiCpuIoWidthFifoUint8
>> + 2, // EfiCpuIoWidthFifoUint16
>> + 4, // EfiCpuIoWidthFifoUint32
>> + 8, // EfiCpuIoWidthFifoUint64
>> + 0, // EfiCpuIoWidthFillUint8
>> + 0, // EfiCpuIoWidthFillUint16
>> + 0, // EfiCpuIoWidthFillUint32
>> + 0 // EfiCpuIoWidthFillUint64
>> +};
>> +
>> +/**
>> + Check parameters to a CPU I/O 2 Protocol service request.
>> +
>> + The I/O operations are carried out exactly as requested. The caller
>> + is responsible for satisfying any alignment and I/O width
>> + restrictions that a PI System on a platform might require. For
>> + example on some platforms, width requests of
>> + EfiCpuIoWidthUint64 do not work.
>> +
>> + @param[in] MmioOperation TRUE for an MMIO operation, FALSE for I/O
>Port operation.
>> + @param[in] Width Signifies the width of the I/O or Memory
>> operation.
>> + @param[in] AddressThe base address of the I/O operation.
>> + @param[in] Count The number of I/O operations to perform. The
>number of
>> +bytes moved is Width size * Count, starting at
>> Address.
>> + @param[in] Buffer For read operations, the destination buffer to
>> store
>the results.
>> +For write operations, the source buffer from
>> which to write
>data.
>> +
>> + @retval EFI_SUCCESSThe parameters for this request pass the
>> checks.
>> + @retval EFI_INVALID_PARAMETER Width is invalid for this PI system.
>> + @retval EFI_INVALID_PARAMETER Buffer is NULL.
>> + @retval EFI_UNSUPPORTEDThe
Re: [edk2] [PATCH edk2-platforms 34/39] Silicon/NXP: Implement EFI_CPU_IO2_PROTOCOL
On 24 April 2018 at 14:26, Vabhav Sharma wrote:
>
>
>>-Original Message-
>>From: Ard Biesheuvel [mailto:ard.biesheu...@linaro.org]
>>Sent: Friday, April 20, 2018 2:11 PM
>>To: Meenakshi Aggarwal
>>Cc: Leif Lindholm ; Kinney, Michael D
>>; edk2-devel@lists.01.org; Udit Kumar
>>; Varun Sethi ; Vabhav Sharma
>>
>>Subject: Re: [PATCH edk2-platforms 34/39] Silicon/NXP: Implement
>>EFI_CPU_IO2_PROTOCOL
>>
>>On 16 February 2018 at 09:50, Meenakshi
>>wrote:
>>> From: Vabhav
>>>
>>> NXP SOC has mutiple PCIe RCs,Adding respective implementation of
>>> EFI_CPU_IO2_PROTOCOL to provide Memory Space Read/Write functions used
>>> by generic Host Bridge Driver including correct value for the
>>> translation offset during MMIO accesses
>>>
>>> Contributed-under: TianoCore Contribution Agreement 1.1
>>> Signed-off-by: Vabhav
>>> Signed-off-by: Meenakshi Aggarwal
>>
>>This driver looks completely wrong to me: MMIO access is memory mapped, and
>>given that you don't implement PCI to CPU translation of MMIO accesses, the
>>memory read and write functions should not perform any translation at all, and
>>just relay the accesses. On the other hand, the I/O accessors are not
>>implemented at all, and these are the ones that require translation, given
>>that the
>>I/O port addresses in the CPU space need translation to MMIO addressess.
>
> On NXP SoC, Mapping between CPU view and PCIe view is not 1:1 and require CPU
> view translation for MMIO regions access, Accordingly translation is added
> during memory read/write services.
> Bus driver relays the address range where PCIe device Bar region is split
> from, Translation is required for relaying it to correct PCIe controller cpu
> view address.
>
You cannot implement this only in the EFI_CPU_IO2_PROTOCOL driver.
That way, EFI_PCI_IO_PROTOCOL.GetBarAttributes() will return resource
descriptors with untranslated addresses, breaking drivers that rely on
this information.
If your PCIe implementation relies on MMIO translation, please refer
to the recently merged code in EDK2 and edk2-platforms implementing
this for Socionext SynQuacer.
>>
>>Also, you don't seem to be using the PcdPciExp?BaseAddr PCDs anywhere, so you
>>can drop them from the .dsc
> No, It's used for checking the access to MMIO32 region and CPU view base
> address varies between different NXP SoCs
>>
>>> ---
>>> Silicon/NXP/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.c | 529
>>++
>>> Silicon/NXP/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.inf | 48 ++
>>> 2 files changed, 577 insertions(+)
>>> create mode 100644 Silicon/NXP/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.c
>>> create mode 100644 Silicon/NXP/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.inf
>>>
>>> diff --git a/Silicon/NXP/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.c
>>> b/Silicon/NXP/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.c
>>> new file mode 100644
>>> index 000..b5fb72c
>>> --- /dev/null
>>> +++ b/Silicon/NXP/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.c
>>> @@ -0,0 +1,529 @@
>>> +/** @file
>>> + Produces the CPU I/O 2 Protocol.
>>> +
>>> + Copyright (c) 2009 - 2012, Intel Corporation. All rights
>>> + reserved. Copyright (c) 2016, Linaro Ltd. All rights
>>> + reserved. Copyright 2018 NXP
>>> +
>>> + This program and the accompanying materials are licensed and made
>>> + available under the terms and conditions of the BSD License which
>>> + accompanies this distribution. The full text of the license may be
>>> + found at
>>> +
>>> + https://emea01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fop
>>> + ensource.org%2Flicenses%2Fbsd-license.php&data=02%7C01%7Cvabhav.shar
>>> +
>>ma%40nxp.com%7C4507c0726b244ad6476d08d5a69a64ee%7C686ea1d3bc2b4c
>>6fa9
>>> +
>>2cd99c5c301635%7C0%7C0%7C636598104414046440&sdata=IFSU0%2FeTdWrw
>>gg0f
>>> + 0Lq2qSVGgogG68tYZevrRmC%2BkV8%3D&reserved=0
>>> +
>>> + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS"
>>> + BASIS, WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER
>>EXPRESS OR IMPLIED.
>>> +
>>> +**/
>>> +
>>> +#include
>>> +#include
>>> +#include
>>> +#include
>>> +#include
>>> +#include
>>> +#include
>>> +
>>> +#define MAX_IO_PORT_ADDRESS PCI_SEG2_PORTIO_MAX
>>> +
>>> +//
>>> +// Handle for the CPU I/O 2 Protocol
>>> +//
>>> +STATIC EFI_HANDLE mHandle;
>>> +
>>> +//
>>> +// Lookup table for increment values based on transfer widths //
>>> +STATIC CONST UINT8 mInStride[] = {
>>> + 1, // EfiCpuIoWidthUint8
>>> + 2, // EfiCpuIoWidthUint16
>>> + 4, // EfiCpuIoWidthUint32
>>> + 8, // EfiCpuIoWidthUint64
>>> + 0, // EfiCpuIoWidthFifoUint8
>>> + 0, // EfiCpuIoWidthFifoUint16
>>> + 0, // EfiCpuIoWidthFifoUint32
>>> + 0, // EfiCpuIoWidthFifoUint64
>>> + 1, // EfiCpuIoWidthFillUint8
>>> + 2, // EfiCpuIoWidthFillUint16
>>> + 4, // EfiCpuIoWidthFillUint32
>>> + 8 // EfiCpuIoWidthFillUint64
>>> +};
>>> +
>>> +//
>>> +// Lookup table for increment values based on transfer widths //
>>> +STATIC CONST UINT8 mOutStride[] = {
>>> + 1, // EfiCpuIoWidthUint8
>>> + 2, // EfiCpuIoWidthUint16
>
Re: [edk2] [PATCH edk2-platforms 33/39] Silicon/NXP: Implement PciHostBridgeLib support
>-Original Message-
>From: Leif Lindholm [mailto:leif.lindh...@linaro.org]
>Sent: Friday, April 20, 2018 8:24 PM
>To: Meenakshi Aggarwal
>Cc: ard.biesheu...@linaro.org; edk2-devel@lists.01.org; Udit Kumar
>; Varun Sethi ; Vabhav Sharma
>
>Subject: Re: [PATCH edk2-platforms 33/39] Silicon/NXP: Implement
>PciHostBridgeLib support
>
>My only comment in addition to Ard's comments/questions:
>Use same endianness handling here as for preceding patches?
>
>/
>Leif
On NXP SoCs PCIe IP is LE except link state register access for which
endianness is taken care.
>
>On Fri, Feb 16, 2018 at 02:20:29PM +0530, Meenakshi wrote:
>> From: Vabhav
>>
>> Implement the library that exposes the PCIe root complexes to the
>> generic PCI host bridge driver,Putting SoC Specific low level init
>> code for the RCs.
>>
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Vabhav
>> Signed-off-by: Meenakshi Aggarwal
>> ---
>> .../Library/PciHostBridgeLib/PciHostBridgeLib.c| 618
>+
>> .../Library/PciHostBridgeLib/PciHostBridgeLib.inf | 50 ++
>> 2 files changed, 668 insertions(+)
>> create mode 100644
>> Silicon/NXP/Library/PciHostBridgeLib/PciHostBridgeLib.c
>> create mode 100644
>> Silicon/NXP/Library/PciHostBridgeLib/PciHostBridgeLib.inf
>>
>> diff --git a/Silicon/NXP/Library/PciHostBridgeLib/PciHostBridgeLib.c
>> b/Silicon/NXP/Library/PciHostBridgeLib/PciHostBridgeLib.c
>> new file mode 100644
>> index 000..e6f9b7c
>> --- /dev/null
>> +++ b/Silicon/NXP/Library/PciHostBridgeLib/PciHostBridgeLib.c
>> @@ -0,0 +1,618 @@
>> +/** @file
>> + PCI Host Bridge Library instance for NXP SoCs
>> +
>> + Copyright 2018 NXP
>> +
>> + This program and the accompanying materials are licensed and made
>> + available under the terms and conditions of the BSD License which
>> + accompanies this distribution. The full text of the license may be
>> + found at
>https://emea01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fopensou
>rce.org%2Flicenses%2Fbsd-
>license.php&data=02%7C01%7Cvabhav.sharma%40nxp.com%7C90628d666bad4
>6bf6dde08d5a6ce8fe0%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C
>636598328488287967&sdata=6Jwkzr%2BkvDURRF%2FQ8rvSN1OBggJNg14NGh
>W5s3WkuFM%3D&reserved=0.
>> +
>> + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS"
>> + BASIS, WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER
>EXPRESS OR IMPLIED.
>> +
>> +**/
>> +
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include #include
>> +#include #include #include
>> +
>> +#include
>> +
>> +#pragma pack(1)
>> +typedef struct {
>> + ACPI_HID_DEVICE_PATH AcpiDevicePath;
>> + EFI_DEVICE_PATH_PROTOCOL EndDevicePath; }
>> +EFI_PCI_ROOT_BRIDGE_DEVICE_PATH; #pragma pack ()
>> +
>> +STATIC CONST EFI_PCI_ROOT_BRIDGE_DEVICE_PATH
>> +mEfiPciRootBridgeDevicePath[] = {
>> + {
>> +{
>> + {
>> +ACPI_DEVICE_PATH,
>> +ACPI_DP,
>> +{
>> + (UINT8)(sizeof (ACPI_HID_DEVICE_PATH)),
>> + (UINT8)(sizeof (ACPI_HID_DEVICE_PATH) >> 8)
>> +}
>> + },
>> + EISA_PNP_ID (0x0A08), // PCI Express
>> + PCI_SEG0_NUM
>> +},
>> +
>> +{
>> + END_DEVICE_PATH_TYPE,
>> + END_ENTIRE_DEVICE_PATH_SUBTYPE,
>> + {
>> +END_DEVICE_PATH_LENGTH,
>> +0
>> + }
>> +}
>> + },
>> + {
>> +{
>> + {
>> +ACPI_DEVICE_PATH,
>> +ACPI_DP,
>> +{
>> + (UINT8)(sizeof (ACPI_HID_DEVICE_PATH)),
>> + (UINT8)(sizeof (ACPI_HID_DEVICE_PATH) >> 8)
>> +}
>> + },
>> + EISA_PNP_ID (0x0A08), // PCI Express
>> + PCI_SEG1_NUM
>> +},
>> +
>> +{
>> + END_DEVICE_PATH_TYPE,
>> + END_ENTIRE_DEVICE_PATH_SUBTYPE,
>> + {
>> +END_DEVICE_PATH_LENGTH,
>> +0
>> + }
>> +}
>> + },
>> + {
>> +{
>> + {
>> +ACPI_DEVICE_PATH,
>> +ACPI_DP,
>> +{
>> + (UINT8)(sizeof (ACPI_HID_DEVICE_PATH)),
>> + (UINT8)(sizeof (ACPI_HID_DEVICE_PATH) >> 8)
>> +}
>> + },
>> + EISA_PNP_ID (0x0A08), // PCI Express
>> + PCI_SEG2_NUM
>> +},
>> +
>> +{
>> + END_DEVICE_PATH_TYPE,
>> + END_ENTIRE_DEVICE_PATH_SUBTYPE,
>> + {
>> +END_DEVICE_PATH_LENGTH,
>> +0
>> + }
>> +}
>> + },
>> + {
>> +{
>> + {
>> +ACPI_DEVICE_PATH,
>> +ACPI_DP,
>> +{
>> + (UINT8)(sizeof (ACPI_HID_DEVICE_PATH)),
>> + (UINT8)(sizeof (ACPI_HID_DEVICE_PATH) >> 8)
>> +}
>> + },
>> + EISA_PNP_ID (0x0A08), // PCI Express
>> + PCI_SEG3_NUM
>> +},
>> +
>> +{
>> + END_DEVICE_PATH_TYPE,
>> + END_ENTIRE_DEVICE_PATH_SUBTYPE,
>> + {
>> +END_DEVICE_PATH_LENGTH,
>> +0
>> + }
>> +}
>> + }
>> +};
>> +
>> +STATIC
>> +GLOBAL_REMOVE_IF_UNREFERENCED
>> +CHAR16 *mPciHostBridgeLibAcpiAddressSpaceTypeStr[] = {
>> + L"Mem",
Re: [edk2] [PATCH edk2-platforms 32/39] Silicon/NXP: Implement PciSegmentLib to support multiple RCs
>-Original Message- >From: Leif Lindholm [mailto:leif.lindh...@linaro.org] >Sent: Friday, April 20, 2018 6:12 PM >To: Vabhav Sharma >Cc: Meenakshi Aggarwal ; >ard.biesheu...@linaro.org; edk2-devel@lists.01.org; Udit Kumar >; Varun Sethi >Subject: Re: [PATCH edk2-platforms 32/39] Silicon/NXP: Implement >PciSegmentLib to support multiple RCs > >On Fri, Apr 20, 2018 at 06:40:27AM +, Vabhav Sharma wrote: >> >> >> >-Original Message- >> >From: Leif Lindholm [mailto:leif.lindh...@linaro.org] >> >Sent: Friday, April 20, 2018 12:57 AM >> >To: Meenakshi Aggarwal >> >Cc: ard.biesheu...@linaro.org; edk2-devel@lists.01.org; Udit Kumar >> >; Varun Sethi ; Vabhav Sharma >> > >> >Subject: Re: [PATCH edk2-platforms 32/39] Silicon/NXP: Implement >> >PciSegmentLib to support multiple RCs >> > >> >On Fri, Feb 16, 2018 at 02:20:28PM +0530, Meenakshi wrote: >> >> From: Vabhav >> >> >> >> Multiple root complex support is not provided by standard library >> >> PciLib/PciExpressLib/PciSegmentLib, Reimplementing it and provide >> >> function for reading/writing into PCIe configuration Space. >> >> >> >> Contributed-under: TianoCore Contribution Agreement 1.1 >> >> Signed-off-by: Vabhav >> >> Signed-off-by: Meenakshi Aggarwal >> >> --- >> >> Silicon/NXP/Include/Pcie.h | 143 + >> >> Silicon/NXP/Library/PciSegmentLib/PciSegmentLib.c | 604 >> >+ >> >> .../NXP/Library/PciSegmentLib/PciSegmentLib.inf| 41 ++ >> >> 3 files changed, 788 insertions(+) create mode 100644 >> >> Silicon/NXP/Include/Pcie.h create mode 100644 >> >> Silicon/NXP/Library/PciSegmentLib/PciSegmentLib.c >> >> create mode 100644 >> >> Silicon/NXP/Library/PciSegmentLib/PciSegmentLib.inf >> >> >> >> diff --git a/Silicon/NXP/Include/Pcie.h >> >> b/Silicon/NXP/Include/Pcie.h new file mode 100644 index >> >> 000..a7e6f9b >> >> --- /dev/null >> >> +++ b/Silicon/NXP/Include/Pcie.h >> >> @@ -0,0 +1,143 @@ >> >> +/** @file >> >> + PCI memory configuration for NXP >> >> + >> >> + Copyright 2018 NXP >> >> + >> >> + This program and the accompanying materials are licensed and >> >> + made available under the terms and conditions of the BSD License >> >> + which accompanies this distribution. The full text of the >> >> + license may be found at >> >https://emea01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fope >> >nsou >> >rce.org%2Flicenses%2Fbsd- >> >>license.php&data=02%7C01%7Cvabhav.sharma%40nxp.com%7C081a2ebc43af4 >a >> >>daaf8e08d5a62b9921%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C >6 >> >>36597628604269440&sdata=kt661HfkUD2E3sYswy0I4vVFTV3%2Fq%2FiM%2Bi >W >> >egCISP%2BU%3D&reserved=0. >> >> + >> >> + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" >> >> + BASIS, WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, >EITHER >> >EXPRESS OR IMPLIED. >> >> + >> >> +**/ >> >> + >> >> +#ifndef __PCI_H__ >> >> +#define __PCI_H__ >> > >> >I'm not super happy about reusing such a generic name for the include >> >guard - or really even the filename. (MdePkg/Include/Pci.h has >> >_PCI_H_.) >> > >> >Could you rename this header NxpPcie.h and change the include guard >> >to _NXP_PCIE_H_? >> I see, Sure. >> > >> >> + >> >> +// Segment 0 >> >> +#define PCI_SEG0_NUM 0 >> >> + >> >> +#define PCI_SEG0_BUSNUM_MIN 0x0 >> >> +#define PCI_SEG0_BUSNUM_MAX 0xff >> >> + >> >> +#define PCI_SEG0_PORTIO_MIN 0x0 >> >> +#define PCI_SEG0_PORTIO_MAX 0x >> >> + >> >> +#define PCI_SEG0_MMIO32_MIN 0x4000 >> >> +#define PCI_SEG0_MMIO32_MAX 0x4fff >> >> +#define PCI_SEG0_MMIO64_MIN PCI_SEG0_MMIO_MEMBASE + >> >SEG_MEM_SIZE >> >> +#define PCI_SEG0_MMIO64_MAX PCI_SEG0_MMIO_MEMBASE + >> >SEG_MEM_LIMIT >> >> +#define PCI_SEG0_MMIO_MEMBASE FixedPcdGet64 >(PcdPciExp1BaseAddr) >> >> + >> >> +#define PCI_SEG0_DBI_BASE 0x0340 >> >> + >> >> +// Segment 1 >> >> +#define PCI_SEG1_NUM 1 >> >> + >> >> +#define PCI_SEG1_BUSNUM_MIN 0x0 >> >> +#define PCI_SEG1_BUSNUM_MAX 0xff >> >> + >> >> +#define PCI_SEG1_PORTIO_MIN 0x1 >> >> +#define PCI_SEG1_PORTIO_MAX 0x1 >> >> + >> >> +#define PCI_SEG1_MMIO32_MIN 0x5000 >> >> +#define PCI_SEG1_MMIO32_MAX 0x5fff >> >> +#define PCI_SEG1_MMIO64_MIN PCI_SEG1_MMIO_MEMBASE + >> >SEG_MEM_SIZE >> >> +#define PCI_SEG1_MMIO64_MAX PCI_SEG1_MMIO_MEMBASE + >> >SEG_MEM_LIMIT >> >> +#define PCI_SEG1_MMIO_MEMBASE FixedPcdGet64 >(PcdPciExp2BaseAddr) >> >> + >> >> +#define PCI_SEG1_DBI_BASE 0x0350 >> >> + >> >> +// Segment 2 >> >> +#define PCI_SEG2_NUM 2 >> >> + >> >> +#define PCI_SEG2_BUSNUM_MIN 0x0 >> >> +#define PCI_SEG2_BUSNUM_MAX 0xff >> >> + >> >> +#define PCI_SEG2_PORTIO_MIN 0x2 >> >> +#define PCI_SEG2_PORTIO_MAX 0x2 >> >> + >> >> +#define PCI_SEG2_MMIO32_MIN 0x6000 >> >> +#define PCI_SEG2_MMIO32_MAX 0x6fff >> >> +#define PCI_SEG2_MMIO64
Re: [edk2] [PATCH edk2-platforms 34/39] Silicon/NXP: Implement EFI_CPU_IO2_PROTOCOL
>-Original Message-
>From: Ard Biesheuvel [mailto:ard.biesheu...@linaro.org]
>Sent: Friday, April 20, 2018 2:11 PM
>To: Meenakshi Aggarwal
>Cc: Leif Lindholm ; Kinney, Michael D
>; edk2-devel@lists.01.org; Udit Kumar
>; Varun Sethi ; Vabhav Sharma
>
>Subject: Re: [PATCH edk2-platforms 34/39] Silicon/NXP: Implement
>EFI_CPU_IO2_PROTOCOL
>
>On 16 February 2018 at 09:50, Meenakshi
>wrote:
>> From: Vabhav
>>
>> NXP SOC has mutiple PCIe RCs,Adding respective implementation of
>> EFI_CPU_IO2_PROTOCOL to provide Memory Space Read/Write functions used
>> by generic Host Bridge Driver including correct value for the
>> translation offset during MMIO accesses
>>
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Vabhav
>> Signed-off-by: Meenakshi Aggarwal
>
>This driver looks completely wrong to me: MMIO access is memory mapped, and
>given that you don't implement PCI to CPU translation of MMIO accesses, the
>memory read and write functions should not perform any translation at all, and
>just relay the accesses. On the other hand, the I/O accessors are not
>implemented at all, and these are the ones that require translation, given
>that the
>I/O port addresses in the CPU space need translation to MMIO addressess.
On NXP SoC, Mapping between CPU view and PCIe view is not 1:1 and require CPU
view translation for MMIO regions access, Accordingly translation is added
during memory read/write services.
Bus driver relays the address range where PCIe device Bar region is split from,
Translation is required for relaying it to correct PCIe controller cpu view
address.
>
>Also, you don't seem to be using the PcdPciExp?BaseAddr PCDs anywhere, so you
>can drop them from the .dsc
No, It's used for checking the access to MMIO32 region and CPU view base
address varies between different NXP SoCs
>
>> ---
>> Silicon/NXP/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.c | 529
>++
>> Silicon/NXP/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.inf | 48 ++
>> 2 files changed, 577 insertions(+)
>> create mode 100644 Silicon/NXP/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.c
>> create mode 100644 Silicon/NXP/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.inf
>>
>> diff --git a/Silicon/NXP/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.c
>> b/Silicon/NXP/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.c
>> new file mode 100644
>> index 000..b5fb72c
>> --- /dev/null
>> +++ b/Silicon/NXP/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.c
>> @@ -0,0 +1,529 @@
>> +/** @file
>> + Produces the CPU I/O 2 Protocol.
>> +
>> + Copyright (c) 2009 - 2012, Intel Corporation. All rights
>> + reserved. Copyright (c) 2016, Linaro Ltd. All rights
>> + reserved. Copyright 2018 NXP
>> +
>> + This program and the accompanying materials are licensed and made
>> + available under the terms and conditions of the BSD License which
>> + accompanies this distribution. The full text of the license may be
>> + found at
>> +
>> + https://emea01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fop
>> + ensource.org%2Flicenses%2Fbsd-license.php&data=02%7C01%7Cvabhav.shar
>> +
>ma%40nxp.com%7C4507c0726b244ad6476d08d5a69a64ee%7C686ea1d3bc2b4c
>6fa9
>> +
>2cd99c5c301635%7C0%7C0%7C636598104414046440&sdata=IFSU0%2FeTdWrw
>gg0f
>> + 0Lq2qSVGgogG68tYZevrRmC%2BkV8%3D&reserved=0
>> +
>> + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS"
>> + BASIS, WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER
>EXPRESS OR IMPLIED.
>> +
>> +**/
>> +
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +
>> +#define MAX_IO_PORT_ADDRESS PCI_SEG2_PORTIO_MAX
>> +
>> +//
>> +// Handle for the CPU I/O 2 Protocol
>> +//
>> +STATIC EFI_HANDLE mHandle;
>> +
>> +//
>> +// Lookup table for increment values based on transfer widths //
>> +STATIC CONST UINT8 mInStride[] = {
>> + 1, // EfiCpuIoWidthUint8
>> + 2, // EfiCpuIoWidthUint16
>> + 4, // EfiCpuIoWidthUint32
>> + 8, // EfiCpuIoWidthUint64
>> + 0, // EfiCpuIoWidthFifoUint8
>> + 0, // EfiCpuIoWidthFifoUint16
>> + 0, // EfiCpuIoWidthFifoUint32
>> + 0, // EfiCpuIoWidthFifoUint64
>> + 1, // EfiCpuIoWidthFillUint8
>> + 2, // EfiCpuIoWidthFillUint16
>> + 4, // EfiCpuIoWidthFillUint32
>> + 8 // EfiCpuIoWidthFillUint64
>> +};
>> +
>> +//
>> +// Lookup table for increment values based on transfer widths //
>> +STATIC CONST UINT8 mOutStride[] = {
>> + 1, // EfiCpuIoWidthUint8
>> + 2, // EfiCpuIoWidthUint16
>> + 4, // EfiCpuIoWidthUint32
>> + 8, // EfiCpuIoWidthUint64
>> + 1, // EfiCpuIoWidthFifoUint8
>> + 2, // EfiCpuIoWidthFifoUint16
>> + 4, // EfiCpuIoWidthFifoUint32
>> + 8, // EfiCpuIoWidthFifoUint64
>> + 0, // EfiCpuIoWidthFillUint8
>> + 0, // EfiCpuIoWidthFillUint16
>> + 0, // EfiCpuIoWidthFillUint32
>> + 0 // EfiCpuIoWidthFillUint64
>> +};
>> +
>> +/**
>> + Check parameters to a CPU I/O 2 Protocol service request.
>> +
>> + The I/O operations are carried out exactly as requested. The caller
>> + is responsible for satisfying any alignment and I/O width
>> +
Re: [edk2] [PATCH edk2-platforms 33/39] Silicon/NXP: Implement PciHostBridgeLib support
>-Original Message-
>From: Ard Biesheuvel [mailto:ard.biesheu...@linaro.org]
>Sent: Friday, April 20, 2018 2:05 PM
>To: Meenakshi Aggarwal
>Cc: Leif Lindholm ; Kinney, Michael D
>; edk2-devel@lists.01.org; Udit Kumar
>; Varun Sethi ; Vabhav Sharma
>
>Subject: Re: [PATCH edk2-platforms 33/39] Silicon/NXP: Implement
>PciHostBridgeLib support
>
>On 16 February 2018 at 09:50, Meenakshi
>wrote:
>> From: Vabhav
>>
>> Implement the library that exposes the PCIe root complexes to the
>> generic PCI host bridge driver,Putting SoC Specific low level init
>> code for the RCs.
>>
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Vabhav
>> Signed-off-by: Meenakshi Aggarwal
>> ---
>> .../Library/PciHostBridgeLib/PciHostBridgeLib.c| 618
>+
>> .../Library/PciHostBridgeLib/PciHostBridgeLib.inf | 50 ++
>> 2 files changed, 668 insertions(+)
>> create mode 100644
>> Silicon/NXP/Library/PciHostBridgeLib/PciHostBridgeLib.c
>> create mode 100644
>> Silicon/NXP/Library/PciHostBridgeLib/PciHostBridgeLib.inf
>>
>> diff --git a/Silicon/NXP/Library/PciHostBridgeLib/PciHostBridgeLib.c
>> b/Silicon/NXP/Library/PciHostBridgeLib/PciHostBridgeLib.c
>> new file mode 100644
>> index 000..e6f9b7c
>> --- /dev/null
>> +++ b/Silicon/NXP/Library/PciHostBridgeLib/PciHostBridgeLib.c
>> @@ -0,0 +1,618 @@
>> +/** @file
>> + PCI Host Bridge Library instance for NXP SoCs
>> +
>> + Copyright 2018 NXP
>> +
>> + This program and the accompanying materials are licensed and made
>> + available under the terms and conditions of the BSD License which
>> + accompanies this distribution. The full text of the license may be
>> + found at
>https://emea01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fopensou
>rce.org%2Flicenses%2Fbsd-
>license.php&data=02%7C01%7Cvabhav.sharma%40nxp.com%7C44d0e1dcd1014
>e3dc13308d5a6999342%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C
>636598100906238234&sdata=sX%2BPAAKHQN41oqF8BnYLdIVKYYLgIMqWBNqPs
>9D3NdE%3D&reserved=0.
>> +
>> + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS"
>> + BASIS, WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER
>EXPRESS OR IMPLIED.
>> +
>> +**/
>> +
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include #include
>> +#include #include #include
>> +
>> +#include
>> +
>> +#pragma pack(1)
>> +typedef struct {
>> + ACPI_HID_DEVICE_PATH AcpiDevicePath;
>> + EFI_DEVICE_PATH_PROTOCOL EndDevicePath; }
>> +EFI_PCI_ROOT_BRIDGE_DEVICE_PATH; #pragma pack ()
>> +
>> +STATIC CONST EFI_PCI_ROOT_BRIDGE_DEVICE_PATH
>> +mEfiPciRootBridgeDevicePath[] = {
>> + {
>> +{
>> + {
>> +ACPI_DEVICE_PATH,
>> +ACPI_DP,
>> +{
>> + (UINT8)(sizeof (ACPI_HID_DEVICE_PATH)),
>> + (UINT8)(sizeof (ACPI_HID_DEVICE_PATH) >> 8)
>> +}
>> + },
>> + EISA_PNP_ID (0x0A08), // PCI Express
>> + PCI_SEG0_NUM
>> +},
>> +
>> +{
>> + END_DEVICE_PATH_TYPE,
>> + END_ENTIRE_DEVICE_PATH_SUBTYPE,
>> + {
>> +END_DEVICE_PATH_LENGTH,
>> +0
>> + }
>> +}
>> + },
>> + {
>> +{
>> + {
>> +ACPI_DEVICE_PATH,
>> +ACPI_DP,
>> +{
>> + (UINT8)(sizeof (ACPI_HID_DEVICE_PATH)),
>> + (UINT8)(sizeof (ACPI_HID_DEVICE_PATH) >> 8)
>> +}
>> + },
>> + EISA_PNP_ID (0x0A08), // PCI Express
>> + PCI_SEG1_NUM
>> +},
>> +
>> +{
>> + END_DEVICE_PATH_TYPE,
>> + END_ENTIRE_DEVICE_PATH_SUBTYPE,
>> + {
>> +END_DEVICE_PATH_LENGTH,
>> +0
>> + }
>> +}
>> + },
>> + {
>> +{
>> + {
>> +ACPI_DEVICE_PATH,
>> +ACPI_DP,
>> +{
>> + (UINT8)(sizeof (ACPI_HID_DEVICE_PATH)),
>> + (UINT8)(sizeof (ACPI_HID_DEVICE_PATH) >> 8)
>> +}
>> + },
>> + EISA_PNP_ID (0x0A08), // PCI Express
>> + PCI_SEG2_NUM
>> +},
>> +
>> +{
>> + END_DEVICE_PATH_TYPE,
>> + END_ENTIRE_DEVICE_PATH_SUBTYPE,
>> + {
>> +END_DEVICE_PATH_LENGTH,
>> +0
>> + }
>> +}
>> + },
>> + {
>> +{
>> + {
>> +ACPI_DEVICE_PATH,
>> +ACPI_DP,
>> +{
>> + (UINT8)(sizeof (ACPI_HID_DEVICE_PATH)),
>> + (UINT8)(sizeof (ACPI_HID_DEVICE_PATH) >> 8)
>> +}
>> + },
>> + EISA_PNP_ID (0x0A08), // PCI Express
>> + PCI_SEG3_NUM
>> +},
>> +
>> +{
>> + END_DEVICE_PATH_TYPE,
>> + END_ENTIRE_DEVICE_PATH_SUBTYPE,
>> + {
>> +END_DEVICE_PATH_LENGTH,
>> +0
>> + }
>> +}
>> + }
>> +};
>> +
>> +STATIC
>> +GLOBAL_REMOVE_IF_UNREFERENCED
>> +CHAR16 *mPciHostBridgeLibAcpiAddressSpaceTypeStr[] = {
>> + L"Mem", L"I/O", L"Bus"
>> +};
>> +
>> +#define PCI_ALLOCATION_ATTRIBUTES
>EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM | \
>> +
>> +EFI_PCI_HOST_BRIDGE_MEM64_DECODE
>> +
>> +#define PCI_SUPPORT_ATTRIBUTES EFI_PCI_ATTRIBUTE_ISA_IO_16 | \
>>
Re: [edk2] [PATCH v2 1/1] OvmfPkg/README: add HTTPS Boot
On 04/24/18 10:35, Gary Lin wrote: > Add the new section for HTTPS Boot. > > Changes in v2: > - Fixed the typos > - Added the command for p11-kit based on Laszlo's suggestion > - Also added the efisiglist command > - Elaborated how to create the customized cipher suite list > - Mentioned the changes in QEMU in the future based on Laszlo's > suggestion > > Cc: Ard Biesheuvel > Cc: Jordan Justen > Cc: Laszlo Ersek > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Gary Lin > --- > OvmfPkg/README | 88 > 1 file changed, 88 insertions(+) Reviewed-by: Laszlo Ersek [ler...@redhat.com: trivial typo fixes; update-crypto-policies URL fix] Such as: > diff --git a/OvmfPkg/README b/OvmfPkg/README > index 60545ebccfad..7415419d2dd7 100644 > --- a/OvmfPkg/README > +++ b/OvmfPkg/README > @@ -287,7 +287,7 @@ and encrypted connection. > >Please note that the certificate has to be in the DER format. > > - You can also append a certificate to the existed list with the following > + You can also append a certificate to the existing list with the following >command: > >efisiglist -i -a -o > @@ -334,13 +334,13 @@ and encrypted connection. > > * In the future (after release 2.12), QEMU should populate both above fw_cfg >files automatically from the local host configuration, and enable the user > - to override either with dedicated options or properties > + to override either with dedicated options or properties. > > (*1) See "31.4.1 Signature Database" in UEFI specification 2.7 errata A. > (*2) p11-kit: https://github.com/p11-glue/p11-kit/ > (*3) efisiglist: > https://github.com/rhboot/pesign/blob/master/src/efisiglist.c > (*4) > https://wiki.mozilla.org/Security/Server_Side_TLS#Cipher_names_correspondence_table > -(*5) update-crypto-policies: https://github.com/nmav/fedora-crypto-policies > +(*5) update-crypto-policies: > https://gitlab.com/redhat-crypto/fedora-crypto-policies > > === OVMF Flash Layout === > Commit d3180516f31b. Thank you! Laszlo ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
Re: [edk2] [PATCH] ArmVirtPkg: use protocol-based DevicePathLib instance for most DXE modules
On 04/24/18 08:16, Ard Biesheuvel wrote: > On 24 April 2018 at 02:50, Laszlo Ersek wrote: >> Port OvmfPkg commit 5c3481b0b611e to ArmVirtPkg. Some explanation should >> be in order (because 5c3481b0b611e doesn't offer any): >> >> - The UefiDevicePathLibDevicePathProtocol instance uses the Device Path >> Utilities Protocol, produced by DevicePathDxe, for formatting and >> parsing the textual device path representation. This allows for a >> lighter weight lib instance that gets linked into several DXE modules. >> In comparison, the more standalone UefiDevicePathLib instance includes >> the formatting and parsing routines in every client module. >> >> - The DXE core needs DevicePathLib before it dispatches DevicePathDxe, so >> it needs to stick with the standalone instance. >> >> - DevicePathDxe itself also needs the standalone instance, for >> implementing the protocol. >> >> - The DXE-phase PCD driver, "MdeModulePkg/Universal/PCD/Dxe/Pcd.inf", >> depends on DevicePathLib via UefiLib and DxeServicesLib at the least; so >> with this update, it inherits a dependency on the protocol. In reverse, >> DevicePathDxe depends on the PCD Protocol, via PcdLib. The cycle is >> broken by using BasePcdLibNull in DevicePathDxe. That restricts it to >> FixedAtBuild, Patch, and FeatureFlag PCDs, but that's fine. >> >> Example space savings (using ArmVirtQemu and the GCC5 toolchain): >> - NOOPT: 187KB in FVMAIN, 12KB in FVMAIN_COMPACT >> - DEBUG: 147KB in FVMAIN, 20KB in FVMAIN_COMPACT >> - RELEASE: 123KB in FVMAIN, 17KB in FVMAIN_COMPACT >> >> Cc: Ard Biesheuvel >> Cc: Julien Grall >> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=940 >> Contributed-under: TianoCore Contribution Agreement 1.1 >> Signed-off-by: Laszlo Ersek > > Reviewed-by: Ard Biesheuvel Thanks, Ard! Julien, can you please fetch the patch: >> Notes: >> Repo: https://github.com/lersek/edk2.git >> Branch: armvirt_devpathlib and regression-test it on Xen? I'd prefer to push the patch with your T-b. Thanks! Laszlo ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
Re: [edk2] [PATCH] Maintainers.txt: add Laszlo Ersek to stewards
Thanks all! Pushed as f8c85cb7ec. On Mon, Apr 23, 2018 at 03:02:30PM -0700, Andrew Fish wrote: > Welcome Indeed. > > Reviewed-by: Andrew J. Fish > > Thanks, > > Andrew Fish > > > On Apr 14, 2018, at 10:26 AM, Kinney, Michael D > > wrote: > > > > Welcome Laszlo! > > > > Reviewed-by: Michael D Kinney > > > > Mike > > > >> -Original Message- > >> From: Leif Lindholm [mailto:leif.lindh...@linaro.org] > >> Sent: Friday, April 13, 2018 12:26 PM > >> To: edk2-devel@lists.01.org > >> Cc: Andrew Fish ; Laszlo Ersek > >> ; Kinney, Michael D > >> > >> Subject: [PATCH] Maintainers.txt: add Laszlo Ersek to > >> stewards > >> > >> Cc: Andrew Fish > >> Cc: Laszlo Ersek > >> Cc: Michael D Kinney > >> Contributed-under: TianoCore Contribution Agreement 1.1 > >> Signed-off-by: Leif Lindholm > >> --- > >> Maintainers.txt | 1 + > >> 1 file changed, 1 insertion(+) > >> > >> diff --git a/Maintainers.txt b/Maintainers.txt > >> index 256133810f..7295cd6b83 100644 > >> --- a/Maintainers.txt > >> +++ b/Maintainers.txt > >> @@ -41,6 +41,7 @@ T: svn (read-only, deprecated) - > >> https://svn.code.sf.net/p/edk2/code/trunk/edk2 > >> Tianocore Stewards > >> -- > >> M: Andrew Fish > >> +M: Laszlo Ersek > >> M: Leif Lindholm > >> M: Michael D Kinney > >> > >> -- > >> 2.11.0 > > > > ___ > > edk2-devel mailing list > > edk2-devel@lists.01.org > > https://lists.01.org/mailman/listinfo/edk2-devel > ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
[edk2] [PATCH v2 1/1] OvmfPkg/README: add HTTPS Boot
Add the new section for HTTPS Boot.
Changes in v2:
- Fixed the typos
- Added the command for p11-kit based on Laszlo's suggestion
- Also added the efisiglist command
- Elaborated how to create the customized cipher suite list
- Mentioned the changes in QEMU in the future based on Laszlo's
suggestion
Cc: Ard Biesheuvel
Cc: Jordan Justen
Cc: Laszlo Ersek
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Gary Lin
---
OvmfPkg/README | 88
1 file changed, 88 insertions(+)
diff --git a/OvmfPkg/README b/OvmfPkg/README
index 00fb71848200..60545ebccfad 100644
--- a/OvmfPkg/README
+++ b/OvmfPkg/README
@@ -254,6 +254,94 @@ longer.)
VirtioNetDxe |x
Intel BootUtil (X64) | x
+=== HTTPS Boot ===
+
+HTTPS Boot is an alternative solution to PXE. It replaces the tftp server
+with a HTTPS server so the firmware can download the images through a trusted
+and encrypted connection.
+
+* To enable HTTPS Boot, you have to build OVMF with -D HTTP_BOOT_ENABLE and
+ -D TLS_ENABLE. The former brings in the HTTP stack from NetworkPkg while
+ the latter enables TLS support in both NetworkPkg and CryptoPkg.
+
+* By default, there is no trusted certificate. The user has to import the
+ certificates either manually with "Tls Auth Configuration" utility in the
+ firmware UI or through the fw_cfg entry, etc/edk2/https/cacerts.
+
+ -fw_cfg name=etc/edk2/https/cacerts,file=
+
+ The blob for etc/edk2/https/cacerts has to be in the format of Signature
+ Database(*1). You can use p11-kit(*2) or efisiglit(*3) to create the
+ certificate list.
+
+ If you want to create the certificate list based on the CA certificates
+ in your local host, p11-kit will be a good choice. Here is the command to
+ create the list:
+
+ p11-kit extract --format=edk2-cacerts --filter=ca-anchors \
+--overwrite --purpose=server-auth
+
+ If you only want to import one certificate, efisiglist is the tool for you:
+
+ efisiglist -a -o
+
+ Please note that the certificate has to be in the DER format.
+
+ You can also append a certificate to the existed list with the following
+ command:
+
+ efisiglist -i -a -o
+
+ NOTE: You may need the patch to make efisiglist generate the correct header.
+ (https://github.com/rhboot/pesign/pull/40)
+
+* Besides the trusted certificates, it's also possible to configure the trusted
+ cipher suites for HTTPS through another fw_cfg entry: etc/edk2/https/ciphers.
+
+ -fw_cfg name=etc/edk2/https/ciphers,file=
+
+ OVMF expects a binary UINT16 array which comprises the cipher suites HEX
+ IDs(*4). If the cipher suite list is given, OVMF will choose the cipher
+ suite from the intersection of the given list and the built-in cipher
+ suites. Otherwise, OVMF just chooses whatever proper cipher suites from the
+ built-in ones.
+
+ While the tool(*5) to create the cipher suite array is still under
+ development, the array can be generated with the following script:
+
+ export LC_ALL=C
+ openssl ciphers -V \
+ | sed -r -n \
+ -e 's/^ *0x([0-9A-F]{2}),0x([0-9A-F]{2}) - .*$/x\1 x\2/p' \
+ | xargs -r -- printf -- '%b' > ciphers.bin
+
+ This script creates ciphers.bin that contains all the cipher suite IDs
+ supported by openssl according to the local host configuration.
+
+ You may want to enable only a limited set of cipher suites. Then, you
+ should check the validity of your list first:
+
+ openssl ciphers -V
+
+ If all the cipher suites in your list map to the proper HEX IDs, go ahead
+ to modify the script and execute it:
+
+ export LC_ALL=C
+ openssl ciphers -V \
+ | sed -r -n \
+ -e 's/^ *0x([0-9A-F]{2}),0x([0-9A-F]{2}) - .*$/x\1 x\2/p' \
+ | xargs -r -- printf -- '%b' > ciphers.bin
+
+* In the future (after release 2.12), QEMU should populate both above fw_cfg
+ files automatically from the local host configuration, and enable the user
+ to override either with dedicated options or properties
+
+(*1) See "31.4.1 Signature Database" in UEFI specification 2.7 errata A.
+(*2) p11-kit: https://github.com/p11-glue/p11-kit/
+(*3) efisiglist: https://github.com/rhboot/pesign/blob/master/src/efisiglist.c
+(*4)
https://wiki.mozilla.org/Security/Server_Side_TLS#Cipher_names_correspondence_table
+(*5) update-crypto-policies: https://github.com/nmav/fedora-crypto-policies
+
=== OVMF Flash Layout ===
Like all current IA32/X64 system designs, OVMF's firmware device (rom/flash)
--
2.16.3
___
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edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel
Re: [edk2] [PATCH v1 16/27] BaseTools: Replace EDK Component strings with predefined constant
Hi Jaben,
For build.py (-Y option) and BuildReport.py, use EDK_COMPONENT_TYPE_LIBRARY to
replace "LIBRARY" may be confusion. One is component type, another is report
type though they use same keyword.
If we really want to do this replacement, how about use another constant name ?
besides, whether we need cover the other report type, not only the "LIBRARY" ?
Best Regards,
Zhu Yonghong
-Original Message-
From: Carsey, Jaben
Sent: Friday, April 20, 2018 11:52 PM
To: edk2-devel@lists.01.org
Cc: Gao, Liming ; Zhu, Yonghong
Subject: [PATCH v1 16/27] BaseTools: Replace EDK Component strings with
predefined constant
EDK_COMPONENT_TYPE_LIBRARY was 'LIBRARY'
EDK_COMPONENT_TYPE_SECURITY_CORE was 'SECURITY_CORE'
EDK_COMPONENT_TYPE_COMBINED_PEIM_DRIVER was 'COMBINED_PEIM_DRIVER'
EDK_COMPONENT_TYPE_PIC_PEIM was 'PIC_PEIM'
EDK_COMPONENT_TYPE_RELOCATABLE_PEIM was 'RELOCATABLE_PEIM'
EDK_COMPONENT_TYPE_BS_DRIVER was 'BS_DRIVER'
EDK_COMPONENT_TYPE_RT_DRIVER was 'RT_DRIVER'
EDK_COMPONENT_TYPE_SAL_RT_DRIVER was 'SAL_RT_DRIVER'
EDK_COMPONENT_TYPE_APPLICATION was 'APPLICATION'
Cc: Liming Gao
Cc: Yonghong Zhu
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jaben Carsey
---
BaseTools/Source/Python/Common/DataType.py| 28 ++--
BaseTools/Source/Python/GenFds/FdfParser.py | 6 ++---
BaseTools/Source/Python/GenFds/Ffs.py | 2 +-
BaseTools/Source/Python/Workspace/InfBuildData.py | 2 +-
BaseTools/Source/Python/build/BuildReport.py | 6 ++---
BaseTools/Source/Python/build/build.py| 8 +++---
6 files changed, 26 insertions(+), 26 deletions(-)
diff --git a/BaseTools/Source/Python/Common/DataType.py
b/BaseTools/Source/Python/Common/DataType.py
index ab9acb417331..74ed711abc52 100644
--- a/BaseTools/Source/Python/Common/DataType.py
+++ b/BaseTools/Source/Python/Common/DataType.py
@@ -80,7 +80,7 @@ SUP_MODULE_LIST_STRING = TAB_VALUE_SPLIT.join(SUP_MODULE_LIST)
SUP_MODULE_SET_PEI = {SUP_MODULE_PEIM, SUP_MODULE_PEI_CORE}
EDK_COMPONENT_TYPE_LIBRARY = 'LIBRARY'
-EDK_COMPONENT_TYPE_SECUARITY_CORE = 'SECUARITY_CORE'
+EDK_COMPONENT_TYPE_SECURITY_CORE = 'SECURITY_CORE'
EDK_COMPONENT_TYPE_PEI_CORE = SUP_MODULE_PEI_CORE
EDK_COMPONENT_TYPE_COMBINED_PEIM_DRIVER = 'COMBINED_PEIM_DRIVER'
EDK_COMPONENT_TYPE_PIC_PEIM = 'PIC_PEIM'
@@ -93,18 +93,18 @@ EDK_NAME = 'EDK'
EDKII_NAME = 'EDKII'
COMPONENT_TO_MODULE_MAP_DICT = {
-"LIBRARY" : SUP_MODULE_BASE,
-"SECURITY_CORE" : SUP_MODULE_SEC,
-SUP_MODULE_PEI_CORE : SUP_MODULE_PEI_CORE,
-"COMBINED_PEIM_DRIVER" : SUP_MODULE_PEIM,
-"PIC_PEIM" : SUP_MODULE_PEIM,
-"RELOCATABLE_PEIM" : SUP_MODULE_PEIM,
-"PE32_PEIM" : SUP_MODULE_PEIM,
-"BS_DRIVER" : SUP_MODULE_DXE_DRIVER,
-"RT_DRIVER" : SUP_MODULE_DXE_RUNTIME_DRIVER,
-"SAL_RT_DRIVER" : SUP_MODULE_DXE_SAL_DRIVER,
-"APPLICATION" : SUP_MODULE_UEFI_APPLICATION,
-"LOGO" : SUP_MODULE_BASE,
+EDK_COMPONENT_TYPE_LIBRARY : SUP_MODULE_BASE,
+EDK_COMPONENT_TYPE_SECURITY_CORE : SUP_MODULE_SEC,
+EDK_COMPONENT_TYPE_PEI_CORE : SUP_MODULE_PEI_CORE,
+EDK_COMPONENT_TYPE_COMBINED_PEIM_DRIVER : SUP_MODULE_PEIM,
+EDK_COMPONENT_TYPE_PIC_PEIM : SUP_MODULE_PEIM,
+EDK_COMPONENT_TYPE_RELOCATABLE_PEIM : SUP_MODULE_PEIM,
+"PE32_PEIM" : SUP_MODULE_PEIM,
+EDK_COMPONENT_TYPE_BS_DRIVER : SUP_MODULE_DXE_DRIVER,
+EDK_COMPONENT_TYPE_RT_DRIVER : SUP_MODULE_DXE_RUNTIME_DRIVER,
+EDK_COMPONENT_TYPE_SAL_RT_DRIVER : SUP_MODULE_DXE_SAL_DRIVER,
+EDK_COMPONENT_TYPE_APPLICATION : SUP_MODULE_UEFI_APPLICATION,
+"LOGO" : SUP_MODULE_BASE,
}
BINARY_FILE_TYPE_FW = 'FW'
@@ -125,7 +125,7 @@ BINARY_FILE_TYPE_UI = 'UI'
BINARY_FILE_TYPE_BIN = 'BIN'
BINARY_FILE_TYPE_FV = 'FV'
-PLATFORM_COMPONENT_TYPE_LIBRARY = 'LIBRARY'
+PLATFORM_COMPONENT_TYPE_LIBRARY = EDK_COMPONENT_TYPE_LIBRARY
PLATFORM_COMPONENT_TYPE_LIBRARY_CLASS = 'LIBRARY_CLASS'
PLATFORM_COMPONENT_TYPE_MODULE = 'MODULE'
diff --git a/BaseTools/Source/Python/GenFds/FdfParser.py
b/BaseTools/Source/Python/GenFds/FdfParser.py
index 4ec114a81883..e117a3717d42 100644
--- a/BaseTools/Source/Python/GenFds/FdfParser.py
+++ b/BaseTools/Source/Python/GenFds/FdfParser.py
@@ -3637,8 +3637,8 @@ class FdfParser:
SUP_MODULE_DXE_DRIVER, SUP_MODULE_DXE_SAL_DRIVER,
\
SUP_MODULE_DXE_SMM_DRIVER,
SUP_MODULE_DXE_RUNTIME_DRIVER, \
SUP_MODULE_UEFI_DRIVER,
SUP_MODULE_UEFI_APPLICATION, SUP_MODULE_USER_DEFINED, "DEFAULT",
SUP_MODULE_BASE, \
- "SECURITY_CORE", "COMBINED_PEIM_DRIVER",
"PIC_PEIM", "RELOCATABLE_PEIM", \
-
Re: [edk2] [PATCH v1 19/27] BaseTools: Replace Binary File type strings with predefined constant
Hi Jaben, 1. use the BINARY_FILE_TYPE_FV to replace 'FV' in the file path may be strange. How about we still keep to use 'FV' ? 2. how about we create another constant name for 'GUID' ? I think some place's replacement is a little odd, eg: Value.startswith(BINARY_FILE_TYPE_GUID). Do you have any suggestions on the naming conventions ? Best Regards, Zhu Yonghong -Original Message- From: Carsey, Jaben Sent: Friday, April 20, 2018 11:52 PM To: edk2-devel@lists.01.org Cc: Gao, Liming ; Zhu, Yonghong Subject: [PATCH v1 19/27] BaseTools: Replace Binary File type strings with predefined constant BINARY_FILE_TYPE_FW was 'FW' BINARY_FILE_TYPE_GUID was 'GUID' BINARY_FILE_TYPE_PREEFORM was 'PREEFORM' BINARY_FILE_TYPE_UEFI_APP was 'UEFI_APP' BINARY_FILE_TYPE_UNI_UI was 'UNI_UI' BINARY_FILE_TYPE_UNI_VER was 'UNI_VER' BINARY_FILE_TYPE_LIB was 'LIB' BINARY_FILE_TYPE_PE32 was 'PE32' BINARY_FILE_TYPE_PIC was 'PIC' BINARY_FILE_TYPE_PEI_DEPEX was 'PEI_DEPEX' BINARY_FILE_TYPE_DXE_DEPEX was 'DXE_DEPEX' BINARY_FILE_TYPE_SMM_DEPEX was 'SMM_DEPEX' BINARY_FILE_TYPE_TE was 'TE' BINARY_FILE_TYPE_VER was 'VER' BINARY_FILE_TYPE_UI was 'UI' BINARY_FILE_TYPE_BIN was 'BIN' BINARY_FILE_TYPE_FV was 'FV' Cc: Liming Gao Cc: Yonghong Zhu Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jaben Carsey --- BaseTools/Source/Python/AutoGen/AutoGen.py | 12 +-- BaseTools/Source/Python/AutoGen/GenC.py| 8 +- BaseTools/Source/Python/AutoGen/GenPcdDb.py| 4 +- BaseTools/Source/Python/Common/Expression.py | 2 +- BaseTools/Source/Python/Common/Misc.py | 4 +- BaseTools/Source/Python/GenFds/DataSection.py | 6 +- BaseTools/Source/Python/GenFds/DepexSection.py | 6 +- BaseTools/Source/Python/GenFds/EfiSection.py | 10 +-- BaseTools/Source/Python/GenFds/Fd.py | 3 +- BaseTools/Source/Python/GenFds/FdfParser.py| 92 ++-- BaseTools/Source/Python/GenFds/Ffs.py | 14 +-- BaseTools/Source/Python/GenFds/FfsInfStatement.py | 22 ++--- BaseTools/Source/Python/GenFds/Fv.py | 4 +- BaseTools/Source/Python/GenFds/GenFds.py | 10 +-- BaseTools/Source/Python/GenFds/GenFdsGlobalVariable.py | 4 +- BaseTools/Source/Python/GenFds/OptRomInfStatement.py | 2 +- BaseTools/Source/Python/GenFds/Region.py | 5 +- BaseTools/Source/Python/GenFds/Section.py | 46 +- BaseTools/Source/Python/GenFds/UiSection.py| 2 +- BaseTools/Source/Python/Trim/Trim.py | 2 +- BaseTools/Source/Python/Workspace/DscBuildData.py | 2 +- BaseTools/Source/Python/Workspace/InfBuildData.py | 2 +- BaseTools/Source/Python/build/BuildReport.py | 12 +-- 23 files changed, 138 insertions(+), 136 deletions(-) diff --git a/BaseTools/Source/Python/AutoGen/AutoGen.py b/BaseTools/Source/Python/AutoGen/AutoGen.py index 9b2164ed8216..534fbe79fad9 100644 --- a/BaseTools/Source/Python/AutoGen/AutoGen.py +++ b/BaseTools/Source/Python/AutoGen/AutoGen.py @@ -923,7 +923,7 @@ class WorkspaceAutoGen(AutoGen): ## Return the directory to store FV files def _GetFvDir(self): if self._FvDir is None: -self._FvDir = path.join(self.BuildDir, 'FV') +self._FvDir = path.join(self.BuildDir, BINARY_FILE_TYPE_FV) return self._FvDir ## Return the directory to store all intermediate and final files built @@ -1326,7 +1326,7 @@ class PlatformAutoGen(AutoGen): def UpdateNVStoreMaxSize(self,OrgVpdFile): if self.VariableInfo: -VpdMapFilePath = os.path.join(self.BuildDir, "FV", "%s.map" % self.Platform.VpdToolGuid) +VpdMapFilePath = os.path.join(self.BuildDir, BINARY_FILE_TYPE_FV, "%s.map" % self.Platform.VpdToolGuid) PcdNvStoreDfBuffer = [item for item in self._DynamicPcdList if item.TokenCName == "PcdNvStoreDefaultValueBuffer" and item.TokenSpaceGuidCName == "gEfiMdeModulePkgTokenSpaceGuid"] if PcdNvStoreDfBuffer: @@ -1719,7 +1719,7 @@ class PlatformAutoGen(AutoGen): # Process VPD map file generated by third party BPDG tool if NeedProcessVpdMapFile: -VpdMapFilePath = os.path.join(self.BuildDir, "FV", "%s.map" % self.Platform.VpdToolGuid) +VpdMapFilePath = os.path.join(self.BuildDir, BINARY_FILE_TYPE_FV, "%s.map" % self.Platform.VpdToolGuid) if os.path.exists(VpdMapFilePath): VpdFile.Read(VpdMapFilePath) @@ -1770,7 +1770,7 @@ class PlatformAutoGen(AutoGen): self.AllPcdList = self._NonDynamicPcdList + self._DynamicPcdList def FixVpdOffset(self,VpdFile ): -FvPath = os.path.join(self.BuildDir, "FV") +FvPath = os.path.join(self.BuildDir, BINARY_FILE_TYPE_FV) if not os.path.exists(FvPath): try:
