from:"nkvangup"

[edk2] [PATCH] UefiCpuPkg\PiSmmCpuDxeSmm: Save and restore CR2 only on-demand paging in SMM BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1593 For every SMI occurrence, save and restore CR2 regis

2019-03-05 Thread nkvangup

---
 UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c | 20 
 1 file changed, 12 insertions(+), 8 deletions(-)

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c 
b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
index 3b0b3b52ac..5be4a2b020 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
@@ -,10 +,12 @@ SmiRendezvous (
 
   ASSERT(CpuIndex < mMaxNumberOfCpus);
 
-  //
-  // Save Cr2 because Page Fault exception in SMM may override its value
-  //
-  Cr2 = AsmReadCr2 ();
+  if ((sizeof (UINTN) == sizeof (UINT64)) && (!PcdGetBool 
(PcdCpuSmmStaticPageTable))) {
+//
+// Save Cr2 because Page Fault exception in SMM may override its value
+//
+Cr2 = AsmReadCr2 ();
+  }
 
   //
   // Perform CPU specific entry hooks
@@ -1253,10 +1255,12 @@ SmiRendezvous (
 
 Exit:
   SmmCpuFeaturesRendezvousExit (CpuIndex);
-  //
-  // Restore Cr2
-  //
-  AsmWriteCr2 (Cr2);
+  if ((sizeof (UINTN) == sizeof (UINT64)) && (!PcdGetBool 
(PcdCpuSmmStaticPageTable))) {
+//
+// Restore Cr2
+//
+AsmWriteCr2 (Cr2);
+  }
 }
 
 /**
-- 
2.16.2.windows.1

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[edk2] [PATCH v2] UefiCpuPkg\CpuSmm: Save & restore CR2 on-demand paging in SMM

2019-03-07 Thread nkvangup

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1593

For every SMI occurrence, save and restore CR2 register only when SMM
on-demand paging support is enabled in 64 bit operation mode.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Vanguput Narendra K 
Cc: Eric Dong 
Cc: Ray Ni 
Cc: Laszlo Ersek 
Cc: Yao Jiewen 
---
 UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c | 20 
 1 file changed, 12 insertions(+), 8 deletions(-)

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c 
b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
index 3b0b3b52ac..5be4a2b020 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
@@ -,10 +,12 @@ SmiRendezvous (
 
   ASSERT(CpuIndex < mMaxNumberOfCpus);
 
-  //
-  // Save Cr2 because Page Fault exception in SMM may override its value
-  //
-  Cr2 = AsmReadCr2 ();
+  if ((sizeof (UINTN) == sizeof (UINT64)) && (!PcdGetBool 
(PcdCpuSmmStaticPageTable))) {
+//
+// Save Cr2 because Page Fault exception in SMM may override its value
+//
+Cr2 = AsmReadCr2 ();
+  }
 
   //
   // Perform CPU specific entry hooks
@@ -1253,10 +1255,12 @@ SmiRendezvous (
 
 Exit:
   SmmCpuFeaturesRendezvousExit (CpuIndex);
-  //
-  // Restore Cr2
-  //
-  AsmWriteCr2 (Cr2);
+  if ((sizeof (UINTN) == sizeof (UINT64)) && (!PcdGetBool 
(PcdCpuSmmStaticPageTable))) {
+//
+// Restore Cr2
+//
+AsmWriteCr2 (Cr2);
+  }
 }
 
 /**
-- 
2.16.2.windows.1

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[edk2] [PATCH v3] UefiCpuPkg\CpuSmm: Save & restore CR2 on-demand paging in SMM

2019-03-18 Thread nkvangup

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1593

For every SMI occurrence, save and restore CR2 register only when SMM
on-demand paging support is enabled in 64 bit operation mode.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Vanguput Narendra K 
Cc: Eric Dong 
Cc: Ray Ni 
Cc: Laszlo Ersek 
Cc: Yao Jiewen 
---
 ...CpuSmm-Save-restore-CR2-on-demand-paging-.patch | 62 ++
 UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c  | 22 +---
 UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c|  2 +-
 3 files changed, 77 insertions(+), 9 deletions(-)
 create mode 100644 
0001-UefiCpuPkg-CpuSmm-Save-restore-CR2-on-demand-paging-.patch

diff --git a/0001-UefiCpuPkg-CpuSmm-Save-restore-CR2-on-demand-paging-.patch 
b/0001-UefiCpuPkg-CpuSmm-Save-restore-CR2-on-demand-paging-.patch
new file mode 100644
index 00..92f5ea0f4f
--- /dev/null
+++ b/0001-UefiCpuPkg-CpuSmm-Save-restore-CR2-on-demand-paging-.patch
@@ -0,0 +1,62 @@
+From 793ab6bf9facbdcd34f4a1e8ccdfdbd1657f594e Mon Sep 17 00:00:00 2001
+From: nkvangup 
+Date: Tue, 5 Mar 2019 22:43:42 +0530
+Subject: [PATCH v2] UefiCpuPkg\CpuSmm: Save & restore CR2 on-demand paging in
+ SMM
+
+BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1593
+
+For every SMI occurrence, save and restore CR2 register only when SMM
+on-demand paging support is enabled in 64 bit operation mode.
+
+Contributed-under: TianoCore Contribution Agreement 1.1
+Signed-off-by: Vanguput Narendra K 
+Cc: Eric Dong 
+Cc: Ray Ni 
+Cc: Laszlo Ersek 
+Cc: Yao Jiewen 
+---
+ UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c | 20 
+ 1 file changed, 12 insertions(+), 8 deletions(-)
+
+diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c 
b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
+index 3b0b3b52ac..5be4a2b020 100644
+--- a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
 b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
+@@ -,10 +,12 @@ SmiRendezvous (
+ 
+   ASSERT(CpuIndex < mMaxNumberOfCpus);
+ 
+-  //
+-  // Save Cr2 because Page Fault exception in SMM may override its value
+-  //
+-  Cr2 = AsmReadCr2 ();
++  if ((sizeof (UINTN) == sizeof (UINT64)) && (!PcdGetBool 
(PcdCpuSmmStaticPageTable))) {
++//
++// Save Cr2 because Page Fault exception in SMM may override its value
++//
++Cr2 = AsmReadCr2 ();
++  }
+ 
+   //
+   // Perform CPU specific entry hooks
+@@ -1253,10 +1255,12 @@ SmiRendezvous (
+ 
+ Exit:
+   SmmCpuFeaturesRendezvousExit (CpuIndex);
+-  //
+-  // Restore Cr2
+-  //
+-  AsmWriteCr2 (Cr2);
++  if ((sizeof (UINTN) == sizeof (UINT64)) && (!PcdGetBool 
(PcdCpuSmmStaticPageTable))) {
++//
++// Restore Cr2
++//
++AsmWriteCr2 (Cr2);
++  }
+ }
+ 
+ /**
+-- 
+2.16.2.windows.1
+
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c 
b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
index 3b0b3b52ac..5e3a39a234 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
@@ -28,6 +28,7 @@ UINTN   mSemaphoreSize;
 SPIN_LOCK   *mPFLock = NULL;
 SMM_CPU_SYNC_MODE   mCpuSmmSyncMode;
 BOOLEAN mMachineCheckSupported = FALSE;
+BOOLEAN mCpuSmmStaticPageTable = TRUE;
 
 /**
   Performs an atomic compare exchange operation to get semaphore.
@@ -,10 +1112,13 @@ SmiRendezvous (
 
   ASSERT(CpuIndex < mMaxNumberOfCpus);
 
-  //
-  // Save Cr2 because Page Fault exception in SMM may override its value
-  //
-  Cr2 = AsmReadCr2 ();
+if (!mCpuSmmStaticPageTable) {
+//
+// Save and restore Cr2 when using on-demand paging for above 4G memory 
because Page Fault
+   // exception in SMM may override its value
+//
+Cr2 = AsmReadCr2 ();
+  }
 
   //
   // Perform CPU specific entry hooks
@@ -1253,10 +1257,12 @@ SmiRendezvous (
 
 Exit:
   SmmCpuFeaturesRendezvousExit (CpuIndex);
-  //
-  // Restore Cr2
-  //
-  AsmWriteCr2 (Cr2);
+if (!mCpuSmmStaticPageTable) {
+//
+// Restore Cr2
+//
+AsmWriteCr2 (Cr2);
+  }
 }
 
 /**
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c 
b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
index 2c77cb47a4..e444b8a031 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
@@ -21,7 +21,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER 
EXPRESS OR IMPLIED.
 
 LIST_ENTRY  mPagePool = INITIALIZE_LIST_HEAD_VARIABLE 
(mPagePool);
 BOOLEAN m1GPageTableSupport = FALSE;
-BOOLEAN mCpuSmmStaticPageTable;
+extern BOOLEAN  mCpuSmmStaticPageTable;
 
 /**
   Disable CET.
-- 
2.16.2.windows.1

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[edk2] [PATCH v4] UefiCpuPkg\CpuSmm: Save & restore CR2 on-demand paging in SMM

2019-03-18 Thread nkvangup

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1593

For every SMI occurrence, save and restore CR2 register only when SMM
on-demand paging support is enabled in 64 bit operation mode.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Vanguput Narendra K 
Cc: Eric Dong 
Cc: Ray Ni 
Cc: Laszlo Ersek 
Cc: Yao Jiewen 
---
 UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c   | 22 ++
 UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c |  2 +-
 2 files changed, 15 insertions(+), 9 deletions(-)

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c 
b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
index 3b0b3b52ac..0c07b31c4f 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
@@ -28,6 +28,7 @@ UINTN   mSemaphoreSize;
 SPIN_LOCK   *mPFLock = NULL;
 SMM_CPU_SYNC_MODE   mCpuSmmSyncMode;
 BOOLEAN mMachineCheckSupported = FALSE;
+BOOLEAN mCpuSmmStaticPageTable = TRUE;
 
 /**
   Performs an atomic compare exchange operation to get semaphore.
@@ -,10 +1112,13 @@ SmiRendezvous (
 
   ASSERT(CpuIndex < mMaxNumberOfCpus);
 
-  //
-  // Save Cr2 because Page Fault exception in SMM may override its value
-  //
-  Cr2 = AsmReadCr2 ();
+if (!mCpuSmmStaticPageTable) {
+//
+// Save and restore Cr2 when using on-demand paging for above 4G memory 
because Page Fault
+// exception in SMM may override its value
+//
+Cr2 = AsmReadCr2 ();
+  }
 
   //
   // Perform CPU specific entry hooks
@@ -1253,10 +1257,12 @@ SmiRendezvous (
 
 Exit:
   SmmCpuFeaturesRendezvousExit (CpuIndex);
-  //
-  // Restore Cr2
-  //
-  AsmWriteCr2 (Cr2);
+if (!mCpuSmmStaticPageTable) {
+//
+// Restore Cr2
+//
+AsmWriteCr2 (Cr2);
+  }
 }
 
 /**
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c 
b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
index 2c77cb47a4..e444b8a031 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
@@ -21,7 +21,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER 
EXPRESS OR IMPLIED.
 
 LIST_ENTRY  mPagePool = INITIALIZE_LIST_HEAD_VARIABLE 
(mPagePool);
 BOOLEAN m1GPageTableSupport = FALSE;
-BOOLEAN mCpuSmmStaticPageTable;
+extern BOOLEAN  mCpuSmmStaticPageTable;
 
 /**
   Disable CET.
-- 
2.16.2.windows.1

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[edk2] [PATCH v5] UefiCpuPkg\CpuSmm: Save & restore CR2 on-demand paging in SMM

2019-03-22 Thread nkvangup

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1593

For every SMI occurrence, save and restore CR2 register only when SMM
on-demand paging support is enabled in 64 bit operation mode.
This is not a bug but to have better improvement of code.

Patch5 is updated with separate functions for Save and Restore of CR2
based on review feedback.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Vanguput Narendra K 
Cc: Eric Dong 
Cc: Ray Ni 
Cc: Laszlo Ersek 
Cc: Yao Jiewen 
---
 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c   | 22 ++
 UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c  |  9 +
 UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h | 16 
 UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c| 28 
 4 files changed, 71 insertions(+), 4 deletions(-)

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c 
b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c
index b734a1ea8c..3750332ca8 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c
@@ -316,3 +316,25 @@ SetPageTableAttributes (
 
   return ;
 }
+
+/**
+  This function returns with no action for 32 bit.
+**/
+VOID
+SaveCr2 (
+  VOID
+  )
+{
+// Do Nothing
+}
+
+/**
+  This function returns with no action for 32 bit.
+**/
+VOID
+RestoreCr2 (
+  VOID
+  )
+{
+// Do Nothing
+}
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c 
b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
index 3b0b3b52ac..6a5736a3eb 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
@@ -1107,14 +1107,14 @@ SmiRendezvous (
   BOOLEANIsBsp;
   BOOLEANBspInProgress;
   UINTN  Index;
-  UINTN  Cr2;
 
   ASSERT(CpuIndex < mMaxNumberOfCpus);
 
   //
-  // Save Cr2 because Page Fault exception in SMM may override its value
+  // Save Cr2 because Page Fault exception in SMM may override its value,
+  // when using on-demand paging for above 4G memory.
   //
-  Cr2 = AsmReadCr2 ();
+  SaveCr2 ();
 
   //
   // Perform CPU specific entry hooks
@@ -1253,10 +1253,11 @@ SmiRendezvous (
 
 Exit:
   SmmCpuFeaturesRendezvousExit (CpuIndex);
+
   //
   // Restore Cr2
   //
-  AsmWriteCr2 (Cr2);
+  RestoreCr2 ();
 }
 
 /**
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h 
b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
index 84efb22981..71a8c13960 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
@@ -1243,4 +1243,20 @@ EFIAPI
 PiSmmCpuSmiEntryFixupAddress (
  );
 
+/**
+  This function saves CR2 register for 64 bit and no action for 32 bit.
+**/
+VOID
+SaveCr2 (
+  VOID
+  );
+
+/**
+  This function restores CR2 register for 64 bit and no action for 32 bit.
+**/
+VOID
+RestoreCr2 (
+  VOID
+  );
+
 #endif
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c 
b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
index 2c77cb47a4..76a30de171 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
@@ -22,6 +22,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER 
EXPRESS OR IMPLIED.
 LIST_ENTRY  mPagePool = INITIALIZE_LIST_HEAD_VARIABLE 
(mPagePool);
 BOOLEAN m1GPageTableSupport = FALSE;
 BOOLEAN mCpuSmmStaticPageTable;
+UINTN   Cr2 = 0;
 
 /**
   Disable CET.
@@ -1053,3 +1054,30 @@ SetPageTableAttributes (
 
   return ;
 }
+
+/**
+  This function saves CR2 register.
+**/
+VOID
+SaveCr2 (
+  VOID
+  )
+{
+  if (!mCpuSmmStaticPageTable) {
+Cr2 = AsmReadCr2 ();
+  }
+}
+
+/**
+  This function restores CR2 register.
+**/
+VOID
+RestoreCr2 (
+  VOID
+  )
+{
+  if ((!mCpuSmmStaticPageTable) && (Cr2 != 0)) {
+AsmWriteCr2 (Cr2);
+Cr2 = 0;
+  }
+}
-- 
2.16.2.windows.1

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[edk2] [PATCH v6] UefiCpuPkg\CpuSmm: Save & restore CR2 on-demand paging in SMM

2019-03-28 Thread nkvangup

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1593

For every SMI occurrence, save and restore CR2 register only when SMM
on-demand paging support is enabled in 64 bit operation mode.
This is not a bug but to have better improvement of code.

Patch5 is updated with separate functions for Save and Restore of CR2
based on review feedback.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Vanguput Narendra K 
Cc: Eric Dong 
Cc: Ray Ni 
Cc: Laszlo Ersek 
Cc: Yao Jiewen 
---
 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c   | 26 ++
 UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c  |  9 ++---
 UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h | 22 ++
 UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c| 30 ++
 4 files changed, 84 insertions(+), 3 deletions(-)

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c 
b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c
index b734a1ea8c..af96e42982 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c
@@ -316,3 +316,29 @@ SetPageTableAttributes (
 
   return ;
 }
+
+/**
+  This function returns with no action for 32 bit.
+
+  @param[in]  *Cr2  Pointer to variable to hold CR2 register value
+**/
+VOID
+SaveCr2 (
+  UINTN  *Cr2
+  )
+{
+  return ;
+}
+
+/**
+  This function returns with no action for 32 bit.
+
+  @param[in]  Cr2  Value to write into CR2 register
+**/
+VOID
+RestoreCr2 (
+  UINTN  Cr2
+  )
+{
+  return ;
+}
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c 
b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
index 3b0b3b52ac..ce70f77709 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
@@ -1112,9 +1112,11 @@ SmiRendezvous (
   ASSERT(CpuIndex < mMaxNumberOfCpus);
 
   //
-  // Save Cr2 because Page Fault exception in SMM may override its value
+  // Save Cr2 because Page Fault exception in SMM may override its value,
+  // when using on-demand paging for above 4G memory.
   //
-  Cr2 = AsmReadCr2 ();
+  Cr2 = 0;
+  SaveCr2 (&Cr2);
 
   //
   // Perform CPU specific entry hooks
@@ -1253,10 +1255,11 @@ SmiRendezvous (
 
 Exit:
   SmmCpuFeaturesRendezvousExit (CpuIndex);
+
   //
   // Restore Cr2
   //
-  AsmWriteCr2 (Cr2);
+  RestoreCr2 (Cr2);
 }
 
 /**
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h 
b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
index 84efb22981..c9d147c8a1 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
@@ -1243,4 +1243,26 @@ EFIAPI
 PiSmmCpuSmiEntryFixupAddress (
  );
 
+/**
+  This function reads CR2 register when on-demand paging is enabled
+  for 64 bit and no action for 32 bit.
+
+  @param[in]  *Cr2  Pointer to variable to hold CR2 register value
+**/
+VOID
+SaveCr2 (
+  UINTN  *Cr2
+  );
+
+/**
+  This function writes into CR2 register when on-demand paging is enabled
+  for 64 bit and no action for 32 bit.
+
+  @param[in]  Cr2  Value to write into CR2 register
+**/
+VOID
+RestoreCr2 (
+  UINTN  Cr2
+  );
+
 #endif
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c 
b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
index 2c77cb47a4..6cb44fbbe5 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
@@ -1053,3 +1053,33 @@ SetPageTableAttributes (
 
   return ;
 }
+
+/**
+  This function reads CR2 register when on-demand paging is enabled
+
+  @param[in]  *Cr2  Pointer to variable to hold CR2 register value
+**/
+VOID
+SaveCr2 (
+  UINTN  *Cr2
+  )
+{
+  if (!mCpuSmmStaticPageTable) {
+*Cr2 = AsmReadCr2 ();
+  }
+}
+
+/**
+  This function restores CR2 register when on-demand paging is enabled
+
+  @param[in]  Cr2  Value to write into CR2 register
+**/
+VOID
+RestoreCr2 (
+  UINTN  Cr2
+  )
+{
+  if ((!mCpuSmmStaticPageTable) && (Cr2 != 0)) {
+AsmWriteCr2 (Cr2);
+  }
+}
-- 
2.16.2.windows.1

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[edk2] [PATCH v7] UefiCpuPkg\CpuSmm: Save & restore CR2 on-demand paging in SMM

2019-03-29 Thread nkvangup

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1593

For every SMI occurrence, save and restore CR2 register only when SMM
on-demand paging support is enabled in 64 bit operation mode.
This is not a bug but to have better improvement of code.

Patch5 is updated with separate functions for Save and Restore of CR2
based on review feedback.

Patch6 - Removed Global Cr2 instead used function parameter

Patch7 - Removed checking Cr2 with 0 as per feedback

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Vanguput Narendra K 
Cc: Eric Dong 
Cc: Ray Ni 
Cc: Laszlo Ersek 
Cc: Yao Jiewen 
---
 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c   | 26 ++
 UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c  |  9 ++---
 UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h | 22 ++
 UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c| 30 ++
 4 files changed, 84 insertions(+), 3 deletions(-)

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c 
b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c
index b734a1ea8c..af96e42982 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c
@@ -316,3 +316,29 @@ SetPageTableAttributes (
 
   return ;
 }
+
+/**
+  This function returns with no action for 32 bit.
+
+  @param[in]  *Cr2  Pointer to variable to hold CR2 register value
+**/
+VOID
+SaveCr2 (
+  UINTN  *Cr2
+  )
+{
+  return ;
+}
+
+/**
+  This function returns with no action for 32 bit.
+
+  @param[in]  Cr2  Value to write into CR2 register
+**/
+VOID
+RestoreCr2 (
+  UINTN  Cr2
+  )
+{
+  return ;
+}
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c 
b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
index 3b0b3b52ac..ce70f77709 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
@@ -1112,9 +1112,11 @@ SmiRendezvous (
   ASSERT(CpuIndex < mMaxNumberOfCpus);
 
   //
-  // Save Cr2 because Page Fault exception in SMM may override its value
+  // Save Cr2 because Page Fault exception in SMM may override its value,
+  // when using on-demand paging for above 4G memory.
   //
-  Cr2 = AsmReadCr2 ();
+  Cr2 = 0;
+  SaveCr2 (&Cr2);
 
   //
   // Perform CPU specific entry hooks
@@ -1253,10 +1255,11 @@ SmiRendezvous (
 
 Exit:
   SmmCpuFeaturesRendezvousExit (CpuIndex);
+
   //
   // Restore Cr2
   //
-  AsmWriteCr2 (Cr2);
+  RestoreCr2 (Cr2);
 }
 
 /**
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h 
b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
index 84efb22981..c9d147c8a1 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
@@ -1243,4 +1243,26 @@ EFIAPI
 PiSmmCpuSmiEntryFixupAddress (
  );
 
+/**
+  This function reads CR2 register when on-demand paging is enabled
+  for 64 bit and no action for 32 bit.
+
+  @param[in]  *Cr2  Pointer to variable to hold CR2 register value
+**/
+VOID
+SaveCr2 (
+  UINTN  *Cr2
+  );
+
+/**
+  This function writes into CR2 register when on-demand paging is enabled
+  for 64 bit and no action for 32 bit.
+
+  @param[in]  Cr2  Value to write into CR2 register
+**/
+VOID
+RestoreCr2 (
+  UINTN  Cr2
+  );
+
 #endif
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c 
b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
index 2c77cb47a4..b30e8e1f82 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
@@ -1053,3 +1053,33 @@ SetPageTableAttributes (
 
   return ;
 }
+
+/**
+  This function reads CR2 register when on-demand paging is enabled
+
+  @param[in]  *Cr2  Pointer to variable to hold CR2 register value
+**/
+VOID
+SaveCr2 (
+  UINTN  *Cr2
+  )
+{
+  if (!mCpuSmmStaticPageTable) {
+*Cr2 = AsmReadCr2 ();
+  }
+}
+
+/**
+  This function restores CR2 register when on-demand paging is enabled
+
+  @param[in]  Cr2  Value to write into CR2 register
+**/
+VOID
+RestoreCr2 (
+  UINTN  Cr2
+  )
+{
+  if (!mCpuSmmStaticPageTable) {
+AsmWriteCr2 (Cr2);
+  }
+}
-- 
2.16.2.windows.1

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[edk2] [PATCH v8] UefiCpuPkg\CpuSmm: Save & restore CR2 on-demand paging in SMM

2019-03-29 Thread nkvangup

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1593

For every SMI occurrence, save and restore CR2 register only when SMM
on-demand paging support is enabled in 64 bit operation mode.
This is not a bug but to have better improvement of code.

Patch5 is updated with separate functions for Save and Restore of CR2
based on review feedback.

Patch6 - Removed Global Cr2 instead used function parameter

Patch7 - Removed checking Cr2 with 0 as per feedback

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Vanguput Narendra K 
Cc: Eric Dong 
Cc: Ray Ni 
Cc: Laszlo Ersek 
Cc: Yao Jiewen 
---
 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c   | 26 ++
 UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c  |  9 ++---
 UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h | 22 ++
 UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c| 30 ++
 4 files changed, 84 insertions(+), 3 deletions(-)

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c 
b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c
index b734a1ea8c..d3f62ed806 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c
@@ -316,3 +316,29 @@ SetPageTableAttributes (
 
   return ;
 }
+
+/**
+  This function returns with no action for 32 bit.
+
+  @param[out]  *Cr2  Pointer to variable to hold CR2 register value
+**/
+VOID
+SaveCr2 (
+  UINTN  *Cr2
+  )
+{
+  return ;
+}
+
+/**
+  This function returns with no action for 32 bit.
+
+  @param[in]  Cr2  Value to write into CR2 register
+**/
+VOID
+RestoreCr2 (
+  UINTN  Cr2
+  )
+{
+  return ;
+}
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c 
b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
index 3b0b3b52ac..ce70f77709 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
@@ -1112,9 +1112,11 @@ SmiRendezvous (
   ASSERT(CpuIndex < mMaxNumberOfCpus);
 
   //
-  // Save Cr2 because Page Fault exception in SMM may override its value
+  // Save Cr2 because Page Fault exception in SMM may override its value,
+  // when using on-demand paging for above 4G memory.
   //
-  Cr2 = AsmReadCr2 ();
+  Cr2 = 0;
+  SaveCr2 (&Cr2);
 
   //
   // Perform CPU specific entry hooks
@@ -1253,10 +1255,11 @@ SmiRendezvous (
 
 Exit:
   SmmCpuFeaturesRendezvousExit (CpuIndex);
+
   //
   // Restore Cr2
   //
-  AsmWriteCr2 (Cr2);
+  RestoreCr2 (Cr2);
 }
 
 /**
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h 
b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
index 84efb22981..05e1b54ed2 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
@@ -1243,4 +1243,26 @@ EFIAPI
 PiSmmCpuSmiEntryFixupAddress (
  );
 
+/**
+  This function reads CR2 register when on-demand paging is enabled
+  for 64 bit and no action for 32 bit.
+
+  @param[out]  *Cr2  Pointer to variable to hold CR2 register value
+**/
+VOID
+SaveCr2 (
+  UINTN  *Cr2
+  );
+
+/**
+  This function writes into CR2 register when on-demand paging is enabled
+  for 64 bit and no action for 32 bit.
+
+  @param[in]  Cr2  Value to write into CR2 register
+**/
+VOID
+RestoreCr2 (
+  UINTN  Cr2
+  );
+
 #endif
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c 
b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
index 2c77cb47a4..e60628c080 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
@@ -1053,3 +1053,33 @@ SetPageTableAttributes (
 
   return ;
 }
+
+/**
+  This function reads CR2 register when on-demand paging is enabled
+
+  @param[out]  *Cr2  Pointer to variable to hold CR2 register value
+**/
+VOID
+SaveCr2 (
+  UINTN  *Cr2
+  )
+{
+  if (!mCpuSmmStaticPageTable) {
+*Cr2 = AsmReadCr2 ();
+  }
+}
+
+/**
+  This function restores CR2 register when on-demand paging is enabled
+
+  @param[in]  Cr2  Value to write into CR2 register
+**/
+VOID
+RestoreCr2 (
+  UINTN  Cr2
+  )
+{
+  if (!mCpuSmmStaticPageTable) {
+AsmWriteCr2 (Cr2);
+  }
+}
-- 
2.16.2.windows.1

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[edk2] [PATCH v9] UefiCpuPkg\CpuSmm: Save & restore CR2 on-demand paging in SMM

2019-04-01 Thread nkvangup

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1593

For every SMI occurrence, save and restore CR2 register only when SMM
on-demand paging support is enabled in 64 bit operation mode.
This is not a bug but to have better improvement of code.

Patch5 is updated with separate functions for Save and Restore of CR2
based on review feedback.

Patch6 - Removed Global Cr2 instead used function parameter.

Patch7 - Removed checking Cr2 with 0 as per feedback.

Patch8 and 9 - Aligned with EDK2 Coding style.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Vanguput Narendra K 
Cc: Eric Dong 
Cc: Ray Ni 
Cc: Laszlo Ersek 
Cc: Yao Jiewen 
---
 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c   | 26 ++
 UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c  |  9 ++---
 UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h | 22 ++
 UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c| 30 ++
 4 files changed, 84 insertions(+), 3 deletions(-)

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c 
b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c
index b734a1ea8c..d1e146a70c 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c
@@ -316,3 +316,29 @@ SetPageTableAttributes (
 
   return ;
 }
+
+/**
+  This function returns with no action for 32 bit.
+
+  @param[out]  *Cr2  Pointer to variable to hold CR2 register value.
+**/
+VOID
+SaveCr2 (
+  OUT UINTN  *Cr2
+  )
+{
+  return ;
+}
+
+/**
+  This function returns with no action for 32 bit.
+
+  @param[in]  Cr2  Value to write into CR2 register.
+**/
+VOID
+RestoreCr2 (
+  IN UINTN  Cr2
+  )
+{
+  return ;
+}
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c 
b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
index 3b0b3b52ac..ce70f77709 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
@@ -1112,9 +1112,11 @@ SmiRendezvous (
   ASSERT(CpuIndex < mMaxNumberOfCpus);
 
   //
-  // Save Cr2 because Page Fault exception in SMM may override its value
+  // Save Cr2 because Page Fault exception in SMM may override its value,
+  // when using on-demand paging for above 4G memory.
   //
-  Cr2 = AsmReadCr2 ();
+  Cr2 = 0;
+  SaveCr2 (&Cr2);
 
   //
   // Perform CPU specific entry hooks
@@ -1253,10 +1255,11 @@ SmiRendezvous (
 
 Exit:
   SmmCpuFeaturesRendezvousExit (CpuIndex);
+
   //
   // Restore Cr2
   //
-  AsmWriteCr2 (Cr2);
+  RestoreCr2 (Cr2);
 }
 
 /**
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h 
b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
index 84efb22981..38f9104117 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
@@ -1243,4 +1243,26 @@ EFIAPI
 PiSmmCpuSmiEntryFixupAddress (
  );
 
+/**
+  This function reads CR2 register when on-demand paging is enabled
+  for 64 bit and no action for 32 bit.
+
+  @param[out]  *Cr2  Pointer to variable to hold CR2 register value.
+**/
+VOID
+SaveCr2 (
+  OUT UINTN  *Cr2
+  );
+
+/**
+  This function writes into CR2 register when on-demand paging is enabled
+  for 64 bit and no action for 32 bit.
+
+  @param[in]  Cr2  Value to write into CR2 register.
+**/
+VOID
+RestoreCr2 (
+  IN UINTN  Cr2
+  );
+
 #endif
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c 
b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
index 2c77cb47a4..95eaf0b016 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
@@ -1053,3 +1053,33 @@ SetPageTableAttributes (
 
   return ;
 }
+
+/**
+  This function reads CR2 register when on-demand paging is enabled.
+
+  @param[out]  *Cr2  Pointer to variable to hold CR2 register value.
+**/
+VOID
+SaveCr2 (
+  OUT UINTN  *Cr2
+  )
+{
+  if (!mCpuSmmStaticPageTable) {
+*Cr2 = AsmReadCr2 ();
+  }
+}
+
+/**
+  This function restores CR2 register when on-demand paging is enabled.
+
+  @param[in]  Cr2  Value to write into CR2 register.
+**/
+VOID
+RestoreCr2 (
+  IN UINTN  Cr2
+  )
+{
+  if (!mCpuSmmStaticPageTable) {
+AsmWriteCr2 (Cr2);
+  }
+}
-- 
2.16.2.windows.1

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[edk2] [PATCH] UefiCpuPkg\PiSmmCpuDxeSmm: Save and restore CR2 only on-demand paging in SMM BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1593 For every SMI occurrence, save and restore CR2 regis

[edk2] [PATCH v2] UefiCpuPkg\CpuSmm: Save & restore CR2 on-demand paging in SMM

[edk2] [PATCH v3] UefiCpuPkg\CpuSmm: Save & restore CR2 on-demand paging in SMM

[edk2] [PATCH v4] UefiCpuPkg\CpuSmm: Save & restore CR2 on-demand paging in SMM

[edk2] [PATCH v5] UefiCpuPkg\CpuSmm: Save & restore CR2 on-demand paging in SMM

[edk2] [PATCH v6] UefiCpuPkg\CpuSmm: Save & restore CR2 on-demand paging in SMM

[edk2] [PATCH v7] UefiCpuPkg\CpuSmm: Save & restore CR2 on-demand paging in SMM

[edk2] [PATCH v8] UefiCpuPkg\CpuSmm: Save & restore CR2 on-demand paging in SMM

[edk2] [PATCH v9] UefiCpuPkg\CpuSmm: Save & restore CR2 on-demand paging in SMM

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