Re: [edk2] [PATCH] IntelFsp2Pkg/Tools: Add BSF bit field support in GenCfgOpt tool

2016-05-26 Thread Yao, Jiewen 
Reviewed-by: jiewen@intel.com


> -Original Message-
> From: Ma, Maurice
> Sent: Thursday, May 26, 2016 2:52 AM
> To: edk2-devel@lists.01.org
> Cc: Ma, Maurice <maurice...@intel.com>; Yao, Jiewen
> <jiewen@intel.com>; Mudusuru, Giri P <giri.p.mudus...@intel.com>
> Subject: [edk2] [PATCH] IntelFsp2Pkg/Tools: Add BSF bit field support in
> GenCfgOpt tool
> 
> The current GenCfgOpt tool does not generate bit fields in BSF.
> This change will allow bit fields to be created in BSF for a specific
> FSP UPD item. The argument for the tool is also updated to be in sync
> with the old usage model in IntelFspPkg.
> 
> Cc: Jiewen Yao <jiewen@intel.com>
> Cc: Giri P Mudusuru <giri.p.mudus...@intel.com>
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Maurice Ma <maurice...@intel.com>
> ---
>  IntelFsp2Pkg/Tools/GenCfgOpt.py | 224
> 
>  1 file changed, 113 insertions(+), 111 deletions(-)
> 
> diff --git a/IntelFsp2Pkg/Tools/GenCfgOpt.py
> b/IntelFsp2Pkg/Tools/GenCfgOpt.py
> index 4fd0562e7534..e8cec95aa735 100644
> --- a/IntelFsp2Pkg/Tools/GenCfgOpt.py
> +++ b/IntelFsp2Pkg/Tools/GenCfgOpt.py
> @@ -310,6 +310,7 @@ EndList
>  self._BuidinOption  = {'$EN_DIS' : 'EN_DIS'}
> 
>  self._MacroDict   = {}
> +self._PcdsDict= {}
>  self._CfgBlkDict  = {}
>  self._CfgPageDict = {}
>  self._CfgItemList = []
> @@ -374,8 +375,21 @@ EndList
>Line = Line.replace(Each, Each[2:-1])
>  return Line
> 
> +def ExpandPcds (self, Input):
> +Line = Input
> +Match = re.findall("(\w+\.\w+)", Input)
> +if Match:
> +for PcdName in Match:
> +  if PcdName in self._PcdsDict:
> +  Line = Line.replace(PcdName,
> self._PcdsDict[PcdName])
> +  else:
> +  if self.Debug:
> +  print "WARN : %s is not defined" % PcdName
> +return Line
> +
>  def EvaluateExpress (self, Expr):
> -ExpExpr = self.ExpandMacros(Expr)
> +ExpExpr = self.ExpandPcds(Expr)
> +ExpExpr = self.ExpandMacros(ExpExpr)
>  LogExpr = CLogicalExpression()
>  Result  = LogExpr.evaluateExpress (ExpExpr)
>  if self.Debug:
> @@ -411,7 +425,7 @@ EndList
>  ConfigDict['value'] = newvalue
>  return ""
> 
> -def ParseDscFile (self, DscFile, FvDir, ConfigDscFile, ExtConfigDscFile):
> +def ParseDscFile (self, DscFile, FvDir):
>  self._CfgItemList = []
>  self._CfgPageDict = {}
>  self._CfgBlkDict  = {}
> @@ -419,9 +433,9 @@ EndList
>  self._FvDir   = FvDir
> 
>  IsDefSect   = False
> +IsPcdSect   = False
>  IsUpdSect   = False
>  IsVpdSect   = False
> -Found   = False
> 
>  IfStack = []
>  ElifStack   = []
> @@ -437,10 +451,14 @@ EndList
>  Handle   = False
>  Match= re.match("^\[(.+)\]", DscLine)
>  if Match is not None:
> +IsDefSect = False
> +IsPcdSect = False
> +IsVpdSect = False
> +IsUpdSect = False
>  if  Match.group(1).lower() == "Defines".lower():
>  IsDefSect = True
> -IsVpdSect = False
> -IsUpdSect = False
> +if  Match.group(1).lower() ==
> "PcdsFeatureFlag".lower():
> +IsPcdSect = True
>  elif Match.group(1).lower() ==
> "PcdsDynamicVpd.Upd".lower():
>  ConfigDict = {}
>  ConfigDict['header']  = 'ON'
> @@ -453,16 +471,9 @@ EndList
>  ConfigDict['embed']   = ''
>  ConfigDict['comment'] = ''
>  ConfigDict['subreg']  = []
> -IsDefSect = False
>  IsUpdSect = True
> -IsVpdSect = False
> -Found = True
> -else:
> -IsDefSect = False
> -IsUpdSect = False
> -IsVpdSect = False
>  else:
> -if IsDefSect or IsUpdSect or IsVpdSect:
> +if IsDefSect or IsPcdSect or IsUpdSect or IsVpdSect:
>  if re.match("^!else($|\s+#.+)", DscLine):
>  if IfStack:
>

[edk2] [PATCH] IntelFsp2Pkg/Tools: Add BSF bit field support in GenCfgOpt tool

2016-05-25 Thread Maurice Ma 
The current GenCfgOpt tool does not generate bit fields in BSF.
This change will allow bit fields to be created in BSF for a specific
FSP UPD item. The argument for the tool is also updated to be in sync
with the old usage model in IntelFspPkg.

Cc: Jiewen Yao 
Cc: Giri P Mudusuru 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Maurice Ma 
---
 IntelFsp2Pkg/Tools/GenCfgOpt.py | 224 
 1 file changed, 113 insertions(+), 111 deletions(-)

diff --git a/IntelFsp2Pkg/Tools/GenCfgOpt.py b/IntelFsp2Pkg/Tools/GenCfgOpt.py
index 4fd0562e7534..e8cec95aa735 100644
--- a/IntelFsp2Pkg/Tools/GenCfgOpt.py
+++ b/IntelFsp2Pkg/Tools/GenCfgOpt.py
@@ -310,6 +310,7 @@ EndList
 self._BuidinOption  = {'$EN_DIS' : 'EN_DIS'}
 
 self._MacroDict   = {}
+self._PcdsDict= {}
 self._CfgBlkDict  = {}
 self._CfgPageDict = {}
 self._CfgItemList = []
@@ -374,8 +375,21 @@ EndList
   Line = Line.replace(Each, Each[2:-1])
 return Line
 
+def ExpandPcds (self, Input):
+Line = Input
+Match = re.findall("(\w+\.\w+)", Input)
+if Match:
+for PcdName in Match:
+  if PcdName in self._PcdsDict:
+  Line = Line.replace(PcdName, self._PcdsDict[PcdName])
+  else:
+  if self.Debug:
+  print "WARN : %s is not defined" % PcdName
+return Line
+
 def EvaluateExpress (self, Expr):
-ExpExpr = self.ExpandMacros(Expr)
+ExpExpr = self.ExpandPcds(Expr)
+ExpExpr = self.ExpandMacros(ExpExpr)
 LogExpr = CLogicalExpression()
 Result  = LogExpr.evaluateExpress (ExpExpr)
 if self.Debug:
@@ -411,7 +425,7 @@ EndList
 ConfigDict['value'] = newvalue
 return ""
 
-def ParseDscFile (self, DscFile, FvDir, ConfigDscFile, ExtConfigDscFile):
+def ParseDscFile (self, DscFile, FvDir):
 self._CfgItemList = []
 self._CfgPageDict = {}
 self._CfgBlkDict  = {}
@@ -419,9 +433,9 @@ EndList
 self._FvDir   = FvDir
 
 IsDefSect   = False
+IsPcdSect   = False
 IsUpdSect   = False
 IsVpdSect   = False
-Found   = False
 
 IfStack = []
 ElifStack   = []
@@ -437,10 +451,14 @@ EndList
 Handle   = False
 Match= re.match("^\[(.+)\]", DscLine)
 if Match is not None:
+IsDefSect = False
+IsPcdSect = False
+IsVpdSect = False
+IsUpdSect = False
 if  Match.group(1).lower() == "Defines".lower():
 IsDefSect = True
-IsVpdSect = False
-IsUpdSect = False
+if  Match.group(1).lower() == "PcdsFeatureFlag".lower():
+IsPcdSect = True
 elif Match.group(1).lower() == "PcdsDynamicVpd.Upd".lower():
 ConfigDict = {}
 ConfigDict['header']  = 'ON'
@@ -453,16 +471,9 @@ EndList
 ConfigDict['embed']   = ''
 ConfigDict['comment'] = ''
 ConfigDict['subreg']  = []
-IsDefSect = False
 IsUpdSect = True
-IsVpdSect = False
-Found = True
-else:
-IsDefSect = False
-IsUpdSect = False
-IsVpdSect = False
 else:
-if IsDefSect or IsUpdSect or IsVpdSect:
+if IsDefSect or IsPcdSect or IsUpdSect or IsVpdSect:
 if re.match("^!else($|\s+#.+)", DscLine):
 if IfStack:
 IfStack[-1] = not IfStack[-1]
@@ -490,41 +501,7 @@ EndList
 else:
 Match  = re.match("!(if|elseif)\s+(.+)", DscLine)
 if Match:
-IsFoundInFile = False
-MatchPcdFormat = 
re.match("^\s*(.+)\.(.+)\s*==\s*(.+)", Match.group(2))
-if MatchPcdFormat:
-   ExtConfigDsc = open(ExtConfigDscFile, 
"r")
-   ExtConfigDscLines = 
ExtConfigDsc.readlines()
-   ExtConfigDsc.close()
-   
-   while len(ExtConfigDscLines):
-   ExtConfigDscLine  = 
ExtConfigDscLines.pop(0).strip()
-   MatchExtConfigPcd = 
re.match("^\s*(.+)\s*\|\s*(.+)", ExtConfigDscLine)
-   if MatchExtConfigPcd and 
IsFoundInFile == False:
-