subject:"\[edk2\] \[PATCH 0\/3\] Add SMM CET support"

Re: [edk2] [PATCH 0/3] Add SMM CET support

2019-02-22 Thread Yao, Jiewen

The V3 patch is posted.
I add NASM.INC files.

Thank you
Yao Jiewen


> -Original Message-
> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of
> Yao, Jiewen
> Sent: Friday, February 22, 2019 8:11 PM
> To: Laszlo Ersek ; edk2-devel@lists.01.org
> Cc: Kinney, Michael D ; Dong, Eric
> ; Gao, Liming 
> Subject: Re: [edk2] [PATCH 0/3] Add SMM CET support
> 
> Thanks Laszlo.
> 
> 2) I have checked NASM instruction list at
> https://www.nasm.us/xdoc/2.14.02/html/nasmdocb.html
> SSP related instruction is not there.
> 
> I believe using DB maybe the only choice at this moment.
> 
> I will create include file.
> 
> 3) I will fix comment. Thanks to catch that.
> 
> 
> 
> > -Original Message-
> > From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of
> > Laszlo Ersek
> > Sent: Friday, February 22, 2019 8:01 PM
> > To: Yao, Jiewen ; edk2-devel@lists.01.org
> > Cc: Kinney, Michael D ; Dong, Eric
> > ; Gao, Liming 
> > Subject: Re: [edk2] [PATCH 0/3] Add SMM CET support
> >
> > On 02/22/19 05:15, Jiewen Yao wrote:
> > > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1521
> > >
> > > This patch series implement add CET ShadowStack support for SMM.
> > >
> > > The CET document can be found at:
> > >
> >
> https://software.intel.com/sites/default/files/managed/4d/2a/control-flow
> > -enforcement-technology-preview.pdf
> > >
> > > Patch 1 adds SSP (ShadowStackPointer) to JUMP_BUFFER.
> > > Patch 2 adds Control Protection exception (CP#) dump info.
> > > Patch 3 adds CET ShadowStack support in SMM.
> > >
> > > For more detail please refer to each patch.
> > >
> > > I also post all update to https://github.com/jyao1/edk2/tree/CET
> > >
> > > Cc: Michael D Kinney 
> > > Cc: Liming Gao 
> > > Cc: Eric Dong 
> > > Cc: Ray Ni 
> > > Cc: Laszlo Ersek 
> > > Contributed-under: TianoCore Contribution Agreement 1.1
> > > Signed-off-by: Yao Jiewen 
> > >
> > > Jiewen Yao (3):
> > >   MdePkg/BaseLib: Add Shadow Stack Support for X86.
> > >   UefiCpuPkg/ExceptionLib: Add CET support.
> > >   UefiCpuPkg/PiSmmCpu: Add Shadow Stack Support for X86 SMM.
> >
> >
> > (1) For the series, in my usual environment:
> >
> > Regression-tested-by: Laszlo Ersek 
> >
> >
> > (2) I notice that the NASM code receives a bunch of DB encodings for
> > various instructions. I think that's a bad idea. It was pretty difficult
> > to eliminate DBs; please refer to
> > <https://bugzilla.tianocore.org/show_bug.cgi?id=866>, and the commit
> > range aae02dccf5b0..d22c995a4814.
> >
> > As far as I can see, the DBs are added to encode three instructions,
> > namely READSSP, INCSSP, and SETSSBSY. Can you please confirm that the
> > only reason we use DBs for these instructions is that they are related
> > to the CET extension, and they are not yet supported by NASM? (Or at
> > least not by the NASM that that we require?)
> >
> > In other words, I'd like to be sure that the DBs are not used for
> > runtime instruction patching.
> >
> > Even that way, I think it would be better to use NASM macros for these
> > instructions. The code doesn't use many forms:
> >
> > * SETSSBSY:   DB 0xF3, 0x0F, 0x01, 0xE8
> > * READSSP EAX:DB 0xF3, 0x0F, 0x1E, 0xC8
> > * INCSSP EAX: DB 0xF3, 0x0F, 0xAE, 0xE8
> > * READSSP RAX:DB 0xF3, 0x48, 0x0F, 0x1E, 0xC8
> > * INCSSP RAX: DB 0xF3, 0x48, 0x0F, 0xAE, 0xE8
> >
> > (It seems that the EAX <-> RAX encodings, for READSSP and INCSSP, are
> > differentiated through the 0x48 REX.W prefix (64-bit operand size).)
> >
> > I think we should add the macros in a NASM include file under
> > "MdePkg/Include". Later, only those macros would have to be updated,
> > once NASM starts supporting these instructions directly.
> >
> > We've supported shared NASM include files since
> > <https://bugzilla.tianocore.org/show_bug.cgi?id=1085>. Therefore, both
> > UefiCpuPkg and MdePkg modules could consume the macros, from under
> > MdePkg/Include.
> >
> >
> > (3) In fact, looking at the DB encodings, I think some of the comments
> > are incorrect. Namely, in patch #3, in file
> > "UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/Cet.nasm", function DisableCet, we
> > have
> >
> > +DB  0xF3, 0x0F, 0xAE, 0xE8   ; INCSSP RAX
> >
> > but that's INCSSP EAX, not RAX, in reality. (The code is correct, the
> > comment is wrong.) Using NASM macros would help us avoid such typos.
> >
> > Thanks
> > Laszlo
> >
> > ___
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> > edk2-devel@lists.01.org
> > https://lists.01.org/mailman/listinfo/edk2-devel
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Re: [edk2] [PATCH 0/3] Add SMM CET support

2019-02-22 Thread Yao, Jiewen

Thanks Laszlo.

2) I have checked NASM instruction list at 
https://www.nasm.us/xdoc/2.14.02/html/nasmdocb.html
SSP related instruction is not there.

I believe using DB maybe the only choice at this moment.

I will create include file.

3) I will fix comment. Thanks to catch that.



> -Original Message-
> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of
> Laszlo Ersek
> Sent: Friday, February 22, 2019 8:01 PM
> To: Yao, Jiewen ; edk2-devel@lists.01.org
> Cc: Kinney, Michael D ; Dong, Eric
> ; Gao, Liming 
> Subject: Re: [edk2] [PATCH 0/3] Add SMM CET support
> 
> On 02/22/19 05:15, Jiewen Yao wrote:
> > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1521
> >
> > This patch series implement add CET ShadowStack support for SMM.
> >
> > The CET document can be found at:
> >
> https://software.intel.com/sites/default/files/managed/4d/2a/control-flow
> -enforcement-technology-preview.pdf
> >
> > Patch 1 adds SSP (ShadowStackPointer) to JUMP_BUFFER.
> > Patch 2 adds Control Protection exception (CP#) dump info.
> > Patch 3 adds CET ShadowStack support in SMM.
> >
> > For more detail please refer to each patch.
> >
> > I also post all update to https://github.com/jyao1/edk2/tree/CET
> >
> > Cc: Michael D Kinney 
> > Cc: Liming Gao 
> > Cc: Eric Dong 
> > Cc: Ray Ni 
> > Cc: Laszlo Ersek 
> > Contributed-under: TianoCore Contribution Agreement 1.1
> > Signed-off-by: Yao Jiewen 
> >
> > Jiewen Yao (3):
> >   MdePkg/BaseLib: Add Shadow Stack Support for X86.
> >   UefiCpuPkg/ExceptionLib: Add CET support.
> >   UefiCpuPkg/PiSmmCpu: Add Shadow Stack Support for X86 SMM.
> 
> 
> (1) For the series, in my usual environment:
> 
> Regression-tested-by: Laszlo Ersek 
> 
> 
> (2) I notice that the NASM code receives a bunch of DB encodings for
> various instructions. I think that's a bad idea. It was pretty difficult
> to eliminate DBs; please refer to
> <https://bugzilla.tianocore.org/show_bug.cgi?id=866>, and the commit
> range aae02dccf5b0..d22c995a4814.
> 
> As far as I can see, the DBs are added to encode three instructions,
> namely READSSP, INCSSP, and SETSSBSY. Can you please confirm that the
> only reason we use DBs for these instructions is that they are related
> to the CET extension, and they are not yet supported by NASM? (Or at
> least not by the NASM that that we require?)
> 
> In other words, I'd like to be sure that the DBs are not used for
> runtime instruction patching.
> 
> Even that way, I think it would be better to use NASM macros for these
> instructions. The code doesn't use many forms:
> 
> * SETSSBSY:   DB 0xF3, 0x0F, 0x01, 0xE8
> * READSSP EAX:DB 0xF3, 0x0F, 0x1E, 0xC8
> * INCSSP EAX: DB 0xF3, 0x0F, 0xAE, 0xE8
> * READSSP RAX:DB 0xF3, 0x48, 0x0F, 0x1E, 0xC8
> * INCSSP RAX: DB 0xF3, 0x48, 0x0F, 0xAE, 0xE8
> 
> (It seems that the EAX <-> RAX encodings, for READSSP and INCSSP, are
> differentiated through the 0x48 REX.W prefix (64-bit operand size).)
> 
> I think we should add the macros in a NASM include file under
> "MdePkg/Include". Later, only those macros would have to be updated,
> once NASM starts supporting these instructions directly.
> 
> We've supported shared NASM include files since
> <https://bugzilla.tianocore.org/show_bug.cgi?id=1085>. Therefore, both
> UefiCpuPkg and MdePkg modules could consume the macros, from under
> MdePkg/Include.
> 
> 
> (3) In fact, looking at the DB encodings, I think some of the comments
> are incorrect. Namely, in patch #3, in file
> "UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/Cet.nasm", function DisableCet, we
> have
> 
> +DB  0xF3, 0x0F, 0xAE, 0xE8   ; INCSSP RAX
> 
> but that's INCSSP EAX, not RAX, in reality. (The code is correct, the
> comment is wrong.) Using NASM macros would help us avoid such typos.
> 
> Thanks
> Laszlo
> 
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Re: [edk2] [PATCH 0/3] Add SMM CET support

2019-02-22 Thread Laszlo Ersek

On 02/22/19 05:15, Jiewen Yao wrote:
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1521
> 
> This patch series implement add CET ShadowStack support for SMM.
> 
> The CET document can be found at:
> https://software.intel.com/sites/default/files/managed/4d/2a/control-flow-enforcement-technology-preview.pdf
> 
> Patch 1 adds SSP (ShadowStackPointer) to JUMP_BUFFER.
> Patch 2 adds Control Protection exception (CP#) dump info.
> Patch 3 adds CET ShadowStack support in SMM.
> 
> For more detail please refer to each patch. 
> 
> I also post all update to https://github.com/jyao1/edk2/tree/CET
> 
> Cc: Michael D Kinney 
> Cc: Liming Gao 
> Cc: Eric Dong 
> Cc: Ray Ni 
> Cc: Laszlo Ersek 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Yao Jiewen 
> 
> Jiewen Yao (3):
>   MdePkg/BaseLib: Add Shadow Stack Support for X86.
>   UefiCpuPkg/ExceptionLib: Add CET support.
>   UefiCpuPkg/PiSmmCpu: Add Shadow Stack Support for X86 SMM.

(1) For the series, in my usual environment:

Regression-tested-by: Laszlo Ersek 

(2) I notice that the NASM code receives a bunch of DB encodings for
various instructions. I think that's a bad idea. It was pretty difficult
to eliminate DBs; please refer to
, and the commit
range aae02dccf5b0..d22c995a4814.

As far as I can see, the DBs are added to encode three instructions,
namely READSSP, INCSSP, and SETSSBSY. Can you please confirm that the
only reason we use DBs for these instructions is that they are related
to the CET extension, and they are not yet supported by NASM? (Or at
least not by the NASM that that we require?)

In other words, I'd like to be sure that the DBs are not used for
runtime instruction patching.

Even that way, I think it would be better to use NASM macros for these
instructions. The code doesn't use many forms:

* SETSSBSY:   DB 0xF3, 0x0F, 0x01, 0xE8
* READSSP EAX:DB 0xF3, 0x0F, 0x1E, 0xC8
* INCSSP EAX: DB 0xF3, 0x0F, 0xAE, 0xE8
* READSSP RAX:DB 0xF3, 0x48, 0x0F, 0x1E, 0xC8
* INCSSP RAX: DB 0xF3, 0x48, 0x0F, 0xAE, 0xE8

(It seems that the EAX <-> RAX encodings, for READSSP and INCSSP, are
differentiated through the 0x48 REX.W prefix (64-bit operand size).)

I think we should add the macros in a NASM include file under
"MdePkg/Include". Later, only those macros would have to be updated,
once NASM starts supporting these instructions directly.

We've supported shared NASM include files since
. Therefore, both
UefiCpuPkg and MdePkg modules could consume the macros, from under
MdePkg/Include.

(3) In fact, looking at the DB encodings, I think some of the comments
are incorrect. Namely, in patch #3, in file
"UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/Cet.nasm", function DisableCet, we have

+DB  0xF3, 0x0F, 0xAE, 0xE8   ; INCSSP RAX

but that's INCSSP EAX, not RAX, in reality. (The code is correct, the
comment is wrong.) Using NASM macros would help us avoid such typos.

Thanks
Laszlo

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Re: [edk2] [PATCH 0/3] Add SMM CET support

2019-02-22 Thread Yao, Jiewen

Thank you Laszlo.

I just fixed the emulation platform issue (NT32).
So I posted the V2 version.

Please review the latest version and ignore this one.
Sorry for the inconvenience.

Thank you
Yao Jiewen


> -Original Message-
> From: Laszlo Ersek [mailto:ler...@redhat.com]
> Sent: Friday, February 22, 2019 5:07 PM
> To: Yao, Jiewen ; edk2-devel@lists.01.org
> Cc: Kinney, Michael D ; Gao, Liming
> ; Dong, Eric ; Ni, Ray
> 
> Subject: Re: [PATCH 0/3] Add SMM CET support
> 
> Hi Jiewen,
> 
> On 02/22/19 05:15, Jiewen Yao wrote:
> > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1521
> >
> > This patch series implement add CET ShadowStack support for SMM.
> >
> > The CET document can be found at:
> >
> https://software.intel.com/sites/default/files/managed/4d/2a/control-flow
> -enforcement-technology-preview.pdf
> >
> > Patch 1 adds SSP (ShadowStackPointer) to JUMP_BUFFER.
> > Patch 2 adds Control Protection exception (CP#) dump info.
> > Patch 3 adds CET ShadowStack support in SMM.
> >
> > For more detail please refer to each patch.
> >
> > I also post all update to https://github.com/jyao1/edk2/tree/CET
> >
> > Cc: Michael D Kinney 
> > Cc: Liming Gao 
> > Cc: Eric Dong 
> > Cc: Ray Ni 
> > Cc: Laszlo Ersek 
> > Contributed-under: TianoCore Contribution Agreement 1.1
> > Signed-off-by: Yao Jiewen 
> >
> > Jiewen Yao (3):
> >   MdePkg/BaseLib: Add Shadow Stack Support for X86.
> >   UefiCpuPkg/ExceptionLib: Add CET support.
> >   UefiCpuPkg/PiSmmCpu: Add Shadow Stack Support for X86 SMM.
> 
> Thank you for the CC. I'll run my regression-tests on this. I might need
> a few days; I'm tagging the series for now. Thanks for your patience!
> 
> Laszlo
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Re: [edk2] [PATCH 0/3] Add SMM CET support

2019-02-22 Thread Laszlo Ersek

Hi Jiewen,

On 02/22/19 05:15, Jiewen Yao wrote:
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1521
> 
> This patch series implement add CET ShadowStack support for SMM.
> 
> The CET document can be found at:
> https://software.intel.com/sites/default/files/managed/4d/2a/control-flow-enforcement-technology-preview.pdf
> 
> Patch 1 adds SSP (ShadowStackPointer) to JUMP_BUFFER.
> Patch 2 adds Control Protection exception (CP#) dump info.
> Patch 3 adds CET ShadowStack support in SMM.
> 
> For more detail please refer to each patch. 
> 
> I also post all update to https://github.com/jyao1/edk2/tree/CET
> 
> Cc: Michael D Kinney 
> Cc: Liming Gao 
> Cc: Eric Dong 
> Cc: Ray Ni 
> Cc: Laszlo Ersek 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Yao Jiewen 
> 
> Jiewen Yao (3):
>   MdePkg/BaseLib: Add Shadow Stack Support for X86.
>   UefiCpuPkg/ExceptionLib: Add CET support.
>   UefiCpuPkg/PiSmmCpu: Add Shadow Stack Support for X86 SMM.

Thank you for the CC. I'll run my regression-tests on this. I might need
a few days; I'm tagging the series for now. Thanks for your patience!

Laszlo
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Re: [edk2] [PATCH 0/3] Add SMM CET support

2019-02-21 Thread Gao, Liming

Acked-by: Liming Gao 

>-Original Message-
>From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of
>Jiewen Yao
>Sent: Friday, February 22, 2019 12:16 PM
>To: edk2-devel@lists.01.org
>Cc: Dong, Eric ; Gao, Liming ;
>Yao, Jiewen ; Kinney, Michael D
>; Laszlo Ersek 
>Subject: [edk2] [PATCH 0/3] Add SMM CET support
>
>REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1521
>
>This patch series implement add CET ShadowStack support for SMM.
>
>The CET document can be found at:
>https://software.intel.com/sites/default/files/managed/4d/2a/control-flow-
>enforcement-technology-preview.pdf
>
>Patch 1 adds SSP (ShadowStackPointer) to JUMP_BUFFER.
>Patch 2 adds Control Protection exception (CP#) dump info.
>Patch 3 adds CET ShadowStack support in SMM.
>
>For more detail please refer to each patch.
>
>I also post all update to https://github.com/jyao1/edk2/tree/CET
>
>Cc: Michael D Kinney 
>Cc: Liming Gao 
>Cc: Eric Dong 
>Cc: Ray Ni 
>Cc: Laszlo Ersek 
>Contributed-under: TianoCore Contribution Agreement 1.1
>Signed-off-by: Yao Jiewen 
>
>Jiewen Yao (3):
>  MdePkg/BaseLib: Add Shadow Stack Support for X86.
>  UefiCpuPkg/ExceptionLib: Add CET support.
>  UefiCpuPkg/PiSmmCpu: Add Shadow Stack Support for X86 SMM.
>
> MdePkg/Include/Library/BaseLib.h  |   2 +
> MdePkg/Library/BaseLib/Ia32/LongJump.nasm |  18 ++-
> MdePkg/Library/BaseLib/Ia32/SetJump.nasm  |  17 ++-
> MdePkg/Library/BaseLib/X64/LongJump.nasm  |  20 ++-
> MdePkg/Library/BaseLib/X64/SetJump.nasm   |  17 ++-
> .../Include/Library/SmmCpuFeaturesLib.h   |  23 +++-
> .../CpuExceptionCommon.c  |   7 +-
> .../CpuExceptionCommon.h  |   3 +-
> .../Ia32/ArchExceptionHandler.c   |   5 +-
> .../X64/ArchExceptionHandler.c|   5 +-
> UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/Cet.nasm   |  37 ++
> UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c  |  38 +-
> UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm  |  98
>++-
> .../PiSmmCpuDxeSmm/Ia32/SmiException.nasm |   6 +-
> UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmFuncsArch.c |  57 -
> UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c |  12 +-
> UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c|  97
>--
> UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h| 103
>++-
> UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf  |   6 +-
> .../PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c   |  85
>-
> UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c|  18 ++-
> UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.h|   4 +-
> UefiCpuPkg/PiSmmCpuDxeSmm/SmramSaveState.c|   4 +-
> UefiCpuPkg/PiSmmCpuDxeSmm/X64/Cet.nasm|  38 ++
> UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c   |  39 +-
> UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm   | 119
>+-
> UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmFuncsArch.c  |  58 -
> UefiCpuPkg/UefiCpuPkg.dec |  13 +-
> 28 files changed, 890 insertions(+), 59 deletions(-)
> create mode 100644 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/Cet.nasm
> create mode 100644 UefiCpuPkg/PiSmmCpuDxeSmm/X64/Cet.nasm
>
>--
>2.19.2.windows.1
>
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[edk2] [PATCH 0/3] Add SMM CET support

2019-02-21 Thread Jiewen Yao

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1521

This patch series implement add CET ShadowStack support for SMM.

The CET document can be found at:
https://software.intel.com/sites/default/files/managed/4d/2a/control-flow-enforcement-technology-preview.pdf

Patch 1 adds SSP (ShadowStackPointer) to JUMP_BUFFER.
Patch 2 adds Control Protection exception (CP#) dump info.
Patch 3 adds CET ShadowStack support in SMM.

For more detail please refer to each patch. 

I also post all update to https://github.com/jyao1/edk2/tree/CET

Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Eric Dong 
Cc: Ray Ni 
Cc: Laszlo Ersek 
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Yao Jiewen 

Jiewen Yao (3):
  MdePkg/BaseLib: Add Shadow Stack Support for X86.
  UefiCpuPkg/ExceptionLib: Add CET support.
  UefiCpuPkg/PiSmmCpu: Add Shadow Stack Support for X86 SMM.

 MdePkg/Include/Library/BaseLib.h  |   2 +
 MdePkg/Library/BaseLib/Ia32/LongJump.nasm |  18 ++-
 MdePkg/Library/BaseLib/Ia32/SetJump.nasm  |  17 ++-
 MdePkg/Library/BaseLib/X64/LongJump.nasm  |  20 ++-
 MdePkg/Library/BaseLib/X64/SetJump.nasm   |  17 ++-
 .../Include/Library/SmmCpuFeaturesLib.h   |  23 +++-
 .../CpuExceptionCommon.c  |   7 +-
 .../CpuExceptionCommon.h  |   3 +-
 .../Ia32/ArchExceptionHandler.c   |   5 +-
 .../X64/ArchExceptionHandler.c|   5 +-
 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/Cet.nasm   |  37 ++
 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c  |  38 +-
 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm  |  98 ++-
 .../PiSmmCpuDxeSmm/Ia32/SmiException.nasm |   6 +-
 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmFuncsArch.c |  57 -
 UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c |  12 +-
 UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c|  97 --
 UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h| 103 ++-
 UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf  |   6 +-
 .../PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c   |  85 -
 UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c|  18 ++-
 UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.h|   4 +-
 UefiCpuPkg/PiSmmCpuDxeSmm/SmramSaveState.c|   4 +-
 UefiCpuPkg/PiSmmCpuDxeSmm/X64/Cet.nasm|  38 ++
 UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c   |  39 +-
 UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm   | 119 +-
 UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmFuncsArch.c  |  58 -
 UefiCpuPkg/UefiCpuPkg.dec |  13 +-
 28 files changed, 890 insertions(+), 59 deletions(-)
 create mode 100644 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/Cet.nasm
 create mode 100644 UefiCpuPkg/PiSmmCpuDxeSmm/X64/Cet.nasm

-- 
2.19.2.windows.1

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Re: [edk2] [PATCH 0/3] Add SMM CET support

Re: [edk2] [PATCH 0/3] Add SMM CET support

Re: [edk2] [PATCH 0/3] Add SMM CET support

Re: [edk2] [PATCH 0/3] Add SMM CET support

Re: [edk2] [PATCH 0/3] Add SMM CET support

Re: [edk2] [PATCH 0/3] Add SMM CET support

[edk2] [PATCH 0/3] Add SMM CET support

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