Re: [edk2] [PATCH v1 1/1] UefiCpuPkg: [CVE-2017-5715] Stuff RSB before RSM
Reviewed-by: Eric Dong > -Original Message- > From: Wu, Hao A > Sent: Friday, November 16, 2018 9:37 AM > To: edk2-devel@lists.01.org > Cc: Wu, Hao A ; Yao, Jiewen ; > Laszlo Ersek ; Kinney, Michael D > ; Dong, Eric > Subject: [PATCH v1 1/1] UefiCpuPkg: [CVE-2017-5715] Stuff RSB before RSM > > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1093 > > Return Stack Buffer (RSB) is used to predict the target of RET > instructions. When the RSB underflows, some processors may fall back to > using branch predictors. This might impact software using the retpoline > mitigation strategy on those processors. > > This commit will add RSB stuffing logic before returning from SMM (the RSM > instruction) to avoid interfering with non-SMM usage of the retpoline > technique. > > After the stuffing, RSB entries will contain a trap like: > > SpecTrap: > pause > lfence > jmp SpecTrap > > A more detailed explanation of the purpose of commit is under the > 'Branch target injection mitigation' section of the below link: > https://software.intel.com/security-software-guidance/insights/host- > firmware-speculative-execution-side-channel-mitigation > > This commit introduces a .INC file that contains the RSB logic and it can > be included by .ASM files. This file is placed at directory > 'UefiCpuPkg/Include/'. > > Cc: Jiewen Yao > Cc: Laszlo Ersek > Cc: Michael D Kinney > Cc: Eric Dong > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Hao Wu > --- > UefiCpuPkg/Include/StuffRsbAsm.inc | 60 > UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.asm | 5 +- > UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.asm | 5 +- > UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.asm | 5 +- > UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmInit.asm | 5 +- > 5 files changed, 76 insertions(+), 4 deletions(-) > > diff --git a/UefiCpuPkg/Include/StuffRsbAsm.inc > b/UefiCpuPkg/Include/StuffRsbAsm.inc > new file mode 100644 > index 00..df36ad > --- /dev/null > +++ b/UefiCpuPkg/Include/StuffRsbAsm.inc > @@ -0,0 +1,60 @@ > +;-- > ; > +; Copyright (c) 2018, Intel Corporation. All rights reserved. > +; This program and the accompanying materials > +; are licensed and made available under the terms and conditions of the BSD > License > +; which accompanies this distribution. The full text of the license may be > found at > +; http://opensource.org/licenses/bsd-license.php. > +; > +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" > BASIS, > +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER > EXPRESS OR IMPLIED. > +; > +; Module Name: > +; > +; StuffRsbAsm.inc > +; > +; Abstract: > +; > +; This file provides macro definitions for stuffing the Return Stack Buffer > (RSB) > +; for .ASM files. > +; > +;--- > + > +RSB_STUFF_ENTRIESEqu20h > + > +; > +; parameters: > +; @param 1: register to use as counter (e.g. IA32:eax, X64:rax) > +; @param 2: stack pointer to restore (IA32:esp, X64:rsp) > +; @param 3: the size of a stack frame (IA32:4, X64:8) > +; > +StuffRsb MACRO Reg, StackPointer, Size > + local Unroll1, Unroll2, SpecTrap1, SpecTrap2, StuffLoop > + mov Reg, RSB_STUFF_ENTRIES / 2 > +Unroll1: > + callUnroll2 > +SpecTrap1: > + pause > + lfence > + jmp SpecTrap1 > +Unroll2: > + callStuffLoop > +SpecTrap2: > + pause > + lfence > + jmp SpecTrap2 > +StuffLoop: > + dec Reg > + jnz Unroll1 > + add StackPointer, RSB_STUFF_ENTRIES * Size ; Restore the > stack > pointer > + ENDM > + > +; > +; RSB stuffing macros for IA32 and X64 > +; > +StuffRsb32 MACRO > + StuffRsbeax, esp, 4 > + ENDM > + > +StuffRsb64 MACRO > + StuffRsbrax, rsp, 8 > + ENDM > diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.asm > b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.asm > index ac1a9b48dd..ea906d6434 100644 > --- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.asm > +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.asm > @@ -1,5 +1,5 @@ > > ;-- > ; > -; Copyright (c) 2009 - 2015, Intel Corporation. All rights reserved. > +; Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved. > ; This program and the accompanying materials > ; are licensed and made available under the terms and conditions of the BSD > License > ; which accompanies this distribution. The full text of the license may be > found at > @@ -22,6 +22,8 @@ > .model flat,C > .xmm > > +INCLUDEStuffRsbAsm.inc > + > DSC_OFFSETEQU 0fb00h > DSC_GDTPTREQU 30h > DSC_GDTSIZEQU 38h
[edk2] [PATCH v1 1/1] UefiCpuPkg: [CVE-2017-5715] Stuff RSB before RSM
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1093 Return Stack Buffer (RSB) is used to predict the target of RET instructions. When the RSB underflows, some processors may fall back to using branch predictors. This might impact software using the retpoline mitigation strategy on those processors. This commit will add RSB stuffing logic before returning from SMM (the RSM instruction) to avoid interfering with non-SMM usage of the retpoline technique. After the stuffing, RSB entries will contain a trap like: SpecTrap: pause lfence jmp SpecTrap A more detailed explanation of the purpose of commit is under the 'Branch target injection mitigation' section of the below link: https://software.intel.com/security-software-guidance/insights/host-firmware-speculative-execution-side-channel-mitigation This commit introduces a .INC file that contains the RSB logic and it can be included by .ASM files. This file is placed at directory 'UefiCpuPkg/Include/'. Cc: Jiewen Yao Cc: Laszlo Ersek Cc: Michael D Kinney Cc: Eric Dong Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Hao Wu --- UefiCpuPkg/Include/StuffRsbAsm.inc | 60 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.asm | 5 +- UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.asm | 5 +- UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.asm | 5 +- UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmInit.asm | 5 +- 5 files changed, 76 insertions(+), 4 deletions(-) diff --git a/UefiCpuPkg/Include/StuffRsbAsm.inc b/UefiCpuPkg/Include/StuffRsbAsm.inc new file mode 100644 index 00..df36ad --- /dev/null +++ b/UefiCpuPkg/Include/StuffRsbAsm.inc @@ -0,0 +1,60 @@ +;-- ; +; Copyright (c) 2018, Intel Corporation. All rights reserved. +; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; StuffRsbAsm.inc +; +; Abstract: +; +; This file provides macro definitions for stuffing the Return Stack Buffer (RSB) +; for .ASM files. +; +;--- + +RSB_STUFF_ENTRIESEqu20h + +; +; parameters: +; @param 1: register to use as counter (e.g. IA32:eax, X64:rax) +; @param 2: stack pointer to restore (IA32:esp, X64:rsp) +; @param 3: the size of a stack frame (IA32:4, X64:8) +; +StuffRsb MACRO Reg, StackPointer, Size + local Unroll1, Unroll2, SpecTrap1, SpecTrap2, StuffLoop + mov Reg, RSB_STUFF_ENTRIES / 2 +Unroll1: + callUnroll2 +SpecTrap1: + pause + lfence + jmp SpecTrap1 +Unroll2: + callStuffLoop +SpecTrap2: + pause + lfence + jmp SpecTrap2 +StuffLoop: + dec Reg + jnz Unroll1 + add StackPointer, RSB_STUFF_ENTRIES * Size ; Restore the stack pointer + ENDM + +; +; RSB stuffing macros for IA32 and X64 +; +StuffRsb32 MACRO + StuffRsbeax, esp, 4 + ENDM + +StuffRsb64 MACRO + StuffRsbrax, rsp, 8 + ENDM diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.asm b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.asm index ac1a9b48dd..ea906d6434 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.asm +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.asm @@ -1,5 +1,5 @@ ;-- ; -; Copyright (c) 2009 - 2015, Intel Corporation. All rights reserved. +; Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved. ; This program and the accompanying materials ; are licensed and made available under the terms and conditions of the BSD License ; which accompanies this distribution. The full text of the license may be found at @@ -22,6 +22,8 @@ .model flat,C .xmm +INCLUDEStuffRsbAsm.inc + DSC_OFFSETEQU 0fb00h DSC_GDTPTREQU 30h DSC_GDTSIZEQU 38h @@ -169,6 +171,7 @@ _SmiHandler PROC calleax pop ecx +StuffRsb32 rsm _SmiHandler ENDP diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.asm b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.asm index 9ba2aebe69..a606bde749 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.asm +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.asm @@ -1,5 +1,5 @@ ;-- ; -; Copyright (c) 2009 - 2015, Intel Corporation. All rights reserved. +; Copyright (c) 2009 - 2018, Intel Corporation. All
