subject:"\[edk2\] \[PATCH v2\] MdeModulePkg\/SdMmcPciHcDxe\: Add V3 64b DMA Support"

[edk2] [PATCH v2] MdeModulePkg/SdMmcPciHcDxe: Add V3 64b DMA Support

2019-03-06 Thread Ashish Singhal

Driver was supporting only 32b DMA support for V3 controllers. Add
support for 64b DMA as well for completeness.

For V4.0 64b support, driver was looking at incorrect capability
register bit. Fix for that is present as well.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1583
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ashish Singhal 
---
 MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.c |  10 +-
 MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h |   6 +-
 MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c   | 189 ++---
 MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.h   |  29 +++-
 4 files changed, 161 insertions(+), 73 deletions(-)

diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.c 
b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.c
index b474f8d..9b7b88c 100644
--- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.c
+++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.c
@@ -6,7 +6,7 @@
 
   It would expose EFI_SD_MMC_PASS_THRU_PROTOCOL for upper layer use.
 
-  Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
+  Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved.
   Copyright (c) 2015 - 2019, Intel Corporation. All rights reserved.
   This program and the accompanying materials
   are licensed and made available under the terms and conditions of the BSD 
License
@@ -666,8 +666,12 @@ SdMmcPciHcDriverBindingStart (
 // If any of the slots does not support 64b system bus
 // do not enable 64b DMA in the PCI layer.
 //
-if (Private->Capability[Slot].SysBus64V3 == 0 &&
-Private->Capability[Slot].SysBus64V4 == 0) {
+if ((Private->ControllerVersion[Slot] == SD_MMC_HC_CTRL_VER_300 &&
+ Private->Capability[Slot].SysBus64V3 == 0) ||
+(Private->ControllerVersion[Slot] == SD_MMC_HC_CTRL_VER_400 &&
+ Private->Capability[Slot].SysBus64V3 == 0) ||
+(Private->ControllerVersion[Slot] >= SD_MMC_HC_CTRL_VER_410 &&
+ Private->Capability[Slot].SysBus64V4 == 0)) {
   Support64BitDma = FALSE;
 }
 
diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h 
b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h
index 1bb701a..8846fde 100644
--- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h
+++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h
@@ -2,7 +2,7 @@
 
   Provides some data structure definitions used by the SD/MMC host controller 
driver.
 
-Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
+Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved.
 Copyright (c) 2015, Intel Corporation. All rights reserved.
 This program and the accompanying materials
 are licensed and made available under the terms and conditions of the BSD 
License
@@ -145,13 +145,15 @@ typedef struct {
   EFI_PHYSICAL_ADDRESSDataPhy;
   VOID*DataMap;
   SD_MMC_HC_TRANSFER_MODE Mode;
+  SD_MMC_HC_ADMA_LENGTH_MODE  AdmaLengthMode;
 
   EFI_EVENT   Event;
   BOOLEAN Started;
   UINT64  Timeout;
 
   SD_MMC_HC_ADMA_32_DESC_LINE *Adma32Desc;
-  SD_MMC_HC_ADMA_64_DESC_LINE *Adma64Desc;
+  SD_MMC_HC_ADMA_64_V3_DESC_LINE  *Adma64V3Desc;
+  SD_MMC_HC_ADMA_64_V4_DESC_LINE  *Adma64V4Desc;
   EFI_PHYSICAL_ADDRESSAdmaDescPhy;
   VOID*AdmaMap;
   UINT32  AdmaPages;
diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c 
b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c
index d73fa10..6fefed1 100644
--- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c
+++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c
@@ -6,7 +6,7 @@
 
   It would expose EFI_SD_MMC_PASS_THRU_PROTOCOL for upper layer use.
 
-  Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
+  Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved.
   Copyright (c) 2015 - 2019, Intel Corporation. All rights reserved.
   This program and the accompanying materials
   are licensed and made available under the terms and conditions of the BSD 
License
@@ -1010,16 +1010,28 @@ SdMmcHcInitV4Enhancements (
   if (ControllerVer >= SD_MMC_HC_CTRL_VER_400) {
 HostCtrl2 = SD_MMC_HC_V4_EN;
 //
-// Check if V4 64bit support is available
+// Check if controller version V4.0
 //
-if (Capability.SysBus64V4 != 0) {
-  HostCtrl2 |= SD_MMC_HC_64_ADDR_EN;
-  DEBUG ((DEBUG_INFO, "Enabled V4 64 bit system bus support\n"));
+if (ControllerVer == SD_MMC_HC_CTRL_VER_400) {
+  //
+  // Check if 64bit support is available
+  //
+  if (Capability.SysBus64V3 != 0) {
+HostCtrl2 |= SD_MMC_HC_64_ADDR_EN;
+DEBUG ((DEBUG_INFO, "Enabled V4 64 bit system bus support\n"));
+  }
 }
 //
 // Check if controller version V4.10 or higher
 //
-if (ControllerVer >= SD_MMC_HC_CTRL_VER_410)

Re: [edk2] [PATCH v2] MdeModulePkg/SdMmcPciHcDxe: Add V3 64b DMA Support

2019-03-06 Thread Wu, Hao A

Ashish,

Thanks for the contribution.
Reviewed-by: Hao Wu 

I will push this one after the release tag is created.

Best Regards,
Hao Wu


> -Original Message-
> From: Ashish Singhal [mailto:ashishsin...@nvidia.com]
> Sent: Wednesday, March 06, 2019 10:05 PM
> To: edk2-devel@lists.01.org
> Cc: Wu, Hao A; eug...@hp.com; Ashish Singhal
> Subject: [PATCH v2] MdeModulePkg/SdMmcPciHcDxe: Add V3 64b DMA
> Support
> 
> Driver was supporting only 32b DMA support for V3 controllers. Add
> support for 64b DMA as well for completeness.
> 
> For V4.0 64b support, driver was looking at incorrect capability
> register bit. Fix for that is present as well.
> 
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1583
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ashish Singhal 
> ---
>  MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.c |  10 +-
>  MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h |   6 +-
>  MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c   | 189
> ++---
>  MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.h   |  29 +++-
>  4 files changed, 161 insertions(+), 73 deletions(-)
> 
> diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.c
> b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.c
> index b474f8d..9b7b88c 100644
> --- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.c
> +++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.c
> @@ -6,7 +6,7 @@
> 
>It would expose EFI_SD_MMC_PASS_THRU_PROTOCOL for upper layer use.
> 
> -  Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
> +  Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved.
>Copyright (c) 2015 - 2019, Intel Corporation. All rights reserved.
>This program and the accompanying materials
>are licensed and made available under the terms and conditions of the BSD
> License
> @@ -666,8 +666,12 @@ SdMmcPciHcDriverBindingStart (
>  // If any of the slots does not support 64b system bus
>  // do not enable 64b DMA in the PCI layer.
>  //
> -if (Private->Capability[Slot].SysBus64V3 == 0 &&
> -Private->Capability[Slot].SysBus64V4 == 0) {
> +if ((Private->ControllerVersion[Slot] == SD_MMC_HC_CTRL_VER_300 &&
> + Private->Capability[Slot].SysBus64V3 == 0) ||
> +(Private->ControllerVersion[Slot] == SD_MMC_HC_CTRL_VER_400 &&
> + Private->Capability[Slot].SysBus64V3 == 0) ||
> +(Private->ControllerVersion[Slot] >= SD_MMC_HC_CTRL_VER_410 &&
> + Private->Capability[Slot].SysBus64V4 == 0)) {
>Support64BitDma = FALSE;
>  }
> 
> diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h
> b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h
> index 1bb701a..8846fde 100644
> --- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h
> +++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h
> @@ -2,7 +2,7 @@
> 
>Provides some data structure definitions used by the SD/MMC host
> controller driver.
> 
> -Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
> +Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved.
>  Copyright (c) 2015, Intel Corporation. All rights reserved.
>  This program and the accompanying materials
>  are licensed and made available under the terms and conditions of the BSD
> License
> @@ -145,13 +145,15 @@ typedef struct {
>EFI_PHYSICAL_ADDRESSDataPhy;
>VOID*DataMap;
>SD_MMC_HC_TRANSFER_MODE Mode;
> +  SD_MMC_HC_ADMA_LENGTH_MODE  AdmaLengthMode;
> 
>EFI_EVENT   Event;
>BOOLEAN Started;
>UINT64  Timeout;
> 
>SD_MMC_HC_ADMA_32_DESC_LINE *Adma32Desc;
> -  SD_MMC_HC_ADMA_64_DESC_LINE *Adma64Desc;
> +  SD_MMC_HC_ADMA_64_V3_DESC_LINE  *Adma64V3Desc;
> +  SD_MMC_HC_ADMA_64_V4_DESC_LINE  *Adma64V4Desc;
>EFI_PHYSICAL_ADDRESSAdmaDescPhy;
>VOID*AdmaMap;
>UINT32  AdmaPages;
> diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c
> b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c
> index d73fa10..6fefed1 100644
> --- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c
> +++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c
> @@ -6,7 +6,7 @@
> 
>It would expose EFI_SD_MMC_PASS_THRU_PROTOCOL for upper layer use.
> 
> -  Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
> +  Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved.
>Copyright (c) 2015 - 2019, Intel Corporation. All rights reserved.
>This program and the accompanying materials
>are licensed and made available under the terms and conditions of the BSD
> License
> @@ -1010,16 +1010,28 @@ SdMmcHcInitV4Enhancements (
>if (ControllerVer >= SD_MMC_HC_CTRL_VER_400) {
>  HostCtrl2 = SD_MMC_HC_V4_EN;
>  //
> -// Check if V4 64bit support is available
> +

Re: [edk2] [PATCH v2] MdeModulePkg/SdMmcPciHcDxe: Add V3 64b DMA Support

2019-03-10 Thread Wu, Hao A

Ashish and Eugene,

The patch has been pushed as commit:
690d60c0ada5ff137c84982220b3fdd112697aa3

Thanks a lot for the contribution and testing effort.

Best Regards,
Hao Wu


> -Original Message-
> From: Wu, Hao A
> Sent: Thursday, March 07, 2019 9:33 AM
> To: Ashish Singhal; edk2-devel@lists.01.org
> Cc: eug...@hp.com
> Subject: RE: [PATCH v2] MdeModulePkg/SdMmcPciHcDxe: Add V3 64b DMA
> Support
> 
> Ashish,
> 
> Thanks for the contribution.
> Reviewed-by: Hao Wu 
> 
> I will push this one after the release tag is created.
> 
> Best Regards,
> Hao Wu
> 
> 
> > -Original Message-
> > From: Ashish Singhal [mailto:ashishsin...@nvidia.com]
> > Sent: Wednesday, March 06, 2019 10:05 PM
> > To: edk2-devel@lists.01.org
> > Cc: Wu, Hao A; eug...@hp.com; Ashish Singhal
> > Subject: [PATCH v2] MdeModulePkg/SdMmcPciHcDxe: Add V3 64b DMA
> > Support
> >
> > Driver was supporting only 32b DMA support for V3 controllers. Add
> > support for 64b DMA as well for completeness.
> >
> > For V4.0 64b support, driver was looking at incorrect capability
> > register bit. Fix for that is present as well.
> >
> > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1583
> > Contributed-under: TianoCore Contribution Agreement 1.1
> > Signed-off-by: Ashish Singhal 
> > ---
> >  MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.c |  10 +-
> >  MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h |   6 +-
> >  MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c   | 189
> > ++---
> >  MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.h   |  29 +++-
> >  4 files changed, 161 insertions(+), 73 deletions(-)
> >
> > diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.c
> > b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.c
> > index b474f8d..9b7b88c 100644
> > --- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.c
> > +++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.c
> > @@ -6,7 +6,7 @@
> >
> >It would expose EFI_SD_MMC_PASS_THRU_PROTOCOL for upper layer
> use.
> >
> > -  Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
> > +  Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved.
> >Copyright (c) 2015 - 2019, Intel Corporation. All rights reserved.
> >This program and the accompanying materials
> >are licensed and made available under the terms and conditions of the
> BSD
> > License
> > @@ -666,8 +666,12 @@ SdMmcPciHcDriverBindingStart (
> >  // If any of the slots does not support 64b system bus
> >  // do not enable 64b DMA in the PCI layer.
> >  //
> > -if (Private->Capability[Slot].SysBus64V3 == 0 &&
> > -Private->Capability[Slot].SysBus64V4 == 0) {
> > +if ((Private->ControllerVersion[Slot] == SD_MMC_HC_CTRL_VER_300
> &&
> > + Private->Capability[Slot].SysBus64V3 == 0) ||
> > +(Private->ControllerVersion[Slot] == SD_MMC_HC_CTRL_VER_400
> &&
> > + Private->Capability[Slot].SysBus64V3 == 0) ||
> > +(Private->ControllerVersion[Slot] >= SD_MMC_HC_CTRL_VER_410
> &&
> > + Private->Capability[Slot].SysBus64V4 == 0)) {
> >Support64BitDma = FALSE;
> >  }
> >
> > diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h
> > b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h
> > index 1bb701a..8846fde 100644
> > --- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h
> > +++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h
> > @@ -2,7 +2,7 @@
> >
> >Provides some data structure definitions used by the SD/MMC host
> > controller driver.
> >
> > -Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
> > +Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved.
> >  Copyright (c) 2015, Intel Corporation. All rights reserved.
> >  This program and the accompanying materials
> >  are licensed and made available under the terms and conditions of the BSD
> > License
> > @@ -145,13 +145,15 @@ typedef struct {
> >EFI_PHYSICAL_ADDRESSDataPhy;
> >VOID*DataMap;
> >SD_MMC_HC_TRANSFER_MODE Mode;
> > +  SD_MMC_HC_ADMA_LENGTH_MODE  AdmaLengthMode;
> >
> >EFI_EVENT   Event;
> >BOOLEAN Started;
> >UINT64  Timeout;
> >
> >SD_MMC_HC_ADMA_32_DESC_LINE *Adma32Desc;
> > -  SD_MMC_HC_ADMA_64_DESC_LINE *Adma64Desc;
> > +  SD_MMC_HC_ADMA_64_V3_DESC_LINE  *Adma64V3Desc;
> > +  SD_MMC_HC_ADMA_64_V4_DESC_LINE  *Adma64V4Desc;
> >EFI_PHYSICAL_ADDRESSAdmaDescPhy;
> >VOID*AdmaMap;
> >UINT32  AdmaPages;
> > diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c
> > b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c
> > index d73fa10..6fefed1 100644
> > --- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c
> > +++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c
> > @@ -6,7 +6,7 @@
> >
> >

[edk2] [PATCH v2] MdeModulePkg/SdMmcPciHcDxe: Add V3 64b DMA Support

Re: [edk2] [PATCH v2] MdeModulePkg/SdMmcPciHcDxe: Add V3 64b DMA Support

Re: [edk2] [PATCH v2] MdeModulePkg/SdMmcPciHcDxe: Add V3 64b DMA Support

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