Re: [edk2] [PATCH v6 2/2] MdeModulePkg/SdMmcPciHcDxe: Add SDMMC HC v4 and above Support.
Hello Hao, I have made all the changes as recommended and have submitted patch v7. I have completed all verification as suggested by you and it all seems to be working. I have also made changes for passing controller version through private structure. Thanks Ashish From: Wu, Hao A Sent: Friday, November 30, 2018 1:03:15 AM To: Ashish Singhal; edk2-devel@lists.01.org Subject: RE: [edk2] [PATCH v6 2/2] MdeModulePkg/SdMmcPciHcDxe: Add SDMMC HC v4 and above Support. Hello, Please refer to the inline comments below: > -Original Message- > From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of > Ashish Singhal > Sent: Friday, November 30, 2018 3:15 AM > To: edk2-devel@lists.01.org > Cc: Ashish Singhal > Subject: [edk2] [PATCH v6 2/2] MdeModulePkg/SdMmcPciHcDxe: Add > SDMMC HC v4 and above Support. > > Add SDMA, ADMA2 and 26b data length support. > > If V4 64 bit address mode is enabled in compatibility register, > program controller to enable V4 host mode and use appropriate > SDMA registers supporting 64 bit addresses. > > If V4 64 bit address mode is enabled in compatibility register, > program controller to enable V4 host mode and use appropriate > ADMA descriptors supporting 64 bit addresses. > > If host controller version is above V4.0, enable ADMA2 with 26b data > length support for better performance. HC 2 register is configured to > use 26 bit data lengths and ADMA2 descriptors are configured appropriately. > > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1359 > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Ashish Singhal > --- > MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h | 4 +- > MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c | 328 > ++--- > MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.h | 48 ++- > 3 files changed, 322 insertions(+), 58 deletions(-) > > diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h > b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h > index 8c1a589..3af7c95 100644 > --- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h > +++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h > @@ -2,6 +2,7 @@ > >Provides some data structure definitions used by the SD/MMC host > controller driver. > > +Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved. > Copyright (c) 2015, Intel Corporation. All rights reserved. > This program and the accompanying materials > are licensed and made available under the terms and conditions of the BSD > License > @@ -150,7 +151,8 @@ typedef struct { >BOOLEAN Started; >UINT64 Timeout; > > - SD_MMC_HC_ADMA_DESC_LINE*AdmaDesc; > + SD_MMC_HC_ADMA_32_DESC_LINE *Adma32Desc; > + SD_MMC_HC_ADMA_64_DESC_LINE *Adma64Desc; >EFI_PHYSICAL_ADDRESSAdmaDescPhy; >VOID*AdmaMap; >UINT32 AdmaPages; > diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c > b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c > index 598b6a3..debc3be 100644 > --- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c > +++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c > @@ -4,6 +4,7 @@ > >It would expose EFI_SD_MMC_PASS_THRU_PROTOCOL for upper layer use. > > + Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved. >Copyright (c) 2015 - 2017, Intel Corporation. All rights reserved. >This program and the accompanying materials >are licensed and made available under the terms and conditions of the > BSD License > @@ -418,6 +419,36 @@ SdMmcHcWaitMmioSet ( > } > > /** > + Get the controller version information from the specified slot. > + > + @param[in] PciIo The PCI IO protocol instance. > + @param[in] SlotThe slot number of the SD card to send the > command to. > + @param[out] Version The buffer to store the version information. > + > + @retval EFI_SUCCESS The operation executes successfully. > + @retval Others The operation fails. > + > +**/ > +EFI_STATUS > +SdMmcHcGetControllerVersion ( > + IN EFI_PCI_IO_PROTOCOL *PciIo, > + IN UINT8Slot, > + OUT UINT16 *Version > + ) > +{ > + EFI_STATUSStatus; > + > + Status = SdMmcHcRwMmio (PciIo, Slot, SD_MMC_HC_CTRL_VER, TRUE, > sizeof (UINT16), Version); > + if (EFI_ERROR (Status)) { > +return Status; > + } > + > + *Version &= 0xFF; > + > + return EFI_SUCCESS; > +} > + > +/** >Software reset the specified SD/M
Re: [edk2] [PATCH v6 2/2] MdeModulePkg/SdMmcPciHcDxe: Add SDMMC HC v4 and above Support.
Hello, Please refer to the inline comments below: > -Original Message- > From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of > Ashish Singhal > Sent: Friday, November 30, 2018 3:15 AM > To: edk2-devel@lists.01.org > Cc: Ashish Singhal > Subject: [edk2] [PATCH v6 2/2] MdeModulePkg/SdMmcPciHcDxe: Add > SDMMC HC v4 and above Support. > > Add SDMA, ADMA2 and 26b data length support. > > If V4 64 bit address mode is enabled in compatibility register, > program controller to enable V4 host mode and use appropriate > SDMA registers supporting 64 bit addresses. > > If V4 64 bit address mode is enabled in compatibility register, > program controller to enable V4 host mode and use appropriate > ADMA descriptors supporting 64 bit addresses. > > If host controller version is above V4.0, enable ADMA2 with 26b data > length support for better performance. HC 2 register is configured to > use 26 bit data lengths and ADMA2 descriptors are configured appropriately. > > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1359 > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Ashish Singhal > --- > MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h | 4 +- > MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c | 328 > ++--- > MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.h | 48 ++- > 3 files changed, 322 insertions(+), 58 deletions(-) > > diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h > b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h > index 8c1a589..3af7c95 100644 > --- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h > +++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h > @@ -2,6 +2,7 @@ > >Provides some data structure definitions used by the SD/MMC host > controller driver. > > +Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved. > Copyright (c) 2015, Intel Corporation. All rights reserved. > This program and the accompanying materials > are licensed and made available under the terms and conditions of the BSD > License > @@ -150,7 +151,8 @@ typedef struct { >BOOLEAN Started; >UINT64 Timeout; > > - SD_MMC_HC_ADMA_DESC_LINE*AdmaDesc; > + SD_MMC_HC_ADMA_32_DESC_LINE *Adma32Desc; > + SD_MMC_HC_ADMA_64_DESC_LINE *Adma64Desc; >EFI_PHYSICAL_ADDRESSAdmaDescPhy; >VOID*AdmaMap; >UINT32 AdmaPages; > diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c > b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c > index 598b6a3..debc3be 100644 > --- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c > +++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c > @@ -4,6 +4,7 @@ > >It would expose EFI_SD_MMC_PASS_THRU_PROTOCOL for upper layer use. > > + Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved. >Copyright (c) 2015 - 2017, Intel Corporation. All rights reserved. >This program and the accompanying materials >are licensed and made available under the terms and conditions of the > BSD License > @@ -418,6 +419,36 @@ SdMmcHcWaitMmioSet ( > } > > /** > + Get the controller version information from the specified slot. > + > + @param[in] PciIo The PCI IO protocol instance. > + @param[in] SlotThe slot number of the SD card to send the > command to. > + @param[out] Version The buffer to store the version information. > + > + @retval EFI_SUCCESS The operation executes successfully. > + @retval Others The operation fails. > + > +**/ > +EFI_STATUS > +SdMmcHcGetControllerVersion ( > + IN EFI_PCI_IO_PROTOCOL *PciIo, > + IN UINT8Slot, > + OUT UINT16 *Version > + ) > +{ > + EFI_STATUSStatus; > + > + Status = SdMmcHcRwMmio (PciIo, Slot, SD_MMC_HC_CTRL_VER, TRUE, > sizeof (UINT16), Version); > + if (EFI_ERROR (Status)) { > +return Status; > + } > + > + *Version &= 0xFF; > + > + return EFI_SUCCESS; > +} > + > +/** >Software reset the specified SD/MMC host controller and enable all > interrupts. > >@param[in] PrivateA pointer to the SD_MMC_HC_PRIVATE_DATA > instance. > @@ -776,18 +807,19 @@ SdMmcHcClockSupply ( > >DEBUG ((DEBUG_INFO, "BaseClkFreq %dMHz Divisor %d > ClockFreq %dKhz\n", BaseClkFreq, Divisor, ClockFreq)); > > - Status = SdMmcHcRwMmio (PciIo, Slot, SD_MMC_HC_CTRL_VER, TRUE, > sizeof (ControllerVer), ); > + Status = SdMmcHcGetControllerVersion (PciIo, Slot,