[PSES] Reading or Limit Conversion?

2019-10-27 Thread itl-emc user group 
A number of standards list radiated emission limits in the frequency range of 
30-1000 MHz for test distance greater than 3 or 10 meters.
Testing is normally performed at either 3 meters or 10 meters on an Open Area 
Test Site.
A question has arisen concerning reporting the test results in these cases.
Any opinions concerning which should be converted:

  1.  Convert the limit to the relevant test distance (3 meters or 10 meters) 
by adding correction factor or
  2.  Convert the reading to the unit and test distance listed in the standard 
(convert dBµV to µV and add correction factor for distance)
On some occasions I have seen option b. above used.
Which option is preferable?
All opinions welcome

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Re: [PSES] Terminal block pitch pcb creepage/clearance 400VL:N/G; 600/690 L:L CAT III, PD2, 3Km elevation

2019-10-27 Thread Chris Wells 
John  thanks for the feedback, that is the plan so far.

Down side of the smaller terminal is basically image/security of the connection.

Also it means another semi-custom terminal plug/header arrangement.

I am considering using a snap on cover or a plug with strap down plate to hold 
the wires securely with nylon tie wrap.

Product should not be accessible when mains are powered without adequate PPE.

 

Chris

 

From: John Woodgate  
Sent: Saturday, October 26, 2019 4:11 PM
To: EMC-PSTC@LISTSERV.IEEE.ORG
Subject: Re: [PSES] Terminal block pitch pcb creepage/clearance 400VL:N/G; 
600/690 L:L CAT III, PD2, 3Km elevation

 

If you have room for the 7-position block, go for it to save a lot of argument 
about other 'solutions'.

Best wishes
John Woodgate OOO-Own Opinions Only
J M Woodgate and Associates www.woodjohn.uk  
Rayleigh, Essex UK

On 2019-10-26 20:36, Chris Wells wrote:

I want to monitor mains of polyphase power systems VA/VB/VC/VN using EN/UL 
61010-1

Ratings: 400VL:N/G; 600/690 L:L CAT III, PD2, 3Km elevation

Issue I see is to get the phase to phase spacings on my terminal block.

Requirements in Annex K are 5.5mm at 2Km but go up to ~ 6.3mm at 3Km.

 

I would like to use a 4 position 7.62mm pitch terminal block and with oval pcb 
pads we can manage 5.5mm spacing between the plated through hole pcb pads.

Hope to use a Phoenix Contact Combicon right angle header and matching terminal 
plug.

Wire size max would be 14 AWG.

 

I could slot the pcb between phases and coat the pcb in this area with Humiseal 
or similar.

A competitor is claiming the same specs using same standard using coatings/slot 
 but I do not see how they navigate the standard to claim their ratings


  t

My take on the coating is that just reduces the effective pollution degree and 
the tables give no relief in that regard at PD1.

Q  - can the coating be considered more of a potting?

Q - Are there any angles to pursue that would give use what we want?  Or other 
ideas on how to terminate?

 

An alternative is to use a 5.08mm pitch 7 position terminal block and 
depopulate the even positions.

Most of the larger pitch terminal blocks are designed for high current and are 
too massive.

 

Your thoughts/suggestions?

 

Thanks

 

Chris Wells

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Attachments are not permitted but the IEEE PSES Online Communities site at 
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formats), large files, etc.

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Attachments are not permitted but the IEEE PSES Online Communities site at 
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formats), large files, etc.

Website:  http://www.ieee-pses.org/
Instructions:  http://www.ieee-pses.org/list.html (