Re: TC77b Rewrite of 61000-4-2 and 61000-4-4

2002-11-13 Thread Douglas C. Smith


HI Eric and the group,

The main difference in the ESD test is in how the waveform is 
specified. The waveform is not being changed, just  a better 
specification and calibration procedure for the simulator. Some ESD 
simulators may need little or no change while others will need a 
redesign. Some changes to testing procedure will make testing easier to 
pass because the original intent in the test was not explicit enough 
and resulted in overtesting. In any event a new document is sometime in 
the future as far as being in place in the EU requirements.


Since document changes can still take place, it would not be wise to 
change any decisions now, even if you had the draft document. But, to 
keep things in perspective, the price of an ESD simulator a few years 
from now, when the standard MAY be in place, will be small compared to 
your cost if a perfectly good product fails because the simulator can 
pass calibration, yet significantly overstress your equipment compared 
to a different brand of simulator. I think everyone's cost will in fact 
be lower overall.


There has been a tendency lately for chip manufacturers to claim their 
chips pass IEC 61000-4-2 in their advertising. This test was never 
intended for chips and has no methodology to do such a test. The 
wording in the document will make it plain that it is a misapplication 
of 61000-4-2 to test chips with it. Another problem resolved.


Doug

On Tuesday, Nov 12, 2002, at 09:54 US/Pacific, hellflo...@aol.com wrote:



I want to make sure everyone is aware of the tidbit of information Doug
offered on the GR-78 thread.  Readers may want to reconsider capital
equipment purchases of related test equipment, and certainly the 
impact on
manufacturers of sustained product lines (typically industrial) over 
the next

three or four years.

In a message dated 11/11/02 11:08:35 PM, d...@emcesd.com writes:

 Interesting coincidence, I am in Chandler, AZ USA for a meeting of 
IEC

TC77b (high frequency immunity) to rewrite the ESD (61000-4-2) and the
EFT (-4) specs. The new test will be quite different than the existing
one with the main benefit being more repeatable results.




Comment - I applaud efforts to improve a test, however the broad 
impact of
these standards may not help the EMC community gain favor with 
corporate

management.

Best Regards,
Eric Lifsey
e.lif...@ieee.org
http://ewh.ieee.org/r6/utah/

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Re: GR-78 Circuit pack ESD test.

2002-11-12 Thread Douglas C. Smith


Hi Gary,

Can you give us more details? If I remember correctly from my Bell Lab 
days, the circuit pack ESD test I remember was useless as it assumed 
boards were always held by the edges and zapped on a predetermined grid.


If the waveform is slower than IEC 61000-4-2 (801-2 was replaced by 
this) the test is out of date and probably does not correlate to 
whether the board will survive under real conditions. I would only do 
this test for contract requirements (your case?).


Interesting coincidence, I am in Chandler, AZ USA for a meeting of IEC 
TC77b (high frequency immunity) to rewrite the ESD (61000-4-2) and the 
EFT (-4) specs. The new test will be quite different than the existing 
one with the main benefit being more repeatable results.


Doug

On Monday, Nov 11, 2002, at 15:43 US/Pacific, Gary McInturff wrote:



	Anybody know what equipment provides the waveform described above?  
Its much slower than the IEC801 waveform. I tried Keytek and they 
don't have it.

Other suggestions to perform the test - just use the IEC waveform?
Gary

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pwb coupling to surroundings (continued)

2002-10-04 Thread Douglas C. Smith

Hi All,

I have posted at http://emcesd.com the latest Technical Tidbit (picture
link at bottom of page). In April and May, the Technical Tidbit articles
discussed the coupling between a circuit board and a nearby metal plane.
This month, Printed Wiring Board Coupling to a Nearby Metal Plane, Part
3: System Measurements carries the discussion of board coupling to
nearby objects further with measurements on a board in a system
enclosure. Results are dramatic and show that a circuit board is
strongly affected by nearby metal structures.  Data and pictures for the
article were contributed by Neven Pischl of Broadcom.

If you have a topic you would like to see covered in a Technical Tidbit
that fits with the general topics of the website, let me know.

Doug
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Kirchoff and Faraday voltage measurements

2002-09-04 Thread Douglas C. Smith

Hi All,

Well, I have been writing again. This month my article is on voltage
measurements.

Voltage measurements can give misleading results with some measurements
yielding a result that appears nowhere in the circuit of interest! This
month's Technical Tidbit at http://emcesd.com is titled Kirchoff and
Faraday Voltage Measurements - Don't Confuse Them. The article
discusses two types of voltage measurements and why a measurement may
give a result that is quite different than what is happening in the
circuit. The link to the article is the measurement picture at the
bottom of the main page.

Also new on the website is a paper titled A Method of Accurately
Measuring Shielding Effectiveness of Materials in Electronic Products
at the bottom of the Technical Information and Downloads section. This
is a white paper I wrote for one of my clients on measuring shielding
effectiveness of materials that are close to the source (where plane
wave measurements are not valid) such as in a cell phone or other small
hand held device.

For those of you who missed the IEEE EMC Symposium, I will be posting
pictures from the Symposium in a few weeks.

Doug
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active probe issues

2002-08-04 Thread Douglas C. Smith

Hi All,

Most of us use active probes because we believe they have a
high input impedance. However this is not usually the case
in the upper octave of their stated frequency range. My
Technical Tidbit article for August, 2002
(http://emcesd.com) presents measured data on a popular
active probe typical of most on the market. You may be
surprised at the result. I also give an example of a good
active probe that has reasonable input impedance and
response over its stated frequency range in real measurement
situations. Its instruction manual also gives good
equivalent circuits and other data necessary to use an
active probe properly. It is one of the best probe
instruction manuals I have seen relative to the sheer amount
of information given. (I have no connection to or financial
interest in the probe I use for the example, it just happens
to be one of the best I have seen.)

Doug
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EMC test equipment - Cheap!

2002-07-02 Thread Douglas C. Smith

Hi All,

Occasionally, test equipment designed for one use has another use quite
distinct from the intended one, but in another field. Such equipment is
often very inexpensive and yields useful results. In the July Technical
Tidbit at http://www.dsmith.org (or http://emcesd.com), an example is
given of an inexpensive piece of test equipment (about US$110) normally
used by Amateur Radio Operators that can be used in noise, EMC, and SI
design debugging. Several links are given, including one for a ~US$400
instrument that can make complex impedance and other transmission line
measurements.

On a different note, a few weeks ago I taught my high frequency design,
measurement, and debugging course at Oxford University. Oxford is a
great place!! Looking forward to going back.

Doug
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Re: IEC 61000-4-2 ESD 61000-4-5 Surge lower levels

2002-06-10 Thread Douglas C. Smith

Not to mention the vastly different current risetimes. Low voltage
discharges actually have higher di/dt values than high voltage ones (and
therefore higher interference potential).

Doug

don_borow...@selinc.com wrote:
 
 Let me add a bit on the air discharge side.
 
 You will want to do the lower voltage discharge tests because the path the
 discharge takes may change with voltage. I have seen several instances where
 connectors (sub-min D types, if I remember correctly) were mounted on metal
 panels. At higher voltages, the path between the ESD gun and the grounded 
 shell
 of the connector would break down first. At lower voltages, the connector pins
 could be approached without breakdown to the shell, and the discharge would
 occur to the connector pins.
 
 Don Borowski
 Schweitzer Engineering Labs
 Pullman, WA
 
 Pommerenke, David davi...@ece.umr.edu on 06/10/2002 06:36:46 AM
 
 Please respond to Pommerenke, David davi...@ece.umr.edu
 
 To:   Neil Helsby nei...@solid-state-logic.com, 
 emc-p...@majordomo.ieee.org
 cc:   kro...@yahoo.com (bcc: Don Borowski/SEL)
 Subject:  RE: IEC 61000-4-2 ESD  61000-4-5 Surge lower levels
 
 Dear Group,
 
 For most EUTs there is no need to do lower level testing in contact mode ESD.
 The time is better spend (meaning a better test results uncertainty is 
 achieved)
 if the number of discharges is increased at the highest test level (hundreds 
 is
 a good number). Although it is possible that a system fails at e.g., 2 kV
 contact mode (e.g., incomplete reset) and passes at 4 kV contact mode (full
 self-recovering quick reset) the likelyhood of that happening is not that 
 large
 to require it in a standard.
 
 For air discharge lower level testing is needed, as the risetime is often much
 lower at lower voltages. Of course, if no discharge occurs, no further testing
 at even lower levels makes sense.
 
 I do know that what I am saying violates the present IEC 61000-4-2 standard. 
 ut
 it reflects the coming version of IEC 61000-4-2. The standard does not intend 
 to
 protect agains every possible ESD failure.
 
 I would like to receive your input, as I am one of the US-representatives in 
 IEC
 TC77b WG-9 (ESD).
 
 David Pommerenke
 
 -Original Message-
 From: Neil Helsby [mailto:nei...@solid-state-logic.com]
 Sent: Monday, June 10, 2002 4:56 AM
 To: emc-p...@majordomo.ieee.org
 Cc: kro...@yahoo.com
 Subject: Re: IEC 61000-4-2 ESD  61000-4-5 Surge lower levels
 
 I think there are two points here.
 
 1)   If you believe that in the environment in which it will be
 used, your product may be subject to levels in excess of that defined
 in the standard, you must test to that higher level.
 
 2)   Yes, failures can occur at mid range levels. We have just
 recently experienced this problem with ESD. Below about 3.5 kV and
 above about 4.5 kV the product worked fine. But at 4 kV we
 experienced a failure mode. If we had only tested at 8 kV we would
 have missed the problem.
 
  I also had a problem some years ago with mains voltage dips
 to 0V. Having a test set that enabled the period to be varied in ms
 increments, I discovered a problem affecting a voltage regulator.
 When the mains dip was between about 16 ms and 35 ms, the regulator
 went into a bistable mode switching on then off at each pulse.
 Outside these periods, it worked satisfactorily, eventually losing
 output when the period was extended.
 
 The problem with investigating these types of failure is determining
 the size of step between measurements. Too short a step and you will
 be testing forever, too long and you could miss a narrow band of
 problem.
 
 Regards,
 
 Neil Helsby
 
 **
 This email and any files transmitted with it are confidential and
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 are addressed. If you have received this email in error please notify
 the system manager.
 
 This footnote also confirms that this email message has been swept by
 MIMEsweeper for the presence of computer viruses.
 
 www.mimesweeper.com
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Mutual inductance as a troubleshooting tool

2002-06-10 Thread Douglas C. Smith

Hi All,

Mutual inductance can be a powerful debugging tool for problem circuits.
It can also be either a friend or foe in the designs themselves. This
month's Technical Tidbit at http://www.dsmith.org relates direct
measurement of Ldi/dt voltage drop with Mdi/dt of the same voltage.

Often direct measurement of a voltage drop is not possible. This article
shows that Ldi/dt and Mdi/dt measurements can be equivalent. Yet another
use for a probe made out of a paperclip!

Doug
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immunity of a pwb as a function of grounding

2002-05-01 Thread Douglas C. Smith

Hi All,

I have been busy again setting up experiments and taking data on a
circuit board that indicates a design rule for ESD that I have heard
from many sources does not work. I knew this was the case, but thought
some data was in order.

This month, the Technical Tidbit at http://emcesd.com (or alternately
http://www.dsmith.org) investigates the effect of board connections to a
metal plane on its response to ESD. Scroll down to the bottom of the
index page to link to the article. This article builds on the results of
the April Technical Tidbit article where an oscillator was used as the
excitation of a board over a metal plane.

A circuit board from a disk drive was mounted near a metal plane and
measurements of currents in connections to the plane were taken when the
plane was excited by an ESD event. The results are dramatic and a major
design rule about grounding circuit boards for immunity is shown to be
ineffective.

This article shows in a different way how strong the coupling between a
board and a nearby metal plane is.

At first I tried to use a small surface current probe for the
measurement, but a null experiment showed that it was too sensitive to
electric fields so I used a shielded square magnetic loop to make the
measurement.

Doug
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Re: A very nice game

2002-04-24 Thread Douglas C. Smith

Robert,

You do not have to open the attachment on this one at all if you have
IE! Just preview or open the message.
During virus outbreaks, like this one, I use a great webmail reader
mail2web.com to preview my mail before downloading it.

Doug

Robert Wilson wrote:
 
 In spite of the attachment having been removed by the system, it was
 pretty darned obvious what this must have been. It always amazes me that
 people are foolish (stupid?) enough to open attachments to obviously
 suspicious emails like this one, that are from people they don't know,
 and subjects that make no sense.
 
 Bob Wilson
 TIR Systems Ltd.
 Vancouver.
 
 -Original Message-
 From: Bill Ellingford [mailto:bill.ellingf...@motion-media.com]
 Sent: April 24, 2002 4:37 AM
 To: 'jmw'; emc-p...@ieee.org
 Subject: RE: A very nice game
 Importance: High
 
 URGENT
 Please be aware that the above E-mail to the EMC group contained a
 virus.
 Fortunately our system removed it from the message.
 Bill Ellingford
 
 -Original Message-
 From: jmw [mailto:j...@jmwa.demon.co.uk]
 Sent: 24 April 2002 22:59
 To: emc-p...@ieee.org
 Subject: A very nice game
 
 --  Virus Warning Message (on gemini2)
 
 setup.exe is removed from here because it contains a virus.
 
 -
 
 *
 
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Re: A very nice game

2002-04-24 Thread Douglas C. Smith

Hi Chris and the Gang,

It was probably a particularly nasty one called W32/Klez.h@MM which I
have received through other channels several times lately. It is bad
enough that if you actually get infected (McAfee will prevent this if
your DAT files are reasonably new) you have to go into DOS and follow
steps outlined my McAfee to get rid of it as it disables virus scanners.
It appears to exploit an incorrect MIME header which causes IE to do
some nasty things to your computer automatically by just opening or
previewing the message. MAC's and PC's with Netscape Mail do not seem to
be infected. I opened the letter in Netscape Messenger and did not get
either a warning message or an infection. A URL on McAfee about this is:

http://vil.mcafee.com/dispVirus.asp?virus_k=99455

One way to help avoid this type of thing is not to open email larger
than a few tens (a long text message) of kB without knowing before who
sent it and why. Long messages can harbor viruses.

Doug

Chris Chileshe wrote:
 
 Bill,
 
 Do we know which virus it was?
 
 Regards
 
 -Original Message-
 From:   Bill Ellingford [SMTP:bill.ellingf...@motion-media.com]
 Sent:   Wednesday, April 24, 2002 12:37 PM
 To: 'jmw'; emc-p...@ieee.org
 Subject:RE: A very  nice game
 Importance: High
 
 URGENT
 Please be aware that the above E-mail to the EMC group contained a virus.
 Fortunately our system removed it from the message.
 Bill Ellingford
 
 -Original Message-
 From: jmw [mailto:j...@jmwa.demon.co.uk]
 Sent: 24 April 2002 22:59
 To: emc-p...@ieee.org
 Subject: A very nice game
 
 --  Virus Warning Message (on gemini2)
 
 setup.exe is removed from here because it contains a virus.
 
 -
 
 *
 
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Re: Suitable CDN for IEC61000-4-6 ethernet 10/100

2002-04-19 Thread Douglas C. Smith

Hi All,

Just a word of caution about test equipment used to measure EUT
performance, such as a LAN-analyzer or similar equipment that counts
errors. My experience has been that some of this equipment is itself
very susceptible to EMI. In a recent case, I had to move a bit-error
tester to the other side of the lab on the end of a fiber in order for
it not to register errors while testing the EUT. It was so sensitive
that low levels of ESD in the room (not applied to the EUT), that did
not affect the EUT itself, caused the test equipment to register many
false positive error counts.

On a similar point, on that same job, I found the lab scope (a modern 5
GSa/sec unit) was itself susceptible. One of my techniques to measure
EMI induced noise on a board would not work because the scope displayed
more noise with a closed 50 Ohm termination, instead of my measurement
apparatus, on its input BNC than the noise I was trying to measure in 
the first place.

Doug



Gary McInturff wrote:
 
 Yup, when we do immunity testing - we see the occassional crc error 
 or the ilk, but I've never seen a problem with the link. We use an Ixia box 
 to cram data down the lines. There are probably many other traffic generators 
 that will work just fine but none of them are pocket change.
 Gary
 
 -Original Message-
 From: Pommerenke, David [mailto:davi...@ece.umr.edu]
 Sent: Friday, April 19, 2002 8:28 AM
 To: Chris Maxwell; emc-p...@majordomo.ieee.org
 Subject: RE: Suitable CDN for IEC61000-4-6 ethernet 10/100
 
 What you should take into account is the failure criteria for 61000-4-6 as 
 seen by the EU: No degradation beyond manufactueres specification.
 
 Depending on the EUT just a few additional bit-errors at any of the tested 
 frequencies may be a fail. It may not be sufficient to just look at loss of 
 link. In many cases, a low level LAN-analyzer is needed to do this test. 
 Otherwise, effects of lessere severeness than loosing link will not be 
 detected, although they may be a fail of the test.
 
 David Pommerenke
 
 -Original Message-
 From: Chris Maxwell [mailto:chris.maxw...@nettest.com]
 Sent: Friday, April 19, 2002 7:53 AM
 To: emc-p...@majordomo.ieee.org
 Subject: RE: Suitable CDN for IEC61000-4-6 ethernet 10/100
 
 From David Sterner's message:
 Most people use the EM clamp.  We test to EN50130-4 alarm
 system limits:
 10V, pulsed and AM modulated.  The test is trivial because of
 the inherent
 immunity of Ethernet;  be sure you understand the EUT and AE
 port
 partitioning algorithms.
 
 What!  The test is trivial because of the inherent immunity of Ethernet.
 
 The last product that I took through the lab couldn't even take
 3V...heck, the Ethernet cable couldn't even take 3V being put on some of
 the other cables in the chassis.
 
 Now, before everybody sends me design tips for Ethernet immunity...save
 your breath... the chassis was a purchased computer.  It was EMC tested
 (with only a dummy ethernet cable and no traffic, mind you).  And I have
 no design control of the ethernet circuit.  We ended up using shielded
 Ethernet cables and invoking the 3meter rule.
 
 The point that I'm trying to make is...I'm glad that this test is
 trivial for your products.  Obviously, you have a good design
 there(Where were you when we were looking for a compliant mainframe
 to use with our system?)  But this type of immunity performance cannot
 be attributed to all Ethernet ports in general or to the Ethernet
 protocol in general.
 
 Best regards,
 
 Chris Maxwell | Design Engineer - Optical Division
 email chris.maxw...@nettest.com | dir +1 315 266 5128 | fax +1 315 797
 8024
 
 NetTest | 6 Rhoads Drive, Utica, NY 13502 | USA
 web www.nettest.com | tel +1 315 797 4449 |
 
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Capacitive coupling to cables

2002-03-09 Thread Douglas C. Smith

Hi All,

I have posted the latest article on my website at http://emcesd.com:
Cable Effects Pt 3: Capacitive Pickup by Cables in a System

Last month the Technical Tidbit on http://emcesd.com explored inductive
coupling to cables. The article for March discusses capacitive coupling
to cables in a system and how to distinguish it from inductive coupling
by measurement technique. Also shown is how little coupling capacitance
is needed to keep you from shipping a system.

Enjoy! (I enjoy writing these articles and hope most engineers enjoy
reading them!)
Doug
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coupling to cables

2002-02-07 Thread Douglas C. Smith

Hi All,

Well a new month and my typing fingers get restless. After an afternoon
doing experiments, I have come up with some information on coupling from
devices to cables in a system.

Local fields emanating from devices in a system that would normally not
be a problem can induce currents in nearby cables that can cause
significant problems. This month's Technical Tidbit on
http://www.dsmith.org details measurements on the results of inductive
coupling into a cable. The measurements show a dramatic result in terms
of the amplitude of the induced current. Also shown: the relative phase
between two current probe outputs (as seen on a scope or on a spectrum
analyzer using a combiner) can be used to confirm the inductive mode of
coupling (as opposed to the capacitive mode of coupling).

Doug
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[SI-LIST] job postings

2002-01-05 Thread Douglas C. Smith

Hi All,

I have a page on my website where I post both positions available and
persons looking for positions. I do this as a service (no charge for the
posting). Three new positions have been added in the last few days, one
this evening from Maryland. The direct URL of the page is:

http://emcesd.com/jobs/jobpost.htm

This page contains only job posts, no technical stuff or ads.

If you want to post a position feel free to send me an mail and will put
it up for you. If others on this list have similar job posting pages,
perhaps they can also share them also.

Doug
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cable discharge measurements

2002-01-03 Thread Douglas C. Smith

Hi All,

I have seen some postings recently on the technical lists on cable
discharge so I decided to do a few measurements using a simple test
setup.

Cable discharge happens when a cable becomes statically charged and then
is connected to equipment. This can happen by dragging a cable on the
floor or just holding in in your hand as you plug it into equipment.
Lately there have been reports of damage from this effect to computer
interface circuits. This month's  Technical Tidbit on

http://www.dsmith.org

presents the results of measurements on a simplified form of cable
discharge. The data shows high peak currents and high di/dt values as
well. The test setup is simple to make and is useful for other
measurements as well. A similar test setup was used for the Technical
Tidbit on measuring inductor performance at:

http://www.dsmith.org/tt050100.htm

Doug
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Elusive Glitch - Part 3

2001-12-07 Thread Douglas C. Smith

The Elusive Glitch - Part 3

This month on http://www.dsmith.org, the Technical Tidbit is the final
Part 3 of the Elusive Glitch story. The first two articles in October
and November talked about how ESD and other impulsive events can disrupt
measurements on digital circuits. Also covered were techniques for
determining when such disruption is occurring.

Part 3 of the Elusive Glitch for December shows how fields from
impulsive events can be accurately measured. This is not a technique
most of us will use in the lab, but standards committees are using such
methods to write new standards that will show up in our design
requirements in the future.

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Re: Impedance Stabilization Network

2001-11-27 Thread Douglas C. Smith

Hi All,

I suspect that Fischer Custom Communications should have them. Their
website is:

http://www.fischercc.com/

Doug

Heffken, Jan wrote:
 
 Does anybody know of a source of ISN's as required for Telecom Port
 conducted emissions in CISPR 22?
 
 Jan Heffken
 
 Compliance Test Engineer
 Applied Innovation Inc.
 
 j...@aiinet.com
 
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more glitches

2001-11-05 Thread Douglas C. Smith

The Elusive Glitch - Part 2

Hi All,

This month, I describe in my Technical Tidbit article (www.dsmith.org) a
way to accurately pinpoint the source of a waveform glitch. It takes
last month's article one step further than just determining if a glitch
is likely coming from an external source instead of the circuit being
measured.

The technique uses an extra channel(s) of a scope to determine if the
glitch is real or a result of external EMI and is reminiscent of the
amateur radio transmitter hunts I participated in as a teenager (except
in the time domain this time). Knowing this information can save a lot
of engineering time in the lab and has become more important as circuits
and measurement instruments have increased in speed. Equipment can now
be affected by EMI sources that have not been a problem until the last
few years.

Doug
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Re: EFT Failures..Help!

2001-10-23 Thread Douglas C. Smith

Hi Alex and the group,

Often, one is very lucky to be able to fix such a problem while at the
lab. Time there is best spent collecting data on the failure. Things
like the actual failure voltage, cable positioning effects, and the such
are important data that will make your device easier to troubleshoot in
the lab.

There are lots of troubleshooting techniques described on my website
(www.dsmith.org). For instance, trigger a scope from the EFT generator
and then use a magnetic loop (insulated paperclip will do) to trace the
EFT current flow through your product. Once the exact path is known,
often the solution is obvious. Because the EFT signal is (sort of)
continuous and easy to trigger on, I have found EFT problems very easy
to fix. Forget using any commercial scope probes though, they are
useless in an EFT environment, too senstive to stray pickup.

For products with metal enclosures, the balanced coaxial probe described
on my website can measure signal voltages in the presense of ESD or EFT
in equipment. I am working on a new balanced probe design that will work
even better for this use as well as on signals past 1 GHz, but my first
prototypes will not be ready for a few months, too late for your
problem.

Doug

Alex McNeil wrote:
 
 Hi Guys,
 
 I am at an EMC test centre today and tomorrow. Unfortunately, my product
 failed EFT testing on the AC power port at 1KV. This is for various
 combinations of Line, Neutral and Earth (L, N, E, LN, LE, NE and LNE)
 
 My product is Class II, no Earth. It is supplied by an external power
 supply. This supplies SELV to my product. The power supply manufacturer has
 stated that his power supply meets EN61000-4-4 for 2KV and has emailed me
 this report to verify this.
 
 Has anyone got a quick solution to my problem so that I can implement here
 at the EMC test house?
 
 Kind Regards
 Alex McNeil
 Principal Engineer
 Tel: +44 (0)131 479 8375
 Fax: +44 (0)131 479 8321
 email: alex.mcn...@ingenicofortronic.com
 
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wasted engineering effort

2001-10-02 Thread Douglas C. Smith

Hi All,

It seems we spend quite a bit of time tracking down glitches on logic
signals. Once a glitch has been found that appears to be causing a
system to hang-up, reset, or otherwise not perform as
expected..Now what?

All may not be as it appears and if not, a great deal of engineering
time can be wasted. The Technical Tidbit article this month at
www.dsmith.org discusses glitches that appear in scope waveforms that
can lead an engineer or technician on a wild goose chase away from
potential real problems.

The article is located near the bottom of the home page. Just click on
the scope screen picture to read the article.

Doug
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Re: ESD Immunity Testing

2001-09-29 Thread Douglas C. Smith

Hi John and the group,

Some commercial simulators have a lot of multi-gigahertz ringing on
their waveforms but still pass the crude waveform specification. You
might be seeing this energy depending on your brand of simulator. There
has been discussion in the committee on ground lead positioning.
Possibly David Pommerenke can fill you in on the latest as I had to miss
the committee meeting a few weeks ago in Quebec City due to my heavy
involvement with the EOS/ESD Symposium in Portland, OR.

Doug

John Woodgate wrote:
 
 I read in !emc-pstc that Douglas C. Smith d...@emcesd.com wrote (in
 200109281718.naa27...@swiftsure.cnchost.com) about 'ESD Immunity
 Testing', on Fri, 28 Sep 2001:
 Also, the waveform specification in IEC61000-4-2 is currently so poor that
 commercial guns
 having vastly different outputs can pass the test yet affect equipment
 differently.
 
 Would you care to comment on the apparently uncontrolled energy path
 back from the EUT to the 'ground' of the gun? We seem to have these
 picosecond rise-time currents flowing through long bits of wire - maybe
 expensive and arcane wire, but ...
 --
 Regards, John Woodgate, OOO - Own Opinions Only. http://www.jmwa.demon.co.uk
 Eat mink and be dreary!
 
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Re: ESD Immunity Testing

2001-09-28 Thread Douglas C. Smith

Hi Richard and the group,

There are lots of problems with existing standards that would take to long to 
describe here. In 
general, the limits of instrumention and time constraints I think are the main 
reason for existing 
shortcomings. IEC 61000-4-2 is being rewritten and the current draft looks much 
better than the old 
standard, but may not reach acceptance in its present form. I think Michael 
Hopkins of KeyTek has a 
better sense of what is going on with that.

An observation on statistics: Low voltage events are much more common as you 
said. The problem 
comes in that low voltage events are more likely to cause upset with many forms 
of equipment as 
the di/dt is much higher than for high voltage events. The current IEC waveform 
is much too slow to 
model a low voltage event and so would not be a good predictor of field 
performance. As equipment 
goes to faster speeds (higher bandwidth) this effect becomes more important.

I have observed equipment upset many times from ESD events with current 
risetimes on the order 
of tens of picoseconds! Compare that to the 700 ps to 1 ns risetime of the IEC 
waveform and you 
see what I mean.

Also, the waveform specification in IEC61000-4-2 is currently so poor that 
commercial guns 
having vastly different outputs can pass the test yet affect equipment 
differently. This was less of a 
problem several years ago when equipment was slower. The standard was based 
upon 
instrumentation that was available at the time it was written.

Adding all this to what you have said, it is not hard to see why ESD testing 
results often seem like 
magic. A quote I saw sometime ago (forgot source) said:

Any process with a sufficiently high number of incontrolled parameters seems 
like magic.

Doug

 wo...@sensormatic.com wrote:
 
 Since my last posting on trying to find an ESD expert, I have had to become
 that expert. After reading the ANSI ESD standard and its references, it is
 clear that ESD experts are mostly in agreement on how to correctly perform
 ESD immunity testing. It is also clear test methods in the EN/IEC
 specifications do not follow that advice.
 
 ESD testing is a statistical process, so the test methods and the analysis
 of the results must be based upon statistics. There are three basic causes.
 
 1) The distribution of ESD events in the operating environment has a
 non-uniform distribution where the number of expected events per hour is
 inversely proportional to approximately the square of the voltage. This
 implies in testing that the number of applied zaps in testing and their
 levels should also follow this distribution.
 
 2) Digital devices are state machines and some states may be less immune to
 ESD than other states. This implies that each state should be tested.
 However, most digital devices have a huge number of states and they change
 very quickly; therefore, the only way to ensure that even most of the states
 have been evaluated is to apply a very large number of zap. 
 
 3) There may be a probability distribution for the locations on the machine
 where an ESD discharge is likely to occur. That is, it is not always equally
 likely that a person or an object will come in contact with any given point
 on any given surface.
 
 Statistics can be used to determine the voltage levels that should be
 applied and the quantity required at each level in order to provide a
 specified confidence level that a machine will have no more than a specified
 number of errors per unit time. However, the number of zaps required is very
 high, usually in the order of one to ten thousand. The drawback, of course,
 it that the testing can be time consuming. However, applying in the order of
 one hundred zaps to a machine according to the EN/IEC specifications will
 provide such a very, very low confidence level that one cannot reasonably
 predict the expected error rate in the field. Worst, the results are not
 repeatable since some states may be tested during one test session and
 others may be tested during another session. The only predictable case where
 this might not occur would be with a machine with an ESD robustness level
 for all states that are far above the actual test levels.
 
 So here is my question to those of you involved in the EN/IEC standards -
 why have these statistical test processes not been  acknowledged in the
 standards?
 
 Richard Woods
 
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paper posted

2001-09-17 Thread Douglas C. Smith

Hi All,

I have posted the paper I just delivered at the EOS/ESD Symposium in
Portland, OR titled The EMI/ESD Environment of Large Server
Installations. If you work a server company, supplier to such, or in an
organization that maintains servers, you may be interested in this
paper.

It is posted in pdf format on my site at:

http://www.dsmith.org

The link is in the blue tint area near the top of the page where news
items are located and in the list of papers further down the page.

Doug
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FET probe caution

2001-09-05 Thread Douglas C. Smith

Hi All,

Did you know that a common accessory for FET probes can, in some cases,
cause a significant error in the measurement? My September Technical
Tidbit at:

http://www.dsmith.org

describes the problem.

The accessory in question is a probe tip with a small ground spring or
pin on a hinge and uses a small ferrite core to improve probe
response. Its use can make the FET probe ten times more sensitive to
logic noise on the board and other EMI that you are not trying to
measure. Such a sensitivity can cause one to see a glitch that is not
there on a logic signal, a real time burner in the development lab or
troubleshooting environment. The article presents scope data to show the
magnitude of the problem which affects several brands of FET probes.

The Technical Tidbit area is at the bottom of the index page.

--

In addition, I have posted pictures to the website from Montreal and the
IEEE EMC
Symposium that was held there a few weeks ago. The link to the pictures
is just above the Technical Tidbit area at the bottom of the index page.

Doug
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Re: STP vs FTP Ethernet cables

2001-09-03 Thread Douglas C. Smith

Hi Paolo,

I worked for a few years in the part of Bell Labs that was involved with
networking cable systems several years ago. I am suspicious of foil
shielded cables as it is difficult to properly terminate the foil shield
(360 degrees). I have had a foil shield crack and split if the cable is
flexed very much.

On a related topic, a good UTP (unshielded twisted pair) system can have
lower emissions and higher immunity than most shielded systems. The
interface design is not hard to do to make this happen. I have seen
cases where the presense of the shield causes immunity problems because
a large noise current lands on the chassis of the data equipment. It
there are slits and holes in the chassis (back of a PC?) problems
result. Take a peek at the paper:

http://www.dsmith.org/pdf/roma94.pdf

which I authored several years ago and presented at the EMC Roma
conference. In that paper a couple of commercial STP systems were
compared with a good UTP system at a test lab in Switzerland. The UTP
system won hands down on both emissions and immunity! The presense of a
shield, by itself, does not guarantee good performance. I seem to
remember also that the shielded systems had higher losses for signal
transmission than UTP which resulted in shorter permissable cable
lengths.

Paolo, we can go offline if you want to discuss more details. Either
call or email me.

Doug

Paolo Roncone wrote:
 
 Hi all,
 
 anybody out there can explain the difference between FTP (Foiled
 Twisted Pair) and STP (Shielded Twisted Pair) cables used for Ethernet
 links.
 In Ethernet standard IEEE 802.3 (2000) I find only a definition of STP
 (herebelow in copied and pasted from the standard - page 28):
 In a vendor's catalog, I found a definition of FTP as
 
 1.4.249 shielded twisted-pair (STP)cable: An electrically conducting
 cable,comprising one or more ele-
 ments,each of which is individually shielded.There may be an o erall
 shield,in which case the cable is
 referred to as shielded twisted-pair cable with an o erall shield
 (from ISO/IEC 11801:1995).Speci .cally
 for IEEE 802.3 100BASE-TX,150 . balanced inside cable with performance
 characteristics speci .ed to
 100 MHz (i.e.,performance to Class D link standards as per ISO/IEC
 11801:1995).In addition to the
 requirements speci .ed in ISO/IEC 11801:1995,IEEE 802.3 Clauses 23 and
 25 provide additional perfor-
 mance requirements for 100BASE-T operation o er STP.
 
 The reason of my inquiry is that we bought samples of STP and FTP
 cat.5 cables for 10bT ethernet applications from different vendors and
 to our surprise we discovered that both STP and FTP types have an
 overall (external) shield made of aluminum foil, but no shields on
 individual wires or wire couples (as per 802.3 definition above).
 
 Any inputs, suggestions etc. would be appreciated.
 
 Paolo
 
 ---
 Paolo Roncone
 EMC Compliance Engineer - Cisco Photonics Italy
 via Philips 12 - Monza (MI) 20052
 mailto:pronc...@cisco.com
 phone: +39 039209 1538
 fax: +39 039209 2036

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Re: ESD Testing

2001-08-15 Thread Douglas C. Smith

Richard,

With today's faster circuits low voltage evernts may be more
likely a problem than high voltage ones. Low voltage air
discharges have much higher di/dt (and therefore
interference potential) than high voltage events. A device
that passes 15kV may easily fail at 1 kV because the di/di
at 1 kV is MUCH higher if it uses logic with sub-nanosecond
risetimes.

Doug

wo...@sensormatic.com wrote:
 
 Do any of you perform ESD testing at or above 15 kV to improve product
 robustness? I have the following questions.
 
 o   What types of products
 o   What type of user environment
 o   What is the rational for testing above 15 kV
 o   What test equipment is used above 15 kV
 o   What test procedure is used above 15kV
 o   What is the pass/fail criteria above 15 kV
 
 Thanks, Richard Woods
 
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[SI-LIST] Immunity troubleshooting technique

2001-08-05 Thread Douglas C. Smith

Hi All,

Well, its that time of the month when I get an itch to write something.
So here goes

Troubleshooting intermittent design problems can be a real time and
resource burner in the development lab. Sometimes intermittent problems
can be caused by lack of system immunity to noise on system cables. This
month's technical tidbit at www.dsmith.org covers a technique for
determining the magnitudes and relative directions of noise currents on
system cables. This information can often lead to a solution of the
problem. In addition, a design technique for minimizing system
sensitivity to noise currents on cables is discussed. A modem example is
used to show how the method is applied and scope data is used to
illustrate how the data is interpreted.

Doug
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Re: SONET ESD performance

2001-07-25 Thread Douglas C. Smith

Hi Scott and the group,

Just a thought... If the equipment you are testing responds unfavorably
to something the environment, it does not matter that you pass GR-1089.
And, I have seen lots of stuff that affected lightwave equipment not
covered under 1089 that got the operating companies pretty upset. For
example, jingling change (we had a discussion some time ago on this list
about this), but there are others.

The customer expects the equipment to work the way he wants, not the way
we design or the marketing org sells it, or the way it is tested. Give
me a call or send email and I will briefly fill you in on what I have
seen. It would be difficult to type it all here.

Doug

Scott Lemon wrote:
 
 Hi group,
 I am looking for guidance with respect to allowable service-affecting
 responses for a SONET system (e.g. OC-48) when tested to GR-1089 ESD
 immunity requirements.  GR-1089 R2-3 states that service-affecting
 responses, unless within system operating limits,...shall not occur.
 Para. 2.3 gives maximum of one errored second per discharge as a limit
 on bit errors, but no other specific guidance.  Anyone out there willing
 to share their GR-1089 pass/fail criteria for ESD testing on a SONET
 system with respect to performance during the discharge??  Are there any
 documents that are recommended as reference?
 
 Thanks in advance!
 
 Regards,
 Scott Lemon
 sle...@caspiannetworks.com
 
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cable shielding effectiveness

2001-07-04 Thread Douglas C. Smith

Hi All,

What do an AM radio, a copper tape spark gap, two paper cups, and a
cable have in common? Together they can be used as a quick way to
evaluate the relative shielding effectiveness of a shielded cable. 

This month's Technical Tidbit at http://www.dsmith.org uses the copper
foil spark gap of last month's Technical Tidbit to generate severe EMI
for testing the relative shielding effectiveness of a shielded cable.
Data is presented for two different grades of RG-58/U cable. It could
equally well be used to get an idea of the immunity level of a printed
wiring board or electronic system. Techniques such as this can get you
out of a tight spot in the lab while trying to debug a system. It seems
the right equipment is never available so quick and easy tests such as
this can be a real time saver.

Also posted are pictures (link is just above the Technical Tidbit
article at the bottom of the index page) of London and Oxford in England
taken while on a trip to teach my high frequency measurement and design
course at Oxford University last week. Enjoy!

Doug
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Static to dynamic field converter

2001-06-05 Thread Douglas C. Smith

Hi All,

It is amazing what can be accomplished with simple, inexpensive test
fixtures when it comes to debugging designs. The Technical Tidbit this
month on www.dsmith.org describes a simple structure that generates
repeatable, intense EMI useful for finding weaknesses in system designs.
It also makes a good science fair
project for a student. This article is a continuation of last month's
article titled Hidden Threats to Electronic Equipment and is located
near the bottom of the index page. The material cost for this gaget is
about US$1 and it takes just a few minutes to build.

Doug
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Re: EMC Courses in Europe

2001-05-11 Thread Douglas C. Smith

Hi Gunter and the group,

The following link will take you to the Oxford University
that has several short courses you may find interesting:

http://www.conted.ox.ac.uk/ousep/

Doug

gunter_j_ma...@embraco.com.br wrote:
 
 Colleagues
 
 I am looking for short (a week maximum) EMC courses in Europe during 2001.
 
 Topics of interest are :
 - EMC Design principles;
 - Suppression techniques for Burst, conducted EMI;
 - EMC x PCB design;
 - Measurement environments and testing (laboratory setup);
 - EMC standards (for Europe);
 - Practical demonstrations.
 
 Suggestions are welcome.
 
 Thanks
 
 Günter J. Maass
 Power Electronics Engineering
 EMBRACO S.A.
 Brazil
 
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[SI-LIST] : Multi-GHz EMI from a static (DC) field

2001-05-03 Thread Douglas C. Smith
Hi All,

It is a new month and here is my latest article.

Doug

Hidden Threats to Electronic Equipment

Sometimes the connection between equipment malfunction and
its cause can be difficult to make. This month's Technical
Tidbit at http://www.dsmith.org covers a hidden form of ESD
that has caused design engineers a lot of trouble in recent
years. The article describes how simply bringing a coffee
cup (or other object)that has a static charge near a piece
of equipment can, under the right conditions, cause strong
EMI with bandwidths to several GHz to originate inside of
the equipment! Also described is a method to know when it
is happening and to measure the potential for problems from
the EMI.

Click on the picture of the CD Player and coffee cup to see
the article.
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Re: ESD generators max Contact discharge level

2001-04-21 Thread Douglas C. Smith

Hi Glyn,

Here is one way to approach 30kV. First, slide out of your car seat, the
Ford Taurus is great for this effect. This puts a charge on your behind.
As you get out of the car (everything is plastic so you remain charged
with respect to the car) your voltage rises because Q=CV. Q stays the
same (charge on your behind) but since C to the car goes down, voltage
goes up. Then you go to close the metal door and a huge spark jumps
between your hand and the door. Usually this results in jumping into the
air muttering a few four letter words sometimes ending in (I am sure
this happens with other cars, I just happen to own Fords, which I like)
F O R D.

I wonder why the car companies don't make seat material out of
anti-static material

BTW, contact discharge has the same risetime at all reasonable voltages,
as opposed to air discharges, but still some equipment will fail at a
low voltage and pass at high voltages. I can imagine a few ways circuits
might do this. The effect is more pronunced with air discharge because
of the risetime dependence on voltage (really arc length and whatever
effects that, including speed of approach).

Doug

Glyn Garside(TUV) wrote:
 
 On the other hand very low voltage (and energy) events, such as jingling
 change have very high di/dt because of the tens of ps risetimes that
 occur at low voltage.
 
 I think this is why, as I recall, some (maybe all?) IEC standards require
 you to test not only to the ESD level indicated, but also the lower levels
 too. For example, if you are required to test at level 4, you are also
 required test at levels 3, 2 and 1.  This is counter-intuitive -- Surely
 the highest voltage is the worst case? -- but apparently grounded in good
 physics, which Doug explains better than I would.
 
 PS: As to testing at higher levels than typical IEC values, I have read
 that the human body can, rarely, gain a charge of up to about 30kV(??), in
 conditions of low RH. Others may have better insight into this. Also, some
 manufacturers may want to build some margin into their test results: if
 five samples pass at 8kV, how sure can you be that the next 995 production
 units would also pass?
 
 PPS: I have a question of my own, drifting off topic slightly: if the
 relative humidity was fairly high when you passed the ESD test, and you
 retest (esp. air discharge?, or indirect discharge?) some months later when
 humidity is lower, could the same EUT now fail? (I think the answer is,
 yes?)
 
 Best Regards, Glyn
 
 Glyn R. Garside   (mailto:ggars...@us.tuv.com)
 Senior Engineer, Industrial Machinery Division
 TUV Rheinland of North America, Inc.  (Chicago Office)
 1945 Techny Rd, Unit 4, NORTHBROOK, IL 60062-5357, USA
 http://www.us.tuv.com
 
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Re: ESD generators max Contact discharge level

2001-04-21 Thread Douglas C. Smith

Hi Dan,

Contact discharge is meant to be applied to conductive surfaces. If a
product has a plastic case, breakdown voltage (through seams and holes)
is the important parameter. This is best done with air discharge, the
object of which is not to have one.

Doug

Dan Kinney (A) wrote:
 
 While we're on the topic, I have a question (actually a couple) regarding
 air discharge.  Since contact discharge is the preferred method, as stated
 in an earlier message and in EN61000-4-2, Paragraph 5, why would one perform
 the Air Discharge method?  The same paragraph states Air discharges shall
 be used where contact discharge cannot be applied.  What conditions would
 make it such that contact discharge could not be applied?
 
 Thanks in advance.
 Dan Kinney
 Horner APG
 
  -Original Message-
  From: Douglas C. Smith [SMTP:d...@emcesd.com]
  Sent: Friday, April 20, 2001 2:54 PM
  To:   Terry Meck
  Cc:   emc-p...@ieee.org
  Subject:  Re: ESD generators max Contact discharge level
 
 
  Hi Terry and the group,
 
  Besides the question of finding a generator that can reach the level you
  mention, I am not aware of any natural ESD event that approaches the
  interference potential of even an 8 kV contact discharge. The problem
  comes in that high voltage air discharges have relatively slow
  risetimes, for 16 kV on the order of tens of ns, whereas contact
  discharges maintain a better than 1 ns risetime at all voltages. This
  makes for a much smaller dt to go along with the greater di to make a
  di/dt that is much higher, more than an order of magnitude, than you
  will see for these voltages in nature.
 
  Maybe if you were making atom bomb trigger mechanisms there would be a
  justification for this kind of testing, but not for real equipment.
 
  On the other hand very low voltage (and energy) events, such as jinjling
  change have very high di/dt because of the tens of ps risetimes that
  occur at low voltage. The combination of high voltage (and energy) with
  fast risetimes is too severe and meeting such a test is a waste of money
  for most equipment.
 
  Doug
 
  Terry Meck wrote:
  
   Hello again:
  
   Does anyone recall if there were any standard called for or ESD
  generator that simulated as the case may be =  +-10 kV CONTACT discharge.
  
   We have a customer that is specifying passing +-16 kV ESD without
  referring to AIR or Contact discharge.  I am inclined to ask what they
  have in mind since I have not seen any generators that go that high in the
  Contact mode.
   I suspect the writer of the SOW knows nothing and the engineering group
  only thinks Air Discharge.
  
   What do you all think?
  
   Terry J. Meck
   Accu-Sort Systems Inc.
  
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Re: ESD generators max Contact discharge level

2001-04-20 Thread Douglas C. Smith

Hi Terry and the group,

Besides the question of finding a generator that can reach the level you
mention, I am not aware of any natural ESD event that approaches the
interference potential of even an 8 kV contact discharge. The problem
comes in that high voltage air discharges have relatively slow
risetimes, for 16 kV on the order of tens of ns, whereas contact
discharges maintain a better than 1 ns risetime at all voltages. This
makes for a much smaller dt to go along with the greater di to make a
di/dt that is much higher, more than an order of magnitude, than you
will see for these voltages in nature.

Maybe if you were making atom bomb trigger mechanisms there would be a
justification for this kind of testing, but not for real equipment.

On the other hand very low voltage (and energy) events, such as jinjling
change have very high di/dt because of the tens of ps risetimes that
occur at low voltage. The combination of high voltage (and energy) with
fast risetimes is too severe and meeting such a test is a waste of money
for most equipment.

Doug

Terry Meck wrote:
 
 Hello again:
 
 Does anyone recall if there were any standard called for or ESD generator 
 that simulated as the case may be =  +-10 kV CONTACT discharge.
 
 We have a customer that is specifying passing +-16 kV ESD without referring 
 to AIR or Contact discharge.  I am inclined to ask what they have in mind 
 since I have not seen any generators that go that high in the Contact mode.
 I suspect the writer of the SOW knows nothing and the engineering group only 
 thinks Air Discharge.
 
 What do you all think?
 
 Terry J. Meck
 Accu-Sort Systems Inc.
 
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Looking for alumni

2001-03-19 Thread Douglas C. Smith

Hi All,

Not sure if this the right place to inquire about this, but here goes...

I make electronic updates of my course notes available at no charge to
people who have been students at one of my seminars. I have a good list
of those that have attended my public seminars but my list from private
in-house seminars at companies is not so complete.

If you have attended my two day High Frequency Design/Measurement
seminar in the last 3 or 4 years as a private seminar, send me email and
I will give you instructions on how to download updated course notes. I
have recently overhauled the course notes with lots of new information.
The file sizes have increased about 3X. In the email message state the
company name, city, and date where you attended the seminar.

Doug
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Unusual sources of signal corruption

2001-02-01 Thread Douglas C. Smith

Hi All,

My Technical Tidbit article (http://www.dsmith.org) for this month deals
with signal corruption of digital and analog signals by magnetic fields
emanating from switching power supplies in a system. Because this is an
unlikely source of corruption, it is often overlooked at great expense.
The article covers an easy way to measure these fields to see if you
have a potential problem.

I would be interested in hearing other stories on unusual sources of
signal corruption from others on this list.

Doug
-- 
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It's just a wire, isn't it?

2001-01-02 Thread Douglas C. Smith

Hi All,

After a few weeks of holiday rush, I managed to write my
technical article for January.

And when is a wire, not just a wire?.

After a few month's of articles on measurement techniques,
this month's Technical Tidbit article on www.dsmith.org is
more along the lines of design and system reliability. The
article is about the amazing property of a conductor to
develop significant series voltage drop across its length,
even from an ordinary logic signal. Many engineers and
technicians already know that the inductive reactance of a
conductor exceeds its resistance at most frequencies, but
even logic signals can produce volts of drop across the
inductance in a short wire. The article also contains an
amusing personal experience having to do with this effect. 
Go to http://www.dsmith.org for the article.

I hope everyone had a good holiday season.

Doug
-- 
---
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 \  / )  P.O. Box 1457
  =  Los Gatos, CA 95031-1457
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 /  /\  \ ] /  /\  \ Mobile:  408-858-4528
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 \ _ /]\ _ / Website: http://www.dsmith.org
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Probe construction

2000-12-08 Thread Douglas C. Smith

Hi All,

For those of you who like to tinker in the lab (and
sometimes we have to when the right equipment is not
available), this month's Technical Tidbit (at
http://www.dsmith.org near bottom of index page) describes
how to make a shielded magnetic probe out of common
materials
(no semi-rigid coax needed). Such a probe is useful in many
signal integrity and EMC investigations. Some uses for such
probes are discussed in the paper on the site at

http://www.dsmith.org/pdf/emc99-w.pdf

titled Signal and Noise Measurement Techniques Using
Magnetic Field Probes. Last month's Technical Tidbit showed
how to measure ESD induced interference inside of equipment
using a magnetic field probe.

Doug
-- 
---
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 /  /\  \ ] /  /\  \ Mobile:  408-858-4528
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 \ _ /]\ _ / Website: http://www.dsmith.org
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Resistor design and ESD Symposium pictures

2000-10-02 Thread Douglas C. Smith

Hi All,

The EOS/ESD (electrical overstress/electrostatic discharge)
Symposium was last week in Anaheim, CA, USA. I focused on
the system level effects of ESD, as a source of EMI, as
opposed to controlling static charge. 18 representative
pictures are now posted at www.dsmith.org under
Miscellaneous next to the pictures of Veldhoven and Zug.
Some of the pictures show useful and novel measuring
instruments related to the EMI potential of ESD and other
sources from companies like Barth and Credence as well as
others. If you want to grab a picture, just right click
(on a PC running Windows) the picture and enter the location
where you want it to be stored on your machine. Links to the
websites of the companies whose equipment is shown are also
included in many cases.

The Technical Tidbit for October relates to high frequency
design of resistors for measurement or incorporation into
designs. An example of a resistor from Barth Electronics is
discussed. This is the design Barth uses in his DC to ~20GHz
T-Pad that is described in an earlier Technical Tidbit
titled Tapered Wall Cavity that I posted to the site
exactly one year ago. The picture was taken at the Barth
booth.

Doug
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Re: compactPCI bus

2000-09-20 Thread Douglas C. Smith

Hi Bill,

I missed your original posting (get hundreds of emails
daily). Got to www.cpcibackplanes.com. You may find help
there. That URL is the site of International Product Design,
a local company here in Los Gatos, CA, USA. Shawn Arnold is
one of the principles and I expect he can help.

Doug

Fleury, Bill wrote:
 
 Judging from the number of responses (0) I got to my question about EMI
 problems from compactPCI backplanes I am assumiong that either no one uses
 cPCI backplanes or I'm the only one that has experienced problems when
 testing in this environment. I didn't think that ever happened in this
 group. I'll repost this just in case some of you didn't get the last one.
 
 This is a question regarding systems which use CompactPCI bus architecture.
 On a cPCI backplane the PCI clock is routed to every slot on the backplane
 with up to 7 peripheral slots possible on a normal backplane. My question is
 this: With the cPCI specification calling out specific trace lengths for
 clock traces on both the backplane itself and on peripheral cards, have
 other people experienced any unique EMI problems in trying to meet the
 design constraints associated with this synchronous bus; especially where
 there are unpopulated slots on the backplane?
 
 Please feel free to respond privately if the question is unclear. I wasn't
 sure if it was worded properly.
 
 Thanks,
 
 Bill Fleury
 
 ***Artesyn Communication Products, LLC**
 
 
 Bill Fleury Email: bi...@artesyncp.com
 Compliance Engineer Phone: 608-831-5500
 8310 Excelsior DriveFax:   608-831-8844
 Madison, WI 53717
 
 
 The difficult can be done immediately, the impossible takes a
 little longer  (Army Corp of Engineers)
 
 *** Visit us at www.artesyn.com/cp **
  Bill Fleury (E-mail).vcf

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Data Transmission System paper

2000-09-17 Thread Douglas C. Smith

Hi All,

In response to several requests from members of these lists,
I have posted a paper I authored titled EMC Performance
Comparison of Shielded and Unshielded Data Transmission
Systems presented at EMC'Roma 94. Both emissions and
immunity (corruption or lack thereof of the data) results
are presented. The results showed that a well designed UTP
system (unshielded twisted pair) can perform as well or
better than the commercially available STP (shielded twisted
pair) systems tested. I wrote this paper while I was at ATT
Bell Labs in 1994.

The link to the paper is at http://www.dsmith.org (or
alternately http://emcesd.com) under the heading Technical
Information and Downloads.

Doug
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Re: SAR

2000-09-08 Thread Douglas C. Smith

Hi Ron,

I believe Elliott Labs in Sunnyvale, CA does such testing
and have a very good customer focus.

Doug

ron_cher...@densolabs.com wrote:
 
 I am trying to get a list of labs that can perform SAR testing on the West
 Coast, (CA).
 Thanks, Ron DENSO
 
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Re: Conducted Emissions on Telecom Ports

2000-09-08 Thread Douglas C. Smith

Hi All,

I could not resist adding my two cents worth. In the last
several years I spent at Bell Labs in NJ (moved to CA 4 1/2
years ago), part of my funding came from a group that was
responsible for UTP (Cat 5) and associated hardware. On
immunity performance, we were not able to find a shielded
system that would outperform UTP using the interface
circuits I had design input on. (When I first proposed the
circuitry, the group had an internal Bell Labs balun
expert review it. He did not understand how it worked.)

Emissions were lower compared to several shielded systems we
measured. The data was published at EMC Roma about 1995. If
I can dig it up, I will try to post it to my site later this
month. 

Several formats of data were used including 100 Mb speeds.
We even did a demonstration of a 600 Mb over UTP cable
(section of the cable is within sight at this moment).

The conducted emissions on telecom leads spec was just being
written at that time. As I recall, we were pretty close to
meeting it except the method in the proposed standard was
not workable, so we used current probes and moving the
cables to maximize current (just like RE testing).

The net result is that UTP with the appropriate interface
circuits (not expensive, either) performs quite well
compared to STP systems. If anyone wants more into, email
directly to me and I will try and hook them up with someone
at Bell Labs in NJ who is currently on the project. It's
been a while and I am not sure what the present status of
that work is.

BTW, I recall that starting with a VERY well balanced
source/load, Cat5 cable inherently had about 12 dB better
balance, and therefore performance, than Cat3 for the high
frequency immunity/radiated measurements that I made. I did
not get much into the signal transmission differences
between Cat3 and Cat5 though.

Doug

Gary McInturff wrote:
 
 
 Another little nagging problem exists. Without going into the whole
 historically precedence UTP was a pretty important reason why ethernet was
 adopted so widely. The wiring was pretty much in place because of the cables
 that had been run for connecting office telephones etc. People don't want to
 drag in new cables (STP) because of the cost. I happen to agree with you
 assements below and wouldn't even consider UTP if it weren't for the
 existing installs and the 805 standard that (prefers?) it.
 Thanks
 Gary
 
 -Original Message-

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An interesting source for copper foil tape

2000-09-01 Thread Douglas C. Smith

...and what do slugs and snails have to do with circuit
prototyping, debugging, or EMC work?

Have you ever had a need for copper foil tape on short
notice for circuit prototyping, debugging, or EMC work? This
month's technical tidbit is on a source of such material,
the local hardware store. Details are at
http://www.dsmith.org at the bottom of the index page. The
particular material described is the one I use for most of
my measurement/EMC projects.

The article is shorter than normal this month as I have
spent most of the month on business trips including the IEEE
EMC Symposium and preparing for next month's high frequency
design and measurement public seminar.

Doug
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Shielding Effectiveness - or when a dB is not a dB

2000-08-01 Thread Douglas C. Smith

Hi All,

Shielding effectiveness is normally measured using plane
waves (relatively far from the source). This method of
measurement for shielding effectivenes does not always
correspond to the way a shielding material is used. It is
especially true when shielding material is incorporated
into small products, such as the new wave of wireless
devices on the market. If you rely on shielding to keep
different parts of a product from interfering with each
other, correlation of specification to use is especially
important.

The August 2000 Technical Tidbit on http://www.dsmith.org
(or http://emcesd.com) describes a simple method of
shielding effectiveness measurement that can be easily done
in the development laboratory. This measurement method can
give a better measure of shielding effectiveness that
industry standard measurement techniques when the shield is
close to the source being shielded.

Has anyone here who is into shielding used something like
this method which uses magnetic field loops?

Doug
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[SI-LIST] : Hot ground noise probe

2000-07-03 Thread Douglas C. Smith
Hi All,

I though some of you might enjoy my latest Technical
Tidbit article.

There are many techniques designers have used over the years
to make quiet grounds on circuit boards and in systems.
Sometimes it is done to reduce radiated emissions, other
times to keep noise out of sensitive circuits. For July,
the Technical Tidbit at http://www.dsmith.org (or
alternately http://emcesd.com) describes an easily built
resistive current probe using 6 resistors that among other
uses, can be used to check for noisy grounds on a board or
in a system. The probe is touched to circuit ground and its
output gives an indication of how noisy the ground is and
the likelyhood of the noise causing an emissions problem
from a cable attached to that point of the circuit. Another
use for the probe related to ESD and its theory of operation
are included in the article.

Just above the picture of the homemade resistive current
probe (link to the article) near the bottom of the index
page is a link to some pictures of Los Gatos I took
recently. If you like armchair travel, take a look. The URL
of the pictures is http://emcesd.com/losgatos/index.htm it
you want to go there directly.

Have a good Summer!

Doug

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Probe ground leads

2000-06-15 Thread Douglas C. Smith

Hi All,

Here is some light reading if you are looking for a way to
pass a hot day (it is 109 degrees here in Los Gatos today!)

Often, a probe ground lead is thought of as a source of
error in a measurement. But, the ground lead can also
increase measurement accuracy.

I have posted a supplemental Technical Tidbit for June at
www.dsmith.org on probe ground leads. It located at the
bottom of the index page just below the main Technical
Tidbit for June on 180 degree combiners.

Doug
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Re: Current Limitation for Single-Phase Power in the US and Canada

2000-05-30 Thread Douglas C. Smith

Hi All,

200 Amp single phase service is fairly common in the US (my
present and last house has this service) so I know at least
that much is possible.

Separately, I posted sources for a couple of 180 degree
combiners useful for differential probes at www.dsmith.org
as this month's article. Last month's article was on
measuring high frequency performance of small inductors and
is archived under the Technical Tidbits section.

Doug

Doug wrote:
 
 Peter Merguerian wrote:
 
  Dear All,
 
  I was asked the ampere limitation for single-phase in the US and Canada?
  Can single-phase in the US and Canada handle 100-200 Amperes?
 
 Yes.  Not sure if the question is really asking about
 the max. residential service amperage.
 
 So, for the size of the largest service entrance conductor
 and associated size of grounding conductor, see ...
 
  http://www.cmapc.com/Elect%20Files/EHtmFiles/GECTable250-94.htm
 
 For the associated ampacities of those conductors, see ...
 
  http://www.cmapc.com/Elect%20Files/EHtmFiles/Table310-16.htm
 
 The table maxes out at 705 amps.
 
 To calculate the size of the service needed,
 go to the following webpage, select the cell
 Sizing of Electrical Service, download the
 Excel spreadsheet, and enter the necessary
 info in the yellow squares.
 
  http://www.cmapc.com/_private/electsfr.htm
 
 Regards, Doug McKean
 
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Unusual System Glitchs

2000-03-20 Thread Douglas C. Smith

Hi All,

We discussed at some length jingling change ESD and its
relation to system operation some time ago. Along that
line of unusual sources of system upset is multiple (up
to hundreds) of ESD events in cushions of office chairs
in the minute after a person rises from some chairs. The
energy is radiated from metal legs and has wreaked havoc
with many electronic systems, including those upon which
human lives depend.

I posted over the weekend my EOS/ESD Symposium paper titled
A New Type of Furniture ESD and Its Implications which
describes events of this type. The paper was awarded the
New Phenomena award by the Symposium in 1993, the year
it was published.

You can see the paper at www.dsmith.org. Page down to
Technical Information and Downloads and a link to the PDF
file is listed in that section.

The only evidence the events are happening is the EM fields
radiated from the chair. The events are hidden inside the
chair and not obvious to the person in the chair.

I would be interested in hearing other stories from the group
on system upsets caused by unusual immunity problems.

Doug

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50 Ohm Termination

2000-03-13 Thread Douglas C. Smith

Hi All,

This month's technical tidbit article on www.dsmith.org is an
easier way to construct a 50 Ohm termination good to 1 GHz or
higher. Unlike my previous method, it is not necessary to try
to solder surfact mount resistors to the rim of a BNC barrel
adapter. The termination is useful by itself or as part of a
high frequency probe.

Next month's article will be Paperclips and the Speed of Light.
It will be posted right after the first of the month.

Doug

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1996 IEEE Paper on EFT

2000-01-10 Thread Douglas C. Smith

Hi Again,

I forgot to mention that I also posted my 1996 IEEE paper on an
investigation of the IEC 61000-4-4 Capacitive Clamp. It is under
Technical Information for Download. It covers measurement error and
also data that suggests that the capacitive clamp couples much more
EMI onto I/O leads than can occurs in cable to cable coupling.

Doug

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Displaying measurement error and EFT testing

2000-01-10 Thread Douglas C. Smith

Hi All,

I recently posted this month's article on my website www.dsmith.org.
It shows how to display measurement error of a current measurement
simulataneous to the measurement itself. This method catches almost
all of the possible ways error can work its way into the measurement.

The data I used for the measurement discussion also, as a by-product,
shows how a common measurement error in Electrical Fast Transient (IEC
61000-4-4) testing can nearly double the stress on I/O leads of the
EUT past what the test calls for at a given level. I have seen several
test labs make this mistake, after the fact, by examining photos of
the test setup in the test report. The error has to do with which end
of the capacitive clamp is connected to the EFT generator. It makes a
big difference!

Doug

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Re: 50/75 Ohm pads

1999-12-18 Thread Douglas C. Smith

Hi Jim,

Barth Electronics of Boulder City, NV (702-293-1576) has some of the
highest quality pads on the market with flat frequency response to 20
GHz and some with the ability to take hundreds or thousands of volt
pulses (he designs for a specific voltage coefficient of resistance by
making his own resistors). You can see one of his designs for a T-pad
attenuator in an article I posted on my website in October titled The
Tapered Wall Cavity at http://www.dsmith.org. Jon Barth's designs are
quite elegant and very precise.

Doug


Knighten, Jim L wrote:
 
 Does anyone know where I can purchase 50 Ohm to 75 Ohm coaxial impedance
 matching pads, with low loss that are fixtured for SMA to SMA, or APC 3.5mm
 to APC 3.5mm connectors?
 
 Jim
 
 Dr. Jim Knightene-mail: jim.knigh...@sandiegoca.ncr.com
 mailto:jim.knigh...@sandiego.ncr.com
 Senior Consulting Engineer
 NCR
 17095 Via del Campo
 San Diego, CA 92127 http://www.ncr.com http://www.ncr.com
 Tel: 858-485-2537
 Fax: 858-485-3788
 
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Ferrites can increase emissions?

1999-12-02 Thread Douglas C. Smith

Hi All,

I have noticed (like I expect many of you) that sometimes adding a
ferrite on a cable to suppress common mode current caused emissions
actually increases emissions at some frequencies. After thinking about
this and trying an experiment to confirm one mechanism, I wrote up an
article describing that mechanism. I have posted the article on my
website (emcesd.com or www.dsmith.org) as the Technical Tidbit
article for December.

For the case shown there, a ferrite added at the OPPOSITE end of the
cable from EUT2 would actually reduce emissions from EUT2 at frequency
F2. Whereas if added at EUT2, emissions from EUT2 go down but go up
from EUT1. Sort of an unusual case. Granted this is a special case,
but the result is interesting and suggests lots of other possible
configurations with strange results.

Doug

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 /  /\  \ ] /  /\  \ Mobile:  408-858-4528
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Re: Ferrites can increase emissions?

1999-12-02 Thread Douglas C. Smith

Hi Ralph and all,

Please define ground loop in your reply below. Normally, the term
ground loop only has meaning at low frequencies (60 Hz and DC). At
high frequencies an infinite number of loops exist and they do not
require a conductor to complete them. You need to define exactly the
effect for the particular case below.

The special case in my article goes a level deeper than your
discussion to show that ferrites at one end of a cable can either
increase or decrease emissions from equipment at the opposite end by
either causing an impedance match or mismatch. No ground loops
needed to explain this phenomenon.

Doug


Ralph Cameron wrote:
 
 The purpose of a common mode choke whether it be of ferrite or powdered iron
 is to isolate the connecting conductors from the rest of the mainboard or
 chassis.   If the toridal core is correctly placed as close to the source of
 the emissions i.e. the PCB, the conductors which carry the emitted noise are
 effectively isolated from high frequency noise currents to flow in common
 mode.  The attenutaion will vary acording to the efficiency of the material
 selected and a permeability of a nominal 850 is useful over the range 3-40
 Mhz.
 
 Some of the telphone companies use common mode chokes to attempt to suppress
 induced RF energy on phone lines and sometimes it works.  They alsmot always
 specify placement of the in line encapsulated choke (ATT Z1000) at the wall
 socket.  The amount of connecting cable from the phone to the wall socket is
 a good antenna too so picks up RF and bypasses any effect of the common mode
 choke. Although the problem is removing the condcuted current before it
 becomes a problem , the same principle applies to emitted noise.
 
 In some cases of suppressing consumer equipment there is a dramatic increase
 in sensitvity to conducted currents at different frequencies( usually
 higher) and this requires that the ground loop provided by the power cord be
 isolated from the device.   Inevitably this has cured the problem.  Be aware
 that any cabling connected to a device can radiate as well as conduct
 undesireable energy into the device. Ferrites provide a simple, non
 intrusive, inexpensive solution to such problems.  You will see them on all
 the better quality computer monitors and laptops.
 
 Ralph Cameron
 
 Independant EMC Consultant and suppresion of consumer electronics
 (After sale)
 
 - Original Message -
 From: Douglas C. Smith d...@dsmith.org
 To: emc-pstc emc-p...@majordomo.ieee.org
 Sent: Wednesday, December 01, 1999 9:46 PM
 Subject: Ferrites can increase emissions?
 
 
  Hi All,
 
  I have noticed (like I expect many of you) that sometimes adding a
  ferrite on a cable to suppress common mode current caused emissions
  actually increases emissions at some frequencies. After thinking about
  this and trying an experiment to confirm one mechanism, I wrote up an
  article describing that mechanism. I have posted the article on my
  website (emcesd.com or www.dsmith.org) as the Technical Tidbit
  article for December.
 
  For the case shown there, a ferrite added at the OPPOSITE end of the
  cable from EUT2 would actually reduce emissions from EUT2 at frequency
  F2. Whereas if added at EUT2, emissions from EUT2 go down but go up
  from EUT1. Sort of an unusual case. Granted this is a special case,
  but the result is interesting and suggests lots of other possible
  configurations with strange results.
 
  Doug
 
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=  Los Gatos, CA 95031-1457
 _ / \ / \ _   TEL/FAX: 408-356-4186/358-3799
   /  /\  \ ] /  /\  \ Mobile:  408-858-4528
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|  q

ESD data

1999-10-30 Thread Douglas C. Smith

Hi All,

I have posted on my website the November article. It is related to the
recent ESD and grounding threads on the Si-List and emc-pstc lists. Go
to http://www.dsmith.org or http://emcesd.com and click on the picture
at the bottom of the index page (after trying to guess the answers to
the questions above the picture). Also newly linked on the index page
is October's article on a Tapered Wall Cavity to achieve a T-Pad
design flat to tens of GHz and pictures of Veldhoven, Netherlands
where the recent meeting of TC77B was held. WG9 (charged with
rewriting IEC 61000-4-2) was part of the meeting series that I
attended.

Enjoy,

Doug

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Re: Home-Made RF probes.

1999-10-13 Thread Douglas C. Smith

Hi Kyle,

It is important that the gap in the shield be exactly on the opposite
side of the loop (as I believe you cite in your construction details).
The loops with the gap at the end of the coax that is bent around do not
actually have much electric field shielding. The details are in my paper
from last year's EMC Symposium. The paper in pdf format is on my website
at www.dsmith.org or emcesd.com.

Doug

Ehler, Kyle wrote:
 
 Greetings,
 15 years ago I was doing some work at SWRI in San Antonio where I watched an
 EMC tech construct two RF probes from small diameter copper jacket hardline
 (semi-flex coax?).  These probes resemble a kid's toy soap bubble loop, but
 they work wonderfully well for non-contact source investigation of radiated
 emissions ranging into the Ghz region.  Our lab still uses these for debug
 work to this day, but now they are a bit worn and I suspect they will need
 replacing.  Trouble is, I'm fuzzy on their construction details.  Below,
 please peruse the steps I recall and offer any corrections or improvements.
 I have attached a couple .jpg's for clarity (hope I didn't stretch the
 rules).
 
 -For the high resolution probe (see photos):
 1)  Start with 6 to 8 length of 0.0625 copper jacketed solid conductor
 hardline for 0.5 diameter probe.
 
 2)  Remove 0.125 of jacket and insulation from one end.
 
 3)  Roll-form stripped end of coax into 0.5 diameter loop with exposed
 center conductor and jacket touching probe shaft  jacket.
 
 4)  Solder center conductor of loop to jacket first, then outer jacket
 of coax end to jacket of probe shaft.
 
 5)  With a sharp knife (X-Acto) cut a 0.010 concentric ring out of the
 jacket at the apogee from the probe shaft, exposing the center conductor,
 but not cutting it (ok to leave foam insulation intact).
 
 6)  At other (handle) end of probe shaft, affix a female BNC (or SMA?)
 connector (your choice?) and carefully solder fillet 360' of connector to
 jacket.
 
 7)  Dip finished probe twice into 'Plasti-Dip' of your choice colour.
 Let cure in between coats and before use.
 
 -For a low resolution probe:
 Substitute 0.125 hardline in 1) above.
 Form loop into 2 diameter in 3) above.
 
 The small loop and a wideband preamp is really good for non-invasive
 pinpointing the source of radiation (chip, trace, xtal, etc.).
 
  hi res loop.jpg  hi res probe.jpg
 
 Kyle
 
   
   Name: hi res loop.jpg
hi res loop.jpgType: JPEG Image (image/jpeg)
   Encoding: base64
 
Name: hi res probe.jpg
hi res probe.jpgType: JPEG Image (image/jpeg)
Encoding: base64

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 \  / )  P.O. Box 1457
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Re: Printed Circuit Board Grounding

1999-10-09 Thread Douglas C. Smith

Hi Don,

Each situation should be evaluated on its own merits. I am going to list
some general rules of thumb below, but there may be exceptions. I have
done lots of ESD current measurements in different configurations and
base my opinions on these measurments and personal experience with
equipment.

1) Any piece of metal will absorb high frequency components of ESD from
a wire that it touches, the bigger the metal, the lower the frequency of
components it will remove from the wire. The metal need not be grounded,
its free space capacitance is enough. I have done an experiment that
shows this hundreds of times in my seminars. So if a cable touches its
shield to a metal chassis on the way to a circuit board, the chassis
will remove most of the high frequency components of the ESD.

2) I have observed cases where grounding a PWB to the chassis at many
points solved ESD problems and removing connections caused ESD problems,
but never the other way around although there may be special cases where
it could happen. This is likely related to 1) above. If you have doubt
about a particular configuration, don't guess, measure and see what
really happens. If you are not sure how to do this, call or email me and
I will help you plan an experiment to measure your case over the phone
or email.

3) If you ESD to the outside of a chassis, the currents will stay on the
outside of the chassis because of skin effect. Holes and seams can let
the current in, but the high frequency content will already be reduced
by 1) above. Unless you have gaping holes, multiple connections to the
chassis from the circuit board are not usually a problem (remember this
can be measured).

4) An interesting thought: even 1 pf of capacitance can easily couple a
few amps of ESD current under many conditions so it is almost impossible
to isolate the PWB from the chassis anyway!

Doug

UMBDENSTOCK, DON wrote:
 
 Hello Group,
 
 We are having a debate concerning the best practice for grounding of a
 printed circuit board containing digital logic.  These boards are
 multi-layer with a ground plane and a power plane.
 
 One school of thought is to tie the ground plane to chassis ground in many
 locations, thus reducing the impedance.
 
 Another school of thought says to control the point(s) that is (are) tied to
 ground or risk upsetting of sensitive circuits with an ESD or other immunity
 event.  The concept is that an ESD event may be decoupled to chassis at the
 I/O ground plane with the use of appropriate circuit elements to control
 impedances.  Now consider the chassis to be steel, and the digital ground
 plane to be copper.  If the digital ground plane is stitched to chassis in
 several locations, it appears that a lower impedance path (copper vs steel)
 will encourage the ESD  to travel across the ground plane.  If the ESD
 travels across the digital ground plane, there appears to be a good chance
 of upsetting sensitive circuits.  So the thought might be to tie only one
 point of digital ground to chassis ground, thereby not providing a path for
 any immunity event to flow across this ground plane.
 
 The rest of the above concept is to use moats to segregate key circuits --
 digital, I/O, analog, switch-mode power supplies.  Again, some say to keep
 the ground plane in tact to provide the lowest impedance reference possible,
 so isolation is provided by carving up the power plane.  The alternate
 approach is to carve all the way through, i.e., if you have a moat around
 a particular circuit, if you are going to isolate, do it for all planes
 (stack, do not overlap).  This latter approach, however, carves up the
 ground plane which would appear to increase the impedance of the overall
 ground reference.  The argument is that carving up the ground plane is
 justified by eliminating the coupling of dirty ground to other circuits in
 an overlap situation.
 
 I would like to hear what you do for pcb grounding and why you do it.
 
 Don Umbdenstock
 Sensormatic
 
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1999 paper posted

1999-09-19 Thread Douglas C. Smith

Hi All,

I decided to post my 1999 IEEE EMC Symposium paper on magnetic field
probes, Signal and Noise Measurement Techniques Using Magnetic Field
Probes, as well as the current probe paper. The 1999 paper provides
background for last month's Technical Tidbit on the paperclip probe.
The 1999 paper is a bit long (~600K) because of more graphic content.
It is much shorter that the nearly 2 Megabyte file on the CD-ROM that
was given out at the Symposium even though it has much better
resolution

Both papers can be found under Technical Goodies for Download near
the top of my index page at:

http://emcesd.com

Happy reading!

Doug

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 /  /\  \ ] /  /\  \ Mobile:  408-858-4528
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measuring voltage drop with a current probe

1999-09-09 Thread Douglas C. Smith

Hi All,

I thought some of you might find my technical article of the month
interesting. It is on making voltage measurements with a current
probe. Over much of the useful frequency range of a current probe, its
output is not the current in the wire but rather the voltage drop
along the wire per unit length. The waveshape of the probe output is
that of the voltage drop along the wire (di(i)/dt), not the current in
the wire (i(t))!

If this sounds interesting, click on the current probe picture at the
bottom of the index page on my website at http://emcesd.com for a
technical discussion along these lines.

Doug

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 \  / )  P.O. Box 1457
  =  Los Gatos, CA 95031-1457
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 /  /\  \ ] /  /\  \ Mobile:  408-858-4528
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 \ _ /]\ _ / Website: http://www.dsmith.org
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Re: Immunity Problems ??

1999-09-08 Thread Douglas C. Smith

Hi All,

ESD or EFT could be the culprit. I would suggest putting a current
probe around one of the instrument cables and connect to a digital
scope and see if you can trigger on a noise event. If you are lucky,
the instrument with the current probe will be the one that goes down.

Alternatively, connect a small antenna to the scope, set to 50 Ohm
input, set the V scale to 100 mV/div, H to 20 ns/div, and trigger on a
50 mV positive going edge for starters. If you get nothing or too
much, adjust the parameters accordingly. A 6 inch diameter loop of
wire makes a good antenna.

Doug

Price, Ed wrote:
 
 Joe wrote:
 
 -Original Message-
 From:   marti...@pebio.com [SMTP:marti...@pebio.com]
 Sent:   Tuesday, September 07, 1999 2:04 PM
 To: emc-p...@majordomo.ieee.org
 Cc: marti...@pebio.com
 Subject:Immunity Problems ??
 
 EMC Professionals,
 
 We have 42 of the same instruments installed in one laboratory.
 
 What are they? What type of power feeds and I/O lines or sensors?
 What about physical separation?
 
 They are each installed on their own dedicated line.
 
 Powerline?
 
 On a regular basis
 
 The toughest problems are unpredictable, intermittent failures. This
 is your first ray of hope; you should try to associate the problem with
 external conditions; i.e., a step in your process, the plant elevator, the
 air conditioning, every 107 minutes, something.
 
 an instrument will shut down during a run.
 
 A bit more description about the shutdown.
 
 The instrument that shuts down is different each time.
 
 Really, NEVER the same instrument? Or do you just mean it strikes
 randomly?
 
 These instruments are laboratory equipment that meet Class A
 radiated limits of
 EN 55011 and meet the immunity requirements of EN 50082-1.
 
 So, then you really don't have a problem? (Sorry, grin!)
 
 Any ideas as to the potential cause of the problem and possible
 ways to resolve
 the problem would be greatly appreciated.
 
 Well, you can start right away with the correlation effort. You
 could also put a powerline monitor on the power buss. If you operated one
 instrument without I/O or data or control leads, you might start to get an
 idea about the problem if that one instrument NEVER shutdown. That might say
 the problem is not coupled through the power bus. OTOH, if it failed just as
 the others, that may lend weight toward the power bus as the path.
 
 Can you operate an instrument in another building? Do you get zero
 shutdowns, or the same probability? Can you operate a cluster of your
 instruments in a remote location, and do they exhibit shutdown problems too?
 
 Regards
 
 Joe Martin
 EMC/Product Safety Engineer
 P.E. Biosystems
 marti...@pebio.com
 
 That's enough for now! Organize your info and get back to the list.
 
 Regards,
 
 Ed
 
 :-):-):-):-):-):-):-):-):-):-):-):-):-):-):-):-):-):-):-):-):-):-):-):-):-)
 Ed Price
 ed.pr...@cubic.com
 Electromagnetic Compatibility Lab
 Cubic Defense Systems
 San Diego, CA.  USA
 619-505-2780 (Voice)
 619-505-1502 (Fax)
 Military  Avionics EMC Services Is Our Specialty
 Shake-Bake-Shock - Metrology - Reliability Analysis
 :-):-):-):-):-):-):-):-):-):-):-):-):-):-):-):-):-):-):-):-):-):-):-):-):-)
 
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 /  /\  \ ] /  /\  \ Mobile:  408-858-4528
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1 GHz probe theory

1999-08-20 Thread Douglas C. Smith

Hi All,

I have added a theory of operation section to the 1 GHz probe plans on
my site at:

http://emcesd.com

The section discusses why the foil is needed and the underlying
limitation on the useful frequency range of the probe. Also added is
the ability to click on the probe pictures to blow them up to full
screen size, instantly. You can even clearly read the values on the
surface mount resistors!

I am interested in any comments on the theory addition (correctness,
readability, etc.)

Also posted is the discussion on this month's problem of how to
measure circuit voltages with a paper clip.

Thanks in advance,

Doug

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---
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 \  / )  P.O. Box 1457
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 /  /\  \ ] /  /\  \ Mobile:  408-858-4528
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