Re: Relative merits of various logic families in not generating RFI

2002-03-20 Thread Doug McKean

You might find the following website from Intel useful for this
question. It'll give edge rates, input and output construction, ...
From there, you can make some conclusions.

http://focus.ti.com/docs/logic/catalog/resources/selectionmatrix.jhtml?fileN
ame=seltree_by_volt

Regards, Doug McKean



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RE: Relative merits of various logic families in not generating RFI

2002-03-20 Thread Robert Wilson

I generally agree, although your comment that double sided PCBs are
about to disappear is rather premature. Way over half of the PCBs
manufactured in the world today are SINGLE sided (look in any piece of
high volume electronics). Double sided PCBs still will be used in volume
for many years to come. 

Many 4 layer PCBs are simply the result of lack of designer layout
skill, or (in particular) a result of the use of autoplace and autoroute
programs that would otherwise ventilate a 2-sided board with an absurd
number of vias and serpentine tracks snaking willy-nilly all over the
place. The solution to the need for actual skill in board layout is
often to let the machine do it, and suffer the cost of more layers. Time
to market is, it seems, more important than cost or quality. At least
here in North America.

Bob Wilson
TIR Systems Ltd.
Vancouver.

-Original Message-
From: Cortland Richmond [mailto:72146@compuserve.com] 
Sent: March 19, 2002 4:02 PM
To: Robert Macy; ieee pstc list
Subject: Re: Relative merits of various logic families in not generating
RFI



Probably, you won't get much choice.  I've often found older, slower,
quieter logic impractical or even uneconomical to use. It may be made
only
by one (thus off limits single-source) manufacturer, or it may be built
using older, more expensive technologies and cost an arm and a leg. And
it
may happen one day that a manufacturer lets you know production is
simply
ending, and with no chance of an equivalent substitute. I am rather
afraid
that the best solution in these cases is to go with later, even if
noisier
devices -- and then design for them.  Then too, if you use current
devices,
you may escape being blind-sided when they go to a smaller fabrication
technology without letting you know. Even spting advertised an spe'd as
an
older device may in fact be a newer one. Who, after all, specifies
devices
by the fastest they go? It's always a minimum guaranteed speed.

Yes, that means even MHz and KHz clock-rates with nanosecond
transitions.
You have to deal with it. Slew rate limiting is available, sometimes,
built-in. If not, you have to add it externally. I've seen a 30 dB
difference at 147 Mhz from a single 33 ohm resistor on a 1 Mhz clock.
You
have to be more careful with layout. You have to avoid inadvertent
peaking
networks - DON'T let anyone just throw HF bypasses willy-nilly on logic
signals; you'd be AMAZED where the high frequencies can end up. And it
means the end, really of 2-layer boards, at least as the old engineers
know
them. They have to be redesigned for RF, even if we weren't dealing with
RF.

But in the end, we get reliable boards, cheaper, that won't have to be
replaced when the foundry discovers shorter-wavelength lithography.

And your totem-pole short circuit? Yes, they know about that. Don't DO
it.
(grin) If you MUST have that kind of output, put a charge reservoir
right
at the device power pins, faster than a speeding junction, able to leap
tall short circuits at a single bound, with enough charge to keep the
transient local. But you already KNEW that!

Cheers,

Cortland

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Re: Relative merits of various logic families in not generating RFI

2002-03-20 Thread Robert Macy

Thank you for the prompt reply.

Yes, faster rise time would lend the signal and its generation to create
energetic RFI, but just in case there were some internal states that blew
power out, or high impedance return paths through the substrate that caused
all the outputs to dance in common mode horror would be examples of the
gotchas I was looking for.

   - Robert -

-Original Message-
From: peter.pou...@invensys.com peter.pou...@invensys.com
To: Robert Macy m...@california.com
List-Post: emc-pstc@listserv.ieee.org
Date: Tuesday, March 19, 2002 8:23 PM
Subject: Re: Relative merits of various logic families in not generating RFI



Robert,

I suggest you have a look at the logic selection guides and application
notes from the major semiconductor logic manufacturers.

As a starting point, check out page 13 to 15 of
http://www.fairchildsemi.com/ms/MS/MS-520.pdf for a rule-of-thumb guide on
how to assess EMI generation from the manufacturer's specs for the logic.

Generally the slower the rise  fall time, the lower the emissions.






Robert Macy
m...@california.com  To:
emc-p...@ieee.org
Sent by:   cc:
owner-emc-pstc@majordomFax to:
o.ieee.org Subject: Relative
merits of various logic families in not
   generating RFI


20/03/02 08:49
Please respond to
Robert Macy







Group,

What are the relative merits of the various logic families HCT, HC, AC, ACT
with regard to generating RFI?

I remember one time we replaced an HCT which made more noise than Schottky
TTL due to an internal overlap in the switching causing a power rail
shorting spike.

I'm sure by now that most IC vendors have addressed the EMC problems
associated with poorly designed chips, but what's the status on these now?

What's the order of preference?  Which one's best?

   - Robert -

   Robert A. Macy, PEm...@california.com
   408 286 3985  fx 408 297 9121
   AJM International Electronics Consultants
   619 North First St,   San Jose, CA  95112



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