Re: [FFmpeg-devel] [PATCH] avcodec/arm/sbrdsp_neon: Use a free register instead of putting 2 things in one

2018-01-12 Thread Michael Niedermayer 
On Fri, Jan 12, 2018 at 11:47:32AM -0800, Dale Curtis wrote:
> lgtm, resolves the issue on our end.

will apply

thanks

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Re: [FFmpeg-devel] [PATCH] avcodec/arm/sbrdsp_neon: Use a free register instead of putting 2 things in one

2018-01-12 Thread Dale Curtis 
lgtm, resolves the issue on our end.

- dale

On Thu, Jan 11, 2018 at 1:47 PM, Michael Niedermayer  wrote:

> Fixes high pitched shriek
> Fixes: 25420848_1478428308873746_4255813235963330560_n.mp4
>
> Reported-by: Dale Curtis 
> Signed-off-by: Michael Niedermayer 
> ---
>  libavcodec/arm/sbrdsp_neon.S | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/libavcodec/arm/sbrdsp_neon.S b/libavcodec/arm/sbrdsp_neon.S
> index e66abd6..003b04e 100644
> --- a/libavcodec/arm/sbrdsp_neon.S
> +++ b/libavcodec/arm/sbrdsp_neon.S
> @@ -336,11 +336,11 @@ function ff_sbr_hf_apply_noise_0_neon, export=1
>  vld1.32 {d0}, [r0,:64]
>  vld1.32 {d6}, [lr,:64]
>  vld1.32 {d2[]},   [r1,:32]!
> -vld1.32 {d3[]},   [r2,:32]!
> +vld1.32 {d18[]},  [r2,:32]!
>  vceq.f32d4,  d2,  #0
>  veord2,  d2,  d3
>  vmovd1,  d0
> -vmla.f32d0,  d6,  d3
> +vmla.f32d0,  d6,  d18
>  vadd.f32s2,  s2,  s4
>  vbifd0,  d1,  d4
>  vst1.32 {d0}, [r0,:64]!
> --
> 2.7.4
>
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[FFmpeg-devel] [PATCH] avcodec/arm/sbrdsp_neon: Use a free register instead of putting 2 things in one

2018-01-11 Thread Michael Niedermayer 
Fixes high pitched shriek
Fixes: 25420848_1478428308873746_4255813235963330560_n.mp4

Reported-by: Dale Curtis 
Signed-off-by: Michael Niedermayer 
---
 libavcodec/arm/sbrdsp_neon.S | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/libavcodec/arm/sbrdsp_neon.S b/libavcodec/arm/sbrdsp_neon.S
index e66abd6..003b04e 100644
--- a/libavcodec/arm/sbrdsp_neon.S
+++ b/libavcodec/arm/sbrdsp_neon.S
@@ -336,11 +336,11 @@ function ff_sbr_hf_apply_noise_0_neon, export=1
 vld1.32 {d0}, [r0,:64]
 vld1.32 {d6}, [lr,:64]
 vld1.32 {d2[]},   [r1,:32]!
-vld1.32 {d3[]},   [r2,:32]!
+vld1.32 {d18[]},  [r2,:32]!
 vceq.f32d4,  d2,  #0
 veord2,  d2,  d3
 vmovd1,  d0
-vmla.f32d0,  d6,  d3
+vmla.f32d0,  d6,  d18
 vadd.f32s2,  s2,  s4
 vbifd0,  d1,  d4
 vst1.32 {d0}, [r0,:64]!
-- 
2.7.4

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