Update of /cvsroot/fink/dists/10.4/unstable/main/finkinfo/languages
In directory vz-cvs-3.sog:/tmp/cvs-serv3256

Modified Files:
        iverilog.info 
Added Files:
        iverilog.patch 
Log Message:
iverilog-0.9.4-2: sync with 10.7 (clang patch)


Index: iverilog.info
===================================================================
RCS file: 
/cvsroot/fink/dists/10.4/unstable/main/finkinfo/languages/iverilog.info,v
retrieving revision 1.11
retrieving revision 1.12
diff -u -d -r1.11 -r1.12
--- iverilog.info       18 Mar 2011 02:43:30 -0000      1.11
+++ iverilog.info       2 Oct 2011 03:22:40 -0000       1.12
@@ -1,9 +1,11 @@
 Package: iverilog
 # Remember to fix Source line when upgrading past 0.9:
 Version: 0.9.4
-Revision: 1
+Revision: 2
 Source: ftp://ftp.icarus.com/pub/eda/verilog/v0.9/verilog-%v.tar.gz
 Source-MD5: 013f1397338fd984ec711250408e43a6
+PatchFile: %n.patch
+PatchFile-MD5: abd811b5675e4bfedb3c4e858cf5a905
 
 Depends: readline5-shlibs, bzip2-shlibs
 Provides: verilog
@@ -14,7 +16,7 @@
 # Fink (1.875 and later, but not including 2.0) break the build.
 #
 # Ghostscript is needed for ps2pdf (which isn't being used?)
-BuildDepends: gperf, readline5, libncurses5, bison (>= 2.0), bzip2-dev
+BuildDepends: fink (>= 0.30.0), gperf, readline5, libncurses5, bison (>= 2.0), 
bzip2-dev
 
 # Bug list:
 #
@@ -36,9 +38,9 @@
 # Additional DocFiles: COPYING
 #    Ignored DocFiles: INSTALL cygwin.txt mingw.txt solaris/*
 
-ConfigureParams: --mandir=%p/share/man
+ConfigureParams: --mandir=%p/share/man --disable-visibility
 
-GCC: 4.0
+GCC: 4.2
 
 CompileScript: <<
 #! /bin/sh -ev
@@ -57,6 +59,10 @@
     powerpc) CFLAGS="$CFLAGS $PPC_OPT" CXXFLAGS="$CXXFLAGS $PPC_OPT" 
./configure %c ;;
     *)       CFLAGS="$CFLAGS $DFLT_OPT" CXXFLAGS="$CXXFLAGS $DFLT_OPT" 
./configure %c ;;
 esac
+
+gcc --version
+g++ --version
+
 make
 <<
 

--- NEW FILE: iverilog.patch ---
diff -urN -x'*~' verilog-0.9.4-orig/libveriuser/getsimtime.c 
verilog-0.9.4/libveriuser/getsimtime.c
--- verilog-0.9.4-orig/libveriuser/getsimtime.c 2011-03-17 20:26:38.000000000 
+0100
+++ verilog-0.9.4/libveriuser/getsimtime.c      2011-09-24 21:09:31.000000000 
+0200
@@ -85,7 +85,10 @@
 
 /* Alias for commercial simulators */
 PLI_INT32 tf_getlongsimtime(PLI_INT32 *high) \
-      __attribute__ ((weak, alias ("tf_getlongtime")));
+{
+      return tf_igetlongtime(high, 0);
+}
+//      __attribute ((weak, alias ("tf_getlongtime")));
 
 void tf_scale_longdelay(void*obj, PLI_INT32 low, PLI_INT32 high,
                        PLI_INT32 *alow, PLI_INT32 *ahigh)


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