Re: [Freedreno] [PATCH v6 2/2] arm64: dts: sdm845: Add gpu and gmu device nodes

2018-12-13 Thread Viresh Kumar
On 12-12-18, 14:18, Jordan Crouse wrote:
> + gpu_opp_table: opp-table {
> + compatible = "operating-points-v2-qcom-level";

I think you need to mention "operating-points-v2" as well here.

-- 
viresh
___
Freedreno mailing list
Freedreno@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/freedreno


[Freedreno] [PATCH v3 2/3] drm/msm/dpu: handle failures while initializing displays

2018-12-13 Thread Jeykumar Sankaran
Bail out KMS hw init on display initialization failures with
proper error logging.

changes in v3:
- introduced in the series

Signed-off-by: Jeykumar Sankaran 
---
 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 39 +++--
 1 file changed, 27 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
index 685686e..39c8549 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
@@ -405,33 +405,36 @@ static void dpu_kms_wait_for_commit_done(struct msm_kms 
*kms,
}
 }
 
-static void _dpu_kms_initialize_dsi(struct drm_device *dev,
+static int _dpu_kms_initialize_dsi(struct drm_device *dev,
struct msm_drm_private *priv,
struct dpu_kms *dpu_kms)
 {
struct drm_encoder *encoder = NULL;
-   int i, rc;
+   int i, rc = 0;
+
+   if (!(priv->dsi[0] || priv->dsi[1]))
+   return rc;
 
/*TODO: Support two independent DSI connectors */
encoder = dpu_encoder_init(dev, DRM_MODE_ENCODER_DSI);
-   if (IS_ERR_OR_NULL(encoder)) {
+   if (IS_ERR(encoder)) {
DPU_ERROR("encoder init failed for dsi display\n");
-   return;
+   return PTR_ERR(encoder);
}
 
for (i = 0; i < ARRAY_SIZE(priv->dsi); i++) {
-   if (!priv->dsi[i]) {
-   DPU_DEBUG("invalid msm_dsi for ctrl %d\n", i);
-   return;
-   }
+   if (!priv->dsi[i])
+   continue;
 
rc = msm_dsi_modeset_init(priv->dsi[i], dev, encoder);
if (rc) {
DPU_ERROR("modeset_init failed for dsi[%d], rc = %d\n",
i, rc);
-   continue;
+   return rc;
}
}
+
+   return rc;
 }
 
 /**
@@ -442,16 +445,24 @@ static void _dpu_kms_initialize_dsi(struct drm_device 
*dev,
  * @dpu_kms:Pointer to dpu kms structure
  * Returns: Zero on success
  */
-static void _dpu_kms_setup_displays(struct drm_device *dev,
+static int _dpu_kms_setup_displays(struct drm_device *dev,
struct msm_drm_private *priv,
struct dpu_kms *dpu_kms)
 {
-   _dpu_kms_initialize_dsi(dev, priv, dpu_kms);
+   int rc = 0;
+
+   rc = _dpu_kms_initialize_dsi(dev, priv, dpu_kms);
+   if (rc) {
+   DPU_ERROR("failed to initialize dsi, rc = %d\n", rc);
+   return rc;
+   }
 
/**
 * Extend this function to initialize other
 * types of displays
 */
+
+   return rc;
 }
 
 static void _dpu_kms_drm_obj_destroy(struct dpu_kms *dpu_kms)
@@ -517,7 +528,11 @@ static int _dpu_kms_drm_obj_init(struct dpu_kms *dpu_kms)
 * Create encoder and query display drivers to create
 * bridges and connectors
 */
-   _dpu_kms_setup_displays(dev, priv, dpu_kms);
+   ret = _dpu_kms_setup_displays(dev, priv, dpu_kms);
+   if (ret) {
+   DPU_ERROR("failed to setup display, rc = %d\n", ret);
+   goto fail;
+   }
 
max_crtc_count = min(catalog->mixer_count,
 (u32)dev->mode_config.num_encoder);
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

___
Freedreno mailing list
Freedreno@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/freedreno


[Freedreno] [PATCH v3 3/3] drm/msm/dpu: add display port support in DPU

2018-12-13 Thread Jeykumar Sankaran
Add display port support in DPU by creating hooks
for DP encoder enumeration and encoder mode
initialization.

This change is based on the SDM845 Display port
driver changes[1].

changes in v2:
- rebase on [2] (Sean Paul)
- remove unwanted error checks and
  switch cases (Jordan Crouse)
changes in v3:
- add dp support after fixing
  the current code base for error logging (Sean Paul)

[1] https://lwn.net/Articles/768265/
[2] https://lkml.org/lkml/2018/11/17/87

Signed-off-by: Jeykumar Sankaran 
---
 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c |  8 ++---
 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 51 +
 2 files changed, 49 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
index 36158b7..b79fd9d 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
@@ -2029,7 +2029,7 @@ static int dpu_encoder_setup_display(struct 
dpu_encoder_virt *dpu_enc,
 {
int ret = 0;
int i = 0;
-   enum dpu_intf_type intf_type;
+   enum dpu_intf_type intf_type = INTF_NONE;
struct dpu_enc_phys_init_params phys_params;
 
if (!dpu_enc || !dpu_kms) {
@@ -2052,9 +2052,9 @@ static int dpu_encoder_setup_display(struct 
dpu_encoder_virt *dpu_enc,
case DRM_MODE_ENCODER_DSI:
intf_type = INTF_DSI;
break;
-   default:
-   DPU_ERROR_ENC(dpu_enc, "unsupported display interface type\n");
-   return -EINVAL;
+   case DRM_MODE_ENCODER_TMDS:
+   intf_type = INTF_DP;
+   break;
}
 
WARN_ON(disp_info->num_of_h_tiles < 1);
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
index 39c8549..ba3e75c 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
@@ -437,6 +437,32 @@ static int _dpu_kms_initialize_dsi(struct drm_device *dev,
return rc;
 }
 
+static int _dpu_kms_initialize_displayport(struct drm_device *dev,
+   struct msm_drm_private *priv,
+   struct dpu_kms *dpu_kms)
+{
+   struct drm_encoder *encoder = NULL;
+   int rc = 0;
+
+   if (!priv->dp)
+   return rc;
+
+   encoder = dpu_encoder_init(dev, DRM_MODE_ENCODER_TMDS);
+   if (IS_ERR(encoder)) {
+   DPU_ERROR("encoder init failed for dsi display\n");
+   return PTR_ERR(encoder);
+   }
+
+   rc = msm_dp_modeset_init(priv->dp, dev, encoder);
+   if (rc) {
+   DPU_ERROR("modeset_init failed for DP, rc = %d\n", rc);
+   drm_encoder_cleanup(encoder);
+   return rc;
+   }
+
+   return rc;
+}
+
 /**
  * _dpu_kms_setup_displays - create encoders, bridges and connectors
  *   for underlying displays
@@ -457,6 +483,12 @@ static int _dpu_kms_setup_displays(struct drm_device *dev,
return rc;
}
 
+   rc = _dpu_kms_initialize_displayport(dev, priv, dpu_kms);
+   if (rc) {
+   DPU_ERROR("failed to initialize display port, rc = %d\n", rc);
+   return rc;
+   }
+
/**
 * Extend this function to initialize other
 * types of displays
@@ -675,13 +707,20 @@ static void _dpu_kms_set_encoder_mode(struct msm_kms *kms,
info.capabilities = cmd_mode ? MSM_DISPLAY_CAP_CMD_MODE :
MSM_DISPLAY_CAP_VID_MODE;
 
-   /* TODO: No support for DSI swap */
-   for (i = 0; i < ARRAY_SIZE(priv->dsi); i++) {
-   if (priv->dsi[i]) {
-   info.h_tile_instance[info.num_of_h_tiles] = i;
-   info.num_of_h_tiles++;
+   switch (info.intf_type) {
+   case DRM_MODE_ENCODER_DSI:
+   /* TODO: No support for DSI swap */
+   for (i = 0; i < ARRAY_SIZE(priv->dsi); i++) {
+   if (priv->dsi[i]) {
+   info.h_tile_instance[info.num_of_h_tiles] = i;
+   info.num_of_h_tiles++;
+   }
}
-   }
+   break;
+   case DRM_MODE_ENCODER_TMDS:
+   info.num_of_h_tiles = 1;
+   break;
+   };
 
rc = dpu_encoder_setup(encoder->dev, encoder, &info);
if (rc)
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

___
Freedreno mailing list
Freedreno@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/freedreno


[Freedreno] [PATCH v3 1/3] drm/msm/dpu: fix documentation for intf_type

2018-12-13 Thread Jeykumar Sankaran
Fix intf_type description in msm_disp_info to show that
it represents drm encoder mode of the display.

changes in v3:
- introduced in the series

Signed-off-by: Jeykumar Sankaran 
---
 drivers/gpu/drm/msm/msm_drv.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h
index 60a7da0..4b0ae70 100644
--- a/drivers/gpu/drm/msm/msm_drv.h
+++ b/drivers/gpu/drm/msm/msm_drv.h
@@ -119,7 +119,7 @@ struct msm_display_topology {
 
 /**
  * struct msm_display_info - defines display properties
- * @intf_type:  DRM_MODE_CONNECTOR_ display type
+ * @intf_type:  DRM_MODE_ENCODER_ type
  * @capabilities:   Bitmask of display flags
  * @num_of_h_tiles: Number of horizontal tiles in case of split interface
  * @h_tile_instance:Controller instance used per tile. Number of elements 
is
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

___
Freedreno mailing list
Freedreno@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/freedreno


Re: [Freedreno] [PATCH v6 2/2] arm64: dts: sdm845: Add gpu and gmu device nodes

2018-12-13 Thread Doug Anderson
Hi,

On Wed, Dec 12, 2018 at 1:18 PM Jordan Crouse  wrote:
>
> Add the nodes to describe the Adreno GPU and GMU devices.
>
> Signed-off-by: Jordan Crouse 
> ---
>  arch/arm64/boot/dts/qcom/sdm845.dtsi | 123 +++
>  1 file changed, 123 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi 
> b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> index 233a5898ebc2..a608afed502e 100644
> --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> @@ -11,6 +11,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>  #include 
> @@ -1349,6 +1350,128 @@
> };
> };
>
> +
> +   gpu@500 {

nit that you're adding an extra blank line here that you don't need.
Given the quantity of outstanding dts patches though, it's almost
certain that Andy will need to manually resolve conflicts when
applying this patch so presumably he can fix up when he lands.

In any case, feel free to add:

Reviewed-by: Douglas Anderson 
Tested-by: Douglas Anderson 

-Doug
___
Freedreno mailing list
Freedreno@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/freedreno


Re: [Freedreno] [PATCH v6 1/2] dt-bindings: drm/msm/a6xx: Document GMU and update GPU bindings

2018-12-13 Thread Doug Anderson
Hi,

On Wed, Dec 12, 2018 at 1:18 PM Jordan Crouse  wrote:
> diff --git a/Documentation/devicetree/bindings/display/msm/gpu.txt 
> b/Documentation/devicetree/bindings/display/msm/gpu.txt
> index 43fac0fe09bb..8d9415180c22 100644
> --- a/Documentation/devicetree/bindings/display/msm/gpu.txt
> +++ b/Documentation/devicetree/bindings/display/msm/gpu.txt
> @@ -8,14 +8,21 @@ Required properties:
>with the chip-id.
>  - reg: Physical base address and length of the controller's registers.
>  - interrupts: The interrupt signal from the gpu.
> -- clocks: device clocks
> +- interrupt-names: List of names for the interrupt signals. The following 
> can be
> +  provided:
> +  * "kgsl_3d0_irq"
> +- clocks: device clocks (if applicable)
>See ../clocks/clock-bindings.txt for details.
> -- clock-names: the following clocks are required:
> +- clock-names: the following clocks can be provided:
>* "core"
>* "iface"
>* "mem_iface"
> +- iommus: optional phandle to an adreno iommu instance
> +- operating-points-v2: optional phandle to the OPP operating points
> +- qcom,gmu: For a6xx and newer targets a phandle to the GMU device that will
> +  control the power for the GPU

Seems fine to me.  If you happen to spin it again for some other
reason it might be nice to be more explicit about exactly when clocks
are required and when they aren't.   IIUC they are always required on
systems without a GMU and they are never present on systems with a
GMU.  ...but I wouldn't spin it just for that.

Reviewed-by: Douglas Anderson 
___
Freedreno mailing list
Freedreno@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/freedreno


Re: [Freedreno] [PATCH 2/2] arm64: dts: sdm845: Add interconnect for GPU

2018-12-13 Thread Doug Anderson
Hi,

On Thu, Dec 13, 2018 at 9:32 AM Jordan Crouse  wrote:
>
> Define an interconnect port for the GPU to set bus
> capabilities.
>
> Signed-off-by: Jordan Crouse 
> ---
>  arch/arm64/boot/dts/qcom/sdm845.dtsi | 3 +++
>  1 file changed, 3 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi 
> b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> index 0a5ddfc4c59b..9323f211ca40 100644
> --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> @@ -1370,6 +1370,9 @@
>
> operating-points-v2 = <&gpu_opp_table>;
>
> +   interconnects = <&qnoc MASTER_GFX3D &qnoc SLAVE_EBI1>;
> +   interconnect-names = "gfx-mem";

Thanks for sending this patch.  Unfortunately the interconnect node is
not called "qnoc" anymore.  It's called "&rsc_hlos" in v12 of Georgi's
patchset:

https://lkml.kernel.org/r/20181208170216.32555-7-georgi.dja...@linaro.org

Can you repost with that fix (the bindings patch should be updated
too)?  Other than that feel feel free to add my Reviewed-by to this
patch.

Thanks!


-Doug
___
Freedreno mailing list
Freedreno@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/freedreno


[Freedreno] [PATCH 1/2] dt-bindings: drm/msm/a6xx: Document interconnect properties for GPU

2018-12-13 Thread Jordan Crouse
Add documentation for the interconnect and interconnect-names bindings
for the GPU node as detailed by bindings/interconnect/interconnect.txt.

Signed-off-by: Jordan Crouse 
---
 Documentation/devicetree/bindings/display/msm/gpu.txt | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/Documentation/devicetree/bindings/display/msm/gpu.txt 
b/Documentation/devicetree/bindings/display/msm/gpu.txt
index 8d9415180c22..be6b5628e052 100644
--- a/Documentation/devicetree/bindings/display/msm/gpu.txt
+++ b/Documentation/devicetree/bindings/display/msm/gpu.txt
@@ -19,6 +19,9 @@ Required properties:
   * "mem_iface"
 - iommus: optional phandle to an adreno iommu instance
 - operating-points-v2: optional phandle to the OPP operating points
+- interconnect: optional phandle to a interconnect provider.  See
+  ../interconnect/interconnect.txt for details.
+- interconnect-names: Name string for the interconnects.
 - qcom,gmu: For a6xx and newer targets a phandle to the GMU device that will
   control the power for the GPU
 
@@ -68,6 +71,9 @@ Example a6xx (with GMU):
 
operating-points-v2 = <&gpu_opp_table>;
 
+   interconnects = <&qnoc MASTER_GFX3D &qnoc SLAVE_EBI1>;
+   interconnect-names = "gfx-mem";
+
qcom,gmu = <&gmu>;
};
 };
-- 
2.18.0

___
Freedreno mailing list
Freedreno@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/freedreno


[Freedreno] [PATCH 2/2] arm64: dts: sdm845: Add interconnect for GPU

2018-12-13 Thread Jordan Crouse
Define an interconnect port for the GPU to set bus
capabilities.

Signed-off-by: Jordan Crouse 
---
 arch/arm64/boot/dts/qcom/sdm845.dtsi | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi 
b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 0a5ddfc4c59b..9323f211ca40 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -1370,6 +1370,9 @@
 
operating-points-v2 = <&gpu_opp_table>;
 
+   interconnects = <&qnoc MASTER_GFX3D &qnoc SLAVE_EBI1>;
+   interconnect-names = "gfx-mem";
+
qcom,gmu = <&gmu>;
 
gpu_opp_table: opp-table {
-- 
2.18.0

___
Freedreno mailing list
Freedreno@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/freedreno


[Freedreno] [PATCH 0/2] arm64: dts: sdm845: Add sdm845 GPU interconnect

2018-12-13 Thread Jordan Crouse
Two quick patches to document and add an interconnect port definition
for the sdm845 GPU.

This is based on the base GPU DT changes:
https://patchwork.freedesktop.org/series/39308/

As well as the DT nodes from Georgi:
https://patchwork.kernel.org/patch/10719483/

Jordan Crouse (2):
  dt-bindings: drm/msm/a6xx: Document interconnect properties for GPU
  arm64: dts: sdm845: Add interconnect for GPU

 Documentation/devicetree/bindings/display/msm/gpu.txt | 6 ++
 arch/arm64/boot/dts/qcom/sdm845.dtsi  | 3 +++
 2 files changed, 9 insertions(+)

-- 
2.18.0

___
Freedreno mailing list
Freedreno@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/freedreno


[Freedreno] [PATCH AUTOSEL 4.14 17/41] drm/msm: Fix error return checking

2018-12-13 Thread Sasha Levin
From: Wen Yang 

[ Upstream commit 098336deb946f37a70afc0979af388b615c378bf ]

The error checks on ret for a negative error return always fails because
the return value of iommu_map_sg() is unsigned and can never be negative.

Detected with Coccinelle:
drivers/gpu/drm/msm/msm_iommu.c:69:9-12: WARNING: Unsigned expression
compared with zero: ret < 0

Signed-off-by: Wen Yang 
CC: Rob Clark 
CC: David Airlie 
CC: Julia Lawall 
CC: linux-arm-...@vger.kernel.org
CC: dri-de...@lists.freedesktop.org
CC: freedreno@lists.freedesktop.org
CC: linux-ker...@vger.kernel.org
Signed-off-by: Sean Paul 
Signed-off-by: Sasha Levin 
---
 drivers/gpu/drm/msm/msm_iommu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/msm/msm_iommu.c b/drivers/gpu/drm/msm/msm_iommu.c
index b23d33622f37..2a90aa4caec0 100644
--- a/drivers/gpu/drm/msm/msm_iommu.c
+++ b/drivers/gpu/drm/msm/msm_iommu.c
@@ -66,7 +66,7 @@ static int msm_iommu_map(struct msm_mmu *mmu, uint64_t iova,
 // pm_runtime_get_sync(mmu->dev);
ret = iommu_map_sg(iommu->domain, iova, sgt->sgl, sgt->nents, prot);
 // pm_runtime_put_sync(mmu->dev);
-   WARN_ON(ret < 0);
+   WARN_ON(!ret);
 
return (ret == len) ? 0 : -EINVAL;
 }
-- 
2.19.1

___
Freedreno mailing list
Freedreno@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/freedreno


[Freedreno] [PATCH AUTOSEL 4.9 05/34] drm/msm: Grab a vblank reference when waiting for commit_done

2018-12-13 Thread Sasha Levin
From: Sean Paul 

[ Upstream commit 3b712e43e3876b42b38321ecf790a1f5fe59c834 ]

Similar to the atomic helpers, we should enable vblank while we're
waiting for the commit to finish. DPU needs this, MDP5 seems to work
fine without it.

Reviewed-by: Abhinav Kumar 
Signed-off-by: Sean Paul 
Signed-off-by: Rob Clark 
Signed-off-by: Sasha Levin 
---
 drivers/gpu/drm/msm/msm_atomic.c | 5 +
 1 file changed, 5 insertions(+)

diff --git a/drivers/gpu/drm/msm/msm_atomic.c b/drivers/gpu/drm/msm/msm_atomic.c
index 73bae382eac3..5c58a98f67c0 100644
--- a/drivers/gpu/drm/msm/msm_atomic.c
+++ b/drivers/gpu/drm/msm/msm_atomic.c
@@ -98,7 +98,12 @@ static void msm_atomic_wait_for_commit_done(struct 
drm_device *dev,
if (old_state->legacy_cursor_update)
continue;
 
+   if (drm_crtc_vblank_get(crtc))
+   continue;
+
kms->funcs->wait_for_crtc_commit_done(kms, crtc);
+
+   drm_crtc_vblank_put(crtc);
}
 }
 
-- 
2.19.1

___
Freedreno mailing list
Freedreno@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/freedreno


[Freedreno] [PATCH AUTOSEL 4.19 34/73] drm/msm: dpu: Fix "WARNING: invalid free of devm_ allocated data"

2018-12-13 Thread Sasha Levin
From: YueHaibing 

[ Upstream commit ce25aa3ee6939d83979cccf7adc5737cba9a0cb7 ]

'dpu_enc' is a member of 'drm_enc'
And 'drm_enc' got allocated with devm_kzalloc in dpu_encoder_init.

This gives this error message:
./drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c:459:1-6:
 WARNING: invalid free of devm_ allocated data

Signed-off-by: YueHaibing 
Signed-off-by: Rob Clark 
Signed-off-by: Sean Paul 
Signed-off-by: Sasha Levin 
---
 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
index 1b4de3486ef9..ec3fd67378c1 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
@@ -503,8 +503,6 @@ static void dpu_encoder_destroy(struct drm_encoder *drm_enc)
 
drm_encoder_cleanup(drm_enc);
mutex_destroy(&dpu_enc->enc_lock);
-
-   kfree(dpu_enc);
 }
 
 void dpu_encoder_helper_split_config(
-- 
2.19.1

___
Freedreno mailing list
Freedreno@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/freedreno


[Freedreno] [PATCH AUTOSEL 4.4 05/23] drm/msm: Grab a vblank reference when waiting for commit_done

2018-12-13 Thread Sasha Levin
From: Sean Paul 

[ Upstream commit 3b712e43e3876b42b38321ecf790a1f5fe59c834 ]

Similar to the atomic helpers, we should enable vblank while we're
waiting for the commit to finish. DPU needs this, MDP5 seems to work
fine without it.

Reviewed-by: Abhinav Kumar 
Signed-off-by: Sean Paul 
Signed-off-by: Rob Clark 
Signed-off-by: Sasha Levin 
---
 drivers/gpu/drm/msm/msm_atomic.c | 5 +
 1 file changed, 5 insertions(+)

diff --git a/drivers/gpu/drm/msm/msm_atomic.c b/drivers/gpu/drm/msm/msm_atomic.c
index 7eb253bc24df..221eaea651d4 100644
--- a/drivers/gpu/drm/msm/msm_atomic.c
+++ b/drivers/gpu/drm/msm/msm_atomic.c
@@ -107,7 +107,12 @@ static void msm_atomic_wait_for_commit_done(struct 
drm_device *dev,
if (old_state->legacy_cursor_update)
continue;
 
+   if (drm_crtc_vblank_get(crtc))
+   continue;
+
kms->funcs->wait_for_crtc_commit_done(kms, crtc);
+
+   drm_crtc_vblank_put(crtc);
}
 }
 
-- 
2.19.1

___
Freedreno mailing list
Freedreno@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/freedreno


[Freedreno] [PATCH AUTOSEL 4.19 16/73] drm/msm: Grab a vblank reference when waiting for commit_done

2018-12-13 Thread Sasha Levin
From: Sean Paul 

[ Upstream commit 3b712e43e3876b42b38321ecf790a1f5fe59c834 ]

Similar to the atomic helpers, we should enable vblank while we're
waiting for the commit to finish. DPU needs this, MDP5 seems to work
fine without it.

Reviewed-by: Abhinav Kumar 
Signed-off-by: Sean Paul 
Signed-off-by: Rob Clark 
Signed-off-by: Sasha Levin 
---
 drivers/gpu/drm/msm/msm_atomic.c | 5 +
 1 file changed, 5 insertions(+)

diff --git a/drivers/gpu/drm/msm/msm_atomic.c b/drivers/gpu/drm/msm/msm_atomic.c
index c1f1779c980f..2b7bb6e166d3 100644
--- a/drivers/gpu/drm/msm/msm_atomic.c
+++ b/drivers/gpu/drm/msm/msm_atomic.c
@@ -32,7 +32,12 @@ static void msm_atomic_wait_for_commit_done(struct 
drm_device *dev,
if (!new_crtc_state->active)
continue;
 
+   if (drm_crtc_vblank_get(crtc))
+   continue;
+
kms->funcs->wait_for_crtc_commit_done(kms, crtc);
+
+   drm_crtc_vblank_put(crtc);
}
 }
 
-- 
2.19.1

___
Freedreno mailing list
Freedreno@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/freedreno


[Freedreno] [PATCH AUTOSEL 4.14 06/41] drm/msm: Grab a vblank reference when waiting for commit_done

2018-12-13 Thread Sasha Levin
From: Sean Paul 

[ Upstream commit 3b712e43e3876b42b38321ecf790a1f5fe59c834 ]

Similar to the atomic helpers, we should enable vblank while we're
waiting for the commit to finish. DPU needs this, MDP5 seems to work
fine without it.

Reviewed-by: Abhinav Kumar 
Signed-off-by: Sean Paul 
Signed-off-by: Rob Clark 
Signed-off-by: Sasha Levin 
---
 drivers/gpu/drm/msm/msm_atomic.c | 5 +
 1 file changed, 5 insertions(+)

diff --git a/drivers/gpu/drm/msm/msm_atomic.c b/drivers/gpu/drm/msm/msm_atomic.c
index 025d454163b0..8f77047a226d 100644
--- a/drivers/gpu/drm/msm/msm_atomic.c
+++ b/drivers/gpu/drm/msm/msm_atomic.c
@@ -93,7 +93,12 @@ static void msm_atomic_wait_for_commit_done(struct 
drm_device *dev,
if (!new_crtc_state->active)
continue;
 
+   if (drm_crtc_vblank_get(crtc))
+   continue;
+
kms->funcs->wait_for_crtc_commit_done(kms, crtc);
+
+   drm_crtc_vblank_put(crtc);
}
 }
 
-- 
2.19.1

___
Freedreno mailing list
Freedreno@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/freedreno


[Freedreno] [PATCH AUTOSEL 4.19 13/73] drm/msm/gpu: Fix a couple memory leaks in debugfs

2018-12-13 Thread Sasha Levin
From: Dan Carpenter 

[ Upstream commit 51270de91412b819f654b849db3bf92dac0a0855 ]

The msm_gpu_open() function should free "show_priv" on error or it
causes static checker warnings.

Fixes: 4f776f4511c7 ("drm/msm/gpu: Convert the GPU show function to use the GPU 
state")
Signed-off-by: Dan Carpenter 
Signed-off-by: Rob Clark 
Signed-off-by: Sean Paul 
Signed-off-by: Sasha Levin 
---
 drivers/gpu/drm/msm/msm_debugfs.c | 15 +++
 1 file changed, 11 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/msm/msm_debugfs.c 
b/drivers/gpu/drm/msm/msm_debugfs.c
index f0da0d3c8a80..d756436c1fcd 100644
--- a/drivers/gpu/drm/msm/msm_debugfs.c
+++ b/drivers/gpu/drm/msm/msm_debugfs.c
@@ -84,7 +84,7 @@ static int msm_gpu_open(struct inode *inode, struct file 
*file)
 
ret = mutex_lock_interruptible(&dev->struct_mutex);
if (ret)
-   return ret;
+   goto free_priv;
 
pm_runtime_get_sync(&gpu->pdev->dev);
show_priv->state = gpu->funcs->gpu_state_get(gpu);
@@ -94,13 +94,20 @@ static int msm_gpu_open(struct inode *inode, struct file 
*file)
 
if (IS_ERR(show_priv->state)) {
ret = PTR_ERR(show_priv->state);
-   kfree(show_priv);
-   return ret;
+   goto free_priv;
}
 
show_priv->dev = dev;
 
-   return single_open(file, msm_gpu_show, show_priv);
+   ret = single_open(file, msm_gpu_show, show_priv);
+   if (ret)
+   goto free_priv;
+
+   return 0;
+
+free_priv:
+   kfree(show_priv);
+   return ret;
 }
 
 static const struct file_operations msm_gpu_fops = {
-- 
2.19.1

___
Freedreno mailing list
Freedreno@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/freedreno


[Freedreno] [PATCH AUTOSEL 4.19 32/73] drm/msm/hdmi: Enable HPD after HDMI IRQ is set up

2018-12-13 Thread Sasha Levin
From: Todor Tomov 

[ Upstream commit ee4456359640defe3f51cc6b728bfce4bc444c9e ]

SoCs that contain MDP5 have a top level wrapper called MDSS that
manages locks, power and irq for the sub-blocks within it.

Irq for HDMI is also routed through the MDSS.

Shortly after the Hot Plug Detection (HPD) is enabled in HDMI,
HDMI interrupts are recieved by the MDSS interrupt handler.
However at this moment the HDMI irq is still not mapped to
the MDSS irq domain so the HDMI irq handler cannot be called
to process the interrupts.

This leads to a flood of HDMI interrupts on CPU 0.

If we are lucky to have the HDMI initialization running on a
different CPU, it will eventually map the HDMI irq to MDSS irq
domain, the next HDMI interrupt will be handled by the HDMI irq
handler, the interrupt flood will stop and we will recover.

If the HDMI initialization is running on CPU 0, then it cannot
complete and there is nothing to stop the interrupt flood on
CPU 0. The system is stuck.

Fix this by moving the HPD enablement after the HDMI irq is
mapped to the MDSS irq domain.

Signed-off-by: Todor Tomov 
Signed-off-by: Rob Clark 
Signed-off-by: Sean Paul 
Signed-off-by: Sasha Levin 
---
 drivers/gpu/drm/msm/hdmi/hdmi.c   |  6 ++
 drivers/gpu/drm/msm/hdmi/hdmi.h   |  1 +
 drivers/gpu/drm/msm/hdmi/hdmi_connector.c | 10 ++
 3 files changed, 9 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/msm/hdmi/hdmi.c b/drivers/gpu/drm/msm/hdmi/hdmi.c
index c79659ca5706..33e083f71a17 100644
--- a/drivers/gpu/drm/msm/hdmi/hdmi.c
+++ b/drivers/gpu/drm/msm/hdmi/hdmi.c
@@ -332,6 +332,12 @@ int msm_hdmi_modeset_init(struct hdmi *hdmi,
goto fail;
}
 
+   ret = msm_hdmi_hpd_enable(hdmi->connector);
+   if (ret < 0) {
+   DRM_DEV_ERROR(&hdmi->pdev->dev, "failed to enable HPD: %d\n", 
ret);
+   goto fail;
+   }
+
encoder->bridge = hdmi->bridge;
 
priv->bridges[priv->num_bridges++]   = hdmi->bridge;
diff --git a/drivers/gpu/drm/msm/hdmi/hdmi.h b/drivers/gpu/drm/msm/hdmi/hdmi.h
index accc9a61611d..5c5df6ab2a57 100644
--- a/drivers/gpu/drm/msm/hdmi/hdmi.h
+++ b/drivers/gpu/drm/msm/hdmi/hdmi.h
@@ -245,6 +245,7 @@ void msm_hdmi_bridge_destroy(struct drm_bridge *bridge);
 
 void msm_hdmi_connector_irq(struct drm_connector *connector);
 struct drm_connector *msm_hdmi_connector_init(struct hdmi *hdmi);
+int msm_hdmi_hpd_enable(struct drm_connector *connector);
 
 /*
  * i2c adapter for ddc:
diff --git a/drivers/gpu/drm/msm/hdmi/hdmi_connector.c 
b/drivers/gpu/drm/msm/hdmi/hdmi_connector.c
index e9c9a0af508e..30e908dfded7 100644
--- a/drivers/gpu/drm/msm/hdmi/hdmi_connector.c
+++ b/drivers/gpu/drm/msm/hdmi/hdmi_connector.c
@@ -167,8 +167,9 @@ static void enable_hpd_clocks(struct hdmi *hdmi, bool 
enable)
}
 }
 
-static int hpd_enable(struct hdmi_connector *hdmi_connector)
+int msm_hdmi_hpd_enable(struct drm_connector *connector)
 {
+   struct hdmi_connector *hdmi_connector = to_hdmi_connector(connector);
struct hdmi *hdmi = hdmi_connector->hdmi;
const struct hdmi_platform_config *config = hdmi->config;
struct device *dev = &hdmi->pdev->dev;
@@ -450,7 +451,6 @@ struct drm_connector *msm_hdmi_connector_init(struct hdmi 
*hdmi)
 {
struct drm_connector *connector = NULL;
struct hdmi_connector *hdmi_connector;
-   int ret;
 
hdmi_connector = kzalloc(sizeof(*hdmi_connector), GFP_KERNEL);
if (!hdmi_connector)
@@ -471,12 +471,6 @@ struct drm_connector *msm_hdmi_connector_init(struct hdmi 
*hdmi)
connector->interlace_allowed = 0;
connector->doublescan_allowed = 0;
 
-   ret = hpd_enable(hdmi_connector);
-   if (ret) {
-   dev_err(&hdmi->pdev->dev, "failed to enable HPD: %d\n", ret);
-   return ERR_PTR(ret);
-   }
-
drm_connector_attach_encoder(connector, hdmi->encoder);
 
return connector;
-- 
2.19.1

___
Freedreno mailing list
Freedreno@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/freedreno


[Freedreno] [PATCH AUTOSEL 4.19 35/73] drm/msm: Fix error return checking

2018-12-13 Thread Sasha Levin
From: Wen Yang 

[ Upstream commit 098336deb946f37a70afc0979af388b615c378bf ]

The error checks on ret for a negative error return always fails because
the return value of iommu_map_sg() is unsigned and can never be negative.

Detected with Coccinelle:
drivers/gpu/drm/msm/msm_iommu.c:69:9-12: WARNING: Unsigned expression
compared with zero: ret < 0

Signed-off-by: Wen Yang 
CC: Rob Clark 
CC: David Airlie 
CC: Julia Lawall 
CC: linux-arm-...@vger.kernel.org
CC: dri-de...@lists.freedesktop.org
CC: freedreno@lists.freedesktop.org
CC: linux-ker...@vger.kernel.org
Signed-off-by: Sean Paul 
Signed-off-by: Sasha Levin 
---
 drivers/gpu/drm/msm/msm_iommu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/msm/msm_iommu.c b/drivers/gpu/drm/msm/msm_iommu.c
index b23d33622f37..2a90aa4caec0 100644
--- a/drivers/gpu/drm/msm/msm_iommu.c
+++ b/drivers/gpu/drm/msm/msm_iommu.c
@@ -66,7 +66,7 @@ static int msm_iommu_map(struct msm_mmu *mmu, uint64_t iova,
 // pm_runtime_get_sync(mmu->dev);
ret = iommu_map_sg(iommu->domain, iova, sgt->sgl, sgt->nents, prot);
 // pm_runtime_put_sync(mmu->dev);
-   WARN_ON(ret < 0);
+   WARN_ON(!ret);
 
return (ret == len) ? 0 : -EINVAL;
 }
-- 
2.19.1

___
Freedreno mailing list
Freedreno@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/freedreno


[Freedreno] [PATCH AUTOSEL 4.19 33/73] drm/msm: dpu: Don't set legacy plane->crtc pointer

2018-12-13 Thread Sasha Levin
From: Sean Paul 

[ Upstream commit 081679c51ef2fd7b23cf9ddb7d775b17f75de18c ]

It causes a WARN in drm_atomic_get_plane_state(), and is not used by
atomic (or dpu).

Signed-off-by: Sean Paul 
Reviewed-by: Daniel Vetter 
Signed-off-by: Rob Clark 
Signed-off-by: Sasha Levin 
---
 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
index cd02eae884cc..4752f08f0884 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
@@ -2122,7 +2122,6 @@ struct drm_crtc *dpu_crtc_init(struct drm_device *dev, 
struct drm_plane *plane)
NULL);
 
drm_crtc_helper_add(crtc, &dpu_crtc_helper_funcs);
-   plane->crtc = crtc;
 
/* save user friendly CRTC name for later */
snprintf(dpu_crtc->name, DPU_CRTC_NAME_SIZE, "crtc%u", crtc->base.id);
-- 
2.19.1

___
Freedreno mailing list
Freedreno@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/freedreno


[Freedreno] [PATCH AUTOSEL 4.19 15/73] drm/msm/dsi: configure VCO rate for 10nm PLL driver

2018-12-13 Thread Sasha Levin
From: Abhinav Kumar 

[ Upstream commit 8531f0587f5c9e1a74cd9543a97617349f5e0706 ]

Currenty the VCO rate in the 10nm PLL driver relies
on the parent rate which is not configured.

Configure the VCO rate to 19.2 Mhz as required by
the 10nm PLL driver.

Signed-off-by: Abhinav Kumar 
Signed-off-by: Sean Paul 
Signed-off-by: Rob Clark 
Signed-off-by: Sasha Levin 
---
 drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c 
b/drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c
index 4c03f0b7343e..41bec570c518 100644
--- a/drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c
+++ b/drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c
@@ -39,6 +39,8 @@
 #define DSI_PIXEL_PLL_CLK  1
 #define NUM_PROVIDED_CLKS  2
 
+#define VCO_REF_CLK_RATE   1920
+
 struct dsi_pll_regs {
u32 pll_prop_gain_rate;
u32 pll_lockdet_rate;
@@ -316,7 +318,7 @@ static int dsi_pll_10nm_vco_set_rate(struct clk_hw *hw, 
unsigned long rate,
parent_rate);
 
pll_10nm->vco_current_rate = rate;
-   pll_10nm->vco_ref_clk_rate = parent_rate;
+   pll_10nm->vco_ref_clk_rate = VCO_REF_CLK_RATE;
 
dsi_pll_setup_config(pll_10nm);
 
-- 
2.19.1

___
Freedreno mailing list
Freedreno@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/freedreno


[Freedreno] [PATCH AUTOSEL 4.19 14/73] drm/msm: fix handling of cmdstream offset

2018-12-13 Thread Sasha Levin
From: Rob Clark 

[ Upstream commit 47e7f506ee6590ceb2efa1f08aca7f9f2ee5c1d3 ]

Userspace hasn't used submit cmds with submit_offset != 0 for a while,
but this starts cropping up again with cmdstream sub-buffer-allocation
in libdrm_freedreno.

Doesn't do much good to increment the buf ptr before assigning it.

Fixes: 78b8e5b847b4 drm/msm: dump a rd GPUADDR header for all buffers in the 
command
Reviewed-by: Kristian H. Kristensen 
Signed-off-by: Rob Clark 
Signed-off-by: Sean Paul 
Signed-off-by: Sasha Levin 
---
 drivers/gpu/drm/msm/msm_rd.c | 5 -
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/msm/msm_rd.c b/drivers/gpu/drm/msm/msm_rd.c
index 3aa8a8576abe..f7a0edea4705 100644
--- a/drivers/gpu/drm/msm/msm_rd.c
+++ b/drivers/gpu/drm/msm/msm_rd.c
@@ -316,10 +316,11 @@ static void snapshot_buf(struct msm_rd_state *rd,
uint64_t iova, uint32_t size)
 {
struct msm_gem_object *obj = submit->bos[idx].obj;
+   unsigned offset = 0;
const char *buf;
 
if (iova) {
-   buf += iova - submit->bos[idx].iova;
+   offset = iova - submit->bos[idx].iova;
} else {
iova = submit->bos[idx].iova;
size = obj->base.size;
@@ -340,6 +341,8 @@ static void snapshot_buf(struct msm_rd_state *rd,
if (IS_ERR(buf))
return;
 
+   buf += offset;
+
rd_write_section(rd, RD_BUFFER_CONTENTS, buf, size);
 
msm_gem_put_vaddr(&obj->base);
-- 
2.19.1

___
Freedreno mailing list
Freedreno@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/freedreno


[Freedreno] [PATCH AUTOSEL 4.19 12/73] drm/msm: Fix task dump in gpu recovery

2018-12-13 Thread Sasha Levin
From: Sharat Masetty 

[ Upstream commit 482f96324a4e08818db7d75bb12beaaea6c9561d ]

The current recovery code gets a pointer to the task struct and does a
few things all within the rcu_read_lock. This puts constraints on the
types of gfp flags that can be used within the rcu lock. This patch
instead gets a reference to the task within the rcu lock and releases
the lock immediately, this way the task stays afloat until we need it and
we also get to use the desired gfp flags.

Signed-off-by: Sharat Masetty 
Signed-off-by: Rob Clark 
Signed-off-by: Sean Paul 
Signed-off-by: Sasha Levin 
---
 drivers/gpu/drm/msm/msm_gpu.c | 9 -
 1 file changed, 4 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/msm/msm_gpu.c b/drivers/gpu/drm/msm/msm_gpu.c
index 46e6b82f7b66..52a2146dc1f2 100644
--- a/drivers/gpu/drm/msm/msm_gpu.c
+++ b/drivers/gpu/drm/msm/msm_gpu.c
@@ -425,10 +425,9 @@ static void recover_worker(struct work_struct *work)
if (submit) {
struct task_struct *task;
 
-   rcu_read_lock();
-   task = pid_task(submit->pid, PIDTYPE_PID);
+   task = get_pid_task(submit->pid, PIDTYPE_PID);
if (task) {
-   comm = kstrdup(task->comm, GFP_ATOMIC);
+   comm = kstrdup(task->comm, GFP_KERNEL);
 
/*
 * So slightly annoying, in other paths like
@@ -441,10 +440,10 @@ static void recover_worker(struct work_struct *work)
 * about the submit going away.
 */
mutex_unlock(&dev->struct_mutex);
-   cmd = kstrdup_quotable_cmdline(task, GFP_ATOMIC);
+   cmd = kstrdup_quotable_cmdline(task, GFP_KERNEL);
+   put_task_struct(task);
mutex_lock(&dev->struct_mutex);
}
-   rcu_read_unlock();
 
if (comm && cmd) {
dev_err(dev->dev, "%s: offending task: %s (%s)\n",
-- 
2.19.1

___
Freedreno mailing list
Freedreno@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/freedreno