[Freedreno] [PATCH] drm/msm/dpu: Allow UBWC on NV12

2020-01-10 Thread Fritz Koenig
NV12 is a valid format for UBWC

Signed-off-by: Fritz Koenig 
---
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog_format.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog_format.h 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog_format.h
index fbcb3c4bbfee..3766f0fd0bf0 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog_format.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog_format.h
@@ -10,6 +10,8 @@ static const uint32_t qcom_compressed_supported_formats[] = {
DRM_FORMAT_XBGR,
DRM_FORMAT_XRGB,
DRM_FORMAT_BGR565,
+
+   DRM_FORMAT_NV12,
 };
 
 static const uint32_t plane_formats[] = {
-- 
2.25.0.rc1.283.g88dfdc4193-goog

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[Freedreno] [PATCH] drm/msm/dpu: Add UBWC support for RGB8888 formats

2019-11-06 Thread Fritz Koenig
Hardware only natively supports BGR UBWC.
UBWC support for RGB can be had by pretending
that the buffer is BGR.

Signed-off-by: Fritz Koenig 
---
 drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c| 18 ++
 .../drm/msm/disp/dpu1/dpu_hw_catalog_format.h  |  2 ++
 2 files changed, 20 insertions(+)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c
index 24ab6249083a..528632690f1e 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c
@@ -489,12 +489,28 @@ static const struct dpu_format dpu_format_map_ubwc[] = {
true, 4, DPU_FORMAT_FLAG_COMPRESSED,
DPU_FETCH_UBWC, 2, DPU_TILE_HEIGHT_UBWC),
 
+   /* ARGB and ABGR purposely have the same color
+* ordering.  The hardware only supports ABGR UBWC
+* natively.
+*/
+   INTERLEAVED_RGB_FMT_TILED(ARGB,
+   COLOR_8BIT, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT,
+   C2_R_Cr, C0_G_Y, C1_B_Cb, C3_ALPHA, 4,
+   true, 4, DPU_FORMAT_FLAG_COMPRESSED,
+   DPU_FETCH_UBWC, 2, DPU_TILE_HEIGHT_UBWC),
+
INTERLEAVED_RGB_FMT_TILED(XBGR,
COLOR_8BIT, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT,
C2_R_Cr, C0_G_Y, C1_B_Cb, C3_ALPHA, 4,
false, 4, DPU_FORMAT_FLAG_COMPRESSED,
DPU_FETCH_UBWC, 2, DPU_TILE_HEIGHT_UBWC),
 
+   INTERLEAVED_RGB_FMT_TILED(XRGB,
+   COLOR_8BIT, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT,
+   C2_R_Cr, C0_G_Y, C1_B_Cb, C3_ALPHA, 4,
+   false, 4, DPU_FORMAT_FLAG_COMPRESSED,
+   DPU_FETCH_UBWC, 2, DPU_TILE_HEIGHT_UBWC),
+
INTERLEAVED_RGB_FMT_TILED(ABGR2101010,
COLOR_8BIT, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT,
C2_R_Cr, C0_G_Y, C1_B_Cb, C3_ALPHA, 4,
@@ -550,7 +566,9 @@ static int _dpu_format_get_media_color_ubwc(const struct 
dpu_format *fmt)
 {
static const struct dpu_media_color_map dpu_media_ubwc_map[] = {
{DRM_FORMAT_ABGR, COLOR_FMT_RGBA_UBWC},
+   {DRM_FORMAT_ARGB, COLOR_FMT_RGBA_UBWC},
{DRM_FORMAT_XBGR, COLOR_FMT_RGBA_UBWC},
+   {DRM_FORMAT_XRGB, COLOR_FMT_RGBA_UBWC},
{DRM_FORMAT_ABGR2101010, COLOR_FMT_RGBA1010102_UBWC},
{DRM_FORMAT_XBGR2101010, COLOR_FMT_RGBA1010102_UBWC},
{DRM_FORMAT_BGR565, COLOR_FMT_RGB565_UBWC},
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog_format.h 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog_format.h
index bb6112c949ae..fbcb3c4bbfee 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog_format.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog_format.h
@@ -6,7 +6,9 @@
 
 static const uint32_t qcom_compressed_supported_formats[] = {
DRM_FORMAT_ABGR,
+   DRM_FORMAT_ARGB,
DRM_FORMAT_XBGR,
+   DRM_FORMAT_XRGB,
DRM_FORMAT_BGR565,
 };
 
-- 
2.24.0.432.g9d3f5f5b63-goog

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Re: [Freedreno] [PATCH 3/4] drm/msm: dpu: Untangle frame_done timeout units

2019-02-05 Thread Fritz Koenig
set(_enc->frame_done_timeout_ms, 0);
> del_timer(_enc->frame_done_timer);
>
> dpu_encoder_resource_control(drm_enc,
> @@ -1804,10 +1807,10 @@ void dpu_encoder_kickoff(struct drm_encoder *drm_enc, 
> bool async)
>
> trace_dpu_enc_kickoff(DRMID(drm_enc));
>
> -   timeout_ms = DPU_FRAME_DONE_TIMEOUT * 1000 /
> +   timeout_ms = DPU_ENCODER_FRAME_DONE_TIMEOUT_FRAMES * 1000 /
> drm_mode_vrefresh(_enc->crtc->state->adjusted_mode);
>
> -   atomic_set(_enc->frame_done_timeout, timeout_ms);
> +   atomic_set(_enc->frame_done_timeout_ms, timeout_ms);
> mod_timer(_enc->frame_done_timer,
>   jiffies + msecs_to_jiffies(timeout_ms));
>
> @@ -2129,7 +2132,7 @@ static void dpu_encoder_frame_done_timeout(struct 
> timer_list *t)
> DRM_DEBUG_KMS("id:%u invalid timeout frame_busy_mask=%lu\n",
>   DRMID(drm_enc), dpu_enc->frame_busy_mask[0]);
> return;
> -   } else if (!atomic_xchg(_enc->frame_done_timeout, 0)) {
> +   } else if (!atomic_xchg(_enc->frame_done_timeout_ms, 0)) {
> DRM_DEBUG_KMS("id:%u invalid timeout\n", DRMID(drm_enc));
> return;
> }
> @@ -2175,7 +2178,7 @@ int dpu_encoder_setup(struct drm_device *dev, struct 
> drm_encoder *enc,
>
> spin_lock_init(_enc->enc_spinlock);
>
> -   atomic_set(_enc->frame_done_timeout, 0);
> +   atomic_set(_enc->frame_done_timeout_ms, 0);
> timer_setup(_enc->frame_done_timer,
> dpu_encoder_frame_done_timeout, 0);
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h 
> b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
> index ac75cfc267f40..31e9ef96ca5dc 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
> @@ -73,9 +73,6 @@
>
>  #define DPU_NAME_SIZE  12
>
> -/* timeout in frames waiting for frame done */
> -#define DPU_FRAME_DONE_TIMEOUT 60
> -
>  /*
>   * struct dpu_irq_callback - IRQ callback handlers
>   * @list: list to callback
> --
> Sean Paul, Software Engineer, Google / Chromium OS
>

Nice cleanup!  Units make it much easier to read.

Reviewed-by: Fritz Koenig 

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Re: [Freedreno] [PATCH 4/4] drm/msm: dpu: Don't queue the frame_done watchdog for cursor

2019-02-05 Thread Fritz Koenig
On Mon, Jan 28, 2019 at 12:43 PM Sean Paul  wrote:
>
> From: Sean Paul 
>
> In the case of an async/cursor update, we don't wait for the frame_done
> event, which means handle_frame_done is never called, and the frame_done
> watchdog isn't canceled. Currently, this results in a frame_done timeout
> every time the cursor moves without a synchronous frame following it up
> before the timeout expires. Since we don't wait for frame_done, and
> don't handle it, we shouldn't modify the watchdog.
>
> Signed-off-by: Sean Paul 
> ---
>  drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 19 +--
>  1 file changed, 13 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 
> b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> index 51e46b206c73e..05145cf9fb408 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> @@ -1794,7 +1794,6 @@ void dpu_encoder_kickoff(struct drm_encoder *drm_enc, 
> bool async)
>  {
> struct dpu_encoder_virt *dpu_enc;
> struct dpu_encoder_phys *phys;
> -   unsigned long timeout_ms;
> ktime_t wakeup_time;
> unsigned int i;
>
> @@ -1807,12 +1806,20 @@ void dpu_encoder_kickoff(struct drm_encoder *drm_enc, 
> bool async)
>
> trace_dpu_enc_kickoff(DRMID(drm_enc));
>
> -   timeout_ms = DPU_ENCODER_FRAME_DONE_TIMEOUT_FRAMES * 1000 /
> -   drm_mode_vrefresh(_enc->crtc->state->adjusted_mode);
> +   /*
> +* Asynchronous frames don't handle FRAME_DONE events. As such, they
> +* shouldn't enable the frame_done watchdog since it will always time
> +* out.
> +*/
> +   if (!async) {
> +   unsigned long timeout_ms;
> +   timeout_ms = DPU_ENCODER_FRAME_DONE_TIMEOUT_FRAMES * 1000 /
> +   
> drm_mode_vrefresh(_enc->crtc->state->adjusted_mode);
>
> -   atomic_set(_enc->frame_done_timeout_ms, timeout_ms);
> -   mod_timer(_enc->frame_done_timer,
> - jiffies + msecs_to_jiffies(timeout_ms));
> +   atomic_set(_enc->frame_done_timeout_ms, timeout_ms);
> +   mod_timer(_enc->frame_done_timer,
> + jiffies + msecs_to_jiffies(timeout_ms));
> +   }
>
>     /* All phys encs are ready to go, trigger the kickoff */
> _dpu_encoder_kickoff_phys(dpu_enc, async);
> --
> Sean Paul, Software Engineer, Google / Chromium OS
>

Reviewed-by: Fritz Koenig 

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Re: [Freedreno] [PATCH] drm/msm: dpu: Don't set frame_busy_mask for async updates

2019-02-05 Thread Fritz Koenig
On Wed, Jan 30, 2019 at 8:32 AM Sean Paul  wrote:
>
> From: Sean Paul 
>
> The frame_busy mask is used in frame_done event handling, which is not
> invoked for async commits. So an async commit will leave the
> frame_busy mask populated after it completes and future commits will start
> with the busy mask incorrect.
>
> This showed up on disable after cursor move. I was hitting the "this should
> not happen" comment in the frame event worker since frame_busy was set,
> we queued the event, but there were no frames pending (since async
> also doesn't set that).
>
> Signed-off-by: Sean Paul 
> ---
>  drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 8 +++-
>  1 file changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 
> b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> index 36158b7d99cd..1a81c4daabc9 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> @@ -1558,8 +1558,14 @@ static void _dpu_encoder_kickoff_phys(struct 
> dpu_encoder_virt *dpu_enc,
> if (!ctl)
> continue;
>
> -   if (phys->split_role != ENC_ROLE_SLAVE)
> +   /*
> +* This is cleared in frame_done worker, which isn't invoked
> +* for async commits. So don't set this for async, since it'll
> +* roll over to the next commit.
> +*/
> +   if (!async && phys->split_role != ENC_ROLE_SLAVE)
> set_bit(i, dpu_enc->frame_busy_mask);
> +
> if (!phys->ops.needs_single_flush ||
> !phys->ops.needs_single_flush(phys))
>     _dpu_encoder_trigger_flush(_enc->base, phys, 0x0,
> --
> Sean Paul, Software Engineer, Google / Chromium OS
>

Reviewed-by: Fritz Koenig 

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