Re: [PATCH v2] drm/msm: add msm8998 hdmi phy/pll support
On 05/07/2024 16:34, Dmitry Baryshkov wrote:
> On Thu, Jul 04, 2024 at 06:45:36PM GMT, Marc Gonzalez wrote:
>
>> From: Arnaud Vrac
>>
>> Ported from the downstream driver.
>
> Please write some sensible commit message.
Here's an attempt at expanding the commit message:
"""
This code adds support for the HDMI PHY block in the MSM8998.
It is a copy & paste of the vendor driver downstream:
https://git.codelinaro.org/clo/la/kernel/msm-4.4/-/blob/caf_migration/kernel.lnx.4.4.r38-rel/drivers/clk/msm/mdss/mdss-hdmi-pll-8998.c
"""
>> drivers/gpu/drm/msm/Makefile | 1 +
>> drivers/gpu/drm/msm/hdmi/hdmi.c| 1 +
>> drivers/gpu/drm/msm/hdmi/hdmi.h| 8 +
>> drivers/gpu/drm/msm/hdmi/hdmi_phy.c| 5 +
>> drivers/gpu/drm/msm/hdmi/hdmi_phy_8998.c | 789
>> +
>> drivers/gpu/drm/msm/registers/display/hdmi.xml | 89 +++
>> 6 files changed, 893 insertions(+)
>
> - Missing changelog
- Rebase onto v6.10
- Move drivers/gpu/drm/msm/hdmi/hdmi.xml.h to
drivers/gpu/drm/msm/registers/display/hdmi.xml
- Add copyright attribution
- Remove all dead/debug/temporary code
> - Missing a pointer to bindings. Ideally bindings should come together with
> the driver.
"qcom,hdmi-phy-8998" is defined in "HDMI TX support in msm8998" series (Acked
by Rob Herring & Vinod Koul)
> I'm not going to check the math, but it looks pretty close to what we
> have for msm8996.
What is the consequence of this?
>> +static const char * const hdmi_phy_8998_reg_names[] = {
>> +"vdda-pll",
>> +"vdda-phy",
>
> Unless you have a strong reason to, please use vcca and vddio here, so
> that we don't have unnecessary conditionals in schema.
The vendor code uses vddio & vcca for msm8996;
vdda-pll & vdda-phy for msm8998.
Which is vcca? Which is vddio?
https://git.codelinaro.org/clo/la/kernel/msm-4.4/-/blob/caf_migration/kernel.lnx.4.4.r38-rel/arch/arm/boot/dts/qcom/msm8996-mdss-pll.dtsi
https://git.codelinaro.org/clo/la/kernel/msm-4.4/-/blob/caf_migration/kernel.lnx.4.4.r38-rel/arch/arm/boot/dts/qcom/msm8998-mdss-pll.dtsi#L121-172
Regards
[PATCH v2] drm/msm: add msm8998 hdmi phy/pll support
From: Arnaud Vrac
Ported from the downstream driver.
Signed-off-by: Arnaud Vrac
Signed-off-by: Marc Gonzalez
---
drivers/gpu/drm/msm/Makefile | 1 +
drivers/gpu/drm/msm/hdmi/hdmi.c| 1 +
drivers/gpu/drm/msm/hdmi/hdmi.h| 8 +
drivers/gpu/drm/msm/hdmi/hdmi_phy.c| 5 +
drivers/gpu/drm/msm/hdmi/hdmi_phy_8998.c | 789 +
drivers/gpu/drm/msm/registers/display/hdmi.xml | 89 +++
6 files changed, 893 insertions(+)
diff --git a/drivers/gpu/drm/msm/Makefile b/drivers/gpu/drm/msm/Makefile
index eb788921ff4fe..b9a5dc8c33ede 100644
--- a/drivers/gpu/drm/msm/Makefile
+++ b/drivers/gpu/drm/msm/Makefile
@@ -32,6 +32,7 @@ msm-display-$(CONFIG_DRM_MSM_HDMI) += \
hdmi/hdmi_phy.o \
hdmi/hdmi_phy_8960.o \
hdmi/hdmi_phy_8996.o \
+ hdmi/hdmi_phy_8998.o \
hdmi/hdmi_phy_8x60.o \
hdmi/hdmi_phy_8x74.o \
hdmi/hdmi_pll_8960.o \
diff --git a/drivers/gpu/drm/msm/hdmi/hdmi.c b/drivers/gpu/drm/msm/hdmi/hdmi.c
index 24abcb7254cc4..0bfee41c2e71a 100644
--- a/drivers/gpu/drm/msm/hdmi/hdmi.c
+++ b/drivers/gpu/drm/msm/hdmi/hdmi.c
@@ -549,6 +549,7 @@ static void msm_hdmi_dev_remove(struct platform_device
*pdev)
}
static const struct of_device_id msm_hdmi_dt_match[] = {
+ { .compatible = "qcom,hdmi-tx-8998", .data = _tx_8974_config },
{ .compatible = "qcom,hdmi-tx-8996", .data = _tx_8974_config },
{ .compatible = "qcom,hdmi-tx-8994", .data = _tx_8974_config },
{ .compatible = "qcom,hdmi-tx-8084", .data = _tx_8974_config },
diff --git a/drivers/gpu/drm/msm/hdmi/hdmi.h b/drivers/gpu/drm/msm/hdmi/hdmi.h
index 4586baf364151..a62d2aedfbb72 100644
--- a/drivers/gpu/drm/msm/hdmi/hdmi.h
+++ b/drivers/gpu/drm/msm/hdmi/hdmi.h
@@ -137,6 +137,7 @@ enum hdmi_phy_type {
MSM_HDMI_PHY_8960,
MSM_HDMI_PHY_8x74,
MSM_HDMI_PHY_8996,
+ MSM_HDMI_PHY_8998,
MSM_HDMI_PHY_MAX,
};
@@ -154,6 +155,7 @@ extern const struct hdmi_phy_cfg msm_hdmi_phy_8x60_cfg;
extern const struct hdmi_phy_cfg msm_hdmi_phy_8960_cfg;
extern const struct hdmi_phy_cfg msm_hdmi_phy_8x74_cfg;
extern const struct hdmi_phy_cfg msm_hdmi_phy_8996_cfg;
+extern const struct hdmi_phy_cfg msm_hdmi_phy_8998_cfg;
struct hdmi_phy {
struct platform_device *pdev;
@@ -184,6 +186,7 @@ void __exit msm_hdmi_phy_driver_unregister(void);
#ifdef CONFIG_COMMON_CLK
int msm_hdmi_pll_8960_init(struct platform_device *pdev);
int msm_hdmi_pll_8996_init(struct platform_device *pdev);
+int msm_hdmi_pll_8998_init(struct platform_device *pdev);
#else
static inline int msm_hdmi_pll_8960_init(struct platform_device *pdev)
{
@@ -194,6 +197,11 @@ static inline int msm_hdmi_pll_8996_init(struct
platform_device *pdev)
{
return -ENODEV;
}
+
+static inline int msm_hdmi_pll_8998_init(struct platform_device *pdev)
+{
+ return -ENODEV;
+}
#endif
/*
diff --git a/drivers/gpu/drm/msm/hdmi/hdmi_phy.c
b/drivers/gpu/drm/msm/hdmi/hdmi_phy.c
index 88a3423b7f24d..95b3f7535d840 100644
--- a/drivers/gpu/drm/msm/hdmi/hdmi_phy.c
+++ b/drivers/gpu/drm/msm/hdmi/hdmi_phy.c
@@ -118,6 +118,9 @@ static int msm_hdmi_phy_pll_init(struct platform_device
*pdev,
case MSM_HDMI_PHY_8996:
ret = msm_hdmi_pll_8996_init(pdev);
break;
+ case MSM_HDMI_PHY_8998:
+ ret = msm_hdmi_pll_8998_init(pdev);
+ break;
/*
* we don't have PLL support for these, don't report an error for now
*/
@@ -193,6 +196,8 @@ static const struct of_device_id msm_hdmi_phy_dt_match[] = {
.data = _hdmi_phy_8x74_cfg },
{ .compatible = "qcom,hdmi-phy-8996",
.data = _hdmi_phy_8996_cfg },
+ { .compatible = "qcom,hdmi-phy-8998",
+ .data = _hdmi_phy_8998_cfg },
{}
};
diff --git a/drivers/gpu/drm/msm/hdmi/hdmi_phy_8998.c
b/drivers/gpu/drm/msm/hdmi/hdmi_phy_8998.c
new file mode 100644
index 0..ade9e0a226eb0
--- /dev/null
+++ b/drivers/gpu/drm/msm/hdmi/hdmi_phy_8998.c
@@ -0,0 +1,789 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (c) 2016, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2024 Freebox SAS
+ */
+
+#include
+#include
+
+#include "hdmi.h"
+
+#define HDMI_VCO_MAX_FREQ 120UL
+#define HDMI_VCO_MIN_FREQ 80UL
+
+#define HDMI_PCLK_MAX_FREQ 6
+#define HDMI_PCLK_MIN_FREQ 2500
+
+#define HDMI_HIGH_FREQ_BIT_CLK_THRESHOLD 34UL
+#define HDMI_DIG_FREQ_BIT_CLK_THRESHOLD15UL
+#define HDMI_MID_FREQ_BIT_CLK_THRESHOLD75000UL
+#define HDMI_CORECLK_DIV 5
+#define HDMI_DEFAULT_REF_CLOCK 1920
+#define HDMI_PLL_CMP_CNT 1024
+
+#define HDMI_PLL_POLL_
[PATCH v5 2/4] dt-bindings: display/msm: hdmi: add qcom,hdmi-tx-8998
HDMI TX block embedded in the APQ8098. Reviewed-by: Rob Herring (Arm) Reviewed-by: Conor Dooley Signed-off-by: Marc Gonzalez --- .../devicetree/bindings/display/msm/hdmi.yaml | 28 -- 1 file changed, 26 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/display/msm/hdmi.yaml b/Documentation/devicetree/bindings/display/msm/hdmi.yaml index 47e97669821c3..d4a2033afea8d 100644 --- a/Documentation/devicetree/bindings/display/msm/hdmi.yaml +++ b/Documentation/devicetree/bindings/display/msm/hdmi.yaml @@ -19,14 +19,15 @@ properties: - qcom,hdmi-tx-8974 - qcom,hdmi-tx-8994 - qcom,hdmi-tx-8996 + - qcom,hdmi-tx-8998 clocks: minItems: 1 -maxItems: 5 +maxItems: 8 clock-names: minItems: 1 -maxItems: 5 +maxItems: 8 reg: minItems: 1 @@ -142,6 +143,7 @@ allOf: properties: clocks: minItems: 5 + maxItems: 5 clock-names: items: - const: mdp_core @@ -151,6 +153,28 @@ allOf: - const: extp hdmi-mux-supplies: false + - if: + properties: +compatible: + contains: +enum: + - qcom,hdmi-tx-8998 +then: + properties: +clocks: + minItems: 8 + maxItems: 8 +clock-names: + items: +- const: mdp_core +- const: iface +- const: core +- const: alt_iface +- const: extp +- const: bus +- const: mnoc +- const: iface_mmss + additionalProperties: false examples: -- 2.34.1
[PATCH v5 0/4] HDMI TX support in msm8998
DT bits required for HDMI TX support in APQ8098 (msm8998 cousin) --- Changes in v5: - Fix property & property-names for TX pinctrl in DTSI (Konrad) - NOT CHANGED: clock trees for TX & PHY based on Dmitry & Jeffrey's remarks - Link to v4: https://lore.kernel.org/r/20240613-hdmi-tx-v4-0-4af17e468...@freebox.fr Changes in v4: - Collect tags since v3 - Reword patch 1 subject (Vinod) - Link to v3: https://lore.kernel.org/r/20240606-hdmi-tx-v3-0-9d7feb6d3...@freebox.fr Changes in v3 - Address Rob's comments on patch 2: - 'maxItems: 5' for clocks in the 8996 if/then schema - match the order of 8996 for the clock-names in common --- Arnaud Vrac (1): arm64: dts: qcom: add HDMI nodes for msm8998 Marc Gonzalez (3): dt-bindings: phy: add qcom,hdmi-phy-8998 dt-bindings: display/msm: hdmi: add qcom,hdmi-tx-8998 arm64: dts: qcom: msm8998: add HDMI GPIOs .../devicetree/bindings/display/msm/hdmi.yaml | 28 - .../devicetree/bindings/phy/qcom,hdmi-phy-qmp.yaml | 1 + arch/arm64/boot/dts/qcom/msm8998.dtsi | 128 - 3 files changed, 154 insertions(+), 3 deletions(-) --- base-commit: 0169018354b9a9a2ef5d4972da3c4644ab2a73b2 change-id: 20240606-hdmi-tx-00ee8e7ddbac Best regards, -- Marc Gonzalez
[PATCH v5 1/4] dt-bindings: phy: add qcom,hdmi-phy-8998
HDMI PHY block embedded in the APQ8098. Acked-by: Rob Herring (Arm) Signed-off-by: Marc Gonzalez --- Documentation/devicetree/bindings/phy/qcom,hdmi-phy-qmp.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/phy/qcom,hdmi-phy-qmp.yaml b/Documentation/devicetree/bindings/phy/qcom,hdmi-phy-qmp.yaml index 83fe4b39b56f4..78607ee3e2e84 100644 --- a/Documentation/devicetree/bindings/phy/qcom,hdmi-phy-qmp.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,hdmi-phy-qmp.yaml @@ -14,6 +14,7 @@ properties: compatible: enum: - qcom,hdmi-phy-8996 + - qcom,hdmi-phy-8998 reg: maxItems: 6 -- 2.34.1
[PATCH v5 3/4] arm64: dts: qcom: msm8998: add HDMI GPIOs
MSM8998 GPIO pin controller reference design defines:
- CEC: pin 31
- DDC: pin 32,33
- HPD: pin 34
Downstream vendor code for reference:
https://git.codelinaro.org/clo/la/kernel/msm-4.4/-/blob/caf_migration/kernel.lnx.4.4.r38-rel/arch/arm/boot/dts/qcom/msm8998-pinctrl.dtsi#L2324-2400
mdss_hdmi_{cec,ddc,hpd}_{active,suspend}
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Marc Gonzalez
---
arch/arm64/boot/dts/qcom/msm8998.dtsi | 28
1 file changed, 28 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi
b/arch/arm64/boot/dts/qcom/msm8998.dtsi
index e5f051f5a92de..ba5e873f0f35f 100644
--- a/arch/arm64/boot/dts/qcom/msm8998.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi
@@ -1434,6 +1434,34 @@ blsp2_spi6_default: blsp2-spi6-default-state {
drive-strength = <6>;
bias-disable;
};
+
+ hdmi_cec_default: hdmi-cec-default-state {
+ pins = "gpio31";
+ function = "hdmi_cec";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+
+ hdmi_ddc_default: hdmi-ddc-default-state {
+ pins = "gpio32", "gpio33";
+ function = "hdmi_ddc";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+
+ hdmi_hpd_default: hdmi-hpd-default-state {
+ pins = "gpio34";
+ function = "hdmi_hot";
+ drive-strength = <16>;
+ bias-pull-down;
+ };
+
+ hdmi_hpd_sleep: hdmi-hpd-sleep-state {
+ pins = "gpio34";
+ function = "hdmi_hot";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
};
remoteproc_mss: remoteproc@408 {
--
2.34.1
[PATCH v5 4/4] arm64: dts: qcom: add HDMI nodes for msm8998
From: Arnaud Vrac
Port device nodes from vendor code.
Signed-off-by: Arnaud Vrac
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Marc Gonzalez
---
arch/arm64/boot/dts/qcom/msm8998.dtsi | 100 +-
1 file changed, 99 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi
b/arch/arm64/boot/dts/qcom/msm8998.dtsi
index ba5e873f0f35f..417c12534823f 100644
--- a/arch/arm64/boot/dts/qcom/msm8998.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi
@@ -2785,7 +2785,7 @@ mmcc: clock-controller@c8c {
<_dsi0_phy 0>,
<_dsi1_phy 1>,
<_dsi1_phy 0>,
-<0>,
+<_phy 0>,
<0>,
<0>,
< GCC_MMSS_GPLL0_DIV_CLK>;
@@ -2890,6 +2890,14 @@ dpu_intf2_out: endpoint {
remote-endpoint =
<_dsi1_in>;
};
};
+
+ port@2 {
+ reg = <2>;
+
+ dpu_intf3_out: endpoint {
+ remote-endpoint =
<_in>;
+ };
+ };
};
};
@@ -3045,6 +3053,96 @@ mdss_dsi1_phy: phy@c996400 {
status = "disabled";
};
+
+ hdmi: hdmi-tx@c9a {
+ compatible = "qcom,hdmi-tx-8998";
+ reg = <0x0c9a 0x50c>,
+ <0x0078 0x6220>,
+ <0x0c9e 0x2c>;
+ reg-names = "core_physical",
+ "qfprom_physical",
+ "hdcp_physical";
+
+ interrupt-parent = <>;
+ interrupts = <8>;
+
+ clocks = < MDSS_MDP_CLK>,
+< MDSS_AHB_CLK>,
+< MDSS_HDMI_CLK>,
+< MDSS_HDMI_DP_AHB_CLK>,
+< MDSS_EXTPCLK_CLK>,
+< MDSS_AXI_CLK>,
+< MNOC_AHB_CLK>,
+< MISC_AHB_CLK>;
+ clock-names =
+ "mdp_core",
+ "iface",
+ "core",
+ "alt_iface",
+ "extp",
+ "bus",
+ "mnoc",
+ "iface_mmss";
+
+ phys = <_phy>;
+ #sound-dai-cells = <1>;
+
+ pinctrl-0 = <_hpd_default>,
+ <_ddc_default>,
+ <_cec_default>;
+ pinctrl-1 = <_hpd_sleep>,
+ <_ddc_default>,
+ <_cec_default>;
+ pinctrl-names = "default", "sleep";
+
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ hdmi_in: endpoint {
+ remote-endpoint =
<_intf3_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ hdmi_out: endpoint {
+ };
+
Re: [PATCH v4 4/4] arm64: dts: qcom: add HDMI nodes for msm8998
On 17/06/2024 19:14, Jeffrey Hugo wrote: > On 6/15/2024 5:35 AM, Konrad Dybcio wrote: >> On 14.06.2024 12:33 PM, Dmitry Baryshkov wrote: >>> On Fri, Jun 14, 2024 at 01:55:46AM GMT, Konrad Dybcio wrote: >> >> [...] >> GCC_HDMI_CLKREF_CLK is a child of xo, so you can drop the latter. It would also be worth confirming whether it's really powering the PHY and not the TX.. You can test that by trying to only power on the phy (e.g. call the phy_power_on or whatever APIs) with and without the clock >>> >>> I'd prefer to keep it. I think the original DT used one of LN_BB clocks >>> here, so it might be that the HDMI uses CXO2 / LN_BB instead of the main >>> CXO. >>> >>> If somebody can check, which clock is actually used for the HDMI, it >>> would be really great. >> >> +CC jhugo - could you please take a look? >> >> Konrad > > Documentation is not great but it looks like CXO from what little I can > find. If I read correctly, the conclusion of this sub-thread is that the clock tree described in the patch is correct? HDMI controller: + clocks = < MDSS_MDP_CLK>, +< MDSS_AHB_CLK>, +< MDSS_HDMI_CLK>, +< MDSS_HDMI_DP_AHB_CLK>, +< MDSS_EXTPCLK_CLK>, +< MDSS_AXI_CLK>, +< MNOC_AHB_CLK>, +< MISC_AHB_CLK>; + clock-names = + "mdp_core", + "iface", + "core", + "alt_iface", + "extp", + "bus", + "mnoc", + "iface_mmss"; PHY: + clocks = < MDSS_AHB_CLK>, +< GCC_HDMI_CLKREF_CLK>, +< RPM_SMD_XO_CLK_SRC>; + clock-names = "iface", + "ref", + "xo"; Regards
[PATCH v4 3/4] arm64: dts: qcom: msm8998: add HDMI GPIOs
MSM8998 GPIO pin controller reference design defines:
- CEC: pin 31
- DDC: pin 32,33
- HPD: pin 34
Downstream vendor code for reference:
https://git.codelinaro.org/clo/la/kernel/msm-4.4/-/blob/caf_migration/kernel.lnx.4.4.r38-rel/arch/arm/boot/dts/qcom/msm8998-pinctrl.dtsi#L2324-2400
mdss_hdmi_{cec,ddc,hpd}_{active,suspend}
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Marc Gonzalez
---
arch/arm64/boot/dts/qcom/msm8998.dtsi | 28
1 file changed, 28 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi
b/arch/arm64/boot/dts/qcom/msm8998.dtsi
index e5f051f5a92de..ba5e873f0f35f 100644
--- a/arch/arm64/boot/dts/qcom/msm8998.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi
@@ -1434,6 +1434,34 @@ blsp2_spi6_default: blsp2-spi6-default-state {
drive-strength = <6>;
bias-disable;
};
+
+ hdmi_cec_default: hdmi-cec-default-state {
+ pins = "gpio31";
+ function = "hdmi_cec";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+
+ hdmi_ddc_default: hdmi-ddc-default-state {
+ pins = "gpio32", "gpio33";
+ function = "hdmi_ddc";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+
+ hdmi_hpd_default: hdmi-hpd-default-state {
+ pins = "gpio34";
+ function = "hdmi_hot";
+ drive-strength = <16>;
+ bias-pull-down;
+ };
+
+ hdmi_hpd_sleep: hdmi-hpd-sleep-state {
+ pins = "gpio34";
+ function = "hdmi_hot";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
};
remoteproc_mss: remoteproc@408 {
--
2.34.1
[PATCH v4 0/4] HDMI TX support in msm8998
DT bits required for HDMI TX support in APQ8098 (msm8998 cousin) Changes in v4: - Collect tags since v3 - Reword patch 1 subject (Vinod) - Link to v3: https://lore.kernel.org/r/20240606-hdmi-tx-v3-0-9d7feb6d3...@freebox.fr Changes in v3 - Address Rob's comments on patch 2: - 'maxItems: 5' for clocks in the 8996 if/then schema - match the order of 8996 for the clock-names in common --- Arnaud Vrac (1): arm64: dts: qcom: add HDMI nodes for msm8998 Marc Gonzalez (3): dt-bindings: phy: add qcom,hdmi-phy-8998 dt-bindings: display/msm: hdmi: add qcom,hdmi-tx-8998 arm64: dts: qcom: msm8998: add HDMI GPIOs .../devicetree/bindings/display/msm/hdmi.yaml | 28 - .../devicetree/bindings/phy/qcom,hdmi-phy-qmp.yaml | 1 + arch/arm64/boot/dts/qcom/msm8998.dtsi | 128 - 3 files changed, 154 insertions(+), 3 deletions(-) --- base-commit: 2c4f4d94dcbf6f500b92fff5600989ea23a207e8 change-id: 20240606-hdmi-tx-00ee8e7ddbac Best regards, -- Marc Gonzalez
[PATCH v4 1/4] dt-bindings: phy: add qcom,hdmi-phy-8998
HDMI PHY block embedded in the APQ8098. Acked-by: Rob Herring (Arm) Signed-off-by: Marc Gonzalez --- Documentation/devicetree/bindings/phy/qcom,hdmi-phy-qmp.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/phy/qcom,hdmi-phy-qmp.yaml b/Documentation/devicetree/bindings/phy/qcom,hdmi-phy-qmp.yaml index 83fe4b39b56f4..78607ee3e2e84 100644 --- a/Documentation/devicetree/bindings/phy/qcom,hdmi-phy-qmp.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,hdmi-phy-qmp.yaml @@ -14,6 +14,7 @@ properties: compatible: enum: - qcom,hdmi-phy-8996 + - qcom,hdmi-phy-8998 reg: maxItems: 6 -- 2.34.1
[PATCH v4 2/4] dt-bindings: display/msm: hdmi: add qcom,hdmi-tx-8998
HDMI TX block embedded in the APQ8098. Reviewed-by: Rob Herring (Arm) Reviewed-by: Conor Dooley Signed-off-by: Marc Gonzalez --- .../devicetree/bindings/display/msm/hdmi.yaml | 28 -- 1 file changed, 26 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/display/msm/hdmi.yaml b/Documentation/devicetree/bindings/display/msm/hdmi.yaml index 47e97669821c3..d4a2033afea8d 100644 --- a/Documentation/devicetree/bindings/display/msm/hdmi.yaml +++ b/Documentation/devicetree/bindings/display/msm/hdmi.yaml @@ -19,14 +19,15 @@ properties: - qcom,hdmi-tx-8974 - qcom,hdmi-tx-8994 - qcom,hdmi-tx-8996 + - qcom,hdmi-tx-8998 clocks: minItems: 1 -maxItems: 5 +maxItems: 8 clock-names: minItems: 1 -maxItems: 5 +maxItems: 8 reg: minItems: 1 @@ -142,6 +143,7 @@ allOf: properties: clocks: minItems: 5 + maxItems: 5 clock-names: items: - const: mdp_core @@ -151,6 +153,28 @@ allOf: - const: extp hdmi-mux-supplies: false + - if: + properties: +compatible: + contains: +enum: + - qcom,hdmi-tx-8998 +then: + properties: +clocks: + minItems: 8 + maxItems: 8 +clock-names: + items: +- const: mdp_core +- const: iface +- const: core +- const: alt_iface +- const: extp +- const: bus +- const: mnoc +- const: iface_mmss + additionalProperties: false examples: -- 2.34.1
[PATCH v4 4/4] arm64: dts: qcom: add HDMI nodes for msm8998
From: Arnaud Vrac
Port device nodes from vendor code.
Signed-off-by: Arnaud Vrac
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Marc Gonzalez
---
arch/arm64/boot/dts/qcom/msm8998.dtsi | 100 +-
1 file changed, 99 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi
b/arch/arm64/boot/dts/qcom/msm8998.dtsi
index ba5e873f0f35f..5c53957da61c5 100644
--- a/arch/arm64/boot/dts/qcom/msm8998.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi
@@ -2785,7 +2785,7 @@ mmcc: clock-controller@c8c {
<_dsi0_phy 0>,
<_dsi1_phy 1>,
<_dsi1_phy 0>,
-<0>,
+<_phy 0>,
<0>,
<0>,
< GCC_MMSS_GPLL0_DIV_CLK>;
@@ -2890,6 +2890,14 @@ dpu_intf2_out: endpoint {
remote-endpoint =
<_dsi1_in>;
};
};
+
+ port@2 {
+ reg = <2>;
+
+ dpu_intf3_out: endpoint {
+ remote-endpoint =
<_in>;
+ };
+ };
};
};
@@ -3045,6 +3053,96 @@ mdss_dsi1_phy: phy@c996400 {
status = "disabled";
};
+
+ hdmi: hdmi-tx@c9a {
+ compatible = "qcom,hdmi-tx-8998";
+ reg = <0x0c9a 0x50c>,
+ <0x0078 0x6220>,
+ <0x0c9e 0x2c>;
+ reg-names = "core_physical",
+ "qfprom_physical",
+ "hdcp_physical";
+
+ interrupt-parent = <>;
+ interrupts = <8>;
+
+ clocks = < MDSS_MDP_CLK>,
+< MDSS_AHB_CLK>,
+< MDSS_HDMI_CLK>,
+< MDSS_HDMI_DP_AHB_CLK>,
+< MDSS_EXTPCLK_CLK>,
+< MDSS_AXI_CLK>,
+< MNOC_AHB_CLK>,
+< MISC_AHB_CLK>;
+ clock-names =
+ "mdp_core",
+ "iface",
+ "core",
+ "alt_iface",
+ "extp",
+ "bus",
+ "mnoc",
+ "iface_mmss";
+
+ phys = <_phy>;
+ #sound-dai-cells = <1>;
+
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <_hpd_default
+_ddc_default
+_cec_default>;
+ pinctrl-1 = <_hpd_sleep
+_ddc_default
+_cec_default>;
+
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ hdmi_in: endpoint {
+ remote-endpoint =
<_intf3_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ hdmi_out: endpoint {
+ };
+
Re: [PATCH v3 2/4] dt-bindings: display/msm: hdmi: add qcom,hdmi-tx-8998
On 12/06/2024 19:44, Vinod Koul wrote: > On 06-06-24, 18:07, Marc Gonzalez wrote: > >> HDMI TX block embedded in the APQ8098. > > This one too I assume this refers to: "Why is the patch titled display/msm, this is phy patch and it should be tagged as such." I always copy what others have done before me: $ git log --oneline Documentation/devicetree/bindings/display/msm/hdmi.yaml 27339d689d2f9 dt-bindings: display/msm: hdmi: add qcom,hdmi-tx-8998 6c04d89a6138a dt-bindings: display/msm: hdmi: mark hdmi-mux-supply as deprecated e3c5ce88e8f93 dt-bindings: display/msm: hdmi: mark old GPIO properties as deprecated 2f14bc38d88a4 dt-bindings: display/msm: hdmi: split and convert to yaml Are you saying we should diverge from the previous nomenclature? Regards.
[PATCH v3 3/4] arm64: dts: qcom: msm8998: add HDMI GPIOs
MSM8998 GPIO pin controller reference design defines:
- CEC: pin 31
- DDC: pin 32,33
- HPD: pin 34
Downstream vendor code for reference:
https://git.codelinaro.org/clo/la/kernel/msm-4.4/-/blob/caf_migration/kernel.lnx.4.4.r38-rel/arch/arm/boot/dts/qcom/msm8998-pinctrl.dtsi#L2324-2400
mdss_hdmi_{cec,ddc,hpd}_{active,suspend}
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Marc Gonzalez
---
arch/arm64/boot/dts/qcom/msm8998.dtsi | 28
1 file changed, 28 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi
b/arch/arm64/boot/dts/qcom/msm8998.dtsi
index e5f051f5a92de..ba5e873f0f35f 100644
--- a/arch/arm64/boot/dts/qcom/msm8998.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi
@@ -1434,6 +1434,34 @@ blsp2_spi6_default: blsp2-spi6-default-state {
drive-strength = <6>;
bias-disable;
};
+
+ hdmi_cec_default: hdmi-cec-default-state {
+ pins = "gpio31";
+ function = "hdmi_cec";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+
+ hdmi_ddc_default: hdmi-ddc-default-state {
+ pins = "gpio32", "gpio33";
+ function = "hdmi_ddc";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+
+ hdmi_hpd_default: hdmi-hpd-default-state {
+ pins = "gpio34";
+ function = "hdmi_hot";
+ drive-strength = <16>;
+ bias-pull-down;
+ };
+
+ hdmi_hpd_sleep: hdmi-hpd-sleep-state {
+ pins = "gpio34";
+ function = "hdmi_hot";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
};
remoteproc_mss: remoteproc@408 {
--
2.34.1
[PATCH v3 1/4] dt-bindings: display/msm: hdmi: add qcom,hdmi-phy-8998
HDMI PHY block embedded in the APQ8098. Acked-by: Rob Herring (Arm) Signed-off-by: Marc Gonzalez --- Documentation/devicetree/bindings/phy/qcom,hdmi-phy-qmp.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/phy/qcom,hdmi-phy-qmp.yaml b/Documentation/devicetree/bindings/phy/qcom,hdmi-phy-qmp.yaml index 83fe4b39b56f4..78607ee3e2e84 100644 --- a/Documentation/devicetree/bindings/phy/qcom,hdmi-phy-qmp.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,hdmi-phy-qmp.yaml @@ -14,6 +14,7 @@ properties: compatible: enum: - qcom,hdmi-phy-8996 + - qcom,hdmi-phy-8998 reg: maxItems: 6 -- 2.34.1
[PATCH v3 2/4] dt-bindings: display/msm: hdmi: add qcom,hdmi-tx-8998
HDMI TX block embedded in the APQ8098. Signed-off-by: Marc Gonzalez --- .../devicetree/bindings/display/msm/hdmi.yaml | 28 -- 1 file changed, 26 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/display/msm/hdmi.yaml b/Documentation/devicetree/bindings/display/msm/hdmi.yaml index 47e97669821c3..d4a2033afea8d 100644 --- a/Documentation/devicetree/bindings/display/msm/hdmi.yaml +++ b/Documentation/devicetree/bindings/display/msm/hdmi.yaml @@ -19,14 +19,15 @@ properties: - qcom,hdmi-tx-8974 - qcom,hdmi-tx-8994 - qcom,hdmi-tx-8996 + - qcom,hdmi-tx-8998 clocks: minItems: 1 -maxItems: 5 +maxItems: 8 clock-names: minItems: 1 -maxItems: 5 +maxItems: 8 reg: minItems: 1 @@ -142,6 +143,7 @@ allOf: properties: clocks: minItems: 5 + maxItems: 5 clock-names: items: - const: mdp_core @@ -151,6 +153,28 @@ allOf: - const: extp hdmi-mux-supplies: false + - if: + properties: +compatible: + contains: +enum: + - qcom,hdmi-tx-8998 +then: + properties: +clocks: + minItems: 8 + maxItems: 8 +clock-names: + items: +- const: mdp_core +- const: iface +- const: core +- const: alt_iface +- const: extp +- const: bus +- const: mnoc +- const: iface_mmss + additionalProperties: false examples: -- 2.34.1
[PATCH v3 4/4] arm64: dts: qcom: add HDMI nodes for msm8998
From: Arnaud Vrac
Port device nodes from vendor code.
Signed-off-by: Arnaud Vrac
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Marc Gonzalez
---
arch/arm64/boot/dts/qcom/msm8998.dtsi | 100 +-
1 file changed, 99 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi
b/arch/arm64/boot/dts/qcom/msm8998.dtsi
index ba5e873f0f35f..5c53957da61c5 100644
--- a/arch/arm64/boot/dts/qcom/msm8998.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi
@@ -2785,7 +2785,7 @@ mmcc: clock-controller@c8c {
<_dsi0_phy 0>,
<_dsi1_phy 1>,
<_dsi1_phy 0>,
-<0>,
+<_phy 0>,
<0>,
<0>,
< GCC_MMSS_GPLL0_DIV_CLK>;
@@ -2890,6 +2890,14 @@ dpu_intf2_out: endpoint {
remote-endpoint =
<_dsi1_in>;
};
};
+
+ port@2 {
+ reg = <2>;
+
+ dpu_intf3_out: endpoint {
+ remote-endpoint =
<_in>;
+ };
+ };
};
};
@@ -3045,6 +3053,96 @@ mdss_dsi1_phy: phy@c996400 {
status = "disabled";
};
+
+ hdmi: hdmi-tx@c9a {
+ compatible = "qcom,hdmi-tx-8998";
+ reg = <0x0c9a 0x50c>,
+ <0x0078 0x6220>,
+ <0x0c9e 0x2c>;
+ reg-names = "core_physical",
+ "qfprom_physical",
+ "hdcp_physical";
+
+ interrupt-parent = <>;
+ interrupts = <8>;
+
+ clocks = < MDSS_MDP_CLK>,
+< MDSS_AHB_CLK>,
+< MDSS_HDMI_CLK>,
+< MDSS_HDMI_DP_AHB_CLK>,
+< MDSS_EXTPCLK_CLK>,
+< MDSS_AXI_CLK>,
+< MNOC_AHB_CLK>,
+< MISC_AHB_CLK>;
+ clock-names =
+ "mdp_core",
+ "iface",
+ "core",
+ "alt_iface",
+ "extp",
+ "bus",
+ "mnoc",
+ "iface_mmss";
+
+ phys = <_phy>;
+ #sound-dai-cells = <1>;
+
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <_hpd_default
+_ddc_default
+_cec_default>;
+ pinctrl-1 = <_hpd_sleep
+_ddc_default
+_cec_default>;
+
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ hdmi_in: endpoint {
+ remote-endpoint =
<_intf3_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ hdmi_out: endpoint {
+ };
+
[PATCH v3 0/4] HDMI TX support in msm8998
DT bits required for HDMI TX support in APQ8098 (msm8998 cousin) Supersedes Changes in v3 - Address Rob's comments on patch 2: - 'maxItems: 5' for clocks in the 8996 if/then schema - match the order of 8996 for the clock-names in common --- Arnaud Vrac (1): arm64: dts: qcom: add HDMI nodes for msm8998 Marc Gonzalez (3): dt-bindings: display/msm: hdmi: add qcom,hdmi-phy-8998 dt-bindings: display/msm: hdmi: add qcom,hdmi-tx-8998 arm64: dts: qcom: msm8998: add HDMI GPIOs .../devicetree/bindings/display/msm/hdmi.yaml | 28 - .../devicetree/bindings/phy/qcom,hdmi-phy-qmp.yaml | 1 + arch/arm64/boot/dts/qcom/msm8998.dtsi | 128 - 3 files changed, 154 insertions(+), 3 deletions(-) --- base-commit: 2c4f4d94dcbf6f500b92fff5600989ea23a207e8 change-id: 20240606-hdmi-tx-00ee8e7ddbac Best regards, -- Marc Gonzalez
Re: [RFC PATCH v1] drm/msm: add msm8998 hdmi phy/pll support
On 28/05/2024 02:15, Dmitry Baryshkov wrote:
> In the end, msm8998 uses what looks like QMP v3 with a different TX
> register set
Patch diff currently looks like this:
drivers/gpu/drm/msm/Makefile | 1 +
drivers/gpu/drm/msm/hdmi/hdmi.c| 1 +
drivers/gpu/drm/msm/hdmi/hdmi.h| 8 +
drivers/gpu/drm/msm/hdmi/hdmi_phy.c| 5 +
drivers/gpu/drm/msm/hdmi/hdmi_phy_8998.c | 795 +
drivers/gpu/drm/msm/registers/display/hdmi.xml | 89 +++
6 files changed, 899 insertions(+)
I'll post hdmi_phy_8998.c below for easy reference,
but Arnaud might want me to have a closer look at
pll_get_post_div()
Though I must confess, if the code works as it is now,
why look for a different solution, especially if it's
going to be factorized again in a few weeks?
pll_get_cpctrl() and pll_get_rctrl() looks a bit odd.
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2016, The Linux Foundation. All rights reserved.
* Copyright (c) 2024 Freebox SAS
*/
#include
#include
#include "hdmi.h"
#define HDMI_VCO_MAX_FREQ 120UL
#define HDMI_VCO_MIN_FREQ 80UL
#define HDMI_PCLK_MAX_FREQ 6
#define HDMI_PCLK_MIN_FREQ 2500
#define HDMI_HIGH_FREQ_BIT_CLK_THRESHOLD34UL
#define HDMI_DIG_FREQ_BIT_CLK_THRESHOLD 15UL
#define HDMI_MID_FREQ_BIT_CLK_THRESHOLD 75000UL
#define HDMI_CORECLK_DIV5
#define HDMI_DEFAULT_REF_CLOCK 1920
#define HDMI_PLL_CMP_CNT1024
#define HDMI_PLL_POLL_MAX_READS 100
#define HDMI_PLL_POLL_TIMEOUT_US150
#define HDMI_NUM_TX_CHANNEL 4
struct hdmi_pll_8998 {
struct platform_device *pdev;
struct clk_hw clk_hw;
unsigned long rate;
/* pll mmio base */
void __iomem *mmio_qserdes_com;
/* tx channel base */
void __iomem *mmio_qserdes_tx[HDMI_NUM_TX_CHANNEL];
};
#define hw_clk_to_pll(x) container_of(x, struct hdmi_pll_8998, clk_hw)
struct hdmi_8998_phy_pll_reg_cfg {
u32 com_svs_mode_clk_sel;
u32 com_hsclk_sel;
u32 com_pll_cctrl_mode0;
u32 com_pll_rctrl_mode0;
u32 com_cp_ctrl_mode0;
u32 com_dec_start_mode0;
u32 com_div_frac_start1_mode0;
u32 com_div_frac_start2_mode0;
u32 com_div_frac_start3_mode0;
u32 com_integloop_gain0_mode0;
u32 com_integloop_gain1_mode0;
u32 com_lock_cmp_en;
u32 com_lock_cmp1_mode0;
u32 com_lock_cmp2_mode0;
u32 com_lock_cmp3_mode0;
u32 com_core_clk_en;
u32 com_coreclk_div_mode0;
u32 tx_lx_tx_band[HDMI_NUM_TX_CHANNEL];
u32 tx_lx_tx_drv_lvl[HDMI_NUM_TX_CHANNEL];
u32 tx_lx_tx_emp_post1_lvl[HDMI_NUM_TX_CHANNEL];
u32 tx_lx_pre_driver_1[HDMI_NUM_TX_CHANNEL];
u32 tx_lx_pre_driver_2[HDMI_NUM_TX_CHANNEL];
u32 tx_lx_res_code_offset[HDMI_NUM_TX_CHANNEL];
u32 phy_mode;
};
struct hdmi_8998_post_divider {
u64 vco_freq;
int hsclk_divsel;
int vco_ratio;
int tx_band_sel;
int half_rate_mode;
};
static inline struct hdmi_phy *pll_get_phy(struct hdmi_pll_8998 *pll)
{
return platform_get_drvdata(pll->pdev);
}
static inline void hdmi_pll_write(struct hdmi_pll_8998 *pll, int offset,
u32 data)
{
writel(data, pll->mmio_qserdes_com + offset);
}
static inline u32 hdmi_pll_read(struct hdmi_pll_8998 *pll, int offset)
{
return readl(pll->mmio_qserdes_com + offset);
}
static inline void hdmi_tx_chan_write(struct hdmi_pll_8998 *pll, int channel,
int offset, int data)
{
writel(data, pll->mmio_qserdes_tx[channel] + offset);
}
static inline u32 pll_get_cpctrl(u64 frac_start, unsigned long ref_clk,
bool gen_ssc)
{
if ((frac_start != 0) || gen_ssc)
return 0x8;
return 0x30;
}
static inline u32 pll_get_rctrl(u64 frac_start, bool gen_ssc)
{
if ((frac_start != 0) || gen_ssc)
return 0x16;
return 0x18;
}
static inline u32 pll_get_cctrl(u64 frac_start, bool gen_ssc)
{
if ((frac_start != 0) || gen_ssc)
return 0x34;
return 0x2;
}
static inline u32 pll_get_integloop_gain(u64 frac_start, u64 bclk, u32 ref_clk,
bool gen_ssc)
{
int digclk_divsel = bclk > HDMI_DIG_FREQ_BIT_CLK_THRESHOLD ? 1 : 2;
u64 base;
if ((frac_start != 0) || gen_ssc)
base = 0x3F;
else
base = 0xC4;
base <<= (digclk_divsel == 2 ? 1 : 0);
return (base <= 2046 ? base : 2046);
}
static inline u32 pll_get_pll_cmp(u64 fdata, unsigned long ref_clk)
{
u64
[PATCH v2 2/4] dt-bindings: display/msm: hdmi: add qcom,hdmi-tx-8998
HDMI TX block embedded in the APQ8098. Signed-off-by: Marc Gonzalez --- Documentation/devicetree/bindings/display/msm/hdmi.yaml | 26 -- 1 file changed, 24 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/display/msm/hdmi.yaml b/Documentation/devicetree/bindings/display/msm/hdmi.yaml index 47e97669821c3..13199f1676f7c 100644 --- a/Documentation/devicetree/bindings/display/msm/hdmi.yaml +++ b/Documentation/devicetree/bindings/display/msm/hdmi.yaml @@ -19,14 +19,15 @@ properties: - qcom,hdmi-tx-8974 - qcom,hdmi-tx-8994 - qcom,hdmi-tx-8996 + - qcom,hdmi-tx-8998 clocks: minItems: 1 -maxItems: 5 +maxItems: 8 clock-names: minItems: 1 -maxItems: 5 +maxItems: 8 reg: minItems: 1 @@ -151,6 +152,27 @@ allOf: - const: extp hdmi-mux-supplies: false + - if: + properties: +compatible: + contains: +enum: + - qcom,hdmi-tx-8998 +then: + properties: +clocks: + minItems: 8 +clock-names: + items: +- const: mdp_core +- const: mnoc +- const: iface +- const: bus +- const: iface_mmss +- const: core +- const: alt_iface +- const: extp + additionalProperties: false examples: -- 2.34.1
[PATCH v2 3/4] arm64: dts: qcom: msm8998: add HDMI GPIOs
MSM8998 GPIO pin controller reference design defines:
- CEC: pin 31
- DDC: pin 32,33
- HPD: pin 34
Downstream vendor code for reference:
https://git.codelinaro.org/clo/la/kernel/msm-4.4/-/blob/caf_migration/kernel.lnx.4.4.r38-rel/arch/arm/boot/dts/qcom/msm8998-pinctrl.dtsi#L2324-2400
mdss_hdmi_{cec,ddc,hpd}_{active,suspend}
Signed-off-by: Marc Gonzalez
---
arch/arm64/boot/dts/qcom/msm8998.dtsi | 28
1 file changed, 28 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi
b/arch/arm64/boot/dts/qcom/msm8998.dtsi
index e5f051f5a92de..ba5e873f0f35f 100644
--- a/arch/arm64/boot/dts/qcom/msm8998.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi
@@ -1434,6 +1434,34 @@ blsp2_spi6_default: blsp2-spi6-default-state {
drive-strength = <6>;
bias-disable;
};
+
+ hdmi_cec_default: hdmi-cec-default-state {
+ pins = "gpio31";
+ function = "hdmi_cec";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+
+ hdmi_ddc_default: hdmi-ddc-default-state {
+ pins = "gpio32", "gpio33";
+ function = "hdmi_ddc";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+
+ hdmi_hpd_default: hdmi-hpd-default-state {
+ pins = "gpio34";
+ function = "hdmi_hot";
+ drive-strength = <16>;
+ bias-pull-down;
+ };
+
+ hdmi_hpd_sleep: hdmi-hpd-sleep-state {
+ pins = "gpio34";
+ function = "hdmi_hot";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
};
remoteproc_mss: remoteproc@408 {
--
2.34.1
[PATCH v2 4/4] arm64: dts: qcom: add HDMI nodes for msm8998
From: Arnaud Vrac
Port device nodes from vendor code.
Signed-off-by: Arnaud Vrac
Signed-off-by: Marc Gonzalez
---
arch/arm64/boot/dts/qcom/msm8998.dtsi | 100
+-
1 file changed, 99 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi
b/arch/arm64/boot/dts/qcom/msm8998.dtsi
index ba5e873f0f35f..f65a76da61ea8 100644
--- a/arch/arm64/boot/dts/qcom/msm8998.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi
@@ -2785,7 +2785,7 @@ mmcc: clock-controller@c8c {
<_dsi0_phy 0>,
<_dsi1_phy 1>,
<_dsi1_phy 0>,
-<0>,
+<_phy 0>,
<0>,
<0>,
< GCC_MMSS_GPLL0_DIV_CLK>;
@@ -2890,6 +2890,14 @@ dpu_intf2_out: endpoint {
remote-endpoint =
<_dsi1_in>;
};
};
+
+ port@2 {
+ reg = <2>;
+
+ dpu_intf3_out: endpoint {
+ remote-endpoint =
<_in>;
+ };
+ };
};
};
@@ -3045,6 +3053,96 @@ mdss_dsi1_phy: phy@c996400 {
status = "disabled";
};
+
+ hdmi: hdmi-tx@c9a {
+ compatible = "qcom,hdmi-tx-8998";
+ reg = <0x0c9a 0x50c>,
+ <0x0078 0x6220>,
+ <0x0c9e 0x2c>;
+ reg-names = "core_physical",
+ "qfprom_physical",
+ "hdcp_physical";
+
+ interrupt-parent = <>;
+ interrupts = <8>;
+
+ clocks = < MDSS_MDP_CLK>,
+< MNOC_AHB_CLK>,
+< MDSS_AHB_CLK>,
+< MDSS_AXI_CLK>,
+< MISC_AHB_CLK>,
+< MDSS_HDMI_CLK>,
+< MDSS_HDMI_DP_AHB_CLK>,
+< MDSS_EXTPCLK_CLK>;
+ clock-names =
+ "mdp_core",
+ "mnoc",
+ "iface",
+ "bus",
+ "iface_mmss",
+ "core",
+ "alt_iface",
+ "extp";
+
+ phys = <_phy>;
+ #sound-dai-cells = <1>;
+
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <_hpd_default
+_ddc_default
+_cec_default>;
+ pinctrl-1 = <_hpd_sleep
+_ddc_default
+_cec_default>;
+
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ hdmi_in: endpoint {
+ remote-endpoint =
<_intf3_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ hdmi_out: endpoint {
+ };
+
[PATCH v2 0/4] HDMI TX support in msm8998
DT bits required for HDMI TX support in APQ8098 (msm8998 cousin)
$ make -j20 dtbs_check
DTC_CHK arch/arm64/boot/dts/qcom/msm8998-mtp.dtb
/home/mgonzalez/linux/arch/arm64/boot/dts/qcom/msm8998-mtp.dtb: pcie@1c0:
False schema does not allow {'compatible': ['qcom,pcie-msm8998',
'qcom,pcie-msm8996'], 'reg': [[29360128, 8192], [452984832, 3869], [452988704,
168], [454033408, 1048576]], 'reg-names': ['parf', 'dbi', 'elbi', 'config'],
'device_type': ['pci'], 'linux,pci-domain': [[0]], 'bus-range': [[0, 255]],
'#address-cells': [[3]], '#size-cells': [[2]], 'num-lanes': [[1]], 'phys':
[[36]], 'phy-names': ['pciephy'], 'status': ['okay'], 'ranges': [[16777216, 0,
0, 455081984, 0, 1048576], [33554432, 0, 456130560, 456130560, 0, 13631488]],
'#interrupt-cells': [[1]], 'interrupts': [[0, 405, 4]], 'interrupt-names':
['msi'], 'interrupt-map-mask': [[0, 0, 0, 7]], 'interrupt-map': [[0, 0, 0, 1,
1, 0, 0, 135, 4], [0, 0, 0, 2, 1, 0, 0, 136, 4], [0, 0, 0, 3, 1, 0, 0, 138, 4],
[0, 0, 0, 4, 1, 0, 0, 139, 4]], 'clocks': [[37, 94], [37, 91], [37, 92], [37,
93], [37, 95]], 'clock-names': ['pipe', 'aux', 'cfg', 'bus_master',
'bus_slave'], 'power-domains': [[37, 0]], 'iommu-map': [[256, 38, 5248, 1]],
'perst-gpios': [[39, 35, 1]], 'pcie@0': {'device_type': ['pci'], 'reg': [[0, 0,
0, 0, 0]], 'bus-range': [[1, 255]], '#address-cells': [[3]], '#size-cells':
[[2]], 'ranges': True}, '$nodename': ['pcie@1c0']}
from schema $id: http://devicetree.org/schemas/pci/qcom,pcie.yaml#
/home/mgonzalez/linux/arch/arm64/boot/dts/qcom/msm8998-mtp.dtb: pcie@1c0:
Unevaluated properties are not allowed ('#address-cells', '#interrupt-cells',
'#size-cells', 'bus-range', 'device_type', 'interrupt-map',
'interrupt-map-mask', 'linux,pci-domain', 'num-lanes', 'pcie@0', 'ranges' were
unexpected)
from schema $id: http://devicetree.org/schemas/pci/qcom,pcie.yaml#
/home/mgonzalez/linux/arch/arm64/boot/dts/qcom/msm8998-mtp.dtb: phy@c012000:
'vdd-supply' is a required property
from schema $id: http://devicetree.org/schemas/phy/qcom,qusb2-phy.yaml#
/home/mgonzalez/linux/arch/arm64/boot/dts/qcom/msm8998-mtp.dtb:
clock-controller@c8c: clocks: [[34, 0], [37, 178], [150, 1], [150, 0],
[151, 1], [151, 0], [152], [0], [0], [0], [37, 184]] is too long
from schema $id: http://devicetree.org/schemas/clock/qcom,mmcc.yaml#
Arnaud Vrac (1):
arm64: dts: qcom: add HDMI nodes for msm8998
Marc Gonzalez (3):
dt-bindings: display/msm: hdmi: add qcom,hdmi-phy-8998
dt-bindings: display/msm: hdmi: add qcom,hdmi-tx-8998
arm64: dts: qcom: msm8998: add HDMI GPIOs
Documentation/devicetree/bindings/display/msm/hdmi.yaml | 26 ++-
Documentation/devicetree/bindings/phy/qcom,hdmi-phy-qmp.yaml | 1 +
arch/arm64/boot/dts/qcom/msm8998.dtsi| 128
++-
3 files changed, 152 insertions(+), 3 deletions(-)
--
2.34.1
[PATCH v2 1/4] dt-bindings: display/msm: hdmi: add qcom, hdmi-phy-8998
HDMI PHY block embedded in the APQ8098. Signed-off-by: Marc Gonzalez --- Documentation/devicetree/bindings/phy/qcom,hdmi-phy-qmp.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/phy/qcom,hdmi-phy-qmp.yaml b/Documentation/devicetree/bindings/phy/qcom,hdmi-phy-qmp.yaml index 83fe4b39b56f4..78607ee3e2e84 100644 --- a/Documentation/devicetree/bindings/phy/qcom,hdmi-phy-qmp.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,hdmi-phy-qmp.yaml @@ -14,6 +14,7 @@ properties: compatible: enum: - qcom,hdmi-phy-8996 + - qcom,hdmi-phy-8998 reg: maxItems: 6 -- 2.34.1
[PATCH] drm/msm: log iommu init failure
When create_address_space() fails (e.g. when smmu node is disabled)
msm_gpu_init() silently fails:
msm_dpu c901000.display-controller: failed to load adreno gpu
msm_dpu c901000.display-controller: failed to bind 500.gpu (ops a3xx_ops):
-19
Log create_address_space() failure.
Signed-off-by: Marc Gonzalez
---
drivers/gpu/drm/msm/msm_gpu.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/msm/msm_gpu.c b/drivers/gpu/drm/msm/msm_gpu.c
index 655002b21b0d5..f1e692866cc38 100644
--- a/drivers/gpu/drm/msm/msm_gpu.c
+++ b/drivers/gpu/drm/msm/msm_gpu.c
@@ -941,6 +941,7 @@ int msm_gpu_init(struct drm_device *drm, struct
platform_device *pdev,
DRM_DEV_INFO(drm->dev, "%s: no IOMMU, fallback to VRAM
carveout!\n", name);
else if (IS_ERR(gpu->aspace)) {
ret = PTR_ERR(gpu->aspace);
+ DRM_DEV_ERROR(drm->dev, "could not create address space: %d\n",
ret);
goto fail;
}
--
2.34.1
[RFC PATCH v1] drm/msm: add msm8998 hdmi phy/pll support
From: Arnaud Vrac
Ported from the downstream driver.
Signed-off-by: Arnaud Vrac
Signed-off-by: Marc Gonzalez
---
drivers/gpu/drm/msm/Makefile | 1 +
drivers/gpu/drm/msm/hdmi/hdmi.c | 1 +
drivers/gpu/drm/msm/hdmi/hdmi.h | 8 +
drivers/gpu/drm/msm/hdmi/hdmi.xml.h | 162
drivers/gpu/drm/msm/hdmi/hdmi_phy.c | 5 +
drivers/gpu/drm/msm/hdmi/hdmi_phy_8998.c | 941 +++
6 files changed, 1118 insertions(+)
create mode 100644 drivers/gpu/drm/msm/hdmi/hdmi_phy_8998.c
diff --git a/drivers/gpu/drm/msm/Makefile b/drivers/gpu/drm/msm/Makefile
index b21ae2880c715..5b5d6aded5233 100644
--- a/drivers/gpu/drm/msm/Makefile
+++ b/drivers/gpu/drm/msm/Makefile
@@ -26,6 +26,7 @@ msm-$(CONFIG_DRM_MSM_HDMI) += \
hdmi/hdmi_phy.o \
hdmi/hdmi_phy_8960.o \
hdmi/hdmi_phy_8996.o \
+ hdmi/hdmi_phy_8998.o \
hdmi/hdmi_phy_8x60.o \
hdmi/hdmi_phy_8x74.o \
hdmi/hdmi_pll_8960.o \
diff --git a/drivers/gpu/drm/msm/hdmi/hdmi.c b/drivers/gpu/drm/msm/hdmi/hdmi.c
index c8ebd75176bba..2a2ce49ef5aa3 100644
--- a/drivers/gpu/drm/msm/hdmi/hdmi.c
+++ b/drivers/gpu/drm/msm/hdmi/hdmi.c
@@ -549,6 +549,7 @@ static void msm_hdmi_dev_remove(struct platform_device
*pdev)
}
static const struct of_device_id msm_hdmi_dt_match[] = {
+ { .compatible = "qcom,hdmi-tx-8998", .data = _tx_8974_config },
{ .compatible = "qcom,hdmi-tx-8996", .data = _tx_8974_config },
{ .compatible = "qcom,hdmi-tx-8994", .data = _tx_8974_config },
{ .compatible = "qcom,hdmi-tx-8084", .data = _tx_8974_config },
diff --git a/drivers/gpu/drm/msm/hdmi/hdmi.h b/drivers/gpu/drm/msm/hdmi/hdmi.h
index ec57864403915..cad0d50c82fbc 100644
--- a/drivers/gpu/drm/msm/hdmi/hdmi.h
+++ b/drivers/gpu/drm/msm/hdmi/hdmi.h
@@ -137,6 +137,7 @@ enum hdmi_phy_type {
MSM_HDMI_PHY_8960,
MSM_HDMI_PHY_8x74,
MSM_HDMI_PHY_8996,
+ MSM_HDMI_PHY_8998,
MSM_HDMI_PHY_MAX,
};
@@ -154,6 +155,7 @@ extern const struct hdmi_phy_cfg msm_hdmi_phy_8x60_cfg;
extern const struct hdmi_phy_cfg msm_hdmi_phy_8960_cfg;
extern const struct hdmi_phy_cfg msm_hdmi_phy_8x74_cfg;
extern const struct hdmi_phy_cfg msm_hdmi_phy_8996_cfg;
+extern const struct hdmi_phy_cfg msm_hdmi_phy_8998_cfg;
struct hdmi_phy {
struct platform_device *pdev;
@@ -184,6 +186,7 @@ void __exit msm_hdmi_phy_driver_unregister(void);
#ifdef CONFIG_COMMON_CLK
int msm_hdmi_pll_8960_init(struct platform_device *pdev);
int msm_hdmi_pll_8996_init(struct platform_device *pdev);
+int msm_hdmi_pll_8998_init(struct platform_device *pdev);
#else
static inline int msm_hdmi_pll_8960_init(struct platform_device *pdev)
{
@@ -194,6 +197,11 @@ static inline int msm_hdmi_pll_8996_init(struct
platform_device *pdev)
{
return -ENODEV;
}
+
+static inline int msm_hdmi_pll_8998_init(struct platform_device *pdev)
+{
+ return -ENODEV;
+}
#endif
/*
diff --git a/drivers/gpu/drm/msm/hdmi/hdmi.xml.h
b/drivers/gpu/drm/msm/hdmi/hdmi.xml.h
index 973b460486a5a..c9ca1101b5ad4 100644
--- a/drivers/gpu/drm/msm/hdmi/hdmi.xml.h
+++ b/drivers/gpu/drm/msm/hdmi/hdmi.xml.h
@@ -1396,4 +1396,166 @@ static inline uint32_t
HDMI_8x60_PHY_REG1_OUTVOL_SWING_CTRL(uint32_t val)
#define REG_HDMI_PHY_QSERDES_TX_LX_TX_ALOG_INTF_OBSV 0x0110
+#define REG_HDMI_8998_PHY_CFG 0x
+
+#define REG_HDMI_8998_PHY_PD_CTL 0x0004
+
+#define REG_HDMI_8998_PHY_MODE 0x0010
+
+#define REG_HDMI_8998_PHY_CLOCK
0x005c
+
+#define REG_HDMI_8998_PHY_CMN_CTRL 0x0068
+
+#define REG_HDMI_8998_PHY_STATUS 0x00b4
+
+
+#define REG_HDMI_8998_PHY_QSERDES_COM_ATB_SEL1 0x
+
+#define REG_HDMI_8998_PHY_QSERDES_COM_ATB_SEL2 0x0004
+
+#define REG_HDMI_8998_PHY_QSERDES_COM_FREQ_UPDATE 0x0008
+
+#define REG_HDMI_8998_PHY_QSERDES_COM_BG_TIMER 0x000c
+
+#define REG_HDMI_8998_PHY_QSERDES_COM_SSC_EN_CENTER0x0010
+
+#define REG_HDMI_8998_PHY_QSERDES_COM_SSC_ADJ_PER1 0x0014
+
+#define REG_HDMI_8998_PHY_QSERDES_COM_SSC_ADJ_PER2 0x0018
+
+#define REG_HDMI_8998_PHY_QSERDES_COM_SSC_PER1 0x001c
+
+#define REG_HDMI_8998_PHY_QSERDES_COM_SSC_PER2 0x0020
+
+#define REG_HDMI_8998_PHY_QSERDES_COM_SSC_STEP_SIZE1 0x0024
+
+#define REG_HDMI_8998_PHY_QSERDES_COM_SSC_STEP_SIZE2 0x0028
+
+#define REG_HDMI_8998_PHY_QSERDES_COM_POST_DIV 0x002c
+
+#define REG_HDMI_8998_PHY_QSERDES_COM_POST_DIV_MUX 0x0030
+
+#define REG_HDMI_8998_PHY_QSERDES_COM_BIAS_EN_CLKBUFLR_EN 0x0034
+
+#define REG_HDMI_8998_PHY_QSERDES_COM_CLK_EN
[PATCH] arm64: dts: qcom: msm8998: enable adreno_smmu
Right now, GPU init fails:
[2.756363] [drm:adreno_bind] Found GPU: 5.4.0.1
[2.767183] [drm:a5xx_gpu_init]
[2.767422] [drm:adreno_gpu_init] fast_rate=71097, slow_rate=2700
[3.003869] [drm:msm_gpu_init] ebi1_clk: fffe
[3.004002] adreno 500.gpu: supply vdd not found, using dummy regulator
[3.008463] [drm:msm_gpu_init] gpu_reg: 819e4000
[3.015105] adreno 500.gpu: supply vddcx not found, using dummy regulator
[3.020702] [drm:msm_gpu_init] gpu_cx: 819e4180
[3.028173] [drm:adreno_iommu_create_address_space]
[3.054552] [drm:msm_gpu_init] gpu->aspace=ffed
[3.058112] [drm:a5xx_destroy] 5.4.0.1
[3.065922] [drm:msm_gpu_cleanup] 5.4.0.1
[3.074237] msm_dpu c901000.display-controller: failed to load adreno gpu
[3.082412] msm_dpu c901000.display-controller: failed to bind 500.gpu
(ops a3xx_ops): -19
[3.088342] msm_dpu c901000.display-controller: [drm:drm_managed_release]
drmres release begin
...
[3.197694] [drm:drm_managed_release] drmres release end
[3.204009] msm_dpu c901000.display-controller: adev bind failed: -19
adreno_smmu is required, so it must be enabled.
[3.220381] msm_dpu c901000.display-controller: bound 500.gpu (ops
a3xx_ops)
[3.235503] [drm:dpu_kms_hw_init:1053] dpu hardware revision:0x3000
Fixes: 87cd46d68aeac8 ("Configure Adreno GPU and related IOMMU")
Signed-off-by: Marc Gonzalez
---
arch/arm64/boot/dts/qcom/msm8998.dtsi | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi
b/arch/arm64/boot/dts/qcom/msm8998.dtsi
index 3d3b1f61c0690..edf379c28e1e1 100644
--- a/arch/arm64/boot/dts/qcom/msm8998.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi
@@ -1580,7 +1580,6 @@ adreno_smmu: iommu@504 {
* SoC VDDMX RPM Power Domain in the Adreno driver.
*/
power-domains = < GPU_GX_GDSC>;
- status = "disabled";
};
gpucc: clock-controller@5065000 {
--
2.34.1
Re: [PATCH] drm/msm: log iommu init failure
On 16/05/2024 10:43, Marijn Suijten wrote:
> On 2024-05-15 17:09:02, Marc Gonzalez wrote:
>
>> When create_address_space() fails (e.g. when smmu node is disabled)
>> msm_gpu_init() silently fails:
>>
>> msm_dpu c901000.display-controller: failed to load adreno gpu
>> msm_dpu c901000.display-controller: failed to bind 500.gpu (ops
>> a3xx_ops): -19
>>
>> Log create_address_space() failure.
>>
>> Signed-off-by: Marc Gonzalez
>
> Thanks!
>
> Suggested-by: Marijn Suijten
>
> And, after checking the below:
>
> Reviewed-by: Marijn Suijten
>
>> ---
>> drivers/gpu/drm/msm/msm_gpu.c | 1 +
>> 1 file changed, 1 insertion(+)
>>
>> diff --git a/drivers/gpu/drm/msm/msm_gpu.c b/drivers/gpu/drm/msm/msm_gpu.c
>> index 655002b21b0d5..f1e692866cc38 100644
>> --- a/drivers/gpu/drm/msm/msm_gpu.c
>> +++ b/drivers/gpu/drm/msm/msm_gpu.c
>> @@ -941,6 +941,7 @@ int msm_gpu_init(struct drm_device *drm, struct
>> platform_device *pdev,
>> DRM_DEV_INFO(drm->dev, "%s: no IOMMU, fallback to VRAM
>> carveout!\n", name);
>> else if (IS_ERR(gpu->aspace)) {
>> ret = PTR_ERR(gpu->aspace);
>> +DRM_DEV_ERROR(drm->dev, "could not create address space: %d\n",
>> ret);
>
> Maybe this wasn't done before because this also includes `-EPROBE_DEFER`, so
> you
> might want to wrap this in
>
> if (ret != -EPROBE_DEFER)
> DRM_DEV_ERROR...
>
> But then dev_err_probe() was built specifically to be less verbose about this
> (and track defer reasons). While this is an init and not probe function, it's
> called from struct component_ops->bind where it should be okay to call that,
> as long as you have access to the component `struct device*` and not its
> master
> (IIRC).
Hello Marijn,
I have moved on to HDMI.
Feel free to take full ownership of this submission,
as I won't have the energy to get it accepted.
Regards,
Marc
[PATCH v2] arm64: dts: qcom: msm8998: enable adreno_smmu by default
15 qcom platform DTSI files define an adreno_smmu node.
msm8998 is the only one with adreno_smmu disabled by default.
There's no reason why this SMMU should be disabled by default,
it doesn't need any further configuration.
Bring msm8998 in line with the 14 other platforms.
This fixes GPU init failing with ENODEV:
msm_dpu c901000.display-controller: failed to load adreno gpu
msm_dpu c901000.display-controller: failed to bind 500.gpu (ops a3xx_ops):
-19
Fixes: 87cd46d68aeac8 ("Configure Adreno GPU and related IOMMU")
Signed-off-by: Marc Gonzalez
Reviewed-by: Bryan O'Donoghue
---
New in v2: rewrote commit message with input from Martin, Bryan, Luca
Supersedes: <1ba7031f-c97c-41f1-8cbc-d99f1e848...@freebox.fr>
Maintainers, feel free to drop the Fixes tag.
Failure log:
[2.756363] [drm:adreno_bind] Found GPU: 5.4.0.1
[2.767183] [drm:a5xx_gpu_init]
[2.767422] [drm:adreno_gpu_init] fast_rate=71097, slow_rate=2700
[3.003869] [drm:msm_gpu_init] ebi1_clk: fffe
[3.004002] adreno 500.gpu: supply vdd not found, using dummy regulator
[3.008463] [drm:msm_gpu_init] gpu_reg: 819e4000
[3.015105] adreno 500.gpu: supply vddcx not found, using dummy regulator
[3.020702] [drm:msm_gpu_init] gpu_cx: 819e4180
[3.028173] [drm:adreno_iommu_create_address_space]
[3.054552] [drm:msm_gpu_init] gpu->aspace=ffed
[3.058112] [drm:a5xx_destroy] 5.4.0.1
[3.065922] [drm:msm_gpu_cleanup] 5.4.0.1
[3.074237] msm_dpu c901000.display-controller: failed to load adreno gpu
[3.082412] msm_dpu c901000.display-controller: failed to bind 500.gpu
(ops a3xx_ops): -19
[3.088342] msm_dpu c901000.display-controller: [drm:drm_managed_release]
drmres release begin
...
[3.197694] [drm:drm_managed_release] drmres release end
[3.204009] msm_dpu c901000.display-controller: adev bind failed: -19
---
arch/arm64/boot/dts/qcom/msm8998.dtsi | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi
b/arch/arm64/boot/dts/qcom/msm8998.dtsi
index 3d3b1f61c0690..edf379c28e1e1 100644
--- a/arch/arm64/boot/dts/qcom/msm8998.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi
@@ -1580,7 +1580,6 @@ adreno_smmu: iommu@504 {
* SoC VDDMX RPM Power Domain in the Adreno driver.
*/
power-domains = < GPU_GX_GDSC>;
- status = "disabled";
};
gpucc: clock-controller@5065000 {
--
2.34.1
