Re: [Freedreno] (no subject)
On 16/05/2021 01:57, Dmitry Baryshkov wrote: From Dmitry Baryshkov # This line is ignored. From: Dmitry Baryshkov Reply-To: Subject: [PATCH v2 0/6] drm/msm/dpu: simplify RM code In-Reply-To: There is no need to request most of hardware blocks through the resource manager (RM), since typically there is 1:1 or N:1 relationship between corresponding blocks. Each LM is tied to the single PP. Each MERGE_3D can be used by the specified pair of PPs. Each DSPP is also tied to single LM. So instead of allocating them through the RM, get them via static configuration. Depends on: https://lore.kernel.org/linux-arm-msm/20210515190909.1809050-1-dmitry.barysh...@linaro.org Changes since v1: - Split into separate patch series to ease review. Another gracious ping, now for this series. I want to send next version with minor changes, but I'd like to hear your overall opinion before doing that. Dmitry Baryshkov (6): drm/msm/dpu: get DSPP blocks directly rather than through RM drm/msm/dpu: get MERGE_3D blocks directly rather than through RM drm/msm/dpu: get PINGPONG blocks directly rather than through RM drm/msm/dpu: get INTF blocks directly rather than through RM drm/msm/dpu: drop unused lm_max_width from RM drm/msm/dpu: simplify peer LM handling drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c| 54 +--- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h| 8 - drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h | 5 - .../gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 8 - .../gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c | 8 - drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 2 +- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 4 +- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c | 14 +- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.h | 7 +- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c| 7 +- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.h| 4 +- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c| 53 +++- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h| 5 +- drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 310 ++--- drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h | 18 +- drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h | 9 +- 16 files changed, 115 insertions(+), 401 deletions(-) -- With best wishes Dmitry ___ Freedreno mailing list Freedreno@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/freedreno
[Freedreno] (no subject)
>From Dmitry Baryshkov # This line is ignored. From: Dmitry Baryshkov Reply-To: Subject: [PATCH v2 0/6] drm/msm/dpu: simplify RM code In-Reply-To: There is no need to request most of hardware blocks through the resource manager (RM), since typically there is 1:1 or N:1 relationship between corresponding blocks. Each LM is tied to the single PP. Each MERGE_3D can be used by the specified pair of PPs. Each DSPP is also tied to single LM. So instead of allocating them through the RM, get them via static configuration. Depends on: https://lore.kernel.org/linux-arm-msm/20210515190909.1809050-1-dmitry.barysh...@linaro.org Changes since v1: - Split into separate patch series to ease review. Dmitry Baryshkov (6): drm/msm/dpu: get DSPP blocks directly rather than through RM drm/msm/dpu: get MERGE_3D blocks directly rather than through RM drm/msm/dpu: get PINGPONG blocks directly rather than through RM drm/msm/dpu: get INTF blocks directly rather than through RM drm/msm/dpu: drop unused lm_max_width from RM drm/msm/dpu: simplify peer LM handling drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c| 54 +--- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h| 8 - drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h | 5 - .../gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 8 - .../gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c | 8 - drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 2 +- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 4 +- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c | 14 +- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.h | 7 +- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c| 7 +- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.h| 4 +- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c| 53 +++- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h| 5 +- drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 310 ++--- drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h | 18 +- drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h | 9 +- 16 files changed, 115 insertions(+), 401 deletions(-) ___ Freedreno mailing list Freedreno@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/freedreno
[Freedreno] (no subject)
Hi Dave, A few fixes, mostly fallout from the address space refactor and dpu color processing. The following changes since commit 1cb2c4a2c89b2004a36399860c85a1af9b3fcba7: Revert "drm/msm/dpu: add support for clk and bw scaling for display" (2020-06-01 20:56:18 -0700) are available in the Git repository at: https://gitlab.freedesktop.org/drm/msm.git drm-msm-fixes-2020-06-25 for you to fetch changes up to 30480e6ed508e3ff7a3e03c975696aa5196ffe8a: drm/msm: Fix up the rest of the messed up address sizes (2020-06-22 12:12:29 -0700) Bernard Zhao (1): drm/msm: fix potential memleak in error branch Chen Tao (1): drm/msm/dpu: fix error return code in dpu_encoder_init Eric Anholt (2): drm/msm: Fix address space size after refactor. drm/msm: Fix setup of a6xx create_address_space. John Stultz (1): drm/msm: Fix 0xlub in "Refactor address space initialization" Jordan Crouse (1): drm/msm: Fix up the rest of the messed up address sizes Kalyan Thota (1): drm/msm/dpu: request for display color blocks based on hw catalog entry Krishna Manikandan (1): drm/msm/dpu: allow initialization of encoder locks during encoder init drivers/gpu/drm/msm/adreno/a2xx_gpu.c | 2 +- drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 2 +- drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 2 +- drivers/gpu/drm/msm/adreno/adreno_gpu.c | 2 +- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 18 +++--- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 2 +- drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c| 2 +- drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c| 2 +- drivers/gpu/drm/msm/msm_submitqueue.c | 4 +++- 9 files changed, 21 insertions(+), 15 deletions(-) ___ Freedreno mailing list Freedreno@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/freedreno
[Freedreno] (no subject)
Hi Dave, This time around: + OCMEM support to enable the couple generations that had shared OCMEM rather than GMEM exclusively for the GPU (late a3xx and I think basically all of a4xx). Bjorn and Brian decided to land this through the drm tree to avoid having to coordinate merge requests. + a510 support, and various associated display support + the usual misc cleanups and fixes The following changes since commit da0c9ea146cbe92b832f1b0f694840ea8eb33cce: Linux 5.4-rc2 (2019-10-06 14:27:30 -0700) are available in the Git repository at: https://gitlab.freedesktop.org/drm/msm.git drm-msm-next-2019-11-05 for you to fetch changes up to e20c9284c8f212081afc28471daaac9b0d54252f: drm/msm/adreno: Add support for Adreno 510 GPU (2019-11-04 13:18:31 -0800) AngeloGioacchino Del Regno (6): drm/msm/mdp5: Add optional TBU and TBU_RT clocks dt-bindings: msm/mdp5: Document optional TBU and TBU_RT clocks drm/msm/mdp5: Add configuration for msm8x76 drm/msm/dsi: Add configuration for 28nm PLL on family B drm/msm/dsi: Add configuration for 8x76 drm/msm/adreno: Add support for Adreno 510 GPU Arnd Bergmann (1): drm/msm: include linux/sched/task.h Ben Dooks (2): drm/msm: make a5xx_show and a5xx_gpu_state_put static drm/msm/mdp5: make config variables static Brian Masney (6): dt-bindings: soc: qcom: add On Chip MEMory (OCMEM) bindings dt-bindings: display: msm: gmu: add optional ocmem property soc: qcom: add OCMEM driver drm/msm/gpu: add ocmem init/cleanup functions soc: qcom: ocmem: add missing includes drm/msm/hdmi: silence -EPROBE_DEFER warning Drew Davenport (7): drm/msm/dpu: Remove unused variables drm/msm/dpu: Remove unused macro drm/msm/dpu: Remove unnecessary NULL checks drm/msm/dpu: Remove unnecessary NULL checks drm/msm/dpu: Remove unnecessary NULL checks drm/msm/dpu: Remove unnecessary NULL checks drm/msm: Remove unused function arguments Krzysztof Wilczynski (1): drm/msm/dsi: Move static keyword to the front of declarations Rob Clark (4): firmware: qcom: scm: add OCMEM lock/unlock interface firmware: qcom: scm: add support to restore secure config to qcm_scm-32 drm/msm: fix rd dumping for split-IB1 drm/msm: always dump buffer base/size Sean Paul (1): drm/msm: Sanitize the modeset_is_locked checks in dpu Stephan Gerhold (1): drm/msm/dsi: Implement qcom, dsi-phy-regulator-ldo-mode for 28nm PHY zhengbin (11): drm/msm/dpu: Remove set but not used variable 'priv' in dpu_kms.c drm/msm/dpu: Remove set but not used variable 'priv' in dpu_encoder_phys_vid.c drm/msm/dpu: Remove set but not used variable 'priv' in dpu_core_irq.c drm/msm/dpu: Remove set but not used variables 'dpu_cstate', 'priv' drm/msm/dpu: Remove set but not used variables 'cmd_enc', 'priv' drm/msm/dpu: Remove set but not used variables 'mode', 'dpu_kms', 'priv' drm/msm/mdp5: Remove set but not used variable 'fmt' drm/msm/mdp5: Remove set but not used variable 'hw_cfg' in blend_setup drm/msm/dsi: Remove set but not used variable 'lpx' drm/msm/dsi: Remove set but not used variable 'lp' drm/msm/mdp5: Remove set but not used variable 'hw_cfg' in modeset_init .../devicetree/bindings/display/msm/gmu.txt| 51 +++ .../devicetree/bindings/display/msm/mdp5.txt | 2 + .../devicetree/bindings/sram/qcom,ocmem.yaml | 96 + drivers/firmware/qcom_scm-32.c | 52 ++- drivers/firmware/qcom_scm-64.c | 12 + drivers/firmware/qcom_scm.c| 53 +++ drivers/firmware/qcom_scm.h| 9 + drivers/gpu/drm/msm/Kconfig| 1 + drivers/gpu/drm/msm/adreno/a3xx_gpu.c | 28 +- drivers/gpu/drm/msm/adreno/a3xx_gpu.h | 3 +- drivers/gpu/drm/msm/adreno/a4xx_gpu.c | 25 +- drivers/gpu/drm/msm/adreno/a4xx_gpu.h | 3 +- drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 79 +++- drivers/gpu/drm/msm/adreno/a5xx_power.c| 7 + drivers/gpu/drm/msm/adreno/adreno_device.c | 15 + drivers/gpu/drm/msm/adreno/adreno_gpu.c| 40 ++ drivers/gpu/drm/msm/adreno/adreno_gpu.h| 15 + drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c | 43 +- drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 21 +- drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 20 +- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c| 39 +- .../gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 15 - .../gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c | 7 +- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c| 60 +-- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h| 4 - drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.c | 6 +-
