Re: [Freedreno] [DPU PATCH 01/19] drm/msm: dpu_encoder: Replace DPU_EVT with tracepoints
On 2018-06-21 02:18, Sean Paul wrote: This patch converts all DPU_EVTs in dpu_encoder with either a DRM_* log message or a linux tracepoint. Signed-off-by: Sean Paul Reviewed-by: Rajesh Yadav --- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 290 - drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h | 329 2 files changed, 464 insertions(+), 155 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c index 11a1045bf132..6aad40dccb05 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c @@ -254,11 +254,9 @@ static inline int _dpu_encoder_power_enable(struct dpu_encoder_virt *dpu_enc, void dpu_encoder_helper_report_irq_timeout(struct dpu_encoder_phys *phys_enc, enum dpu_intr_idx intr_idx) { - DPU_EVT32(DRMID(phys_enc->parent), - phys_enc->intf_idx - INTF_0, - phys_enc->hw_pp->idx - PINGPONG_0, - intr_idx); - DPU_ERROR_PHYS(phys_enc, "irq %d timeout\n", intr_idx); + DRM_ERROR("irq timeout id=%u, intf=%d, pp=%d, intr=%d\n", + DRMID(phys_enc->parent), phys_enc->intf_idx - INTF_0, + phys_enc->hw_pp->idx - PINGPONG_0, intr_idx); if (phys_enc->parent_ops.handle_frame_done) phys_enc->parent_ops.handle_frame_done( @@ -284,25 +282,23 @@ int dpu_encoder_helper_wait_for_irq(struct dpu_encoder_phys *phys_enc, /* return EWOULDBLOCK since we know the wait isn't necessary */ if (phys_enc->enable_state == DPU_ENC_DISABLED) { - DPU_ERROR_PHYS(phys_enc, "encoder is disabled\n"); - DPU_EVT32(DRMID(phys_enc->parent), intr_idx, irq->hw_idx, - irq->irq_idx, intr_idx, DPU_EVTLOG_ERROR); + DRM_ERROR("encoder is disabled id=%u, intr=%d, hw=%d, irq=%d", + DRMID(phys_enc->parent), intr_idx, irq->hw_idx, + irq->irq_idx); return -EWOULDBLOCK; } if (irq->irq_idx < 0) { - DPU_DEBUG_PHYS(phys_enc, "irq %s hw %d disabled, skip wait\n", - irq->name, irq->hw_idx); - DPU_EVT32(DRMID(phys_enc->parent), intr_idx, irq->hw_idx, - irq->irq_idx); + DRM_DEBUG_KMS("skip irq wait id=%u, intr=%d, hw=%d, irq=%s", + DRMID(phys_enc->parent), intr_idx, irq->hw_idx, + irq->name); return 0; } - DPU_DEBUG_PHYS(phys_enc, "pending_cnt %d\n", - atomic_read(wait_info->atomic_cnt)); - DPU_EVT32_VERBOSE(DRMID(phys_enc->parent), intr_idx, irq->hw_idx, - irq->irq_idx, phys_enc->hw_pp->idx - PINGPONG_0, - atomic_read(wait_info->atomic_cnt), DPU_EVTLOG_FUNC_ENTRY); + DRM_DEBUG_KMS("id=%u, intr=%d, hw=%d, irq=%d, pp=%d, pending_cnt=%d", + DRMID(phys_enc->parent), intr_idx, irq->hw_idx, + irq->irq_idx, phys_enc->hw_pp->idx - PINGPONG_0, + atomic_read(wait_info->atomic_cnt)); ret = dpu_encoder_helper_wait_event_timeout( DRMID(phys_enc->parent), @@ -315,36 +311,33 @@ int dpu_encoder_helper_wait_for_irq(struct dpu_encoder_phys *phys_enc, if (irq_status) { unsigned long flags; - DPU_EVT32(DRMID(phys_enc->parent), intr_idx, - irq->hw_idx, irq->irq_idx, - phys_enc->hw_pp->idx - PINGPONG_0, - atomic_read(wait_info->atomic_cnt)); - DPU_DEBUG_PHYS(phys_enc, - "done but irq %d not triggered\n", - irq->irq_idx); + DRM_DEBUG_KMS("irq not triggered id=%u, intr=%d, " + "hw=%d, irq=%d, pp=%d, atomic_cnt=%d", + DRMID(phys_enc->parent), intr_idx, + irq->hw_idx, irq->irq_idx, + phys_enc->hw_pp->idx - PINGPONG_0, + atomic_read(wait_info->atomic_cnt)); local_irq_save(flags); irq->cb.func(phys_enc, irq->irq_idx); local_irq_restore(flags); ret = 0; } else { ret = -ETIMEDOUT; - DPU_EVT32(DRMID(phys_enc->parent), intr_idx, - irq->hw_idx, irq->irq_idx, - phys_enc->hw_pp->idx - PINGPONG_0, - atomic_read(wait_info->atomic_cnt), irq_status, - DPU_EVTLOG_ERROR); +
[Freedreno] [DPU PATCH 01/19] drm/msm: dpu_encoder: Replace DPU_EVT with tracepoints
This patch converts all DPU_EVTs in dpu_encoder with either a DRM_* log message or a linux tracepoint. Signed-off-by: Sean Paul --- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 290 - drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h | 329 2 files changed, 464 insertions(+), 155 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c index 11a1045bf132..6aad40dccb05 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c @@ -254,11 +254,9 @@ static inline int _dpu_encoder_power_enable(struct dpu_encoder_virt *dpu_enc, void dpu_encoder_helper_report_irq_timeout(struct dpu_encoder_phys *phys_enc, enum dpu_intr_idx intr_idx) { - DPU_EVT32(DRMID(phys_enc->parent), - phys_enc->intf_idx - INTF_0, - phys_enc->hw_pp->idx - PINGPONG_0, - intr_idx); - DPU_ERROR_PHYS(phys_enc, "irq %d timeout\n", intr_idx); + DRM_ERROR("irq timeout id=%u, intf=%d, pp=%d, intr=%d\n", + DRMID(phys_enc->parent), phys_enc->intf_idx - INTF_0, + phys_enc->hw_pp->idx - PINGPONG_0, intr_idx); if (phys_enc->parent_ops.handle_frame_done) phys_enc->parent_ops.handle_frame_done( @@ -284,25 +282,23 @@ int dpu_encoder_helper_wait_for_irq(struct dpu_encoder_phys *phys_enc, /* return EWOULDBLOCK since we know the wait isn't necessary */ if (phys_enc->enable_state == DPU_ENC_DISABLED) { - DPU_ERROR_PHYS(phys_enc, "encoder is disabled\n"); - DPU_EVT32(DRMID(phys_enc->parent), intr_idx, irq->hw_idx, - irq->irq_idx, intr_idx, DPU_EVTLOG_ERROR); + DRM_ERROR("encoder is disabled id=%u, intr=%d, hw=%d, irq=%d", + DRMID(phys_enc->parent), intr_idx, irq->hw_idx, + irq->irq_idx); return -EWOULDBLOCK; } if (irq->irq_idx < 0) { - DPU_DEBUG_PHYS(phys_enc, "irq %s hw %d disabled, skip wait\n", - irq->name, irq->hw_idx); - DPU_EVT32(DRMID(phys_enc->parent), intr_idx, irq->hw_idx, - irq->irq_idx); + DRM_DEBUG_KMS("skip irq wait id=%u, intr=%d, hw=%d, irq=%s", + DRMID(phys_enc->parent), intr_idx, irq->hw_idx, + irq->name); return 0; } - DPU_DEBUG_PHYS(phys_enc, "pending_cnt %d\n", - atomic_read(wait_info->atomic_cnt)); - DPU_EVT32_VERBOSE(DRMID(phys_enc->parent), intr_idx, irq->hw_idx, - irq->irq_idx, phys_enc->hw_pp->idx - PINGPONG_0, - atomic_read(wait_info->atomic_cnt), DPU_EVTLOG_FUNC_ENTRY); + DRM_DEBUG_KMS("id=%u, intr=%d, hw=%d, irq=%d, pp=%d, pending_cnt=%d", + DRMID(phys_enc->parent), intr_idx, irq->hw_idx, + irq->irq_idx, phys_enc->hw_pp->idx - PINGPONG_0, + atomic_read(wait_info->atomic_cnt)); ret = dpu_encoder_helper_wait_event_timeout( DRMID(phys_enc->parent), @@ -315,36 +311,33 @@ int dpu_encoder_helper_wait_for_irq(struct dpu_encoder_phys *phys_enc, if (irq_status) { unsigned long flags; - DPU_EVT32(DRMID(phys_enc->parent), intr_idx, - irq->hw_idx, irq->irq_idx, - phys_enc->hw_pp->idx - PINGPONG_0, - atomic_read(wait_info->atomic_cnt)); - DPU_DEBUG_PHYS(phys_enc, - "done but irq %d not triggered\n", - irq->irq_idx); + DRM_DEBUG_KMS("irq not triggered id=%u, intr=%d, " + "hw=%d, irq=%d, pp=%d, atomic_cnt=%d", + DRMID(phys_enc->parent), intr_idx, + irq->hw_idx, irq->irq_idx, + phys_enc->hw_pp->idx - PINGPONG_0, + atomic_read(wait_info->atomic_cnt)); local_irq_save(flags); irq->cb.func(phys_enc, irq->irq_idx); local_irq_restore(flags); ret = 0; } else { ret = -ETIMEDOUT; - DPU_EVT32(DRMID(phys_enc->parent), intr_idx, - irq->hw_idx, irq->irq_idx, - phys_enc->hw_pp->idx - PINGPONG_0, - atomic_read(wait_info->atomic_cnt), irq_status, - DPU_EVTLOG_ERROR); + DRM_DEBUG_KMS("irq timeout id=%u, intr=%d, " +