Re: [Freedreno] [PATCH 4/8] arm64: dts: qcom: sm8250: assign DSI clock source parents

2021-06-21 Thread abhinavk 

On 2021-05-15 06:12, Dmitry Baryshkov wrote:

Assign DSI clock source parents to DSI PHY clocks.

Signed-off-by: Dmitry Baryshkov 

Can you please confirm if you have validated dual DSI with this change?
With that,
Reviewed-by: Abhinav Kumar 

---
 arch/arm64/boot/dts/qcom/sm8250.dtsi | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi
b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index 947e1accae3a..b6ed94497e8a 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -2445,6 +2445,9 @@ dsi0: dsi@ae94000 {
  "iface",
  "bus";

+   assigned-clocks = <&dispcc 
DISP_CC_MDSS_BYTE0_CLK_SRC>, <&dispcc
DISP_CC_MDSS_PCLK0_CLK_SRC>;
+   assigned-clock-parents = <&dsi0_phy 0>, <&dsi0_phy 
1>;
+
operating-points-v2 = <&dsi_opp_table>;
power-domains = <&rpmhpd SM8250_MMCX>;

@@ -2512,6 +2515,9 @@ dsi1: dsi@ae96000 {
  "iface",
  "bus";

+   assigned-clocks = <&dispcc 
DISP_CC_MDSS_BYTE1_CLK_SRC>, <&dispcc
DISP_CC_MDSS_PCLK1_CLK_SRC>;
+   assigned-clock-parents = <&dsi1_phy 0>, <&dsi1_phy 
1>;
+
operating-points-v2 = <&dsi_opp_table>;
power-domains = <&rpmhpd SM8250_MMCX>;

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[Freedreno] [PATCH 4/8] arm64: dts: qcom: sm8250: assign DSI clock source parents

2021-05-15 Thread Dmitry Baryshkov 
Assign DSI clock source parents to DSI PHY clocks.

Signed-off-by: Dmitry Baryshkov 
---
 arch/arm64/boot/dts/qcom/sm8250.dtsi | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi 
b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index 947e1accae3a..b6ed94497e8a 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -2445,6 +2445,9 @@ dsi0: dsi@ae94000 {
  "iface",
  "bus";
 
+   assigned-clocks = <&dispcc 
DISP_CC_MDSS_BYTE0_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>;
+   assigned-clock-parents = <&dsi0_phy 0>, 
<&dsi0_phy 1>;
+
operating-points-v2 = <&dsi_opp_table>;
power-domains = <&rpmhpd SM8250_MMCX>;
 
@@ -2512,6 +2515,9 @@ dsi1: dsi@ae96000 {
  "iface",
  "bus";
 
+   assigned-clocks = <&dispcc 
DISP_CC_MDSS_BYTE1_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK1_CLK_SRC>;
+   assigned-clock-parents = <&dsi1_phy 0>, 
<&dsi1_phy 1>;
+
operating-points-v2 = <&dsi_opp_table>;
power-domains = <&rpmhpd SM8250_MMCX>;
 
-- 
2.30.2

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