On Wed, Nov 21, 2018 at 8:55 PM Jonathan Marek wrote:
>
> Controls which of the 8 lanes are used for 6 bit color.
>
> Signed-off-by: Jonathan Marek
> ---
> .../gpu/drm/msm/disp/mdp4/mdp4_lcdc_encoder.c | 22 ---
> 1 file changed, 14 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/disp/mdp4/mdp4_lcdc_encoder.c
> b/drivers/gpu/drm/msm/disp/mdp4/mdp4_lcdc_encoder.c
> index e19ab2ab63f7..7d8d11c8150a 100644
> --- a/drivers/gpu/drm/msm/disp/mdp4/mdp4_lcdc_encoder.c
> +++ b/drivers/gpu/drm/msm/disp/mdp4/mdp4_lcdc_encoder.c
> @@ -377,20 +377,26 @@ static void mdp4_lcdc_encoder_enable(struct drm_encoder
> *encoder)
> unsigned long pc = mdp4_lcdc_encoder->pixclock;
> struct mdp4_kms *mdp4_kms = get_kms(encoder);
> struct drm_panel *panel;
> + uint32_t config;
> int i, ret;
>
> if (WARN_ON(mdp4_lcdc_encoder->enabled))
> return;
>
> /* TODO: hard-coded for 18bpp: */
> - mdp4_crtc_set_config(encoder->crtc,
> - MDP4_DMA_CONFIG_R_BPC(BPC6) |
> - MDP4_DMA_CONFIG_G_BPC(BPC6) |
> - MDP4_DMA_CONFIG_B_BPC(BPC6) |
> - MDP4_DMA_CONFIG_PACK_ALIGN_MSB |
> - MDP4_DMA_CONFIG_PACK(0x21) |
> - MDP4_DMA_CONFIG_DEFLKR_EN |
> - MDP4_DMA_CONFIG_DITHER_EN);
> + config =
> + MDP4_DMA_CONFIG_R_BPC(BPC6) |
> + MDP4_DMA_CONFIG_G_BPC(BPC6) |
> + MDP4_DMA_CONFIG_B_BPC(BPC6) |
> + MDP4_DMA_CONFIG_PACK(0x21) |
> + MDP4_DMA_CONFIG_DEFLKR_EN |
> + MDP4_DMA_CONFIG_DITHER_EN;
> +
> + if (!of_find_property(dev->dev->of_node, "lcdc-align-lsb", NULL))
> + config |= MDP4_DMA_CONFIG_PACK_ALIGN_MSB;
> +
> +
looks reasonable, except extra newline (minor nit) and more
importantly the new dt property needs to be documented (and cc'd to
devicetree list)
BR,
-R
> + mdp4_crtc_set_config(encoder->crtc, config);
> mdp4_crtc_set_intf(encoder->crtc, INTF_LCDC_DTV, 0);
>
> bs_set(mdp4_lcdc_encoder, 1);
> --
> 2.17.1
>
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