Re: [Freedreno] [PATCH v3 1/5] dt-bindings: msm/dp: Change reg definition

2021-10-05 Thread abhinavk 

On 2021-10-01 10:43, Bjorn Andersson wrote:

reg was defined as one region covering the entire DP block, but the
memory map is actually split in 4 regions and obviously the size of
these regions differs between platforms.

Switch the reg to require that all four regions are specified instead.
It is expected that the implementation will handle existing DTBs, even
though the schema defines the new layout.

Reviewed-by: Stephen Boyd 
Reviewed-by: Rob Herring 
Signed-off-by: Bjorn Andersson 

Reviewed-by: Abhinav Kumar 

---

Changes since v2:
- None

 .../bindings/display/msm/dp-controller.yaml | 13 +++--
 1 file changed, 11 insertions(+), 2 deletions(-)

diff --git
a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
index d89b3c510c27..6bb424c21340 100644
--- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
@@ -19,7 +19,12 @@ properties:
   - qcom,sc7180-dp

   reg:
-maxItems: 1
+items:
+  - description: ahb register block
+  - description: aux register block
+  - description: link register block
+  - description: p0 register block
+  - description: p1 register block

   interrupts:
 maxItems: 1
@@ -99,7 +104,11 @@ examples:

 displayport-controller@ae9 {
 compatible = "qcom,sc7180-dp";
-reg = <0xae9 0x1400>;
+reg = <0xae9 0x200>,
+  <0xae90200 0x200>,
+  <0xae90400 0xc00>,
+  <0xae91000 0x400>,
+  <0xae91400 0x400>;
 interrupt-parent = <>;
 interrupts = <12>;
 clocks = < DISP_CC_MDSS_AHB_CLK>,

[Freedreno] [PATCH v3 1/5] dt-bindings: msm/dp: Change reg definition

2021-10-01 Thread Bjorn Andersson 
reg was defined as one region covering the entire DP block, but the
memory map is actually split in 4 regions and obviously the size of
these regions differs between platforms.

Switch the reg to require that all four regions are specified instead.
It is expected that the implementation will handle existing DTBs, even
though the schema defines the new layout.

Reviewed-by: Stephen Boyd 
Reviewed-by: Rob Herring 
Signed-off-by: Bjorn Andersson 
---

Changes since v2:
- None

 .../bindings/display/msm/dp-controller.yaml | 13 +++--
 1 file changed, 11 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml 
b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
index d89b3c510c27..6bb424c21340 100644
--- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
@@ -19,7 +19,12 @@ properties:
   - qcom,sc7180-dp
 
   reg:
-maxItems: 1
+items:
+  - description: ahb register block
+  - description: aux register block
+  - description: link register block
+  - description: p0 register block
+  - description: p1 register block
 
   interrupts:
 maxItems: 1
@@ -99,7 +104,11 @@ examples:
 
 displayport-controller@ae9 {
 compatible = "qcom,sc7180-dp";
-reg = <0xae9 0x1400>;
+reg = <0xae9 0x200>,
+  <0xae90200 0x200>,
+  <0xae90400 0xc00>,
+  <0xae91000 0x400>,
+  <0xae91400 0x400>;
 interrupt-parent = <>;
 interrupts = <12>;
 clocks = < DISP_CC_MDSS_AHB_CLK>,
-- 
2.29.2