Re: [Freedreno] [PATCH v5 01/19] drm/msm/dpu: remove debugfs support for misr
On Wed, Sep 05, 2018 at 07:08:10PM -0700, Jeykumar Sankaran wrote:
> MISR support is the debug feature present in Snapdragon chipsets.
> At the layer mixer and interfaces, MISR algorithm can generate CRC
> signatures of the pixel data which can be used for validating
> the frames generated. Since there are no clients for this feature,
> strip down the support from the driver.
>
> changes in v4:
> - changed introduced in the series
> changes in v5:
> - update commit text with the need for the change(Sean)
Awesome! Thank you!
Reviewed-by: Sean Paul
>
> Signed-off-by: Jeykumar Sankaran
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 139
> -
> drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h | 6 -
> drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c| 127 ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h | 6 -
> .../gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c | 28 -
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c| 29 -
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h| 7 --
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c | 29 -
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.h | 7 --
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.c| 3 -
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h| 6 -
> 11 files changed, 387 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
> b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
> index f0a5e77..1e0382f 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
> @@ -47,8 +47,6 @@
> #define LEFT_MIXER 0
> #define RIGHT_MIXER 1
>
> -#define MISR_BUFF_SIZE 256
> -
> static inline struct dpu_kms *_dpu_crtc_get_kms(struct drm_crtc *crtc)
> {
> struct msm_drm_private *priv;
> @@ -1272,8 +1270,6 @@ static void dpu_crtc_handle_power_event(u32 event_type,
> void *arg)
> struct drm_crtc *crtc = arg;
> struct dpu_crtc *dpu_crtc;
> struct drm_encoder *encoder;
> - struct dpu_crtc_mixer *m;
> - u32 i, misr_status;
>
> if (!crtc) {
> DPU_ERROR("invalid crtc\n");
> @@ -1294,29 +1290,8 @@ static void dpu_crtc_handle_power_event(u32
> event_type, void *arg)
>
> dpu_encoder_virt_restore(encoder);
> }
> -
> - for (i = 0; i < dpu_crtc->num_mixers; ++i) {
> - m = &dpu_crtc->mixers[i];
> - if (!m->hw_lm || !m->hw_lm->ops.setup_misr ||
> - !dpu_crtc->misr_enable)
> - continue;
> -
> - m->hw_lm->ops.setup_misr(m->hw_lm, true,
> - dpu_crtc->misr_frame_count);
> - }
> break;
> case DPU_POWER_EVENT_PRE_DISABLE:
> - for (i = 0; i < dpu_crtc->num_mixers; ++i) {
> - m = &dpu_crtc->mixers[i];
> - if (!m->hw_lm || !m->hw_lm->ops.collect_misr ||
> - !dpu_crtc->misr_enable)
> - continue;
> -
> - misr_status = m->hw_lm->ops.collect_misr(m->hw_lm);
> - dpu_crtc->misr_data[i] = misr_status ? misr_status :
> - dpu_crtc->misr_data[i];
> - }
> - break;
> case DPU_POWER_EVENT_POST_DISABLE:
> /**
>* Nothing to do. All the planes on the CRTC will be
> @@ -1846,113 +1821,6 @@ static int _dpu_debugfs_status_open(struct inode
> *inode, struct file *file)
> return single_open(file, _dpu_debugfs_status_show, inode->i_private);
> }
>
> -static ssize_t _dpu_crtc_misr_setup(struct file *file,
> - const char __user *user_buf, size_t count, loff_t *ppos)
> -{
> - struct dpu_crtc *dpu_crtc;
> - struct dpu_crtc_mixer *m;
> - int i = 0, rc;
> - char buf[MISR_BUFF_SIZE + 1];
> - u32 frame_count, enable;
> - size_t buff_copy;
> -
> - if (!file || !file->private_data)
> - return -EINVAL;
> -
> - dpu_crtc = file->private_data;
> - buff_copy = min_t(size_t, count, MISR_BUFF_SIZE);
> - if (copy_from_user(buf, user_buf, buff_copy)) {
> - DPU_ERROR("buffer copy failed\n");
> - return -EINVAL;
> - }
> -
> - buf[buff_copy] = 0; /* end of string */
> -
> - if (sscanf(buf, "%u %u", &enable, &frame_count) != 2)
> - return -EINVAL;
> -
> - rc = _dpu_crtc_power_enable(dpu_crtc, true);
> - if (rc)
> - return rc;
> -
> - mutex_lock(&dpu_crtc->crtc_lock);
> - dpu_crtc->misr_enable = enable;
> - dpu_crtc->misr_frame_count = frame_count;
> - for (i = 0; i < dpu_crtc->num_mixers; ++i) {
> - dpu_crtc->misr_data[i] = 0;
> - m = &dpu_crtc->mixers[i];
> - if (!m->hw_lm || !m
[Freedreno] [PATCH v5 01/19] drm/msm/dpu: remove debugfs support for misr
MISR support is the debug feature present in Snapdragon chipsets.
At the layer mixer and interfaces, MISR algorithm can generate CRC
signatures of the pixel data which can be used for validating
the frames generated. Since there are no clients for this feature,
strip down the support from the driver.
changes in v4:
- changed introduced in the series
changes in v5:
- update commit text with the need for the change(Sean)
Signed-off-by: Jeykumar Sankaran
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 139 -
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h | 6 -
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c| 127 ---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h | 6 -
.../gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c | 28 -
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c| 29 -
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h| 7 --
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c | 29 -
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.h | 7 --
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.c| 3 -
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h| 6 -
11 files changed, 387 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
index f0a5e77..1e0382f 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
@@ -47,8 +47,6 @@
#define LEFT_MIXER 0
#define RIGHT_MIXER 1
-#define MISR_BUFF_SIZE 256
-
static inline struct dpu_kms *_dpu_crtc_get_kms(struct drm_crtc *crtc)
{
struct msm_drm_private *priv;
@@ -1272,8 +1270,6 @@ static void dpu_crtc_handle_power_event(u32 event_type,
void *arg)
struct drm_crtc *crtc = arg;
struct dpu_crtc *dpu_crtc;
struct drm_encoder *encoder;
- struct dpu_crtc_mixer *m;
- u32 i, misr_status;
if (!crtc) {
DPU_ERROR("invalid crtc\n");
@@ -1294,29 +1290,8 @@ static void dpu_crtc_handle_power_event(u32 event_type,
void *arg)
dpu_encoder_virt_restore(encoder);
}
-
- for (i = 0; i < dpu_crtc->num_mixers; ++i) {
- m = &dpu_crtc->mixers[i];
- if (!m->hw_lm || !m->hw_lm->ops.setup_misr ||
- !dpu_crtc->misr_enable)
- continue;
-
- m->hw_lm->ops.setup_misr(m->hw_lm, true,
- dpu_crtc->misr_frame_count);
- }
break;
case DPU_POWER_EVENT_PRE_DISABLE:
- for (i = 0; i < dpu_crtc->num_mixers; ++i) {
- m = &dpu_crtc->mixers[i];
- if (!m->hw_lm || !m->hw_lm->ops.collect_misr ||
- !dpu_crtc->misr_enable)
- continue;
-
- misr_status = m->hw_lm->ops.collect_misr(m->hw_lm);
- dpu_crtc->misr_data[i] = misr_status ? misr_status :
- dpu_crtc->misr_data[i];
- }
- break;
case DPU_POWER_EVENT_POST_DISABLE:
/**
* Nothing to do. All the planes on the CRTC will be
@@ -1846,113 +1821,6 @@ static int _dpu_debugfs_status_open(struct inode
*inode, struct file *file)
return single_open(file, _dpu_debugfs_status_show, inode->i_private);
}
-static ssize_t _dpu_crtc_misr_setup(struct file *file,
- const char __user *user_buf, size_t count, loff_t *ppos)
-{
- struct dpu_crtc *dpu_crtc;
- struct dpu_crtc_mixer *m;
- int i = 0, rc;
- char buf[MISR_BUFF_SIZE + 1];
- u32 frame_count, enable;
- size_t buff_copy;
-
- if (!file || !file->private_data)
- return -EINVAL;
-
- dpu_crtc = file->private_data;
- buff_copy = min_t(size_t, count, MISR_BUFF_SIZE);
- if (copy_from_user(buf, user_buf, buff_copy)) {
- DPU_ERROR("buffer copy failed\n");
- return -EINVAL;
- }
-
- buf[buff_copy] = 0; /* end of string */
-
- if (sscanf(buf, "%u %u", &enable, &frame_count) != 2)
- return -EINVAL;
-
- rc = _dpu_crtc_power_enable(dpu_crtc, true);
- if (rc)
- return rc;
-
- mutex_lock(&dpu_crtc->crtc_lock);
- dpu_crtc->misr_enable = enable;
- dpu_crtc->misr_frame_count = frame_count;
- for (i = 0; i < dpu_crtc->num_mixers; ++i) {
- dpu_crtc->misr_data[i] = 0;
- m = &dpu_crtc->mixers[i];
- if (!m->hw_lm || !m->hw_lm->ops.setup_misr)
- continue;
-
- m->hw_lm->ops.setup_misr(m->hw_lm, enable, frame_count);
- }
- mutex_unlock(&dpu_crtc->crtc_lock);
- _dpu_crtc_power_enable(dpu_crtc, false);
-
-
