Re: arm: Prevent ICE when doloop dec_set is not PLUS_EXPR
On 7/31/24 18:06, Andre Vieira (lists) wrote: This patch refactors and fixes an issue where arm_mve_dlstp_check_dec_counter was making an assumption about the form of what a candidate for a dec_insn should be, which caused an ICE. This dec_insn is the instruction that decreases the loop counter inside a decrementing loop and we expect it to have the following form: (set (reg CONDCOUNT) (plus (reg CONDCOUNT) (const_int))) Where CONDCOUNT is the loop counter, and const int is the negative constant used to decrement it. This patch also improves our search for a valid dec_insn. Before this patch we'd only look for a dec_insn inside the loop header if the loop latch was empty. We now also search the loop header if the loop latch is not empty but the last instruction is not a valid dec_insn. This could potentially be improved to search all instructions inside the loop latch. gcc/ChangeLog: * config/arm/arm.cc (check_dec_insn): New helper function containing code hoisted from... (arm_mve_dlstp_check_dec_counter): ... here. Use check_dec_insn to check the validity of the candidate dec_insn. gcc/testsuite/ChangeLog: * gcc.targer/arm/mve/dlstp-loop-form.c: New test. On 31/07/2024 15:15, Christophe Lyon wrote: Because I tested with a toolchain configured for cortex-m85, which has mve.fp enabled by default, which means I didn't realize the testcase required arm_v8_1m_mve_fp_ok instead of arm_v8_1m_mve_ok. Addressed that now. Thanks, I thought you meant you ran the testsuite with -mcpu=cortex-m85 in RUNTESTFLAGS. To be fair, that's not a terrible assumption. But what I did was I configured the toolchain (and single multilib) for I ran them in a build configured for armv8.1-m.main+mve.fp+fp.dp and fpu=auto (and float-abi=hard). Regarding the patch, did you consider making the new check_dec_insn helper return an rtx (NULL or dec_set) instead of bool? I think it would save a call to single_set when computing decrementnum, but that's nitpicking. Yeah I had also contemplated that, I'm OK either way, doesn't look too bad with the rtx return. See attached. Thanks, LGTM. Christophe Thanks, Christophe
Re: [PATCH 01/15] arm: [MVE intrinsics] improve comment for orrq shape
ping for the series?
On Thu, 11 Jul 2024 at 23:43, Christophe Lyon
wrote:
>
> Add a comment about the lack of "n" forms for floating-point nor 8-bit
> integers, to make it clearer why we use build_16_32 for MODE_n.
>
> 2024-07-11 Christophe Lyon
>
> gcc/
> * config/arm/arm-mve-builtins-shapes.cc (binary_orrq_def): Improve
> comment.
> ---
> gcc/config/arm/arm-mve-builtins-shapes.cc | 7 ++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/gcc/config/arm/arm-mve-builtins-shapes.cc
> b/gcc/config/arm/arm-mve-builtins-shapes.cc
> index ba20c6a8f73..e01939469e3 100644
> --- a/gcc/config/arm/arm-mve-builtins-shapes.cc
> +++ b/gcc/config/arm/arm-mve-builtins-shapes.cc
> @@ -865,7 +865,12 @@ SHAPE (binary_opt_n)
> int16x8_t [__arm_]vorrq_m[_s16](int16x8_t inactive, int16x8_t a,
> int16x8_t b, mve_pred16_t p)
> int16x8_t [__arm_]vorrq_x[_s16](int16x8_t a, int16x8_t b, mve_pred16_t p)
> int16x8_t [__arm_]vorrq[_n_s16](int16x8_t a, const int16_t imm)
> - int16x8_t [__arm_]vorrq_m_n[_s16](int16x8_t a, const int16_t imm,
> mve_pred16_t p) */
> + int16x8_t [__arm_]vorrq_m_n[_s16](int16x8_t a, const int16_t imm,
> mve_pred16_t p)
> +
> + No "_n" forms for floating-point, nor 8-bit integers:
> + float16x8_t [__arm_]vorrq[_f16](float16x8_t a, float16x8_t b)
> + float16x8_t [__arm_]vorrq_m[_f16](float16x8_t inactive, float16x8_t a,
> float16x8_t b, mve_pred16_t p)
> + float16x8_t [__arm_]vorrq_x[_f16](float16x8_t a, float16x8_t b,
> mve_pred16_t p) */
> struct binary_orrq_def : public overloaded_base<0>
> {
>bool
> --
> 2.34.1
>
Re: arm: Prevent ICE when doloop dec_set is not PLUS_EXPR
Hi Andre,
On 7/31/24 11:29, Andre Vieira (lists) wrote:
Hi Christophe,
Thanks for the comments, attached new version for testcase, see below
new cover letter:
Thanks for the improved cover letter, it is indeed clearer.
This patch refactors and fixes an issue where
arm_mve_dlstp_check_dec_counter
was making an assumption about the form of what a candidate for a dec_insn.
This dec_insn is the instruction that decreases the loop counter inside a
decrementing loop and we expect it to have the following form:
(set (reg CONDCOUNT)
(plus (reg CONDCOUNT)
(const_int)))
Where CONDCOUNT is the loop counter, and const int is the negative constant
used to decrement it.
This patch also improves our search for a valid dec_insn. Before this
patch
we'd only look for a dec_insn inside the loop header if the loop latch was
empty. We now also search the loop header if the loop latch is not
empty but
the last instruction is not a valid dec_insn. This could potentially be
improved
to search all instructions inside the loop latch.
gcc/ChangeLog:
* config/arm/arm.cc (check_dec_insn): New helper function containing
code hoisted from...
(arm_mve_dlstp_check_dec_counter): ... here. Use check_dec_insn to
check the validity of the candidate dec_insn.
gcc/testsuite/ChangeLog:
* gcc.targer/arm/mve/dlstp-loop-form.c: New test.
On 30/07/2024 21:31, Christophe Lyon wrote:
I manually tried to exercise the testcase with a cross-compiler, and
found the same issue as the Linaro CI should have reported (there was
a temporary breakage).
You can find detailed logs from Linaro in gcc.log.1.xz under
https://ci.linaro.org/job/tcwg_gcc_check--master-arm-precommit/8357/artifact/artifacts/artifacts.precommit/00-sumfiles/
Basically the testcase fails to compile with loads of
dlstp-loop-form.c:6:9: warning: 'pure' attribute on function returning
'void' [-Wattributes]
then
dlstp-loop-form.c:7:37: error: unknown type name 'float16x8_t'; did
you mean 'int16x8_t'?
dlstp-loop-form.c: In function 'n':
dlstp-loop-form.c:18:8: error: subscripted value is neither array nor
pointer nor vector
dlstp-loop-form.c:21:13: error: passing 'e' {aka 'int'} to argument 2
of 'vfmsq_m', which expects an MVE vector type
Why would the test pass for you?
Because I tested with a toolchain configured for cortex-m85, which has
mve.fp enabled by default, which means I didn't realize the testcase
required arm_v8_1m_mve_fp_ok instead of arm_v8_1m_mve_ok.
Addressed that now.
Thanks, I thought you meant you ran the testsuite with -mcpu=cortex-m85
in RUNTESTFLAGS.
Regarding the patch, did you consider making the new check_dec_insn
helper return an rtx (NULL or dec_set) instead of bool?
I think it would save a call to single_set when computing decrementnum,
but that's nitpicking.
Thanks,
Christophe
[PATCH v4 2/2] arm: [MVE intrinsics] Improve vdupq_n implementation
Hi,
v4 of patch 2/2 fixes a small mistake in 3 testcases, by relaxing the
expected q0 as result register into q[0-9]+ to account for codegen
differences depending on if the test is compiled with
-mfloat-abi=softfp or -mfloat-abi=hard.
I repost patch 1/2 (already approved) so that Linaro CI can apply patch 2/2.
Thanks,
Christophe
This patch makes the non-predicated vdupq_n MVE intrinsics use
vec_duplicate rather than an unspec. This enables the compiler to
generate better code sequences (for instance using vmov when
possible).
The patch renames the existing mve_vdup pattern into
@mve_vdupq_n, and removes the now useless
@mve_q_n_f and @mve_q_n_ ones.
As a side-effect, it needs to update the mve_unpredicated_insn
predicates in @mve_q_m_n_ and
@mve_q_m_n_f.
Using vec_duplicates means the compiler is now able to use vmov in the
tests with an immediate argument in vdupq_n_[su]{8,16,32}.c:
vmov.i8 q0,#0x1
However, this is only possible when the immediate has a suitable value
(MVE encoding constraints, see imm_for_neon_mov_operand predicate).
Provided we adjust the cost computations in arm_rtx_costs_internal(),
when the immediate does not meet the vmov constraints, we now generate:
mov r0, #imm
vdup.xx q0,r0
or
ldr r0, .L4
vdup.32 q0,r0
in the f32 case (with 1.1 as immediate).
Without the cost adjustment, we would generate:
vldr.64 d0, .L4
vldr.64 d1, .L4+8
and an associated literal pool entry.
Regarding the testsuite updates:
* The signed versions of vdupq_* tests lack a version with an
immediate argument. This patch adds them, similar to what we already
have for vdupq_n_u*.c tests.
* Code generation for different immediate values is checked with the
new tests this patch introduces. Note there's no need for s8/u8 tests
because 8-bit immediates always comply wth imm_for_neon_mov_operand.
* We can remove xfail from vcmp*f tests since we now generate:
movw r3, #15462
vcmp.f16 eq, q0, r3
instead of the previous:
vldr.64 d6, .L5
vldr.64 d7, .L5+8
vcmp.f16 eq, q0, q3
Tested on arm-linux-gnueabihf and arm-none-eabi with no regression.
2024-07-02 Jolen Li
Christophe Lyon
gcc/
* config/arm/arm-mve-builtins-base.cc (vdupq_impl): New class.
(vdupq): Use new implementation.
* config/arm/arm.cc (arm_rtx_costs_internal): Handle HFmode
for COST_DOUBLE. Update costing for CONST_VECTOR.
* config/arm/arm_mve_builtins.def: Merge vdupq_n_f, vdupq_n_s
and vdupq_n_u into vdupq_n.
* config/arm/mve.md (mve_vdup): Rename into ...
(@mve_vdup_n): ... this.
(@mve_q_n_f): Delete.
(@mve_q_n_): Delete..
(@mve_q_m_n_): Update mve_unpredicated_insn
attribute.
(@mve_q_m_n_f): Likewise.
gcc/testsuite/
* gcc.target/arm/mve/intrinsics/vdupq_n_u8.c (foo1): Update
expected code.
* gcc.target/arm/mve/intrinsics/vdupq_n_u16.c (foo1): Likewise.
* gcc.target/arm/mve/intrinsics/vdupq_n_u32.c (foo1): Likewise.
* gcc.target/arm/mve/intrinsics/vdupq_n_s8.c: Add test with
immediate argument.
* gcc.target/arm/mve/intrinsics/vdupq_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdupq_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdupq_n_f16.c (foo1): Update
expected code.
* gcc.target/arm/mve/intrinsics/vdupq_n_f32.c (foo1): Likewise.
* gcc.target/arm/mve/intrinsics/vdupq_m_n_s16.c: Add test with
immediate argument.
* gcc.target/arm/mve/intrinsics/vdupq_m_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdupq_m_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdupq_x_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdupq_x_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdupq_x_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdupq_n_f32-2.c: New test.
* gcc.target/arm/mve/intrinsics/vdupq_n_s16-2.c: New test.
* gcc.target/arm/mve/intrinsics/vdupq_n_s32-2.c: New test.
* gcc.target/arm/mve/intrinsics/vdupq_n_u16-2.c: New test.
* gcc.target/arm/mve/intrinsics/vdupq_n_u32-2.c: New test.
* gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c: Remove xfail.
* gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c: Likewise.
* gcc.target/arm/mve
[PATCH v4 1/2] arm: [MVE intrinsics] fix vdup iterator
This patch fixes a bug where the mode iterator for mve_vdup should be MVE_VLD_ST instead of MVE_vecs: V2DI and V2DF (thus vdup.64) are not supported by MVE. 2024-07-02 Jolen Li Christophe Lyon gcc/ * config/arm/mve.md (mve_vdup): Fix mode iterator. --- gcc/config/arm/mve.md | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md index 4b4d6298ffb..afe5fba698c 100644 --- a/gcc/config/arm/mve.md +++ b/gcc/config/arm/mve.md @@ -95,8 +95,8 @@ (define_insn "mve_mov" (set_attr "neg_pool_range" "*,*,*,*,996,*,*,*")]) (define_insn "mve_vdup" - [(set (match_operand:MVE_vecs 0 "s_register_operand" "=w") - (vec_duplicate:MVE_vecs + [(set (match_operand:MVE_VLD_ST 0 "s_register_operand" "=w") + (vec_duplicate:MVE_VLD_ST (match_operand: 1 "s_register_operand" "r")))] "TARGET_HAVE_MVE || TARGET_HAVE_MVE_FLOAT" "vdup.\t%q0, %1" -- 2.34.1
Re: arm: Prevent ICE when doloop dec_set is not PLUS_EXPR
Hi Andre,
On 7/26/24 16:05, Andre Vieira (lists) wrote:
This patch refactors and fixes an issue where
arm_mve_dlstp_check_dec_counter
was making an assumption about the form of what a candidate for a dec_insn.
I think this lacks some verb? (eg what a candidate for a dec_insn
"is" or "should look like" or ?)
> - if (!NONDEBUG_INSN_P (dec_insn))
> + if (!check_dec_insn(dec_insn, condcount))
missing space before '('
> -return NULL;
> +if (!check_dec_insn(dec_insn, condcount))
same
It also makes sure that if it does not initially encounter a 'set' in
such a
form it tries to find another set that could be the right one.
gcc/ChangeLog:
* config/arm/arm.cc (check_dec_insn): New helper function containing
code hoisted from...
(arm_mve_dlstp_check_dec_counter): ... here. Use check_dec_insn to
check the validity of the candidate dec_insn.
gcc/testsuite/ChangeLog:
* gcc.targer/arm/mve/dlstp-loop-form.c: New test.
Regression tested mve.exp for arm-none-eabi with -mcpu=cortex-m85.
I manually tried to exercise the testcase with a cross-compiler, and
found the same issue as the Linaro CI should have reported (there was a
temporary breakage).
You can find detailed logs from Linaro in gcc.log.1.xz under
https://ci.linaro.org/job/tcwg_gcc_check--master-arm-precommit/8357/artifact/artifacts/artifacts.precommit/00-sumfiles/
Basically the testcase fails to compile with loads of
dlstp-loop-form.c:6:9: warning: 'pure' attribute on function returning
'void' [-Wattributes]
then
dlstp-loop-form.c:7:37: error: unknown type name 'float16x8_t'; did you
mean 'int16x8_t'?
dlstp-loop-form.c: In function 'n':
dlstp-loop-form.c:18:8: error: subscripted value is neither array nor
pointer nor vector
dlstp-loop-form.c:21:13: error: passing 'e' {aka 'int'} to argument 2 of
'vfmsq_m', which expects an MVE vector type
Why would the test pass for you?
Thanks,
Christophe
OK for trunk?
Kind regards,
Andre Vieira
[PATCH v3] arm: [MVE intrinsics] Improve vdupq_n implementation
Hi,
v3 of patch 2/2 uses your suggested fix about using extra_cost as an
adjustment.
I did not introduce the ARM_INSN_COST macro you suggested because it seems
there's only a handful (maybe two) of cases where it could be used, and I
thought it wouldn't make the code really easier to understand.
Since you already approved patch 1/2, I'm not reposting it.
Thanks,
Christophe
This patch makes the non-predicated vdupq_n MVE intrinsics use
vec_duplicate rather than an unspec. This enables the compiler to
generate better code sequences (for instance using vmov when
possible).
The patch renames the existing mve_vdup pattern into
@mve_vdupq_n, and removes the now useless
@mve_q_n_f and @mve_q_n_ ones.
As a side-effect, it needs to update the mve_unpredicated_insn
predicates in @mve_q_m_n_ and
@mve_q_m_n_f.
Using vec_duplicates means the compiler is now able to use vmov in the
tests with an immediate argument in vdupq_n_[su]{8,16,32}.c:
vmov.i8 q0,#0x1
However, this is only possible when the immediate has a suitable value
(MVE encoding constraints, see imm_for_neon_mov_operand predicate).
Provided we adjust the cost computations in arm_rtx_costs_internal(),
when the immediate does not meet the vmov constraints, we now generate:
mov r0, #imm
vdup.xx q0,r0
or
ldr r0, .L4
vdup.32 q0,r0
in the f32 case (with 1.1 as immediate).
Without the cost adjustment, we would generate:
vldr.64 d0, .L4
vldr.64 d1, .L4+8
and an associated literal pool entry.
Regarding the testsuite updates:
* The signed versions of vdupq_* tests lack a version with an
immediate argument. This patch adds them, similar to what we already
have for vdupq_n_u*.c tests.
* Code generation for different immediate values is checked with the
new tests this patch introduces. Note there's no need for s8/u8 tests
because 8-bit immediates always comply wth imm_for_neon_mov_operand.
* We can remove xfail from vcmp*f tests since we now generate:
movw r3, #15462
vcmp.f16 eq, q0, r3
instead of the previous:
vldr.64 d6, .L5
vldr.64 d7, .L5+8
vcmp.f16 eq, q0, q3
Tested on arm-linux-gnueabihf and arm-none-eabi with no regression.
2024-07-02 Jolen Li
Christophe Lyon
gcc/
* config/arm/arm-mve-builtins-base.cc (vdupq_impl): New class.
(vdupq): Use new implementation.
* config/arm/arm.cc (arm_rtx_costs_internal): Handle HFmode
for COST_DOUBLE. Update costing for CONST_VECTOR.
* config/arm/arm_mve_builtins.def: Merge vdupq_n_f, vdupq_n_s
and vdupq_n_u into vdupq_n.
* config/arm/mve.md (mve_vdup): Rename into ...
(@mve_vdup_n): ... this.
(@mve_q_n_f): Delete.
(@mve_q_n_): Delete..
(@mve_q_m_n_): Update mve_unpredicated_insn
attribute.
(@mve_q_m_n_f): Likewise.
gcc/testsuite/
* gcc.target/arm/mve/intrinsics/vdupq_n_u8.c (foo1): Update
expected code.
* gcc.target/arm/mve/intrinsics/vdupq_n_u16.c (foo1): Likewise.
* gcc.target/arm/mve/intrinsics/vdupq_n_u32.c (foo1): Likewise.
* gcc.target/arm/mve/intrinsics/vdupq_n_s8.c: Add test with
immediate argument.
* gcc.target/arm/mve/intrinsics/vdupq_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdupq_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdupq_n_f16.c (foo1): Update
expected code.
* gcc.target/arm/mve/intrinsics/vdupq_n_f32.c (foo1): Likewise.
* gcc.target/arm/mve/intrinsics/vdupq_m_n_s16.c: Add test with
immediate argument.
* gcc.target/arm/mve/intrinsics/vdupq_m_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdupq_m_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdupq_x_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdupq_x_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdupq_x_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdupq_n_f32-2.c: New test.
* gcc.target/arm/mve/intrinsics/vdupq_n_s16-2.c: New test.
* gcc.target/arm/mve/intrinsics/vdupq_n_s32-2.c: New test.
* gcc.target/arm/mve/intrinsics/vdupq_n_u16-2.c: New test.
* gcc.target/arm/mve/intrinsics/vdupq_n_u32-2.c: New test.
* gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c: Remove xfail.
* gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpltq_n_f32
[PATCH 12/15] arm: [MVE intrinsics] rework vcvtaq vcvtmq vcvtnq vcvtpq
Implement vcvtaq vcvtmq vcvtnq vcvtpq using the new MVE builtins framework. 2024-07-11 Christophe Lyon gcc/ * config/arm/arm-mve-builtins-base.cc (vcvtaq): New. (vcvtmq): New. (vcvtnq): New. (vcvtpq): New. * config/arm/arm-mve-builtins-base.def (vcvtaq): New. (vcvtmq): New. (vcvtnq): New. (vcvtpq): New. * config/arm/arm-mve-builtins-base.h: (vcvtaq): New. (vcvtmq): New. (vcvtnq): New. (vcvtpq): New. * config/arm/arm-mve-builtins.cc (cvtx): New type. * config/arm/arm_mve.h (vcvtaq_m): Delete. (vcvtmq_m): Delete. (vcvtnq_m): Delete. (vcvtpq_m): Delete. (vcvtaq_s16_f16): Delete. (vcvtaq_s32_f32): Delete. (vcvtnq_s16_f16): Delete. (vcvtnq_s32_f32): Delete. (vcvtpq_s16_f16): Delete. (vcvtpq_s32_f32): Delete. (vcvtmq_s16_f16): Delete. (vcvtmq_s32_f32): Delete. (vcvtpq_u16_f16): Delete. (vcvtpq_u32_f32): Delete. (vcvtnq_u16_f16): Delete. (vcvtnq_u32_f32): Delete. (vcvtmq_u16_f16): Delete. (vcvtmq_u32_f32): Delete. (vcvtaq_u16_f16): Delete. (vcvtaq_u32_f32): Delete. (vcvtaq_m_s16_f16): Delete. (vcvtaq_m_u16_f16): Delete. (vcvtaq_m_s32_f32): Delete. (vcvtaq_m_u32_f32): Delete. (vcvtmq_m_s16_f16): Delete. (vcvtnq_m_s16_f16): Delete. (vcvtpq_m_s16_f16): Delete. (vcvtmq_m_u16_f16): Delete. (vcvtnq_m_u16_f16): Delete. (vcvtpq_m_u16_f16): Delete. (vcvtmq_m_s32_f32): Delete. (vcvtnq_m_s32_f32): Delete. (vcvtpq_m_s32_f32): Delete. (vcvtmq_m_u32_f32): Delete. (vcvtnq_m_u32_f32): Delete. (vcvtpq_m_u32_f32): Delete. (vcvtaq_x_s16_f16): Delete. (vcvtaq_x_s32_f32): Delete. (vcvtaq_x_u16_f16): Delete. (vcvtaq_x_u32_f32): Delete. (vcvtnq_x_s16_f16): Delete. (vcvtnq_x_s32_f32): Delete. (vcvtnq_x_u16_f16): Delete. (vcvtnq_x_u32_f32): Delete. (vcvtpq_x_s16_f16): Delete. (vcvtpq_x_s32_f32): Delete. (vcvtpq_x_u16_f16): Delete. (vcvtpq_x_u32_f32): Delete. (vcvtmq_x_s16_f16): Delete. (vcvtmq_x_s32_f32): Delete. (vcvtmq_x_u16_f16): Delete. (vcvtmq_x_u32_f32): Delete. (__arm_vcvtpq_u16_f16): Delete. (__arm_vcvtpq_u32_f32): Delete. (__arm_vcvtnq_u16_f16): Delete. (__arm_vcvtnq_u32_f32): Delete. (__arm_vcvtmq_u16_f16): Delete. (__arm_vcvtmq_u32_f32): Delete. (__arm_vcvtaq_u16_f16): Delete. (__arm_vcvtaq_u32_f32): Delete. (__arm_vcvtaq_s16_f16): Delete. (__arm_vcvtaq_s32_f32): Delete. (__arm_vcvtnq_s16_f16): Delete. (__arm_vcvtnq_s32_f32): Delete. (__arm_vcvtpq_s16_f16): Delete. (__arm_vcvtpq_s32_f32): Delete. (__arm_vcvtmq_s16_f16): Delete. (__arm_vcvtmq_s32_f32): Delete. (__arm_vcvtaq_m_s16_f16): Delete. (__arm_vcvtaq_m_u16_f16): Delete. (__arm_vcvtaq_m_s32_f32): Delete. (__arm_vcvtaq_m_u32_f32): Delete. (__arm_vcvtmq_m_s16_f16): Delete. (__arm_vcvtnq_m_s16_f16): Delete. (__arm_vcvtpq_m_s16_f16): Delete. (__arm_vcvtmq_m_u16_f16): Delete. (__arm_vcvtnq_m_u16_f16): Delete. (__arm_vcvtpq_m_u16_f16): Delete. (__arm_vcvtmq_m_s32_f32): Delete. (__arm_vcvtnq_m_s32_f32): Delete. (__arm_vcvtpq_m_s32_f32): Delete. (__arm_vcvtmq_m_u32_f32): Delete. (__arm_vcvtnq_m_u32_f32): Delete. (__arm_vcvtpq_m_u32_f32): Delete. (__arm_vcvtaq_x_s16_f16): Delete. (__arm_vcvtaq_x_s32_f32): Delete. (__arm_vcvtaq_x_u16_f16): Delete. (__arm_vcvtaq_x_u32_f32): Delete. (__arm_vcvtnq_x_s16_f16): Delete. (__arm_vcvtnq_x_s32_f32): Delete. (__arm_vcvtnq_x_u16_f16): Delete. (__arm_vcvtnq_x_u32_f32): Delete. (__arm_vcvtpq_x_s16_f16): Delete. (__arm_vcvtpq_x_s32_f32): Delete. (__arm_vcvtpq_x_u16_f16): Delete. (__arm_vcvtpq_x_u32_f32): Delete. (__arm_vcvtmq_x_s16_f16): Delete. (__arm_vcvtmq_x_s32_f32): Delete. (__arm_vcvtmq_x_u16_f16): Delete. (__arm_vcvtmq_x_u32_f32): Delete. (__arm_vcvtaq_m): Delete. (__arm_vcvtmq_m): Delete. (__arm_vcvtnq_m): Delete. (__arm_vcvtpq_m): Delete. --- gcc/config/arm/arm-mve-builtins-base.cc | 4 + gcc/config/arm/arm-mve-builtins-base.def | 4 + gcc/config/arm/arm-mve-builtins-base.h | 4 + gcc/config/arm/arm-mve-builtins.cc | 9 + gcc/config/arm/arm_mve.h | 533 --- 5 files changed, 21 insertions(+), 533 deletions(-) diff --git a/gcc/config/arm/arm-mve-builtins-base.cc b/gcc/config/arm/arm-mve-builtins-base.cc index 760378c91b1..281f3749bce 100644 --- a/gcc
[PATCH 06/15] arm: [MVE intrinsics] rework vcvtq
Implement vcvtq using the new MVE builtins framework. 2024-07-11 Christophe Lyon gcc/ * config/arm/arm-mve-builtins-base.cc (class vcvtq_impl): New. (vcvtq): New. * config/arm/arm-mve-builtins-base.def (vcvtq): New. * config/arm/arm-mve-builtins-base.h (vcvtq): New. * config/arm/arm-mve-builtins.cc (cvt): New type. * config/arm/arm_mve.h (vcvtq): Delete. (vcvtq_n): Delete. (vcvtq_m): Delete. (vcvtq_m_n): Delete. (vcvtq_x): Delete. (vcvtq_x_n): Delete. (vcvtq_f16_s16): Delete. (vcvtq_f32_s32): Delete. (vcvtq_f16_u16): Delete. (vcvtq_f32_u32): Delete. (vcvtq_s16_f16): Delete. (vcvtq_s32_f32): Delete. (vcvtq_u16_f16): Delete. (vcvtq_u32_f32): Delete. (vcvtq_n_f16_s16): Delete. (vcvtq_n_f32_s32): Delete. (vcvtq_n_f16_u16): Delete. (vcvtq_n_f32_u32): Delete. (vcvtq_n_s16_f16): Delete. (vcvtq_n_s32_f32): Delete. (vcvtq_n_u16_f16): Delete. (vcvtq_n_u32_f32): Delete. (vcvtq_m_f16_s16): Delete. (vcvtq_m_f16_u16): Delete. (vcvtq_m_f32_s32): Delete. (vcvtq_m_f32_u32): Delete. (vcvtq_m_s16_f16): Delete. (vcvtq_m_u16_f16): Delete. (vcvtq_m_s32_f32): Delete. (vcvtq_m_u32_f32): Delete. (vcvtq_m_n_f16_u16): Delete. (vcvtq_m_n_f16_s16): Delete. (vcvtq_m_n_f32_u32): Delete. (vcvtq_m_n_f32_s32): Delete. (vcvtq_m_n_s32_f32): Delete. (vcvtq_m_n_s16_f16): Delete. (vcvtq_m_n_u32_f32): Delete. (vcvtq_m_n_u16_f16): Delete. (vcvtq_x_f16_u16): Delete. (vcvtq_x_f16_s16): Delete. (vcvtq_x_f32_s32): Delete. (vcvtq_x_f32_u32): Delete. (vcvtq_x_n_f16_s16): Delete. (vcvtq_x_n_f16_u16): Delete. (vcvtq_x_n_f32_s32): Delete. (vcvtq_x_n_f32_u32): Delete. (vcvtq_x_s16_f16): Delete. (vcvtq_x_s32_f32): Delete. (vcvtq_x_u16_f16): Delete. (vcvtq_x_u32_f32): Delete. (vcvtq_x_n_s16_f16): Delete. (vcvtq_x_n_s32_f32): Delete. (vcvtq_x_n_u16_f16): Delete. (vcvtq_x_n_u32_f32): Delete. (__arm_vcvtq_f16_s16): Delete. (__arm_vcvtq_f32_s32): Delete. (__arm_vcvtq_f16_u16): Delete. (__arm_vcvtq_f32_u32): Delete. (__arm_vcvtq_s16_f16): Delete. (__arm_vcvtq_s32_f32): Delete. (__arm_vcvtq_u16_f16): Delete. (__arm_vcvtq_u32_f32): Delete. (__arm_vcvtq_n_f16_s16): Delete. (__arm_vcvtq_n_f32_s32): Delete. (__arm_vcvtq_n_f16_u16): Delete. (__arm_vcvtq_n_f32_u32): Delete. (__arm_vcvtq_n_s16_f16): Delete. (__arm_vcvtq_n_s32_f32): Delete. (__arm_vcvtq_n_u16_f16): Delete. (__arm_vcvtq_n_u32_f32): Delete. (__arm_vcvtq_m_f16_s16): Delete. (__arm_vcvtq_m_f16_u16): Delete. (__arm_vcvtq_m_f32_s32): Delete. (__arm_vcvtq_m_f32_u32): Delete. (__arm_vcvtq_m_s16_f16): Delete. (__arm_vcvtq_m_u16_f16): Delete. (__arm_vcvtq_m_s32_f32): Delete. (__arm_vcvtq_m_u32_f32): Delete. (__arm_vcvtq_m_n_f16_u16): Delete. (__arm_vcvtq_m_n_f16_s16): Delete. (__arm_vcvtq_m_n_f32_u32): Delete. (__arm_vcvtq_m_n_f32_s32): Delete. (__arm_vcvtq_m_n_s32_f32): Delete. (__arm_vcvtq_m_n_s16_f16): Delete. (__arm_vcvtq_m_n_u32_f32): Delete. (__arm_vcvtq_m_n_u16_f16): Delete. (__arm_vcvtq_x_f16_u16): Delete. (__arm_vcvtq_x_f16_s16): Delete. (__arm_vcvtq_x_f32_s32): Delete. (__arm_vcvtq_x_f32_u32): Delete. (__arm_vcvtq_x_n_f16_s16): Delete. (__arm_vcvtq_x_n_f16_u16): Delete. (__arm_vcvtq_x_n_f32_s32): Delete. (__arm_vcvtq_x_n_f32_u32): Delete. (__arm_vcvtq_x_s16_f16): Delete. (__arm_vcvtq_x_s32_f32): Delete. (__arm_vcvtq_x_u16_f16): Delete. (__arm_vcvtq_x_u32_f32): Delete. (__arm_vcvtq_x_n_s16_f16): Delete. (__arm_vcvtq_x_n_s32_f32): Delete. (__arm_vcvtq_x_n_u16_f16): Delete. (__arm_vcvtq_x_n_u32_f32): Delete. (__arm_vcvtq): Delete. (__arm_vcvtq_n): Delete. (__arm_vcvtq_m): Delete. (__arm_vcvtq_m_n): Delete. (__arm_vcvtq_x): Delete. (__arm_vcvtq_x_n): Delete. --- gcc/config/arm/arm-mve-builtins-base.cc | 113 gcc/config/arm/arm-mve-builtins-base.def | 1 + gcc/config/arm/arm-mve-builtins-base.h | 1 + gcc/config/arm/arm-mve-builtins.cc | 15 + gcc/config/arm/arm_mve.h | 666 --- 5 files changed, 130 insertions(+), 666 deletions(-) diff --git a/gcc/config/arm/arm-mve-builtins-base.cc b/gcc/config/arm/arm-mve-builtins-base.cc index e0ae593a6c0..a780d686eb1 100644 --- a/gcc/config/arm/arm-mve-builtins-base.cc +++ b/gcc/config/arm/arm-mve-builtins-base.cc
[PATCH 08/15] arm: [MVE intrinsics] add vcvt_f16_f32 and vcvt_f32_f16 shapes
This patch adds the vcvt_f16_f32 and vcvt_f32_f16 shapes descriptions.
2024-07-11 Christophe Lyon
gcc/
* config/arm/arm-mve-builtins-shapes.cc (vcvt_f16_f32)
(vcvt_f32_f16): New.
* config/arm/arm-mve-builtins-shapes.h (vcvt_f16_f32)
(vcvt_f32_f16): New.
---
gcc/config/arm/arm-mve-builtins-shapes.cc | 35 +++
gcc/config/arm/arm-mve-builtins-shapes.h | 2 ++
2 files changed, 37 insertions(+)
diff --git a/gcc/config/arm/arm-mve-builtins-shapes.cc
b/gcc/config/arm/arm-mve-builtins-shapes.cc
index e1c5dd2c0f2..c311f255e1b 100644
--- a/gcc/config/arm/arm-mve-builtins-shapes.cc
+++ b/gcc/config/arm/arm-mve-builtins-shapes.cc
@@ -2081,6 +2081,41 @@ struct vcvt_def : public overloaded_base<0>
};
SHAPE (vcvt)
+/* float16x8_t foo_f16_f32(float16x8_t, float32x4_t)
+
+ Example: vcvttq_f16_f32.
+ float16x8_t [__arm_]vcvttq_f16_f32(float16x8_t a, float32x4_t b)
+ float16x8_t [__arm_]vcvttq_m_f16_f32(float16x8_t a, float32x4_t b,
mve_pred16_t p)
+*/
+struct vcvt_f16_f32_def : public nonoverloaded_base
+{
+ void
+ build (function_builder , const function_group_info ,
+bool preserve_user_namespace) const override
+ {
+build_all (b, "v0,v0,v1", group, MODE_none, preserve_user_namespace);
+ }
+};
+SHAPE (vcvt_f16_f32)
+
+/* float32x4_t foo_f32_f16(float16x8_t)
+
+ Example: vcvttq_f32_f16.
+ float32x4_t [__arm_]vcvttq_f32_f16(float16x8_t a)
+ float32x4_t [__arm_]vcvttq_m_f32_f16(float32x4_t inactive, float16x8_t a,
mve_pred16_t p)
+ float32x4_t [__arm_]vcvttq_x_f32_f16(float16x8_t a, mve_pred16_t p)
+*/
+struct vcvt_f32_f16_def : public nonoverloaded_base
+{
+ void
+ build (function_builder , const function_group_info ,
+bool preserve_user_namespace) const override
+ {
+build_all (b, "v0,v1", group, MODE_none, preserve_user_namespace);
+ }
+};
+SHAPE (vcvt_f32_f16)
+
/* _t vfoo[_t0](_t, _t, mve_pred16_t)
i.e. a version of the standard ternary shape in which
diff --git a/gcc/config/arm/arm-mve-builtins-shapes.h
b/gcc/config/arm/arm-mve-builtins-shapes.h
index 9a112ceeb29..50157b57571 100644
--- a/gcc/config/arm/arm-mve-builtins-shapes.h
+++ b/gcc/config/arm/arm-mve-builtins-shapes.h
@@ -78,6 +78,8 @@ namespace arm_mve
extern const function_shape *const unary_widen;
extern const function_shape *const unary_widen_acc;
extern const function_shape *const vcvt;
+extern const function_shape *const vcvt_f16_f32;
+extern const function_shape *const vcvt_f32_f16;
extern const function_shape *const vpsel;
} /* end namespace arm_mve::shapes */
--
2.34.1
[PATCH 10/15] arm: [MVE intrinsics] factorize vcvtaq vcvtmq vcvtnq vcvtpq
Factorize vcvtaq vcvtmq vcvtnq vcvtpq builtins so that they use parameterized names. 2024-07-11 Christophe Lyon gcc/ * config/arm/iterators.md (mve_insn): Add VCVTAQ_M_S, VCVTAQ_M_U, VCVTAQ_S, VCVTAQ_U, VCVTMQ_M_S, VCVTMQ_M_U, VCVTMQ_S, VCVTMQ_U, VCVTNQ_M_S, VCVTNQ_M_U, VCVTNQ_S, VCVTNQ_U, VCVTPQ_M_S, VCVTPQ_M_U, VCVTPQ_S, VCVTPQ_U. (VCVTAQ, VCVTPQ, VCVTNQ, VCVTMQ, VCVTAQ_M, VCVTMQ_M, VCVTNQ_M) (VCVTPQ_M): Delete. (VCVTxQ, VCVTxQ_M): New. * config/arm/mve.md (mve_vcvtpq_) (mve_vcvtnq_, mve_vcvtmq_) (mve_vcvtaq_): Merge into ... (@mve_q_): ... this. (mve_vcvtaq_m_, mve_vcvtmq_m_) (mve_vcvtpq_m_, mve_vcvtnq_m_): Merge into ... (@mve_q_m_): ... this. --- gcc/config/arm/iterators.md | 18 +++--- gcc/config/arm/mve.md | 117 +--- 2 files changed, 24 insertions(+), 111 deletions(-) diff --git a/gcc/config/arm/iterators.md b/gcc/config/arm/iterators.md index b9c39a98ca2..162c0d56bfb 100644 --- a/gcc/config/arm/iterators.md +++ b/gcc/config/arm/iterators.md @@ -964,10 +964,18 @@ (define_int_attr mve_insn [ (VCMLAQ_M_F "vcmla") (VCMLAQ_ROT90_M_F "vcmla") (VCMLAQ_ROT180_M_F "vcmla") (VCMLAQ_ROT270_M_F "vcmla") (VCMULQ_M_F "vcmul") (VCMULQ_ROT90_M_F "vcmul") (VCMULQ_ROT180_M_F "vcmul") (VCMULQ_ROT270_M_F "vcmul") (VCREATEQ_S "vcreate") (VCREATEQ_U "vcreate") (VCREATEQ_F "vcreate") +(VCVTAQ_M_S "vcvta") (VCVTAQ_M_U "vcvta") +(VCVTAQ_S "vcvta") (VCVTAQ_U "vcvta") (VCVTBQ_F16_F32 "vcvtb") (VCVTTQ_F16_F32 "vcvtt") (VCVTBQ_F32_F16 "vcvtb") (VCVTTQ_F32_F16 "vcvtt") (VCVTBQ_M_F16_F32 "vcvtb") (VCVTTQ_M_F16_F32 "vcvtt") (VCVTBQ_M_F32_F16 "vcvtb") (VCVTTQ_M_F32_F16 "vcvtt") +(VCVTMQ_M_S "vcvtm") (VCVTMQ_M_U "vcvtm") +(VCVTMQ_S "vcvtm") (VCVTMQ_U "vcvtm") +(VCVTNQ_M_S "vcvtn") (VCVTNQ_M_U "vcvtn") +(VCVTNQ_S "vcvtn") (VCVTNQ_U "vcvtn") +(VCVTPQ_M_S "vcvtp") (VCVTPQ_M_U "vcvtp") +(VCVTPQ_S "vcvtp") (VCVTPQ_U "vcvtp") (VCVTQ_FROM_F_S "vcvt") (VCVTQ_FROM_F_U "vcvt") (VCVTQ_M_FROM_F_S "vcvt") (VCVTQ_M_FROM_F_U "vcvt") (VCVTQ_M_N_FROM_F_S "vcvt") (VCVTQ_M_N_FROM_F_U "vcvt") @@ -2732,14 +2740,10 @@ (define_int_iterator VMVNQ_N [VMVNQ_N_U VMVNQ_N_S]) (define_int_iterator VREV64Q [VREV64Q_S VREV64Q_U]) (define_int_iterator VCVTQ_FROM_F [VCVTQ_FROM_F_S VCVTQ_FROM_F_U]) (define_int_iterator VREV16Q [VREV16Q_U VREV16Q_S]) -(define_int_iterator VCVTAQ [VCVTAQ_U VCVTAQ_S]) (define_int_iterator VDUPQ_N [VDUPQ_N_U VDUPQ_N_S]) (define_int_iterator VADDVQ [VADDVQ_U VADDVQ_S]) (define_int_iterator VREV32Q [VREV32Q_U VREV32Q_S]) (define_int_iterator VMOVLxQ [VMOVLBQ_S VMOVLBQ_U VMOVLTQ_U VMOVLTQ_S]) -(define_int_iterator VCVTPQ [VCVTPQ_S VCVTPQ_U]) -(define_int_iterator VCVTNQ [VCVTNQ_S VCVTNQ_U]) -(define_int_iterator VCVTMQ [VCVTMQ_S VCVTMQ_U]) (define_int_iterator VADDLVQ [VADDLVQ_U VADDLVQ_S]) (define_int_iterator VCVTQ_N_TO_F [VCVTQ_N_TO_F_S VCVTQ_N_TO_F_U]) (define_int_iterator VCREATEQ [VCREATEQ_U VCREATEQ_S]) @@ -2795,7 +2799,6 @@ (define_int_iterator VQMOVNTQ [VQMOVNTQ_U VQMOVNTQ_S]) (define_int_iterator VSHLLxQ_N [VSHLLBQ_N_S VSHLLBQ_N_U VSHLLTQ_N_S VSHLLTQ_N_U]) (define_int_iterator VRMLALDAVHQ [VRMLALDAVHQ_U VRMLALDAVHQ_S]) (define_int_iterator VBICQ_M_N [VBICQ_M_N_S VBICQ_M_N_U]) -(define_int_iterator VCVTAQ_M [VCVTAQ_M_S VCVTAQ_M_U]) (define_int_iterator VCVTQ_M_TO_F [VCVTQ_M_TO_F_S VCVTQ_M_TO_F_U]) (define_int_iterator VQRSHRNBQ_N [VQRSHRNBQ_N_U VQRSHRNBQ_N_S]) (define_int_iterator VABAVQ [VABAVQ_S VABAVQ_U]) @@ -2845,9 +2848,6 @@ (define_int_iterator VQMOVNTQ_M [VQMOVNTQ_M_U VQMOVNTQ_M_S]) (define_int_iterator VMVNQ_M_N [VMVNQ_M_N_U VMVNQ_M_N_S]) (define_int_iterator VQSHRNTQ_N [VQSHRNTQ_N_U VQSHRNTQ_N_S]) (define_int_iterator VSHRNTQ_N [VSHRNTQ_N_S VSHRNTQ_N_U]) -(define_int_iterator VCVTMQ_M [VCVTMQ_M_S VCVTMQ_M_U]) -(define_int_iterator VCVTNQ_M [VCVTNQ_M_S VCVTNQ_M_U]) -(define_int_iterator VCVTPQ_M [VCVTPQ_M_S VCVTPQ_M_U]) (define_int_iterator VCVTQ_M_N_FROM_F [VCVTQ_M_N_FROM_F_S VCVTQ_M_N_FROM_F_U]) (define_int_iterator VCVTQ_M_FROM_F [VCVTQ_M_FROM_F_U VCVTQ_M_FROM_F_S]) (define_int_iterator VRMLALDAVHQ_P [VRMLALDAVHQ_P_S VRMLALDAVHQ_P_U]) @@ -2956,6 +2956,8 @@ (define_int_iterator VCVTxQ_F16_F32 [VCVTBQ_F16_F32 VCVTTQ_F1
[PATCH 15/15] arm: [MVE intrinsics] rework vorn
Implement vorn using the new MVE builtins framework. 2024-07-11 Christophe Lyon gcc/ * config/arm/arm-mve-builtins-base.cc (vornq): New. * config/arm/arm-mve-builtins-base.def (vornq): New. * config/arm/arm-mve-builtins-base.h (vornq): New. * config/arm/arm-mve-builtins-functions.h (class unspec_based_mve_function_exact_insn_vorn): New. * config/arm/arm_mve.h (vornq): Delete. (vornq_m): Delete. (vornq_x): Delete. (vornq_u8): Delete. (vornq_s8): Delete. (vornq_u16): Delete. (vornq_s16): Delete. (vornq_u32): Delete. (vornq_s32): Delete. (vornq_f16): Delete. (vornq_f32): Delete. (vornq_m_s8): Delete. (vornq_m_s32): Delete. (vornq_m_s16): Delete. (vornq_m_u8): Delete. (vornq_m_u32): Delete. (vornq_m_u16): Delete. (vornq_m_f32): Delete. (vornq_m_f16): Delete. (vornq_x_s8): Delete. (vornq_x_s16): Delete. (vornq_x_s32): Delete. (vornq_x_u8): Delete. (vornq_x_u16): Delete. (vornq_x_u32): Delete. (vornq_x_f16): Delete. (vornq_x_f32): Delete. (__arm_vornq_u8): Delete. (__arm_vornq_s8): Delete. (__arm_vornq_u16): Delete. (__arm_vornq_s16): Delete. (__arm_vornq_u32): Delete. (__arm_vornq_s32): Delete. (__arm_vornq_m_s8): Delete. (__arm_vornq_m_s32): Delete. (__arm_vornq_m_s16): Delete. (__arm_vornq_m_u8): Delete. (__arm_vornq_m_u32): Delete. (__arm_vornq_m_u16): Delete. (__arm_vornq_x_s8): Delete. (__arm_vornq_x_s16): Delete. (__arm_vornq_x_s32): Delete. (__arm_vornq_x_u8): Delete. (__arm_vornq_x_u16): Delete. (__arm_vornq_x_u32): Delete. (__arm_vornq_f16): Delete. (__arm_vornq_f32): Delete. (__arm_vornq_m_f32): Delete. (__arm_vornq_m_f16): Delete. (__arm_vornq_x_f16): Delete. (__arm_vornq_x_f32): Delete. (__arm_vornq): Delete. (__arm_vornq_m): Delete. (__arm_vornq_x): Delete. --- gcc/config/arm/arm-mve-builtins-base.cc | 1 + gcc/config/arm/arm-mve-builtins-base.def| 2 + gcc/config/arm/arm-mve-builtins-base.h | 1 + gcc/config/arm/arm-mve-builtins-functions.h | 53 +++ gcc/config/arm/arm_mve.h| 431 5 files changed, 57 insertions(+), 431 deletions(-) diff --git a/gcc/config/arm/arm-mve-builtins-base.cc b/gcc/config/arm/arm-mve-builtins-base.cc index e33603ec1f3..f8260f5f483 100644 --- a/gcc/config/arm/arm-mve-builtins-base.cc +++ b/gcc/config/arm/arm-mve-builtins-base.cc @@ -568,6 +568,7 @@ FUNCTION_WITH_RTX_M_N (vmulq, MULT, VMULQ) FUNCTION_WITH_RTX_M_N_NO_F (vmvnq, NOT, VMVNQ) FUNCTION (vnegq, unspec_based_mve_function_exact_insn, (NEG, NEG, NEG, -1, -1, -1, VNEGQ_M_S, -1, VNEGQ_M_F, -1, -1, -1)) FUNCTION_WITHOUT_M_N (vpselq, VPSELQ) +FUNCTION (vornq, unspec_based_mve_function_exact_insn_vorn, (-1, -1, VORNQ_M_S, VORNQ_M_U, VORNQ_M_F, -1, -1)) FUNCTION_WITH_RTX_M_N_NO_N_F (vorrq, IOR, VORRQ) FUNCTION_WITHOUT_N_NO_U_F (vqabsq, VQABSQ) FUNCTION_WITH_M_N_NO_F (vqaddq, VQADDQ) diff --git a/gcc/config/arm/arm-mve-builtins-base.def b/gcc/config/arm/arm-mve-builtins-base.def index a1b3eea32d3..3595dab36df 100644 --- a/gcc/config/arm/arm-mve-builtins-base.def +++ b/gcc/config/arm/arm-mve-builtins-base.def @@ -87,6 +87,7 @@ DEF_MVE_FUNCTION (vmulltq_poly, binary_widen_poly, poly_8_16, mx_or_none) DEF_MVE_FUNCTION (vmulq, binary_opt_n, all_integer, mx_or_none) DEF_MVE_FUNCTION (vmvnq, mvn, all_integer, mx_or_none) DEF_MVE_FUNCTION (vnegq, unary, all_signed, mx_or_none) +DEF_MVE_FUNCTION (vornq, binary_orrq, all_integer, mx_or_none) DEF_MVE_FUNCTION (vorrq, binary_orrq, all_integer, mx_or_none) DEF_MVE_FUNCTION (vpselq, vpsel, all_integer_with_64, none) DEF_MVE_FUNCTION (vqabsq, unary, all_signed, m_or_none) @@ -206,6 +207,7 @@ DEF_MVE_FUNCTION (vminnmq, binary, all_float, mx_or_none) DEF_MVE_FUNCTION (vminnmvq, binary_maxvminv, all_float, p_or_none) DEF_MVE_FUNCTION (vmulq, binary_opt_n, all_float, mx_or_none) DEF_MVE_FUNCTION (vnegq, unary, all_float, mx_or_none) +DEF_MVE_FUNCTION (vornq, binary_orrq, all_float, mx_or_none) DEF_MVE_FUNCTION (vorrq, binary_orrq, all_float, mx_or_none) DEF_MVE_FUNCTION (vpselq, vpsel, all_float, none) DEF_MVE_FUNCTION (vreinterpretq, unary_convert, reinterpret_float, none) diff --git a/gcc/config/arm/arm-mve-builtins-base.h b/gcc/config/arm/arm-mve-builtins-base.h index 2abe640b840..39e39c307bd 100644 --- a/gcc/config/arm/arm-mve-builtins-base.h +++ b/gcc/config/arm/arm-mve-builtins-base.h @@ -118,6 +118,7 @@ extern const function_base *const vmulltq_poly; extern const function_base *const vmulq; extern const function_base *const vmvnq; extern const function_base *const vnegq; +extern const function_base *const vornq; extern
[PATCH 07/15] arm: [MVE intrinsics] factorize vcvtbq vcvttq
Factorize vcvtbq, vcvttq so that they use the same parameterized names. 2024-07-11 Christophe Lyon gcc/ * config/arm/iterators.md (mve_insn): Add VCVTBQ_F16_F32, VCVTTQ_F16_F32, VCVTBQ_F32_F16, VCVTTQ_F32_F16, VCVTBQ_M_F16_F32, VCVTTQ_M_F16_F32, VCVTBQ_M_F32_F16, VCVTTQ_M_F32_F16. (VCVTxQ_F16_F32): New iterator. (VCVTxQ_F32_F16): Likewise. (VCVTxQ_M_F16_F32): Likewise. (VCVTxQ_M_F32_F16): Likewise. * config/arm/mve.md (mve_vcvttq_f32_f16v4sf) (mve_vcvtbq_f32_f16v4sf): Merge into ... (@mve_q_f32_f16v4sf): ... this. (mve_vcvtbq_f16_f32v8hf, mve_vcvttq_f16_f32v8hf): Merge into ... (@mve_q_f16_f32v8hf): ... this. (mve_vcvtbq_m_f16_f32v8hf, mve_vcvttq_m_f16_f32v8hf): Merge into ... (@mve_q_m_f16_f32v8hf): ... this. (mve_vcvtbq_m_f32_f16v4sf, mve_vcvttq_m_f32_f16v4sf): Merge into ... (@mve_q_m_f32_f16v4sf): ... this. --- gcc/config/arm/iterators.md | 8 +++ gcc/config/arm/mve.md | 102 2 files changed, 29 insertions(+), 81 deletions(-) diff --git a/gcc/config/arm/iterators.md b/gcc/config/arm/iterators.md index bf800625fac..b9c39a98ca2 100644 --- a/gcc/config/arm/iterators.md +++ b/gcc/config/arm/iterators.md @@ -964,6 +964,10 @@ (define_int_attr mve_insn [ (VCMLAQ_M_F "vcmla") (VCMLAQ_ROT90_M_F "vcmla") (VCMLAQ_ROT180_M_F "vcmla") (VCMLAQ_ROT270_M_F "vcmla") (VCMULQ_M_F "vcmul") (VCMULQ_ROT90_M_F "vcmul") (VCMULQ_ROT180_M_F "vcmul") (VCMULQ_ROT270_M_F "vcmul") (VCREATEQ_S "vcreate") (VCREATEQ_U "vcreate") (VCREATEQ_F "vcreate") +(VCVTBQ_F16_F32 "vcvtb") (VCVTTQ_F16_F32 "vcvtt") +(VCVTBQ_F32_F16 "vcvtb") (VCVTTQ_F32_F16 "vcvtt") +(VCVTBQ_M_F16_F32 "vcvtb") (VCVTTQ_M_F16_F32 "vcvtt") +(VCVTBQ_M_F32_F16 "vcvtb") (VCVTTQ_M_F32_F16 "vcvtt") (VCVTQ_FROM_F_S "vcvt") (VCVTQ_FROM_F_U "vcvt") (VCVTQ_M_FROM_F_S "vcvt") (VCVTQ_M_FROM_F_U "vcvt") (VCVTQ_M_N_FROM_F_S "vcvt") (VCVTQ_M_N_FROM_F_U "vcvt") @@ -2948,6 +2952,10 @@ (define_int_iterator SQRSHRLQ [SQRSHRL_64 SQRSHRL_48]) (define_int_iterator VSHLCQ_M [VSHLCQ_M_S VSHLCQ_M_U]) (define_int_iterator VQSHLUQ_M_N [VQSHLUQ_M_N_S]) (define_int_iterator VQSHLUQ_N [VQSHLUQ_N_S]) +(define_int_iterator VCVTxQ_F16_F32 [VCVTBQ_F16_F32 VCVTTQ_F16_F32]) +(define_int_iterator VCVTxQ_F32_F16 [VCVTBQ_F32_F16 VCVTTQ_F32_F16]) +(define_int_iterator VCVTxQ_M_F16_F32 [VCVTBQ_M_F16_F32 VCVTTQ_M_F16_F32]) +(define_int_iterator VCVTxQ_M_F32_F16 [VCVTBQ_M_F32_F16 VCVTTQ_M_F32_F16]) (define_int_iterator DLSTP [DLSTP8 DLSTP16 DLSTP32 DLSTP64]) (define_int_iterator LETP [LETP8 LETP16 LETP32 diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md index b339d0ccdf6..7a05a216516 100644 --- a/gcc/config/arm/mve.md +++ b/gcc/config/arm/mve.md @@ -217,33 +217,20 @@ (define_insn "@mve_q_f" [(set (attr "mve_unpredicated_insn") (symbol_ref "CODE_FOR_mve_q_f")) (set_attr "type" "mve_move") ]) -;; -;; [vcvttq_f32_f16]) -;; -(define_insn "mve_vcvttq_f32_f16v4sf" - [ - (set (match_operand:V4SF 0 "s_register_operand" "=w") - (unspec:V4SF [(match_operand:V8HF 1 "s_register_operand" "w")] -VCVTTQ_F32_F16)) - ] - "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vcvtt.f32.f16\t%q0, %q1" - [(set (attr "mve_unpredicated_insn") (symbol_ref "CODE_FOR_mve_vcvttq_f32_f16v4sf")) - (set_attr "type" "mve_move") -]) ;; ;; [vcvtbq_f32_f16]) +;; [vcvttq_f32_f16]) ;; -(define_insn "mve_vcvtbq_f32_f16v4sf" +(define_insn "@mve_q_f32_f16v4sf" [ (set (match_operand:V4SF 0 "s_register_operand" "=w") (unspec:V4SF [(match_operand:V8HF 1 "s_register_operand" "w")] -VCVTBQ_F32_F16)) +VCVTxQ_F32_F16)) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vcvtb.f32.f16\t%q0, %q1" - [(set (attr "mve_unpredicated_insn") (symbol_ref "CODE_FOR_mve_vcvtbq_f32_f16v4sf")) + ".f32.f16\t%q0, %q1" + [(set (attr "mve_unpredicated_insn") (symbol_ref "CODE_FOR_mve_q_f32_f16v4sf")) (set_attr "type" "mve_move") ]) @@ -1343,33 +1330,18 @@ (define_insn "mve_vctpq_m" ;; ;; [vcvtbq_f16_f32]) -;; -(define_insn "mve_vcvtbq_f16_f32v8hf" - [ - (set (match_operand:V8HF 0 "s_regist
[PATCH 11/15] arm: [MVE intrinsics] add vcvtx shape
This patch adds the vcvtx shape description for vcvtaq, vcvtmq,
vcvtnq, vcvtpq.
2024-07-11 Christophe Lyon
gcc/
* config/arm/arm-mve-builtins-shapes.cc (vcvtx): New.
* config/arm/arm-mve-builtins-shapes.h (vcvtx): New.
---
gcc/config/arm/arm-mve-builtins-shapes.cc | 59 +++
gcc/config/arm/arm-mve-builtins-shapes.h | 1 +
2 files changed, 60 insertions(+)
diff --git a/gcc/config/arm/arm-mve-builtins-shapes.cc
b/gcc/config/arm/arm-mve-builtins-shapes.cc
index c311f255e1b..7937d401696 100644
--- a/gcc/config/arm/arm-mve-builtins-shapes.cc
+++ b/gcc/config/arm/arm-mve-builtins-shapes.cc
@@ -2116,6 +2116,65 @@ struct vcvt_f32_f16_def : public nonoverloaded_base
};
SHAPE (vcvt_f32_f16)
+/* _t foo_t0[_t1](_t)
+
+ Example: vcvtaq.
+ int16x8_t [__arm_]vcvtaq_s16_f16(float16x8_t a)
+ int16x8_t [__arm_]vcvtaq_m[_s16_f16](int16x8_t inactive, float16x8_t a,
mve_pred16_t p)
+ int16x8_t [__arm_]vcvtaq_x_s16_f16(float16x8_t a, mve_pred16_t p)
+*/
+struct vcvtx_def : public overloaded_base<0>
+{
+ bool
+ explicit_type_suffix_p (unsigned int i, enum predication_index pred,
+ enum mode_suffix_index,
+ type_suffix_info type_info) const override
+ {
+return pred != PRED_m;
+ }
+
+ bool
+ skip_overload_p (enum predication_index pred, enum mode_suffix_index mode)
+const override
+ {
+return pred != PRED_m;
+ }
+
+ void
+ build (function_builder , const function_group_info ,
+bool preserve_user_namespace) const override
+ {
+b.add_overloaded_functions (group, MODE_none, preserve_user_namespace);
+build_all (b, "v0,v1", group, MODE_none, preserve_user_namespace);
+ }
+
+ tree
+ resolve (function_resolver ) const override
+ {
+unsigned int i, nargs;
+type_suffix_index from_type;
+tree res;
+
+if (!r.check_gp_argument (1, i, nargs)
+ || (from_type
+ = r.infer_vector_type (i)) == NUM_TYPE_SUFFIXES)
+ return error_mark_node;
+
+type_suffix_index to_type;
+
+gcc_assert (r.pred == PRED_m);
+
+/* Get the return type from the 'inactive' argument. */
+to_type = r.infer_vector_type (0);
+
+if ((res = r.lookup_form (r.mode_suffix_id, to_type, from_type)))
+ return res;
+
+return r.report_no_such_form (from_type);
+ }
+};
+SHAPE (vcvtx)
+
/* _t vfoo[_t0](_t, _t, mve_pred16_t)
i.e. a version of the standard ternary shape in which
diff --git a/gcc/config/arm/arm-mve-builtins-shapes.h
b/gcc/config/arm/arm-mve-builtins-shapes.h
index 50157b57571..ef497b6c97a 100644
--- a/gcc/config/arm/arm-mve-builtins-shapes.h
+++ b/gcc/config/arm/arm-mve-builtins-shapes.h
@@ -80,6 +80,7 @@ namespace arm_mve
extern const function_shape *const vcvt;
extern const function_shape *const vcvt_f16_f32;
extern const function_shape *const vcvt_f32_f16;
+extern const function_shape *const vcvtx;
extern const function_shape *const vpsel;
} /* end namespace arm_mve::shapes */
--
2.34.1
[PATCH 14/15] arm: [MVE intrinsics] factorize vorn
Factorize vorn so that they use the parameterized names. 2024-07-11 Christophe Lyon gcc/ * config/arm/iterators.md (MVE_INT_M_BINARY_LOGIC): Add VORNQ_M_S, VORNQ_M_U. (MVE_FP_M_BINARY_LOGIC): Add VORNQ_M_F. (mve_insn): Add VORNQ_M_S, VORNQ_M_U, VORNQ_M_F. * config/arm/mve.md (mve_vornq_s): Rename into ... (@mve_vornq_s): ... this. (mve_vornq_u): Rename into ... (@mve_vornq_u): ... this. (mve_vornq_f): Rename into ... (@mve_vornq_f): ... this. (mve_vornq_m_): Merge into vand/vbic pattern. (mve_vornq_m_f): Likewise. --- gcc/config/arm/iterators.md | 3 +++ gcc/config/arm/mve.md | 48 ++--- 2 files changed, 10 insertions(+), 41 deletions(-) diff --git a/gcc/config/arm/iterators.md b/gcc/config/arm/iterators.md index 162c0d56bfb..3a1825ebab2 100644 --- a/gcc/config/arm/iterators.md +++ b/gcc/config/arm/iterators.md @@ -444,6 +444,7 @@ (define_int_iterator MVE_INT_M_BINARY_LOGIC [ VANDQ_M_S VANDQ_M_U VBICQ_M_S VBICQ_M_U VEORQ_M_S VEORQ_M_U +VORNQ_M_S VORNQ_M_U VORRQ_M_S VORRQ_M_U ]) @@ -594,6 +595,7 @@ (define_int_iterator MVE_FP_M_BINARY_LOGIC [ VANDQ_M_F VBICQ_M_F VEORQ_M_F +VORNQ_M_F VORRQ_M_F ]) @@ -1094,6 +1096,7 @@ (define_int_attr mve_insn [ (VMVNQ_N_S "vmvn") (VMVNQ_N_U "vmvn") (VNEGQ_M_F "vneg") (VNEGQ_M_S "vneg") +(VORNQ_M_S "vorn") (VORNQ_M_U "vorn") (VORNQ_M_F "vorn") (VORRQ_M_N_S "vorr") (VORRQ_M_N_U "vorr") (VORRQ_M_S "vorr") (VORRQ_M_U "vorr") (VORRQ_M_F "vorr") (VORRQ_N_S "vorr") (VORRQ_N_U "vorr") diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md index 2ed19ff66fc..982f92d92d8 100644 --- a/gcc/config/arm/mve.md +++ b/gcc/config/arm/mve.md @@ -1021,9 +1021,9 @@ (define_insn "mve_q" ]) ;; -;; [vornq_u, vornq_s]) +;; [vornq_u, vornq_s] ;; -(define_insn "mve_vornq_s" +(define_insn "@mve_vornq_s" [ (set (match_operand:MVE_2 0 "s_register_operand" "=w") (ior:MVE_2 (not:MVE_2 (match_operand:MVE_2 2 "s_register_operand" "w")) @@ -1035,7 +1035,7 @@ (define_insn "mve_vornq_s" (set_attr "type" "mve_move") ]) -(define_expand "mve_vornq_u" +(define_expand "@mve_vornq_u" [ (set (match_operand:MVE_2 0 "s_register_operand") (ior:MVE_2 (not:MVE_2 (match_operand:MVE_2 2 "s_register_operand")) @@ -1429,9 +1429,9 @@ (define_insn "mve_q_f" ]) ;; -;; [vornq_f]) +;; [vornq_f] ;; -(define_insn "mve_vornq_f" +(define_insn "@mve_vornq_f" [ (set (match_operand:MVE_0 0 "s_register_operand" "=w") (ior:MVE_0 (not:MVE_0 (match_operand:MVE_0 2 "s_register_operand" "w")) @@ -2710,6 +2710,7 @@ (define_insn "@mve_q_m_" ;; [vandq_m_u, vandq_m_s] ;; [vbicq_m_u, vbicq_m_s] ;; [veorq_m_u, veorq_m_s] +;; [vornq_m_u, vornq_m_s] ;; [vorrq_m_u, vorrq_m_s] ;; (define_insn "@mve_q_m_" @@ -2836,24 +2837,6 @@ (define_insn "@mve_q_int_m_" (set_attr "type" "mve_move") (set_attr "length""8")]) -;; -;; [vornq_m_u, vornq_m_s]) -;; -(define_insn "mve_vornq_m_" - [ - (set (match_operand:MVE_2 0 "s_register_operand" "=w") - (unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0") - (match_operand:MVE_2 2 "s_register_operand" "w") - (match_operand:MVE_2 3 "s_register_operand" "w") - (match_operand: 4 "vpr_register_operand" "Up")] -VORNQ_M)) - ] - "TARGET_HAVE_MVE" - "vpst\;vornt\t%q0, %q2, %q3" - [(set (attr "mve_unpredicated_insn") (symbol_ref "CODE_FOR_mve_vornq_")) - (set_attr "type" "mve_move") - (set_attr "length""8")]) - ;; ;; [vqshlq_m_n_s, vqshlq_m_n_u] ;; [vshlq_m_n_s, vshlq_m_n_u] @@ -3108,6 +3091,7 @@ (define_insn "@mve_q_m_n_f" ;; [vandq_m_f] ;; [vbicq_m_f] ;; [veorq_m_f] +;; [vornq_m_f] ;; [vorrq_m_f] ;; (define_insn "@mve_q_m_f" @@ -3187,24 +3171,6 @@ (define_insn "@mve_q_m_f" (set_attr "type" "mve_move") (set_attr "length""8")]) -;; -;; [vornq_m_f]) -;; -(define_insn "mve_vornq_m_f" - [ - (set (match_operand:MVE_0 0 "s_register_operand" "=w") - (unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0") - (match_operand:MVE_0 2 "s_register_operand" "w") - (match_operand:MVE_0 3 "s_register_operand" "w") - (match_operand: 4 "vpr_register_operand" "Up")] -VORNQ_M_F)) - ] - "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vpst\;vornt\t%q0, %q2, %q3" - [(set (attr "mve_unpredicated_insn") (symbol_ref "CODE_FOR_mve_vornq_f")) - (set_attr "type" "mve_move") - (set_attr "length""8")]) - ;; ;; [vstrbq_s vstrbq_u] ;; -- 2.34.1
[PATCH 13/15] arm: [MVE intrinsics] rework vbicq
Implement vbicq using the new MVE builtins framework. 2024-07-11 Christophe Lyon gcc/ * config/arm/arm-mve-builtins-base.cc (vbicq): New. * config/arm/arm-mve-builtins-base.def (vbicq): New. * config/arm/arm-mve-builtins-base.h (vbicq): New. * config/arm/arm-mve-builtins-functions.h (class unspec_based_mve_function_exact_insn_vbic): New. * config/arm/arm-mve-builtins.cc (function_instance::has_inactive_argument): Add support for vbicq. * config/arm/arm_mve.h (vbicq): Delete. (vbicq_m_n): Delete. (vbicq_m): Delete. (vbicq_x): Delete. (vbicq_u8): Delete. (vbicq_s8): Delete. (vbicq_u16): Delete. (vbicq_s16): Delete. (vbicq_u32): Delete. (vbicq_s32): Delete. (vbicq_n_u16): Delete. (vbicq_f16): Delete. (vbicq_n_s16): Delete. (vbicq_n_u32): Delete. (vbicq_f32): Delete. (vbicq_n_s32): Delete. (vbicq_m_n_s16): Delete. (vbicq_m_n_s32): Delete. (vbicq_m_n_u16): Delete. (vbicq_m_n_u32): Delete. (vbicq_m_s8): Delete. (vbicq_m_s32): Delete. (vbicq_m_s16): Delete. (vbicq_m_u8): Delete. (vbicq_m_u32): Delete. (vbicq_m_u16): Delete. (vbicq_m_f32): Delete. (vbicq_m_f16): Delete. (vbicq_x_s8): Delete. (vbicq_x_s16): Delete. (vbicq_x_s32): Delete. (vbicq_x_u8): Delete. (vbicq_x_u16): Delete. (vbicq_x_u32): Delete. (vbicq_x_f16): Delete. (vbicq_x_f32): Delete. (__arm_vbicq_u8): Delete. (__arm_vbicq_s8): Delete. (__arm_vbicq_u16): Delete. (__arm_vbicq_s16): Delete. (__arm_vbicq_u32): Delete. (__arm_vbicq_s32): Delete. (__arm_vbicq_n_u16): Delete. (__arm_vbicq_n_s16): Delete. (__arm_vbicq_n_u32): Delete. (__arm_vbicq_n_s32): Delete. (__arm_vbicq_m_n_s16): Delete. (__arm_vbicq_m_n_s32): Delete. (__arm_vbicq_m_n_u16): Delete. (__arm_vbicq_m_n_u32): Delete. (__arm_vbicq_m_s8): Delete. (__arm_vbicq_m_s32): Delete. (__arm_vbicq_m_s16): Delete. (__arm_vbicq_m_u8): Delete. (__arm_vbicq_m_u32): Delete. (__arm_vbicq_m_u16): Delete. (__arm_vbicq_x_s8): Delete. (__arm_vbicq_x_s16): Delete. (__arm_vbicq_x_s32): Delete. (__arm_vbicq_x_u8): Delete. (__arm_vbicq_x_u16): Delete. (__arm_vbicq_x_u32): Delete. (__arm_vbicq_f16): Delete. (__arm_vbicq_f32): Delete. (__arm_vbicq_m_f32): Delete. (__arm_vbicq_m_f16): Delete. (__arm_vbicq_x_f16): Delete. (__arm_vbicq_x_f32): Delete. (__arm_vbicq): Delete. (__arm_vbicq_m_n): Delete. (__arm_vbicq_m): Delete. (__arm_vbicq_x): Delete. * config/arm/mve.md (mve_vbicq_u): Rename into ... (@mve_vbicq_u): ... this. (mve_vbicq_s): Rename into ... (@mve_vbicq_s): ... this. (mve_vbicq_f): Rename into ... (@mve_vbicq_f): ... this. --- gcc/config/arm/arm-mve-builtins-base.cc | 1 + gcc/config/arm/arm-mve-builtins-base.def| 2 + gcc/config/arm/arm-mve-builtins-base.h | 1 + gcc/config/arm/arm-mve-builtins-functions.h | 54 ++ gcc/config/arm/arm-mve-builtins.cc | 1 + gcc/config/arm/arm_mve.h| 574 gcc/config/arm/mve.md | 6 +- 7 files changed, 62 insertions(+), 577 deletions(-) diff --git a/gcc/config/arm/arm-mve-builtins-base.cc b/gcc/config/arm/arm-mve-builtins-base.cc index 281f3749bce..e33603ec1f3 100644 --- a/gcc/config/arm/arm-mve-builtins-base.cc +++ b/gcc/config/arm/arm-mve-builtins-base.cc @@ -481,6 +481,7 @@ FUNCTION_PRED_P_S_U (vaddlvq, VADDLVQ) FUNCTION_PRED_P_S_U (vaddvq, VADDVQ) FUNCTION_PRED_P_S_U (vaddvaq, VADDVAQ) FUNCTION_WITH_RTX_M (vandq, AND, VANDQ) +FUNCTION (vbicq, unspec_based_mve_function_exact_insn_vbic, (VBICQ_N_S, VBICQ_N_U, VBICQ_M_S, VBICQ_M_U, VBICQ_M_F, VBICQ_M_N_S, VBICQ_M_N_U)) FUNCTION_ONLY_N (vbrsrq, VBRSRQ) FUNCTION (vcaddq_rot90, unspec_mve_function_exact_insn_rot, (UNSPEC_VCADD90, UNSPEC_VCADD90, UNSPEC_VCADD90, VCADDQ_ROT90_M, VCADDQ_ROT90_M, VCADDQ_ROT90_M_F)) FUNCTION (vcaddq_rot270, unspec_mve_function_exact_insn_rot, (UNSPEC_VCADD270, UNSPEC_VCADD270, UNSPEC_VCADD270, VCADDQ_ROT270_M, VCADDQ_ROT270_M, VCADDQ_ROT270_M_F)) diff --git a/gcc/config/arm/arm-mve-builtins-base.def b/gcc/config/arm/arm-mve-builtins-base.def index 7821007fe2c..a1b3eea32d3 100644 --- a/gcc/config/arm/arm-mve-builtins-base.def +++ b/gcc/config/arm/arm-mve-builtins-base.def @@ -27,6 +27,7 @@ DEF_MVE_FUNCTION (vaddq, binary_opt_n, all_integer, mx_or_none) DEF_MVE_FUNCTION (vaddvaq, unary_int32_acc, all_integer, p_or_none) DEF_MVE_FUNCTION (vaddvq, unary_int32, all_integer, p_or_none) DEF_MVE_FUNCTION (vandq
[PATCH 03/15] arm: [MVE intrinsics] Cleanup arm-mve-builtins-functions.h
This patch brings no functional change but removes some code
duplication in arm-mve-builtins-functions.h and makes it easier to
read and maintain.
It introduces a new expand_unspec () member of
unspec_based_mve_function_base and makes a few classes inherit from it
instead of function_base.
This adds 3 new members containing the unspec codes for signed-int,
unsigned-int and floating-point intrinsics (no mode, no predicate).
Depending on the derived class, these will be used instead of the 3
similar RTX codes.
The new expand_unspec () handles all the possible unspecs, some of
which maybe not be supported by a given intrinsics family: such code
paths won't be used in that case. Similarly codes specific to a
family (RTX, or PRED_p for instance) should be handled by the caller
of expand_unspec ().
Thanks to this, expand () for unspec_based_mve_function_exact_insn,
unspec_mve_function_exact_insn, unspec_mve_function_exact_insn_pred_p,
unspec_mve_function_exact_insn_vshl no longer duplicate a lot of code.
The patch also make most of PRED_m and PRED_x handling use the same
code.
2024-07-11 Christophe Lyon
gcc/
* config/arm/arm-mve-builtins-functions.h
(unspec_based_mve_function_base): Add m_unspec_for_sint,
m_unspec_for_uint, m_unspec_for_fp and expand_unspec members.
(unspec_based_mve_function_exact_insn): Inherit from
unspec_based_mve_function_base and use expand_unspec.
(unspec_mve_function_exact_insn): Likewise.
(unspec_mve_function_exact_insn_pred_p): Likewise.
(unspec_mve_function_exact_insn_vshl): Likewise.
(unspec_based_mve_function_exact_insn_vcmp): Initialize new
inherited members.
(unspec_mve_function_exact_insn_rot): Merge PRED_m and PRED_x
handling.
(unspec_mve_function_exact_insn_vmull): Likewise.
(unspec_mve_function_exact_insn_vmull_poly): Likewise.
---
gcc/config/arm/arm-mve-builtins-functions.h | 607 +++-
1 file changed, 211 insertions(+), 396 deletions(-)
diff --git a/gcc/config/arm/arm-mve-builtins-functions.h
b/gcc/config/arm/arm-mve-builtins-functions.h
index ac2a731bff4..43c4aaffeb1 100644
--- a/gcc/config/arm/arm-mve-builtins-functions.h
+++ b/gcc/config/arm/arm-mve-builtins-functions.h
@@ -40,17 +40,23 @@ public:
};
/* An incomplete function_base for functions that have an associated
- rtx_code for signed integers, unsigned integers and floating-point
- values for the non-predicated, non-suffixed intrinsic, and unspec
- codes, with separate codes for signed integers, unsigned integers
- and floating-point values. The class simply records information
- about the mapping for derived classes to use. */
+ rtx_code or an unspec for signed integers, unsigned integers and
+ floating-point values for the non-predicated, non-suffixed
+ intrinsics, and unspec codes, with separate codes for signed
+ integers, unsigned integers and floating-point values for
+ predicated and/or suffixed intrinsics. The class simply records
+ information about the mapping for derived classes to use and
+ provides a generic expand_unspec () to avoid duplicating expansion
+ code in derived classes. */
class unspec_based_mve_function_base : public function_base
{
public:
CONSTEXPR unspec_based_mve_function_base (rtx_code code_for_sint,
rtx_code code_for_uint,
rtx_code code_for_fp,
+ int unspec_for_sint,
+ int unspec_for_uint,
+ int unspec_for_fp,
int unspec_for_n_sint,
int unspec_for_n_uint,
int unspec_for_n_fp,
@@ -63,6 +69,9 @@ public:
: m_code_for_sint (code_for_sint),
m_code_for_uint (code_for_uint),
m_code_for_fp (code_for_fp),
+ m_unspec_for_sint (unspec_for_sint),
+ m_unspec_for_uint (unspec_for_uint),
+ m_unspec_for_fp (unspec_for_fp),
m_unspec_for_n_sint (unspec_for_n_sint),
m_unspec_for_n_uint (unspec_for_n_uint),
m_unspec_for_n_fp (unspec_for_n_fp),
@@ -83,6 +92,9 @@ public:
/* The unspec code associated with signed-integer, unsigned-integer
and floating-point operations respectively. It covers the cases
with the _n suffix, and/or the _m predicate. */
+ int m_unspec_for_sint;
+ int m_unspec_for_uint;
+ int m_unspec_for_fp;
int m_unspec_for_n_sint;
int m_unspec_for_n_uint;
int m_unspec_for_n_fp;
@@ -92,142 +104,146 @@ public:
int m_unspec_for_m_n_sint;
int m_unspec_for_m_n_uint;
int m_unspec_for_m_n_fp;
+
+ rtx expand_unspec (function_expander ) const;
};
-/* Map the function directly to CODE (UNSPEC, M) where M is the vector
- mode associated with type suffix 0, except when
[PATCH 05/15] arm: [MVE intrinsics] add vcvt shape
This patch adds the vcvt shape description.
It needs to add a new type_suffix_info parameter to
explicit_type_suffix_p (), because vcvt uses overloads for type
suffixes for integer-> floating-point conversions, but not for
floating-point to integer.
2024-07-11 Christophe Lyon
gcc/
* config/arm/arm-mve-builtins-shapes.cc
(nonoverloaded_base::explicit_type_suffix_p): Add unused
type_suffix_info parameter.
(overloaded_base::explicit_type_suffix_p): Likewise.
(unary_n_def::explicit_type_suffix_p): Likewise.
(vcvt): New.
* config/arm/arm-mve-builtins-shapes.h (vcvt): New.
* config/arm/arm-mve-builtins.cc (function_builder::get_name): Add
new type_suffix parameter.
(function_builder::add_overloaded_functions): Likewise.
* config/arm/arm-mve-builtins.h
(function_shape::explicit_type_suffix_p): Likewise.
---
gcc/config/arm/arm-mve-builtins-shapes.cc | 108 +-
gcc/config/arm/arm-mve-builtins-shapes.h | 1 +
gcc/config/arm/arm-mve-builtins.cc| 9 +-
gcc/config/arm/arm-mve-builtins.h | 10 +-
4 files changed, 119 insertions(+), 9 deletions(-)
diff --git a/gcc/config/arm/arm-mve-builtins-shapes.cc
b/gcc/config/arm/arm-mve-builtins-shapes.cc
index 0520a8331db..e1c5dd2c0f2 100644
--- a/gcc/config/arm/arm-mve-builtins-shapes.cc
+++ b/gcc/config/arm/arm-mve-builtins-shapes.cc
@@ -330,7 +330,8 @@ build_16_32 (function_builder , const char *signature,
struct nonoverloaded_base : public function_shape
{
bool
- explicit_type_suffix_p (unsigned int, enum predication_index, enum
mode_suffix_index) const override
+ explicit_type_suffix_p (unsigned int, enum predication_index,
+ enum mode_suffix_index, type_suffix_info) const
override
{
return true;
}
@@ -360,7 +361,8 @@ template
struct overloaded_base : public function_shape
{
bool
- explicit_type_suffix_p (unsigned int i, enum predication_index, enum
mode_suffix_index) const override
+ explicit_type_suffix_p (unsigned int i, enum predication_index,
+ enum mode_suffix_index, type_suffix_info) const
override
{
return (EXPLICIT_MASK >> i) & 1;
}
@@ -1856,7 +1858,7 @@ struct unary_n_def : public overloaded_base<0>
{
bool
explicit_type_suffix_p (unsigned int, enum predication_index pred,
- enum mode_suffix_index) const override
+ enum mode_suffix_index, type_suffix_info) const
override
{
return pred != PRED_m;
}
@@ -1979,6 +1981,106 @@ struct unary_widen_acc_def : public overloaded_base<0>
};
SHAPE (unary_widen_acc)
+/* _t foo_t0[_t1](_t)
+ _t foo_t0_n[_t1](_t, const int)
+
+ Example: vcvtq.
+ float32x4_t [__arm_]vcvtq[_f32_s32](int32x4_t a)
+ float32x4_t [__arm_]vcvtq_m[_f32_s32](float32x4_t inactive, int32x4_t a,
mve_pred16_t p)
+ float32x4_t [__arm_]vcvtq_x[_f32_s32](int32x4_t a, mve_pred16_t p)
+ float32x4_t [__arm_]vcvtq_n[_f32_s32](int32x4_t a, const int imm6)
+ float32x4_t [__arm_]vcvtq_m_n[_f32_s32](float32x4_t inactive, int32x4_t a,
const int imm6, mve_pred16_t p)
+ float32x4_t [__arm_]vcvtq_x_n[_f32_s32](int32x4_t a, const int imm6,
mve_pred16_t p)
+ int32x4_t [__arm_]vcvtq_s32_f32(float32x4_t a)
+ int32x4_t [__arm_]vcvtq_m[_s32_f32](int32x4_t inactive, float32x4_t a,
mve_pred16_t p)
+ int32x4_t [__arm_]vcvtq_x_s32_f32(float32x4_t a, mve_pred16_t p)
+ int32x4_t [__arm_]vcvtq_n_s32_f32(float32x4_t a, const int imm6)
+ int32x4_t [__arm_]vcvtq_m_n[_s32_f32](int32x4_t inactive, float32x4_t a,
const int imm6, mve_pred16_t p)
+ int32x4_t [__arm_]vcvtq_x_n_s32_f32(float32x4_t a, const int imm6,
mve_pred16_t p) */
+struct vcvt_def : public overloaded_base<0>
+{
+ bool
+ explicit_type_suffix_p (unsigned int i, enum predication_index pred,
+ enum mode_suffix_index,
+ type_suffix_info type_info) const override
+ {
+if (pred != PRED_m
+ && ((i == 0 && type_info.integer_p)
+ || (i == 1 && type_info.float_p)))
+ return true;
+return false;
+ }
+
+ bool
+ explicit_mode_suffix_p (enum predication_index,
+ enum mode_suffix_index) const override
+ {
+return true;
+ }
+
+ void
+ build (function_builder , const function_group_info ,
+bool preserve_user_namespace) const override
+ {
+b.add_overloaded_functions (group, MODE_none, preserve_user_namespace);
+b.add_overloaded_functions (group, MODE_n, preserve_user_namespace);
+build_all (b, "v0,v1", group, MODE_none, preserve_user_namespace);
+build_all (b, "v0,v1,ss8", group, MODE_n, preserve_user_namespace);
+ }
+
+ tree
+ resolve (function_resolver ) const override
+ {
+unsigned int i, nargs;
+type_suffix_index from_type;
+tree res;
+unsigned int nimm = (r.mode_suffix_id
[PATCH 09/15] arm: [MVE intrinsics] rework vcvtbq_f16_f32 vcvttq_f16_f32 vcvtbq_f32_f16 vcvttq_f32_f16
Implement vcvtbq_f16_f32, vcvttq_f16_f32, vcvtbq_f32_f16 and
vcvttq_f32_f16 using the new MVE builtins framework.
2024-07-11 Christophe Lyon
gcc/
* config/arm/arm-mve-builtins-base.cc (class vcvtxq_impl): New.
(vcvtbq, vcvttq): New.
* config/arm/arm-mve-builtins-base.def (vcvtbq, vcvttq): New.
* config/arm/arm-mve-builtins-base.h (vcvtbq, vcvttq): New.
* config/arm/arm-mve-builtins.cc (cvt_f16_f32, cvt_f32_f16): New
types.
(function_instance::has_inactive_argument): Support vcvtbq and
vcvttq.
* config/arm/arm_mve.h (vcvttq_f32): Delete.
(vcvtbq_f32): Delete.
(vcvtbq_m): Delete.
(vcvttq_m): Delete.
(vcvttq_f32_f16): Delete.
(vcvtbq_f32_f16): Delete.
(vcvttq_f16_f32): Delete.
(vcvtbq_f16_f32): Delete.
(vcvtbq_m_f16_f32): Delete.
(vcvtbq_m_f32_f16): Delete.
(vcvttq_m_f16_f32): Delete.
(vcvttq_m_f32_f16): Delete.
(vcvtbq_x_f32_f16): Delete.
(vcvttq_x_f32_f16): Delete.
(__arm_vcvttq_f32_f16): Delete.
(__arm_vcvtbq_f32_f16): Delete.
(__arm_vcvttq_f16_f32): Delete.
(__arm_vcvtbq_f16_f32): Delete.
(__arm_vcvtbq_m_f16_f32): Delete.
(__arm_vcvtbq_m_f32_f16): Delete.
(__arm_vcvttq_m_f16_f32): Delete.
(__arm_vcvttq_m_f32_f16): Delete.
(__arm_vcvtbq_x_f32_f16): Delete.
(__arm_vcvttq_x_f32_f16): Delete.
(__arm_vcvttq_f32): Delete.
(__arm_vcvtbq_f32): Delete.
(__arm_vcvtbq_m): Delete.
(__arm_vcvttq_m): Delete.
---
gcc/config/arm/arm-mve-builtins-base.cc | 56 +
gcc/config/arm/arm-mve-builtins-base.def | 4 +
gcc/config/arm/arm-mve-builtins-base.h | 2 +
gcc/config/arm/arm-mve-builtins.cc | 12 ++
gcc/config/arm/arm_mve.h | 146 ---
5 files changed, 74 insertions(+), 146 deletions(-)
diff --git a/gcc/config/arm/arm-mve-builtins-base.cc
b/gcc/config/arm/arm-mve-builtins-base.cc
index a780d686eb1..760378c91b1 100644
--- a/gcc/config/arm/arm-mve-builtins-base.cc
+++ b/gcc/config/arm/arm-mve-builtins-base.cc
@@ -251,6 +251,60 @@ public:
}
};
+ /* Implements vcvt[bt]q_f32_f16 and vcvt[bt]q_f16_f32
+ intrinsics. */
+class vcvtxq_impl : public function_base
+{
+public:
+ CONSTEXPR vcvtxq_impl (int unspec_f16_f32, int unspec_for_m_f16_f32,
+int unspec_f32_f16, int unspec_for_m_f32_f16)
+: m_unspec_f16_f32 (unspec_f16_f32),
+ m_unspec_for_m_f16_f32 (unspec_for_m_f16_f32),
+ m_unspec_f32_f16 (unspec_f32_f16),
+ m_unspec_for_m_f32_f16 (unspec_for_m_f32_f16)
+ {}
+
+ /* The unspec code associated with vcvt[bt]q. */
+ int m_unspec_f16_f32;
+ int m_unspec_for_m_f16_f32;
+ int m_unspec_f32_f16;
+ int m_unspec_for_m_f32_f16;
+
+ rtx
+ expand (function_expander ) const override
+ {
+insn_code code;
+switch (e.pred)
+ {
+ case PRED_none:
+ /* No predicate. */
+ if (e.type_suffix (0).element_bits == 16)
+ code = code_for_mve_q_f16_f32v8hf (m_unspec_f16_f32);
+ else
+ code = code_for_mve_q_f32_f16v4sf (m_unspec_f32_f16);
+ return e.use_exact_insn (code);
+
+ case PRED_m:
+ case PRED_x:
+ /* "m" or "x" predicate. */
+ if (e.type_suffix (0).element_bits == 16)
+ code = code_for_mve_q_m_f16_f32v8hf (m_unspec_for_m_f16_f32);
+ else
+ code = code_for_mve_q_m_f32_f16v4sf (m_unspec_for_m_f32_f16);
+
+ if (e.pred == PRED_m)
+ return e.use_cond_insn (code, 0);
+ else
+ return e.use_pred_x_insn (code);
+
+ default:
+ gcc_unreachable ();
+ }
+
+gcc_unreachable ();
+ }
+};
+
} /* end anonymous namespace */
namespace arm_mve {
@@ -452,6 +506,8 @@ FUNCTION (vcmpcsq,
unspec_based_mve_function_exact_insn_vcmp, (UNKNOWN, GEU, UNK
FUNCTION (vcmphiq, unspec_based_mve_function_exact_insn_vcmp, (UNKNOWN, GTU,
UNKNOWN, UNKNOWN, VCMPHIQ_M_U, UNKNOWN, UNKNOWN, VCMPHIQ_M_N_U, UNKNOWN))
FUNCTION_WITHOUT_M_N (vcreateq, VCREATEQ)
FUNCTION (vcvtq, vcvtq_impl,)
+FUNCTION (vcvtbq, vcvtxq_impl, (VCVTBQ_F16_F32, VCVTBQ_M_F16_F32,
VCVTBQ_F32_F16, VCVTBQ_M_F32_F16))
+FUNCTION (vcvttq, vcvtxq_impl, (VCVTTQ_F16_F32, VCVTTQ_M_F16_F32,
VCVTTQ_F32_F16, VCVTTQ_M_F32_F16))
FUNCTION_ONLY_N (vdupq, VDUPQ)
FUNCTION_WITH_RTX_M (veorq, XOR, VEORQ)
FUNCTION (vfmaq, unspec_mve_function_exact_insn, (-1, -1, VFMAQ_F, -1, -1,
VFMAQ_N_F, -1, -1, VFMAQ_M_F, -1, -1, VFMAQ_M_N_F))
diff --git a/gcc/config/arm/arm-mve-builtins-base.def
b/gcc/config/arm/arm-mve-builtins-base.def
index 4aaf02eab7b..5a6f1a59c7c 100644
--- a/gcc/config/arm/arm-mve-builtins-base.def
+++ b/gcc/config/arm/arm-mve-builtins-base.def
@@ -180,6 +180,10 @@ DEF_MVE_FUNCTION (vcmpltq, cmp, all_float, m_or_none)
DEF_MVE_FUNCTION (vcmpneq, cmp, all_float, m_or_none)
DEF_MVE_FUNCTION (vcreateq, create, all_float, none)
DEF
[PATCH 04/15] arm: [MVE intrinsics] factorize vcvtq
Factorize vcvtq so that they use the parameterized names. 2024-07-11 Christophe Lyon gcc/ * config/arm/iterators.md (mve_insn): Add VCVTQ_FROM_F_S, VCVTQ_FROM_F_U, VCVTQ_M_FROM_F_S, VCVTQ_M_FROM_F_U, VCVTQ_M_N_FROM_F_S, VCVTQ_M_N_FROM_F_U, VCVTQ_M_N_TO_F_S, VCVTQ_M_N_TO_F_U, VCVTQ_M_TO_F_S, VCVTQ_M_TO_F_U, VCVTQ_N_FROM_F_S, VCVTQ_N_FROM_F_U, VCVTQ_N_TO_F_S, VCVTQ_N_TO_F_U, VCVTQ_TO_F_S, VCVTQ_TO_F_U. * config/arm/mve.md (mve_vcvtq_to_f_): Rename into @mve_q_to_f_. (mve_vcvtq_from_f_): Rename into @mve_q_from_f_. (mve_vcvtq_n_to_f_): Rename into @mve_q_n_to_f_. (mve_vcvtq_n_from_f_): Rename into @mve_q_n_from_f_. (mve_vcvtq_m_to_f_): Rename into @mve_q_m_to_f_. (mve_vcvtq_m_n_from_f_): Rename into @mve_q_m_n_from_f_. (mve_vcvtq_m_from_f_): Rename into @mve_q_m_from_f_. (mve_vcvtq_m_n_to_f_): Rename into @mve_q_m_n_to_f_. --- gcc/config/arm/iterators.md | 8 +++ gcc/config/arm/mve.md | 48 ++--- 2 files changed, 32 insertions(+), 24 deletions(-) diff --git a/gcc/config/arm/iterators.md b/gcc/config/arm/iterators.md index b9ff01cb104..bf800625fac 100644 --- a/gcc/config/arm/iterators.md +++ b/gcc/config/arm/iterators.md @@ -964,6 +964,14 @@ (define_int_attr mve_insn [ (VCMLAQ_M_F "vcmla") (VCMLAQ_ROT90_M_F "vcmla") (VCMLAQ_ROT180_M_F "vcmla") (VCMLAQ_ROT270_M_F "vcmla") (VCMULQ_M_F "vcmul") (VCMULQ_ROT90_M_F "vcmul") (VCMULQ_ROT180_M_F "vcmul") (VCMULQ_ROT270_M_F "vcmul") (VCREATEQ_S "vcreate") (VCREATEQ_U "vcreate") (VCREATEQ_F "vcreate") +(VCVTQ_FROM_F_S "vcvt") (VCVTQ_FROM_F_U "vcvt") +(VCVTQ_M_FROM_F_S "vcvt") (VCVTQ_M_FROM_F_U "vcvt") +(VCVTQ_M_N_FROM_F_S "vcvt") (VCVTQ_M_N_FROM_F_U "vcvt") +(VCVTQ_M_N_TO_F_S "vcvt") (VCVTQ_M_N_TO_F_U "vcvt") +(VCVTQ_M_TO_F_S "vcvt") (VCVTQ_M_TO_F_U "vcvt") +(VCVTQ_N_FROM_F_S "vcvt") (VCVTQ_N_FROM_F_U "vcvt") +(VCVTQ_N_TO_F_S "vcvt") (VCVTQ_N_TO_F_U "vcvt") +(VCVTQ_TO_F_S "vcvt") (VCVTQ_TO_F_U "vcvt") (VDUPQ_M_N_S "vdup") (VDUPQ_M_N_U "vdup") (VDUPQ_M_N_F "vdup") (VDUPQ_N_S "vdup") (VDUPQ_N_U "vdup") (VDUPQ_N_F "vdup") (VEORQ_M_S "veor") (VEORQ_M_U "veor") (VEORQ_M_F "veor") diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md index 4b4d6298ffb..b339d0ccdf6 100644 --- a/gcc/config/arm/mve.md +++ b/gcc/config/arm/mve.md @@ -250,15 +250,15 @@ (define_insn "mve_vcvtbq_f32_f16v4sf" ;; ;; [vcvtq_to_f_s, vcvtq_to_f_u]) ;; -(define_insn "mve_vcvtq_to_f_" +(define_insn "@mve_q_to_f_" [ (set (match_operand:MVE_0 0 "s_register_operand" "=w") (unspec:MVE_0 [(match_operand: 1 "s_register_operand" "w")] VCVTQ_TO_F)) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vcvt.f%#.%#\t%q0, %q1" - [(set (attr "mve_unpredicated_insn") (symbol_ref "CODE_FOR_mve_vcvtq_to_f_")) + ".f%#.%#\t%q0, %q1" + [(set (attr "mve_unpredicated_insn") (symbol_ref "CODE_FOR_mve_q_to_f_")) (set_attr "type" "mve_move") ]) @@ -280,15 +280,15 @@ (define_insn "@mve_q_" ;; ;; [vcvtq_from_f_s, vcvtq_from_f_u]) ;; -(define_insn "mve_vcvtq_from_f_" +(define_insn "@mve_q_from_f_" [ (set (match_operand:MVE_5 0 "s_register_operand" "=w") (unspec:MVE_5 [(match_operand: 1 "s_register_operand" "w")] VCVTQ_FROM_F)) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vcvt.%#.f%#\t%q0, %q1" - [(set (attr "mve_unpredicated_insn") (symbol_ref "CODE_FOR_mve_vcvtq_from_f_")) + ".%#.f%#\t%q0, %q1" + [(set (attr "mve_unpredicated_insn") (symbol_ref "CODE_FOR_mve_q_from_f_")) (set_attr "type" "mve_move") ]) @@ -583,7 +583,7 @@ (define_insn "@mve_q_n_f" ;; ;; [vcvtq_n_to_f_s, vcvtq_n_to_f_u]) ;; -(define_insn "mve_vcvtq_n_to_f_" +(define_insn "@mve_q_n_to_f_" [ (set (match_operand:MVE_0 0 "s_register_operand" "=w") (unspec:MVE_0 [(match_operand: 1 "s_register_operand" "w") @@ -591,8 +591,8 @@ (define_insn "mve_vc
[PATCH 01/15] arm: [MVE intrinsics] improve comment for orrq shape
Add a comment about the lack of "n" forms for floating-point nor 8-bit
integers, to make it clearer why we use build_16_32 for MODE_n.
2024-07-11 Christophe Lyon
gcc/
* config/arm/arm-mve-builtins-shapes.cc (binary_orrq_def): Improve
comment.
---
gcc/config/arm/arm-mve-builtins-shapes.cc | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/gcc/config/arm/arm-mve-builtins-shapes.cc
b/gcc/config/arm/arm-mve-builtins-shapes.cc
index ba20c6a8f73..e01939469e3 100644
--- a/gcc/config/arm/arm-mve-builtins-shapes.cc
+++ b/gcc/config/arm/arm-mve-builtins-shapes.cc
@@ -865,7 +865,12 @@ SHAPE (binary_opt_n)
int16x8_t [__arm_]vorrq_m[_s16](int16x8_t inactive, int16x8_t a, int16x8_t
b, mve_pred16_t p)
int16x8_t [__arm_]vorrq_x[_s16](int16x8_t a, int16x8_t b, mve_pred16_t p)
int16x8_t [__arm_]vorrq[_n_s16](int16x8_t a, const int16_t imm)
- int16x8_t [__arm_]vorrq_m_n[_s16](int16x8_t a, const int16_t imm,
mve_pred16_t p) */
+ int16x8_t [__arm_]vorrq_m_n[_s16](int16x8_t a, const int16_t imm,
mve_pred16_t p)
+
+ No "_n" forms for floating-point, nor 8-bit integers:
+ float16x8_t [__arm_]vorrq[_f16](float16x8_t a, float16x8_t b)
+ float16x8_t [__arm_]vorrq_m[_f16](float16x8_t inactive, float16x8_t a,
float16x8_t b, mve_pred16_t p)
+ float16x8_t [__arm_]vorrq_x[_f16](float16x8_t a, float16x8_t b,
mve_pred16_t p) */
struct binary_orrq_def : public overloaded_base<0>
{
bool
--
2.34.1
[PATCH 02/15] arm: [MVE intrinsics] remove useless resolve from create shape
vcreateq have no overloaded forms, so there's no need for resolve ().
2024-07-11 Christophe Lyon
gcc/
* config/arm/arm-mve-builtins-shapes.cc (create_def): Remove
resolve.
---
gcc/config/arm/arm-mve-builtins-shapes.cc | 6 --
1 file changed, 6 deletions(-)
diff --git a/gcc/config/arm/arm-mve-builtins-shapes.cc
b/gcc/config/arm/arm-mve-builtins-shapes.cc
index e01939469e3..0520a8331db 100644
--- a/gcc/config/arm/arm-mve-builtins-shapes.cc
+++ b/gcc/config/arm/arm-mve-builtins-shapes.cc
@@ -1408,12 +1408,6 @@ struct create_def : public nonoverloaded_base
{
build_all (b, "v0,su64,su64", group, MODE_none, preserve_user_namespace);
}
-
- tree
- resolve (function_resolver ) const override
- {
-return r.resolve_uniform (0, 2);
- }
};
SHAPE (create)
--
2.34.1
[PATCH v2 1/2] arm: [MVE intrinsics] fix vdup iterator
This patch fixes a bug where the mode iterator for mve_vdup should be MVE_VLD_ST instead of MVE_vecs: V2DI and V2DF (thus vdup.64) are not supported by MVE. 2024-07-02 Jolen Li Christophe Lyon gcc/ * config/arm/mve.md (mve_vdup): Fix mode iterator. --- gcc/config/arm/mve.md | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md index 4b4d6298ffb..afe5fba698c 100644 --- a/gcc/config/arm/mve.md +++ b/gcc/config/arm/mve.md @@ -95,8 +95,8 @@ (define_insn "mve_mov" (set_attr "neg_pool_range" "*,*,*,*,996,*,*,*")]) (define_insn "mve_vdup" - [(set (match_operand:MVE_vecs 0 "s_register_operand" "=w") - (vec_duplicate:MVE_vecs + [(set (match_operand:MVE_VLD_ST 0 "s_register_operand" "=w") + (vec_duplicate:MVE_VLD_ST (match_operand: 1 "s_register_operand" "r")))] "TARGET_HAVE_MVE || TARGET_HAVE_MVE_FLOAT" "vdup.\t%q0, %1" -- 2.34.1
[PATCH v2 2/2] arm: [MVE intrinsics] Improve vdupq_n implementation
This patch makes the non-predicated vdupq_n MVE intrinsics use
vec_duplicate rather than an unspec. This enables the compiler to
generate better code sequences (for instance using vmov when
possible).
The patch renames the existing mve_vdup pattern into
@mve_vdupq_n, and removes the now useless
@mve_q_n_f and @mve_q_n_ ones.
As a side-effect, it needs to update the mve_unpredicated_insn
predicates in @mve_q_m_n_ and
@mve_q_m_n_f.
Using vec_duplicates means the compiler is now able to use vmov in the
tests with an immediate argument in vdupq_n_[su]{8,16,32}.c:
vmov.i8 q0,#0x1
However, this is only possible when the immediate has a suitable value
(MVE encoding constraints, see imm_for_neon_mov_operand predicate).
Provided we adjust the cost computations in arm_rtx_costs_internal(),
when the immediate does not meet the vmov constraints, we now generate:
mov r0, #imm
vdup.xx q0,r0
or
ldr r0, .L4
vdup.32 q0,r0
in the f32 case (with 1.1 as immediate).
Without the cost adjustment, we would generate:
vldr.64 d0, .L4
vldr.64 d1, .L4+8
and an associated literal pool entry.
Regarding the testsuite updates:
* The signed versions of vdupq_* tests lack a version with an
immediate argument. This patch adds them, similar to what we already
have for vdupq_n_u*.c tests.
* Code generation for different immediate values is checked with the
new tests this patch introduces. Note there's no need for s8/u8 tests
because 8-bit immediates always comply wth imm_for_neon_mov_operand.
* We can remove xfail from vcmp*f tests since we now generate:
movw r3, #15462
vcmp.f16 eq, q0, r3
instead of the previous:
vldr.64 d6, .L5
vldr.64 d7, .L5+8
vcmp.f16 eq, q0, q3
Changes v1->v2:
* Dropped change to cost computation for Neon, and associated
testcases updates (crypto-vsha1*)
* Updated expected regexp in vdupq_n_[su]16-2.c to account for
different assembly comments (none for arm-none-eabi, '@ movhi' for
arm-linux-gnueabihf)
Tested on arm-linux-gnueabihf and arm-none-eabi with no regression.
2024-07-02 Jolen Li
Christophe Lyon
gcc/
* config/arm/arm-mve-builtins-base.cc (vdupq_impl): New class.
(vdupq): Use new implementation.
* config/arm/arm.cc (arm_rtx_costs_internal): Handle HFmode
for COST_DOUBLE. Update consting for CONST_VECTOR.
* config/arm/arm_mve_builtins.def: Merge vdupq_n_f, vdupq_n_s
and vdupq_n_u into vdupq_n.
* config/arm/mve.md (mve_vdup): Rename into ...
(@mve_vdup_n): ... this.
(@mve_q_n_f): Delete.
(@mve_q_n_): Delete..
(@mve_q_m_n_): Update mve_unpredicated_insn
attribute.
(@mve_q_m_n_f): Likewise.
gcc/testsuite/
* gcc.target/arm/mve/intrinsics/vdupq_n_u8.c (foo1): Update
expected code.
* gcc.target/arm/mve/intrinsics/vdupq_n_u16.c (foo1): Likewise.
* gcc.target/arm/mve/intrinsics/vdupq_n_u32.c (foo1): Likewise.
* gcc.target/arm/mve/intrinsics/vdupq_n_s8.c: Add test with
immediate argument.
* gcc.target/arm/mve/intrinsics/vdupq_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdupq_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdupq_n_f16.c (foo1): Update
expected code.
* gcc.target/arm/mve/intrinsics/vdupq_n_f32.c (foo1): Likewise.
* gcc.target/arm/mve/intrinsics/vdupq_m_n_s16.c: Add test with
immediate argument.
* gcc.target/arm/mve/intrinsics/vdupq_m_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdupq_m_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdupq_x_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdupq_x_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdupq_x_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdupq_n_f32-2.c: New test.
* gcc.target/arm/mve/intrinsics/vdupq_n_s16-2.c: New test.
* gcc.target/arm/mve/intrinsics/vdupq_n_s32-2.c: New test.
* gcc.target/arm/mve/intrinsics/vdupq_n_u16-2.c: New test.
* gcc.target/arm/mve/intrinsics/vdupq_n_u32-2.c: New test.
* gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c: Remove xfail.
* gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpneq_n_f16.c: Likewise.
* gcc.target/arm/
[PATCH 2/2] arm: [MVE intrinsics] Improve vdupq_n implementation
This patch makes the non-predicated vdupq_n MVE intrinsics use
vec_duplicate rather than an unspec. This enables the compiler to
generate better code sequences (for instance using vmov when
possible).
The patch renames the existing mve_vdup pattern into
@mve_vdupq_n, and removes the now useless
@mve_q_n_f and @mve_q_n_ ones.
As a side-effect, it needs to update the mve_unpredicated_insn
predicates in @mve_q_m_n_ and
@mve_q_m_n_f.
Using vec_duplicates means the compiler is now able to use vmov in the
tests with an immediate argument in vdupq_n_[su]{8,16,32}.c:
vmov.i8 q0,#0x1
However, this is only possible when the immediate has a suitable value
(MVE encoding constraints, see imm_for_neon_mov_operand predicate).
Provided we adjust the cost computations in arm_rtx_costs_internal(),
when the immediate does not meet the vmov constraints, we now generate:
mov r0, #imm
vdup.xx q0,r0
or
ldr r0, .L4
vdup.32 q0,r0
in the f32 case (with 1.1 as immediate).
Without the cost adjustment, we would generate:
vldr.64 d0, .L4
vldr.64 d1, .L4+8
and an associated literal pool entry.
Regarding the testsuite updates:
* The signed versions of vdupq_* tests lack a version with an
immediate argument. This patch adds them, similar to what we already
have for vdupq_n_u*.c tests.
* Code generation for different immediate values is checked with the
new tests this patch introduces. Note there's no need for s8/u8 tests
because 8-bit immediates always comply wth imm_for_neon_mov_operand.
* We can remove xfail from vcmp*f tests since we now generate:
movw r3, #15462
vcmp.f16 eq, q0, r3
instead of the previous:
vldr.64 d6, .L5
vldr.64 d7, .L5+8
vcmp.f16 eq, q0, q3
* 4 crypto-vsha1*_u32 need an update since we now generate one more
vdup instruction, from:
vldr d16, .L3
vldr d17, .L3+8
vldr d18, .L3+16
vldr d19, .L3+24
vldr d6, .L3+32
vldr d7, .L3+40
[...]
.L3:
.word -559038737
.word -559038737
.word -559038737
.word -559038737
to:
ldr r3, .L3+32
vldr d18, .L3
vldr d19, .L3+8
vdup.32 q8, r3
vldr d6, .L3+16
vldr d7, .L3+24
[...]
.L3+32:
.word -559038737
Finally, this patch fixes a bug where the mode iterator for vdupq_n is
now MVE_VLD_ST instead of MVE_vecs: V2DI and V2DF (thus vdup.64) are
not supported by MVE.
Tested on arm-linux-gnueabihf with no regression.
2024-07-02 Jolen Li
Christophe Lyon
gcc/
* config/arm/arm-mve-builtins-base.cc (vdupq_impl): New class.
(vdupq): Use new implementation.
* config/arm/arm.cc (arm_rtx_costs_internal): Handle HFmode
for COST_DOUBLE. Update consting for CONST_VECTOR.
* config/arm/arm_mve_builtins.def: Merge vdupq_n_f, vdupq_n_s
and vdupq_n_u into vdupq_n.
* config/arm/mve.md (mve_vdup): Rename into ...
(@mve_vdup_n): ... this.
(@mve_q_n_f): Delete.
(@mve_q_n_): Delete..
(@mve_q_m_n_): Update mve_unpredicated_insn
attribute.
(@mve_q_m_n_f): Likewise.
gcc/testsuite/
* gcc.target/arm/mve/intrinsics/vdupq_n_u8.c (foo1): Update
expected code.
* gcc.target/arm/mve/intrinsics/vdupq_n_u16.c (foo1): Likewise.
* gcc.target/arm/mve/intrinsics/vdupq_n_u32.c (foo1): Likewise.
* gcc.target/arm/mve/intrinsics/vdupq_n_s8.c: Add test with
immediate argument.
* gcc.target/arm/mve/intrinsics/vdupq_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdupq_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdupq_n_f16.c (foo1): Update
expected code.
* gcc.target/arm/mve/intrinsics/vdupq_n_f32.c (foo1): Likewise.
* gcc.target/arm/mve/intrinsics/vdupq_m_n_s16.c: Add test with
immediate argument.
* gcc.target/arm/mve/intrinsics/vdupq_m_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdupq_m_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdupq_x_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdupq_x_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdupq_x_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vdupq_n_f32-2.c: New test.
* gcc.target/arm/mve/intrinsics/vdupq_n_s16-2.c: New test.
* gcc.target/arm/mve/intrinsics/vdupq_n_s32-2.c: New test.
* gcc.target/arm/mve/intrinsics/vdupq_n_u16-2.c: New test.
* gcc.target/arm/mve/intrinsics/vdupq_n_u32-2.c: New test.
* gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c: Remove xfail.
* gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c: Likewise
[PATCH 1/2] arm: [MVE intrinsics] fix vdup iterator
This patch fixes a bug where the mode iterator for mve_vdup should be MVE_VLD_ST instead of MVE_vecs: V2DI and V2DF (thus vdup.64) are not supported by MVE. 2024-07-02 Jolen Li Christophe Lyon gcc/ * config/arm/mve.md (mve_vdup): Fix mode iterator. --- gcc/config/arm/mve.md | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md index 4b4d6298ffb..afe5fba698c 100644 --- a/gcc/config/arm/mve.md +++ b/gcc/config/arm/mve.md @@ -95,8 +95,8 @@ (define_insn "mve_mov" (set_attr "neg_pool_range" "*,*,*,*,996,*,*,*")]) (define_insn "mve_vdup" - [(set (match_operand:MVE_vecs 0 "s_register_operand" "=w") - (vec_duplicate:MVE_vecs + [(set (match_operand:MVE_VLD_ST 0 "s_register_operand" "=w") + (vec_duplicate:MVE_VLD_ST (match_operand: 1 "s_register_operand" "r")))] "TARGET_HAVE_MVE || TARGET_HAVE_MVE_FLOAT" "vdup.\t%q0, %1" -- 2.34.1
[gcc r15-1708] i386: Fix regression after refactoring legitimize_pe_coff_symbol, ix86_GOT_alias_set and PE_COFF_LEG
https://gcc.gnu.org/g:c4b7b62bfa10816c1e08f0f9597d857f11379688
commit r15-1708-gc4b7b62bfa10816c1e08f0f9597d857f11379688
Author: Evgeny Karpov
Date: Fri Jun 28 12:37:12 2024 +
i386: Fix regression after refactoring legitimize_pe_coff_symbol,
ix86_GOT_alias_set and PE_COFF_LEGITIMIZE_EXTERN_DECL [PR115635]
This patch fixes 3 bugs reported after merging the "Add DLL
import/export implementation to AArch64" series.
https://gcc.gnu.org/pipermail/gcc-patches/2024-June/653955.html The
series refactors the i386 codebase to reuse it in AArch64, which
triggers some bugs.
Bug 115661 - [15 Regression] wrong code at -O{2,3} on x86_64-linux-gnu
since r15-1599-g63512c72df09b4
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115661
Bug 115635 - [15 regression] Bootstrap fails with failed self-test
with the rust fe (diagnostic-path.cc:1153: test_empty_path: FAIL:
ASSERT_FALSE ((path.interprocedural_p ( since
r15-1599-g63512c72df09b4
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115635
Issue 1. In some code, i386 has been relying on the
legitimize_pe_coff_symbol call on all platforms and should return
NULL_RTX if it is not supported.
Fix: NULL_RTX handling has been added when the target does not support
PECOFF.
Issue 2. ix86_GOT_alias_set is used on all platforms and cannot be
extracted to mingw.
Fix: ix86_GOT_alias_set has been returned as it was and is used on all
platforms for i386.
Bug 115643 - [15 regression] aarch64-w64-mingw32 support today breaks
x86_64-w64-mingw32 build cannot represent relocation type BFD_RELOC_64
since r15-1602-ged20feebd9ea31
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115643
Issue 3. PE_COFF_EXTERN_DECL_SHOULD_BE_LEGITIMIZED has been added and
used with a negative operator for a complex expression without braces.
Fix: Braces has been added, and
PE_COFF_EXTERN_DECL_SHOULD_BE_LEGITIMIZED has been renamed to
PE_COFF_LEGITIMIZE_EXTERN_DECL.
2024-06-28 Evgeny Karpov
gcc/ChangeLog:
PR bootstrap/115635
PR target/115643
PR target/115661
* config/aarch64/cygming.h
(PE_COFF_EXTERN_DECL_SHOULD_BE_LEGITIMIZED): Rename to
PE_COFF_LEGITIMIZE_EXTERN_DECL.
(PE_COFF_LEGITIMIZE_EXTERN_DECL): Likewise.
* config/i386/cygming.h (GOT_ALIAS_SET): Remove the diffinition to
reuse it from i386.h.
(PE_COFF_EXTERN_DECL_SHOULD_BE_LEGITIMIZED): Rename to
PE_COFF_LEGITIMIZE_EXTERN_DECL.
(PE_COFF_LEGITIMIZE_EXTERN_DECL): Likewise.
* config/i386/i386-expand.cc (ix86_expand_move): Return
ix86_GOT_alias_set.
* config/i386/i386-expand.h (ix86_GOT_alias_set): Likewise.
* config/i386/i386.cc (ix86_GOT_alias_set): Likewise.
* config/i386/i386.h (GOT_ALIAS_SET): Likewise.
* config/mingw/winnt-dll.cc (get_dllimport_decl): Use
GOT_ALIAS_SET.
(legitimize_pe_coff_symbol): Rename to
PE_COFF_LEGITIMIZE_EXTERN_DECL.
* config/mingw/winnt-dll.h (ix86_GOT_alias_set): Declare
ix86_GOT_alias_set.
Diff:
---
gcc/config/aarch64/cygming.h | 2 +-
gcc/config/i386/cygming.h | 7 ++-
gcc/config/i386/i386-expand.cc | 5 -
gcc/config/i386/i386-expand.h | 1 +
gcc/config/i386/i386.cc| 11 +++
gcc/config/i386/i386.h | 2 +-
gcc/config/mingw/winnt-dll.cc | 4 ++--
gcc/config/mingw/winnt-dll.h | 1 +
8 files changed, 23 insertions(+), 10 deletions(-)
diff --git a/gcc/config/aarch64/cygming.h b/gcc/config/aarch64/cygming.h
index e26488735db..9ce140a356f 100644
--- a/gcc/config/aarch64/cygming.h
+++ b/gcc/config/aarch64/cygming.h
@@ -186,7 +186,7 @@ still needed for compilation. */
#undef GOT_ALIAS_SET
#define GOT_ALIAS_SET mingw_GOT_alias_set ()
-#define PE_COFF_EXTERN_DECL_SHOULD_BE_LEGITIMIZED 1
+#define PE_COFF_LEGITIMIZE_EXTERN_DECL 1
#define HAVE_64BIT_POINTERS 1
diff --git a/gcc/config/i386/cygming.h b/gcc/config/i386/cygming.h
index 0493b3be875..9c8c7e33cc2 100644
--- a/gcc/config/i386/cygming.h
+++ b/gcc/config/i386/cygming.h
@@ -470,10 +470,7 @@ do { \
# define HAVE_GAS_ALIGNED_COMM 0
#endif
-#undef GOT_ALIAS_SET
-#define GOT_ALIAS_SET mingw_GOT_alias_set ()
-
-#define PE_COFF_EXTERN_DECL_SHOULD_BE_LEGITIMIZED \
- ix86_cmodel == CM_LARGE_PIC || ix86_cmodel == CM_MEDIUM_PIC
+#define PE_COFF_LEGITIMIZE_EXTERN_DECL \
+ (ix86_cmodel == CM_LARGE_PIC || ix86_cmodel == CM_MEDIUM_PIC)
#define HAVE_64BIT_POINTERS TARGET_64BIT_DEFAULT
diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc
index dd2c3a8718e..a4434c19272 100644
--- a/gcc/config/i386/i386-expand.cc
+++ b/gcc/config/i386/i386-expand.cc
@@ -414,6 +414,10 @@ ix86_expand_move
Re: [PATCH] i386: Fix regression after refactoring legitimize_pe_coff_symbol, ix86_GOT_alias_set and PE_COFF_LEGITIMIZE_EXTERN_DECL
Hi Evgeny,
Minor comments:
- the patch title should end with [PRn, ...] (choose the most
relevant bug number)
- ChangeLog should mention every bug with PR component/n
so that the bugzilla hooks will notice the commit.
See https://gcc.gnu.org/contribute.html#patches
(but I can do it for you before pushing the patch)
Thanks,
Christophe
On Thu, 27 Jun 2024 at 09:16, Evgeny Karpov wrote:
>
> Thank you for reporting the issues and discussing the root causes.
> It helped in preparing the patch.
>
> This patch fixes 3 bugs reported after merging
> the "Add DLL import/export implementation to AArch64" series.
> https://gcc.gnu.org/pipermail/gcc-patches/2024-June/653955.html
> The series refactors the i386 codebase to reuse it in AArch64, which
> triggers some bugs.
>
> Bug 115661 - [15 Regression] wrong code at -O{2,3} on
> x86_64-linux-gnu since r15-1599-g63512c72df09b4
> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115661
>
> Bug 115635 - [15 regression] Bootstrap fails with failed
> self-test with the rust fe (diagnostic-path.cc:1153:
> test_empty_path: FAIL: ASSERT_FALSE
> ((path.interprocedural_p ( since r15-1599-g63512c72df09b4
> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115635
>
> Issue 1. In some code, i386 has been relying on the
> legitimize_pe_coff_symbol call on all platforms and should return
> NULL_RTX if it is not supported.
>
> Fix: NULL_RTX handling has been added when the target does not
> support PECOFF.
>
> Issue 2. ix86_GOT_alias_set is used on all platforms and cannot be
> extracted to mingw.
>
> Fix: ix86_GOT_alias_set has been returned as it was and is used on
> all platforms for i386.
>
> Bug 115643 - [15 regression] aarch64-w64-mingw32 support today breaks
> x86_64-w64-mingw32 build cannot represent relocation type
> BFD_RELOC_64 since r15-1602-ged20feebd9ea31
> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115643
>
> Issue 3. PE_COFF_EXTERN_DECL_SHOULD_BE_LEGITIMIZED has been added and used
> with a negative operator for a complex expression without braces.
>
> Fix: Braces has been added, and
> PE_COFF_EXTERN_DECL_SHOULD_BE_LEGITIMIZED has been renamed to
> PE_COFF_LEGITIMIZE_EXTERN_DECL.
>
>
> The patch has been attached as a text file because it contains special
> characters that are usually removed by the mail client.
>
> Regards,
> Evgeny
Re: [PATCH] i386: Remove declaration of unused functions
On Wed, 26 Jun 2024 at 01:27, Iain Sandoe wrote: > > > > > On 25 Jun 2024, at 22:59, Evgeny Karpov wrote: > > > > The patch fixes the issue introduced in > > https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=63512c72df09b43d56ac7680cdfd57a66d40c636 > > and reported at > > https://gcc.gnu.org/pipermail/gcc-patches/2024-June/655599.html . > > Trivial patches like this that fix bootstrap on multiple targets can be > applied without extra approval, > this fixes bootstrap for x86 Darwin, so OK > Iain > I've just pushed the patch on Evgeny's behalf. Thanks, Christophe > > > > Regards, > > Evgeny > > > > > > The patch fixes the issue with compilation on x86_64-gnu-linux > > when warnings for unused functions are treated as errors. > > > > gcc/ChangeLog: > > > > * config/i386/i386.cc (legitimize_dllimport_symbol): Remove unused > > functions. > > (legitimize_pe_coff_extern_decl): Likewise. > > --- > > gcc/config/i386/i386.cc | 2 -- > > 1 file changed, 2 deletions(-) > > > > diff --git a/gcc/config/i386/i386.cc b/gcc/config/i386/i386.cc > > index aee88b08ae9..6d6a478f6f5 100644 > > --- a/gcc/config/i386/i386.cc > > +++ b/gcc/config/i386/i386.cc > > @@ -104,8 +104,6 @@ along with GCC; see the file COPYING3. If not see > > /* This file should be included last. */ > > #include "target-def.h" > > > > -static rtx legitimize_dllimport_symbol (rtx, bool); > > -static rtx legitimize_pe_coff_extern_decl (rtx, bool); > > static void ix86_print_operand_address_as (FILE *, rtx, addr_space_t, bool); > > static void ix86_emit_restore_reg_using_pop (rtx, bool = false); > > > > -- > > 2.25.1 > > >
[gcc r15-1646] i386: Remove declaration of unused functions
https://gcc.gnu.org/g:f4e847ba69a36d433d68cc2b41068cd59ffa1cd3 commit r15-1646-gf4e847ba69a36d433d68cc2b41068cd59ffa1cd3 Author: Evgeny Karpov Date: Tue Jun 25 21:59:35 2024 + i386: Remove declaration of unused functions The patch fixes the issue introduced in https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=63512c72df09b43d56ac7680cdfd57a66d40c636 and reported at https://gcc.gnu.org/pipermail/gcc-patches/2024-June/655599.html . Regards, Evgeny The patch fixes the issue with compilation on x86_64-gnu-linux when warnings for unused functions are treated as errors. gcc/ChangeLog: * config/i386/i386.cc (legitimize_dllimport_symbol): Remove unused functions. (legitimize_pe_coff_extern_decl): Likewise. Diff: --- gcc/config/i386/i386.cc | 2 -- 1 file changed, 2 deletions(-) diff --git a/gcc/config/i386/i386.cc b/gcc/config/i386/i386.cc index b0ef1bf08e0..1f71ed04be6 100644 --- a/gcc/config/i386/i386.cc +++ b/gcc/config/i386/i386.cc @@ -104,8 +104,6 @@ along with GCC; see the file COPYING3. If not see /* This file should be included last. */ #include "target-def.h" -static rtx legitimize_dllimport_symbol (rtx, bool); -static rtx legitimize_pe_coff_extern_decl (rtx, bool); static void ix86_print_operand_address_as (FILE *, rtx, addr_space_t, bool); static void ix86_emit_restore_reg_using_pop (rtx, bool = false);
Re: [PATCH v3 6/6] aarch64: Add DLL import/export to AArch64 target
On Fri, 21 Jun 2024 at 15:51, Richard Sandiford
wrote:
>
> Evgeny Karpov writes:
> > Monday, June 10, 2024 7:03 PM
> > Richard Sandiford wrote:
> >
> >> Thanks for the update. Parts 1-5 look good to me. Some minor comments
> >> below about part 6:
> >>
> >> If the TARGET_DLLIMPORT_DECL_ATTRIBUTES condition can be dropped, the
> >> series is OK from my POV with that change and with the changes above.
> >> Please get sign-off from an x86 maintainer too though.
> >
> > Thank you for the review and suggestions. Here is the updated version of
> > patch 6, based on the comments.
> > The x86 and mingw maintainers have already approved the series.
> >
> > Regards,
> > Evgeny
> >
> >
> >
> > This patch reuses the MinGW implementation to enable DLL import/export
> > functionality for the aarch64-w64-mingw32 target. It also modifies
> > environment configurations for MinGW.
> >
> > gcc/ChangeLog:
> >
> > * config.gcc: Add winnt-dll.o, which contains the DLL
> > import/export implementation.
> > * config/aarch64/aarch64.cc (aarch64_legitimize_pe_coff_symbol):
> > Add a conditional function that reuses the MinGW implementation
> > for COFF and does nothing otherwise.
> > (aarch64_expand_call): Add dllimport implementation.
> > (aarch64_legitimize_address): Likewise.
> > * config/aarch64/cygming.h (SYMBOL_FLAG_DLLIMPORT): Modify MinGW
> > environment to support DLL import/export.
> > (SYMBOL_FLAG_DLLEXPORT): Likewise.
> > (SYMBOL_REF_DLLIMPORT_P): Likewise.
> > (SYMBOL_FLAG_STUBVAR): Likewise.
> > (SYMBOL_REF_STUBVAR_P): Likewise.
> > (TARGET_VALID_DLLIMPORT_ATTRIBUTE_P): Likewise.
> > (TARGET_ASM_FILE_END): Likewise.
> > (SUB_TARGET_RECORD_STUB): Likewise.
> > (GOT_ALIAS_SET): Likewise.
> > (PE_COFF_EXTERN_DECL_SHOULD_BE_LEGITIMIZED): Likewise.
> > (HAVE_64BIT_POINTERS): Likewise.
>
> OK, thanks. If you'd like commit access, please follow the instructions
> on https://gcc.gnu.org/gitwrite.html , listing me as sponsor.
>
I've just pushed the series on Evgeny's behalf.
Thanks,
Christophe
> Richard.
>
> > ---
> > gcc/config.gcc| 4 +++-
> > gcc/config/aarch64/aarch64.cc | 26 ++
> > gcc/config/aarch64/cygming.h | 26 --
> > 3 files changed, 53 insertions(+), 3 deletions(-)
> >
> > diff --git a/gcc/config.gcc b/gcc/config.gcc
> > index d053b98efa8..331285b7b6d 100644
> > --- a/gcc/config.gcc
> > +++ b/gcc/config.gcc
> > @@ -1276,10 +1276,12 @@ aarch64-*-mingw*)
> > tm_file="${tm_file} mingw/mingw32.h"
> > tm_file="${tm_file} mingw/mingw-stdint.h"
> > tm_file="${tm_file} mingw/winnt.h"
> > + tm_file="${tm_file} mingw/winnt-dll.h"
> > tmake_file="${tmake_file} aarch64/t-aarch64"
> > target_gtfiles="$target_gtfiles \$(srcdir)/config/mingw/winnt.cc"
> > + target_gtfiles="$target_gtfiles \$(srcdir)/config/mingw/winnt-dll.cc"
> > extra_options="${extra_options} mingw/cygming.opt mingw/mingw.opt"
> > - extra_objs="${extra_objs} winnt.o"
> > + extra_objs="${extra_objs} winnt.o winnt-dll.o"
> > c_target_objs="${c_target_objs} msformat-c.o"
> > d_target_objs="${d_target_objs} winnt-d.o"
> > tmake_file="${tmake_file} mingw/t-cygming"
> > diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
> > index 3418e57218f..32e31e08449 100644
> > --- a/gcc/config/aarch64/aarch64.cc
> > +++ b/gcc/config/aarch64/aarch64.cc
> > @@ -860,6 +860,10 @@ static const attribute_spec aarch64_gnu_attributes[] =
> >{ "Advanced SIMD type", 1, 1, false, true, false, true, NULL, NULL },
> >{ "SVE type",3, 3, false, true, false, true, NULL,
> > NULL },
> >{ "SVE sizeless type", 0, 0, false, true, false, true, NULL, NULL },
> > +#if TARGET_DLLIMPORT_DECL_ATTRIBUTES
> > + { "dllimport", 0, 0, false, false, false, false, handle_dll_attribute,
> > NULL },
> > + { "dllexport", 0, 0, false, false, false, false, handle_dll_attribute,
> > NULL },
> > +#endif
> > #ifdef SUBTARGET_ATTRIBUTE_TABLE
> >SUBTARGET_ATTRIBUTE_TABLE
> > #endif
> > @@ -2865,6 +2869,15 @@ static void
> > aarch64_load_symref_appropriately (rtx dest, rtx imm,
> > enum aarch64_symbol_type type)
> > {
> > +#if TARGET_PECOFF
> > + rtx tmp = legitimize_pe_coff_symbol (imm, true);
> > + if (tmp)
> > +{
> > + emit_insn (gen_rtx_SET (dest, tmp));
> > + return;
> > +}
> > +#endif
> > +
> >switch (type)
> > {
> > case SYMBOL_SMALL_ABSOLUTE:
> > @@ -11233,6 +11246,13 @@ aarch64_expand_call (rtx result, rtx mem, rtx
> > cookie, bool sibcall)
> >
> >gcc_assert (MEM_P (mem));
> >callee = XEXP (mem, 0);
> > +
> > +#if TARGET_PECOFF
> > + tmp = legitimize_pe_coff_symbol (callee, false);
> > + if (tmp)
> > +callee = tmp;
> > +#endif
> > +
> >mode = GET_MODE (callee);
> >gcc_assert (mode == Pmode);
> >
[gcc r15-1602] Adjust DLL import/export implementation for AArch64
https://gcc.gnu.org/g:ed20feebd9ea31d58861f61205bd412b0c3febd0
commit r15-1602-ged20feebd9ea31d58861f61205bd412b0c3febd0
Author: Evgeny Karpov
Date: Mon Jun 24 12:46:54 2024 +
Adjust DLL import/export implementation for AArch64
The DLL import/export mingw implementation, originally from ix86,
requires minor adjustments to be compatible with AArch64.
2024-06-08 Evgeny Karpov
gcc/ChangeLog:
* config/i386/cygming.h
(PE_COFF_EXTERN_DECL_SHOULD_BE_LEGITIMIZED): Declare whether an
external declaration should be legitimized.
(HAVE_64BIT_POINTERS): Define whether the target supports 64-bit
pointers.
* config/mingw/mingw32.h (defined): Use the correct
DllMainCRTStartup entry function.
* config/mingw/winnt-dll.cc (defined): Exclude ix86-related code.
Diff:
---
gcc/config/i386/cygming.h | 5 +
gcc/config/mingw/mingw32.h| 2 +-
gcc/config/mingw/winnt-dll.cc | 2 +-
3 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/gcc/config/i386/cygming.h b/gcc/config/i386/cygming.h
index 4bb8d7f920c..0493b3be875 100644
--- a/gcc/config/i386/cygming.h
+++ b/gcc/config/i386/cygming.h
@@ -472,3 +472,8 @@ do {\
#undef GOT_ALIAS_SET
#define GOT_ALIAS_SET mingw_GOT_alias_set ()
+
+#define PE_COFF_EXTERN_DECL_SHOULD_BE_LEGITIMIZED \
+ ix86_cmodel == CM_LARGE_PIC || ix86_cmodel == CM_MEDIUM_PIC
+
+#define HAVE_64BIT_POINTERS TARGET_64BIT_DEFAULT
diff --git a/gcc/config/mingw/mingw32.h b/gcc/config/mingw/mingw32.h
index da8e1e8949e..0dfe8e995b6 100644
--- a/gcc/config/mingw/mingw32.h
+++ b/gcc/config/mingw/mingw32.h
@@ -82,7 +82,7 @@ along with GCC; see the file COPYING3. If not see
#endif
#undef SUB_LINK_ENTRY
-#if TARGET_64BIT_DEFAULT
+#if HAVE_64BIT_POINTERS
#define SUB_LINK_ENTRY SUB_LINK_ENTRY64
#else
#define SUB_LINK_ENTRY SUB_LINK_ENTRY32
diff --git a/gcc/config/mingw/winnt-dll.cc b/gcc/config/mingw/winnt-dll.cc
index 1354402a959..66c445cba77 100644
--- a/gcc/config/mingw/winnt-dll.cc
+++ b/gcc/config/mingw/winnt-dll.cc
@@ -206,7 +206,7 @@ legitimize_pe_coff_symbol (rtx addr, bool inreg)
}
}
- if (ix86_cmodel != CM_LARGE_PIC && ix86_cmodel != CM_MEDIUM_PIC)
+ if (!PE_COFF_EXTERN_DECL_SHOULD_BE_LEGITIMIZED)
return NULL_RTX;
if (GET_CODE (addr) == SYMBOL_REF
[gcc r15-1603] aarch64: Add DLL import/export to AArch64 target
https://gcc.gnu.org/g:30db57901ccac7027f93ff71e70a66e26a4f70f5
commit r15-1603-g30db57901ccac7027f93ff71e70a66e26a4f70f5
Author: Evgeny Karpov
Date: Sat Jun 8 13:49:17 2024 +
aarch64: Add DLL import/export to AArch64 target
This patch reuses the MinGW implementation to enable DLL import/export
functionality for the aarch64-w64-mingw32 target. It also modifies
environment configurations for MinGW.
2024-06-08 Evgeny Karpov
gcc/ChangeLog:
* config.gcc: Add winnt-dll.o, which contains the DLL
import/export implementation.
* config/aarch64/aarch64.cc (aarch64_load_symref_appropriately):
Add dllimport implementation.
(aarch64_expand_call): Likewise.
(aarch64_legitimize_address): Likewise.
* config/aarch64/cygming.h (SYMBOL_FLAG_DLLIMPORT): Modify MinGW
environment to support DLL import/export.
(SYMBOL_FLAG_DLLEXPORT): Likewise.
(SYMBOL_REF_DLLIMPORT_P): Likewise.
(SYMBOL_FLAG_STUBVAR): Likewise.
(SYMBOL_REF_STUBVAR_P): Likewise.
(TARGET_VALID_DLLIMPORT_ATTRIBUTE_P): Likewise.
(TARGET_ASM_FILE_END): Likewise.
(SUB_TARGET_RECORD_STUB): Likewise.
(GOT_ALIAS_SET): Likewise.
(PE_COFF_EXTERN_DECL_SHOULD_BE_LEGITIMIZED): Likewise.
(HAVE_64BIT_POINTERS): Likewise.
Diff:
---
gcc/config.gcc| 4 +++-
gcc/config/aarch64/aarch64.cc | 26 ++
gcc/config/aarch64/cygming.h | 26 --
3 files changed, 53 insertions(+), 3 deletions(-)
diff --git a/gcc/config.gcc b/gcc/config.gcc
index 70757c95436..bc45615741b 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -1276,10 +1276,12 @@ aarch64-*-mingw*)
tm_file="${tm_file} mingw/mingw32.h"
tm_file="${tm_file} mingw/mingw-stdint.h"
tm_file="${tm_file} mingw/winnt.h"
+ tm_file="${tm_file} mingw/winnt-dll.h"
tmake_file="${tmake_file} aarch64/t-aarch64"
target_gtfiles="$target_gtfiles \$(srcdir)/config/mingw/winnt.cc"
+ target_gtfiles="$target_gtfiles \$(srcdir)/config/mingw/winnt-dll.cc"
extra_options="${extra_options} mingw/cygming.opt mingw/mingw.opt"
- extra_objs="${extra_objs} winnt.o"
+ extra_objs="${extra_objs} winnt.o winnt-dll.o"
c_target_objs="${c_target_objs} msformat-c.o"
d_target_objs="${d_target_objs} winnt-d.o"
tmake_file="${tmake_file} mingw/t-cygming"
diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
index 61daa6daf68..6b106a72e49 100644
--- a/gcc/config/aarch64/aarch64.cc
+++ b/gcc/config/aarch64/aarch64.cc
@@ -860,6 +860,10 @@ static const attribute_spec aarch64_gnu_attributes[] =
{ "Advanced SIMD type", 1, 1, false, true, false, true, NULL, NULL },
{ "SVE type", 3, 3, false, true, false, true, NULL, NULL
},
{ "SVE sizeless type", 0, 0, false, true, false, true, NULL, NULL },
+#if TARGET_DLLIMPORT_DECL_ATTRIBUTES
+ { "dllimport", 0, 0, false, false, false, false, handle_dll_attribute, NULL
},
+ { "dllexport", 0, 0, false, false, false, false, handle_dll_attribute, NULL
},
+#endif
#ifdef SUBTARGET_ATTRIBUTE_TABLE
SUBTARGET_ATTRIBUTE_TABLE
#endif
@@ -2865,6 +2869,15 @@ static void
aarch64_load_symref_appropriately (rtx dest, rtx imm,
enum aarch64_symbol_type type)
{
+#if TARGET_PECOFF
+ rtx tmp = legitimize_pe_coff_symbol (imm, true);
+ if (tmp)
+{
+ emit_insn (gen_rtx_SET (dest, tmp));
+ return;
+}
+#endif
+
switch (type)
{
case SYMBOL_SMALL_ABSOLUTE:
@@ -11233,6 +11246,13 @@ aarch64_expand_call (rtx result, rtx mem, rtx cookie,
bool sibcall)
gcc_assert (MEM_P (mem));
callee = XEXP (mem, 0);
+
+#if TARGET_PECOFF
+ tmp = legitimize_pe_coff_symbol (callee, false);
+ if (tmp)
+callee = tmp;
+#endif
+
mode = GET_MODE (callee);
gcc_assert (mode == Pmode);
@@ -12709,6 +12729,12 @@ aarch64_anchor_offset (HOST_WIDE_INT offset,
HOST_WIDE_INT size,
static rtx
aarch64_legitimize_address (rtx x, rtx /* orig_x */, machine_mode mode)
{
+#if TARGET_PECOFF
+ rtx tmp = legitimize_pe_coff_symbol (x, true);
+ if (tmp)
+return tmp;
+#endif
+
/* Try to split X+CONST into Y=X+(CONST & ~mask), Y+(CONST),
where mask is selected by alignment and size of the offset.
We try to pick as large a range for the offset as possible to
diff --git a/gcc/config/aarch64/cygming.h b/gcc/config/aarch64/cygming.h
index 76623153080..e26488735db 100644
--- a/gcc/config/aarch64/cygming.h
+++ b/gcc/config/aarch64/cygming.h
@@ -28,12 +28,18 @@ along with GCC; see the file COPYING3. If not see
#define print_reg(rtx, code, file) (gcc_unreachable ())
-#define SYMBOL_FLAG_DLLIMPORT 0
-#define SYMBOL_FLAG_DLLEXPORT 0
+#define SYMBOL_FLAG_DLLIMPORT (SYMBOL_FLAG_MACH_DEP << 0)
+#define
[gcc r15-1601] aarch64: Add selectany attribute handling
https://gcc.gnu.org/g:337632ef02a77d20ceb3dcb04751b4d4c844e23e
commit r15-1601-g337632ef02a77d20ceb3dcb04751b4d4c844e23e
Author: Evgeny Karpov
Date: Mon Jun 24 12:44:58 2024 +
aarch64: Add selectany attribute handling
This patch extends the aarch64 attributes list with the selectany
attribute for the aarch64-w64-mingw32 target and reuses the mingw
implementation to handle it.
2024-06-08 Evgeny Karpov
gcc/ChangeLog:
* config/aarch64/aarch64.cc: Extend the aarch64 attributes list.
* config/aarch64/cygming.h (SUBTARGET_ATTRIBUTE_TABLE): Define the
selectany attribute.
Diff:
---
gcc/config/aarch64/aarch64.cc | 5 -
gcc/config/aarch64/cygming.h | 3 +++
2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
index ae7e21d90b2..61daa6daf68 100644
--- a/gcc/config/aarch64/aarch64.cc
+++ b/gcc/config/aarch64/aarch64.cc
@@ -859,7 +859,10 @@ static const attribute_spec aarch64_gnu_attributes[] =
NULL },
{ "Advanced SIMD type", 1, 1, false, true, false, true, NULL, NULL },
{ "SVE type", 3, 3, false, true, false, true, NULL, NULL
},
- { "SVE sizeless type", 0, 0, false, true, false, true, NULL, NULL }
+ { "SVE sizeless type", 0, 0, false, true, false, true, NULL, NULL },
+#ifdef SUBTARGET_ATTRIBUTE_TABLE
+ SUBTARGET_ATTRIBUTE_TABLE
+#endif
};
static const scoped_attribute_specs aarch64_gnu_attribute_table =
diff --git a/gcc/config/aarch64/cygming.h b/gcc/config/aarch64/cygming.h
index 0d048879311..76623153080 100644
--- a/gcc/config/aarch64/cygming.h
+++ b/gcc/config/aarch64/cygming.h
@@ -154,6 +154,9 @@ still needed for compilation. */
flag_stack_check = STATIC_BUILTIN_STACK_CHECK; \
} while (0)
+#define SUBTARGET_ATTRIBUTE_TABLE \
+ { "selectany", 0, 0, true, false, false, false, \
+mingw_handle_selectany_attribute, NULL }
#define SUPPORTS_ONE_ONLY 1
[gcc r15-1600] Rename functions for reuse in AArch64
https://gcc.gnu.org/g:a86d7e151104d8c14884130d21b68e6603483354
commit r15-1600-ga86d7e151104d8c14884130d21b68e6603483354
Author: Evgeny Karpov
Date: Mon Jun 24 12:43:05 2024 +
Rename functions for reuse in AArch64
This patch renames functions related to dllimport/dllexport and
selectany functionality. These functions will be reused in the
aarch64-w64-mingw32 target.
2024-06-08 Evgeny Karpov
gcc/ChangeLog:
* config/i386/cygming.h (mingw_pe_record_stub): Rename functions
in mingw folder which will be reused for aarch64.
(TARGET_ASM_FILE_END): Update to new target-independent name.
(SUBTARGET_ATTRIBUTE_TABLE): Likewise.
(TARGET_VALID_DLLIMPORT_ATTRIBUTE_P): Likewise.
(SUB_TARGET_RECORD_STUB): Likewise.
* config/i386/i386-protos.h (ix86_handle_selectany_attribute):
Likewise.
(mingw_handle_selectany_attribute): Likewise.
(i386_pe_valid_dllimport_attribute_p): Likewise.
(mingw_pe_valid_dllimport_attribute_p): Likewise.
(i386_pe_file_end): Likewise.
(mingw_pe_file_end): Likewise.
(i386_pe_record_stub): Likewise.
(mingw_pe_record_stub): Likewise.
* config/mingw/winnt.cc (ix86_handle_selectany_attribute):
Likewise.
(mingw_handle_selectany_attribute): Likewise.
(i386_pe_valid_dllimport_attribute_p): Likewise.
(mingw_pe_valid_dllimport_attribute_p): Likewise.
(i386_pe_record_stub): Likewise.
(mingw_pe_record_stub): Likewise.
(i386_pe_file_end): Likewise.
(mingw_pe_file_end): Likewise.
* config/mingw/winnt.h (mingw_handle_selectany_attribute): Declate
functionality that will be reused by multiple targets.
(mingw_pe_file_end): Likewise.
(mingw_pe_record_stub): Likewise.
(mingw_pe_valid_dllimport_attribute_p): Likewise.
Diff:
---
gcc/config/i386/cygming.h | 6 +++---
gcc/config/i386/i386-protos.h | 3 ---
gcc/config/mingw/winnt.cc | 8
gcc/config/mingw/winnt.h | 6 +-
4 files changed, 12 insertions(+), 11 deletions(-)
diff --git a/gcc/config/i386/cygming.h b/gcc/config/i386/cygming.h
index 56945f00c11..4bb8d7f920c 100644
--- a/gcc/config/i386/cygming.h
+++ b/gcc/config/i386/cygming.h
@@ -344,7 +344,7 @@ do {\
/* Output function declarations at the end of the file. */
#undef TARGET_ASM_FILE_END
-#define TARGET_ASM_FILE_END i386_pe_file_end
+#define TARGET_ASM_FILE_END mingw_pe_file_end
/* Kludge because of missing PE-COFF support for early LTO debug. */
#undef TARGET_ASM_LTO_START
@@ -445,7 +445,7 @@ do {\
#define SUBTARGET_ATTRIBUTE_TABLE \
{ "selectany", 0, 0, true, false, false, false, \
-ix86_handle_selectany_attribute, NULL }
+mingw_handle_selectany_attribute, NULL }
/* { name, min_len, max_len, decl_req, type_req, fn_type_req,
affects_type_identity, handler, exclude } */
@@ -453,7 +453,7 @@ do {\
#undef NO_PROFILE_COUNTERS
#define NO_PROFILE_COUNTERS 1
-#define TARGET_VALID_DLLIMPORT_ATTRIBUTE_P i386_pe_valid_dllimport_attribute_p
+#define TARGET_VALID_DLLIMPORT_ATTRIBUTE_P mingw_pe_valid_dllimport_attribute_p
#define TARGET_CXX_ADJUST_CLASS_AT_DEFINITION
i386_pe_adjust_class_at_definition
#define SUBTARGET_MANGLE_DECL_ASSEMBLER_NAME i386_pe_mangle_decl_assembler_name
diff --git a/gcc/config/i386/i386-protos.h b/gcc/config/i386/i386-protos.h
index a9171c3d2d8..4f48dc0bf75 100644
--- a/gcc/config/i386/i386-protos.h
+++ b/gcc/config/i386/i386-protos.h
@@ -269,7 +269,6 @@ extern unsigned int ix86_local_alignment (tree,
machine_mode,
extern unsigned int ix86_minimum_alignment (tree, machine_mode,
unsigned int);
extern tree ix86_handle_shared_attribute (tree *, tree, tree, int, bool *);
-extern tree ix86_handle_selectany_attribute (tree *, tree, tree, int, bool *);
extern int x86_field_alignment (tree, int);
extern tree ix86_valid_target_attribute_tree (tree, tree,
struct gcc_options *,
@@ -309,12 +308,10 @@ extern void ix86_register_pragmas (void);
extern void i386_pe_record_external_function (tree, const char *);
extern bool i386_pe_binds_local_p (const_tree);
extern const char *i386_pe_strip_name_encoding_full (const char *);
-extern bool i386_pe_valid_dllimport_attribute_p (const_tree);
extern void i386_pe_asm_output_aligned_decl_common (FILE *, tree,
const char *,
HOST_WIDE_INT,
HOST_WIDE_INT);
-extern void i386_pe_file_end (void);
extern void
[gcc r15-1599] Extract ix86 dllimport implementation to mingw
https://gcc.gnu.org/g:63512c72df09b43d56ac7680cdfd57a66d40c636
commit r15-1599-g63512c72df09b43d56ac7680cdfd57a66d40c636
Author: Evgeny Karpov
Date: Mon Jun 24 12:38:40 2024 +
Extract ix86 dllimport implementation to mingw
This patch extracts the ix86 implementation for expanding a SYMBOL
into its corresponding dllimport, far-address, or refptr symbol. It
will be reused in the aarch64-w64-mingw32 target. The implementation
is copied as is from i386/i386.cc with minor changes to follow to the
code style.
Also this patch replaces the original DLL import/export implementation
in ix86 with mingw.
2024-06-08 Evgeny Karpov
gcc/ChangeLog:
* config.gcc: Add winnt-dll.o, which contains the DLL
import/export implementation.
* config/i386/cygming.h (SUB_TARGET_RECORD_STUB): Remove the
old implementation. Rename the required function to MinGW.
Use MinGW implementation for COFF and nothing otherwise.
(GOT_ALIAS_SET): Likewise.
* config/i386/i386-expand.cc (ix86_expand_move): Likewise.
* config/i386/i386-expand.h (ix86_GOT_alias_set): Likewise.
(legitimize_pe_coff_symbol): Likewise.
* config/i386/i386-protos.h (i386_pe_record_stub): Likewise.
* config/i386/i386.cc (is_imported_p): Likewise.
(legitimate_pic_address_disp_p): Likewise.
(ix86_GOT_alias_set): Likewise.
(legitimize_pic_address): Likewise.
(legitimize_tls_address): Likewise.
(struct dllimport_hasher): Likewise.
(GTY): Likewise.
(get_dllimport_decl): Likewise.
(legitimize_pe_coff_extern_decl): Likewise.
(legitimize_dllimport_symbol): Likewise.
(legitimize_pe_coff_symbol): Likewise.
(ix86_legitimize_address): Likewise.
* config/i386/i386.h (GOT_ALIAS_SET): Likewise.
* config/mingw/winnt.cc (i386_pe_record_stub): Likewise.
(mingw_pe_record_stub): Likewise.
* config/mingw/winnt.h (mingw_pe_record_stub): Likewise.
* config/mingw/t-cygming: Add the winnt-dll.o compilation.
* config/mingw/winnt-dll.cc: New file.
* config/mingw/winnt-dll.h: New file.
Diff:
---
gcc/config.gcc | 12 ++-
gcc/config/i386/cygming.h | 5 +-
gcc/config/i386/i386-expand.cc | 4 +-
gcc/config/i386/i386-expand.h | 2 -
gcc/config/i386/i386-protos.h | 1 -
gcc/config/i386/i386.cc| 205 ++--
gcc/config/i386/i386.h | 2 +
gcc/config/mingw/t-cygming | 6 ++
gcc/config/mingw/winnt-dll.cc | 231 +
gcc/config/mingw/winnt-dll.h | 30 ++
gcc/config/mingw/winnt.cc | 2 +-
gcc/config/mingw/winnt.h | 1 +
12 files changed, 298 insertions(+), 203 deletions(-)
diff --git a/gcc/config.gcc b/gcc/config.gcc
index 5e7e6f76a7f..70757c95436 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -2177,11 +2177,13 @@ i[4567]86-wrs-vxworks*|x86_64-wrs-vxworks7*)
i[34567]86-*-cygwin*)
tm_file="${tm_file} i386/unix.h i386/bsd.h i386/gas.h i386/cygming.h
i386/cygwin.h i386/cygwin-stdint.h"
tm_file="${tm_file} mingw/winnt.h"
+ tm_file="${tm_file} mingw/winnt-dll.h"
xm_file=i386/xm-cygwin.h
tmake_file="${tmake_file} mingw/t-cygming t-slibgcc"
target_gtfiles="$target_gtfiles \$(srcdir)/config/mingw/winnt.cc"
+ target_gtfiles="$target_gtfiles \$(srcdir)/config/mingw/winnt-dll.cc"
extra_options="${extra_options} mingw/cygming.opt i386/cygwin.opt"
- extra_objs="${extra_objs} winnt.o winnt-stubs.o"
+ extra_objs="${extra_objs} winnt.o winnt-stubs.o winnt-dll.o"
c_target_objs="${c_target_objs} msformat-c.o"
cxx_target_objs="${cxx_target_objs} winnt-cxx.o msformat-c.o"
d_target_objs="${d_target_objs} cygwin-d.o"
@@ -2196,11 +2198,13 @@ x86_64-*-cygwin*)
need_64bit_isa=yes
tm_file="${tm_file} i386/unix.h i386/bsd.h i386/gas.h i386/cygming.h
i386/cygwin.h i386/cygwin-w64.h i386/cygwin-stdint.h"
tm_file="${tm_file} mingw/winnt.h"
+ tm_file="${tm_file} mingw/winnt-dll.h"
xm_file=i386/xm-cygwin.h
tmake_file="${tmake_file} mingw/t-cygming t-slibgcc"
target_gtfiles="$target_gtfiles \$(srcdir)/config/mingw/winnt.cc"
+ target_gtfiles="$target_gtfiles \$(srcdir)/config/mingw/winnt-dll.cc"
extra_options="${extra_options} mingw/cygming.opt i386/cygwin.opt"
- extra_objs="${extra_objs} winnt.o winnt-stubs.o"
+ extra_objs="${extra_objs} winnt.o winnt-stubs.o winnt-dll.o"
c_target_objs="${c_target_objs} msformat-c.o"
cxx_target_objs="${cxx_target_objs} winnt-cxx.o msformat-c.o"
d_target_objs="${d_target_objs} cygwin-d.o"
@@ -2266,6 +2270,7 @@ i[34567]86-*-mingw* |
[gcc r15-1598] Move mingw_* declarations to the mingw folder
https://gcc.gnu.org/g:104d06c028c6304edcde736bdc5fffd6aaed94e6
commit r15-1598-g104d06c028c6304edcde736bdc5fffd6aaed94e6
Author: Evgeny Karpov
Date: Sat Jun 8 13:18:02 2024 +
Move mingw_* declarations to the mingw folder
This patch refactors recent changes to move mingw-related
functionality to the mingw folder. More renamings to the mingw_ prefix
will be done in follow-up commits.
This is the first commit in the second patch series to add DLL
import/export implementation to AArch64.
Coauthors: Zac Walker ,
Mark Harmstone and
Ron Riddle
Refactored, prepared, and validated by
Radek Barton and
Evgeny Karpov
2024-06-08 Evgeny Karpov
gcc/ChangeLog:
* config.gcc: Move mingw_* declations to mingw.
* config/aarch64/aarch64-protos.h
(mingw_pe_maybe_record_exported_symbol): Likewise.
(mingw_pe_section_type_flags): Likewise.
(mingw_pe_unique_section): Likewise.
(mingw_pe_encode_section_info): Likewise.
* config/aarch64/cygming.h
(mingw_pe_asm_named_section): Likewise.
(mingw_pe_declare_function_type): Likewise.
* config/i386/i386-protos.h
(mingw_pe_unique_section): Likewise.
(mingw_pe_declare_function_type): Likewise.
(mingw_pe_maybe_record_exported_symbol): Likewise.
(mingw_pe_encode_section_info): Likewise.
(mingw_pe_section_type_flags): Likewise.
(mingw_pe_asm_named_section): Likewise.
* config/mingw/winnt.h: New file.
Diff:
---
gcc/config.gcc | 4
gcc/config/aarch64/aarch64-protos.h | 5 -
gcc/config/aarch64/cygming.h| 4
gcc/config/i386/i386-protos.h | 6 --
gcc/config/mingw/winnt.h| 33 +
5 files changed, 37 insertions(+), 15 deletions(-)
diff --git a/gcc/config.gcc b/gcc/config.gcc
index 644c456290d..5e7e6f76a7f 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -1275,6 +1275,7 @@ aarch64-*-mingw*)
tm_file="${tm_file} aarch64/cygming.h"
tm_file="${tm_file} mingw/mingw32.h"
tm_file="${tm_file} mingw/mingw-stdint.h"
+ tm_file="${tm_file} mingw/winnt.h"
tmake_file="${tmake_file} aarch64/t-aarch64"
target_gtfiles="$target_gtfiles \$(srcdir)/config/mingw/winnt.cc"
extra_options="${extra_options} mingw/cygming.opt mingw/mingw.opt"
@@ -2175,6 +2176,7 @@ i[4567]86-wrs-vxworks*|x86_64-wrs-vxworks7*)
;;
i[34567]86-*-cygwin*)
tm_file="${tm_file} i386/unix.h i386/bsd.h i386/gas.h i386/cygming.h
i386/cygwin.h i386/cygwin-stdint.h"
+ tm_file="${tm_file} mingw/winnt.h"
xm_file=i386/xm-cygwin.h
tmake_file="${tmake_file} mingw/t-cygming t-slibgcc"
target_gtfiles="$target_gtfiles \$(srcdir)/config/mingw/winnt.cc"
@@ -2193,6 +2195,7 @@ i[34567]86-*-cygwin*)
x86_64-*-cygwin*)
need_64bit_isa=yes
tm_file="${tm_file} i386/unix.h i386/bsd.h i386/gas.h i386/cygming.h
i386/cygwin.h i386/cygwin-w64.h i386/cygwin-stdint.h"
+ tm_file="${tm_file} mingw/winnt.h"
xm_file=i386/xm-cygwin.h
tmake_file="${tmake_file} mingw/t-cygming t-slibgcc"
target_gtfiles="$target_gtfiles \$(srcdir)/config/mingw/winnt.cc"
@@ -2262,6 +2265,7 @@ i[34567]86-*-mingw* | x86_64-*-mingw*)
;;
esac
tm_file="${tm_file} mingw/mingw-stdint.h"
+ tm_file="${tm_file} mingw/winnt.h"
tmake_file="${tmake_file} t-winnt mingw/t-cygming t-slibgcc"
case ${target} in
x86_64-w64-*)
diff --git a/gcc/config/aarch64/aarch64-protos.h
b/gcc/config/aarch64/aarch64-protos.h
index 1d3f94c813e..42639e9efcf 100644
--- a/gcc/config/aarch64/aarch64-protos.h
+++ b/gcc/config/aarch64/aarch64-protos.h
@@ -1110,11 +1110,6 @@ extern void aarch64_output_patchable_area (unsigned int,
bool);
extern void aarch64_adjust_reg_alloc_order ();
-extern void mingw_pe_maybe_record_exported_symbol (tree, const char *, int);
-extern unsigned int mingw_pe_section_type_flags (tree, const char *, int);
-extern void mingw_pe_unique_section (tree, int);
-extern void mingw_pe_encode_section_info (tree, rtx, int);
-
bool aarch64_optimize_mode_switching (aarch64_mode_entity);
void aarch64_restore_za (rtx);
diff --git a/gcc/config/aarch64/cygming.h b/gcc/config/aarch64/cygming.h
index 2e7b01feb76..0d048879311 100644
--- a/gcc/config/aarch64/cygming.h
+++ b/gcc/config/aarch64/cygming.h
@@ -51,10 +51,6 @@ still needed for compilation. */
#include
#endif
-extern void mingw_pe_asm_named_section (const char *, unsigned int, tree);
-extern void mingw_pe_declare_function_type (FILE *file, const char *name,
- int pub);
-
#define TARGET_ASM_NAMED_SECTION mingw_pe_asm_named_section
/* Select attributes for named sections. */
diff --git
Re: [PATCH v3] [testsuite] [arm] [vect] adjust mve-vshr test [PR113281]
On Fri, 21 Jun 2024 at 12:14, Richard Earnshaw (lists)
wrote:
>
> On 21/06/2024 08:57, Alexandre Oliva wrote:
> > On Jun 20, 2024, Christophe Lyon wrote:
> >
> >> Maybe using
> >> if ((unsigned)b[i] >= BITS) \
> >> would be clearer?
> >
> > Heh. Why make it simpler if we can make it unreadable, right? :-D
> >
> > Thanks, here's another version I've just retested on x-arm-eabi. Ok?
> >
> > I'm not sure how to credit your suggestion. It's not like you pretty
> > much wrote the entire patch, as in Richard's case, but it's still a
> > sizable chunk of this two-liner. Any preferences?
>
> How about mentioning Christophe's simplification in the commit log?
For the avoidance of doubt: it's OK for me (but you don't need to
mention my name in fact ;-)
Thanks,
Christophe
> >
> >
> > The test was too optimistic, alas. We used to vectorize shifts
> > involving 8-bit and 16-bit integral types by clamping the shift count
> > at the highest in-range shift count, but that was not correct: such
> > narrow shifts expect integral promotion, so larger shift counts should
> > be accepted. (int16_t)32768 >> (int16_t)16 must yield 0, not 1 (as
> > before the fix).
>
> This is OK, but you might wish to revisit this statement before committing.
> I think the above is a mis-summary of the original bug report which had a
> test to pick between 0 and 1 as the result of a shift operation.
>
> If I've understood what's going on here correctly, then we have
>
> (int16_t)32768 >> (int16_t) 16
>
> but shift is always done at int precision, so this is (due to default
> promotions)
>
> (int)(int16_t)32768 >> 16 // size/type of the shift amount does not matter.
>
> which then simplifies to
>
> -32768 >> 16; // 0x8000 >> 16
>
> = -1;
>
> I think the original bug was that we were losing the cast to short (and hence
> the sign extension of the intermediate value), so effectively we simplified
> this to
>
> 32768 >> 16; // 0x8000 >> 16
>
> = 0;
>
> And the other part of the observation was that it had to be done this way
> (and couldn't be narrowed for vectorization) because 16 is larger than the
> maximum shift for a short (actually you say that just below).
>
> R.
>
> >
> > Unfortunately, in the gimple model of vector units, such large shift
> > counts wouldn't be well-defined, so we won't vectorize such shifts any
> > more, unless we can tell they're in range or undefined.
> >
> > So the test that expected the incorrect clamping we no longer perform
> > needs to be adjusted. Instead of nobbling the test, Richard Earnshaw
> > suggested annotating the test with the expected ranges so as to enable
> > the optimization.
> >
> >
> > Co-Authored-By: Richard Earnshaw
> >
> > for gcc/testsuite/ChangeLog
> >
> > PR tree-optimization/113281
> > * gcc.target/arm/simd/mve-vshr.c: Add expected ranges.
> > ---
> > gcc/testsuite/gcc.target/arm/simd/mve-vshr.c |2 ++
> > 1 file changed, 2 insertions(+)
> >
> > diff --git a/gcc/testsuite/gcc.target/arm/simd/mve-vshr.c
> > b/gcc/testsuite/gcc.target/arm/simd/mve-vshr.c
> > index 8c7adef9ed8f1..03078de49c65e 100644
> > --- a/gcc/testsuite/gcc.target/arm/simd/mve-vshr.c
> > +++ b/gcc/testsuite/gcc.target/arm/simd/mve-vshr.c
> > @@ -9,6 +9,8 @@
> >void test_ ## NAME ##_ ## SIGN ## BITS ## x ## NB (TYPE##BITS##_t *
> > __restrict__ dest, TYPE##BITS##_t *a, TYPE##BITS##_t *b) { \
> > int i; \
> > for (i=0; i > + if ((unsigned)b[i] >= (unsigned)(BITS))
> > \
> > + __builtin_unreachable();\
> >dest[i] = a[i] OP b[i];
> > \
> > }
> > \
> > }
> >
> >
>
Re: [PATCH v2] [testsuite] [arm] [vect] adjust mve-vshr test [PR113281]
Hi,
On Thu, 20 Jun 2024 at 12:51, Alexandre Oliva wrote:
>
> On Jun 19, 2024, "Richard Earnshaw (lists)" wrote:
>
> > It looks like adding
>
> > if ((unsigned)b[i] >= 8*sizeof (TYPE##BITS##_t)) \
> > __builtin_unreachable(); \
>
> Ah, yes, nice, good idea, thanks!
>
> Here's the patch that implements that, co-attributed to you, as IMHO it
> should be; please let me know if you find otherwise. The commit message
> is mostly unchanged from v1, except for the very end. Tested on
> x86_64-linux-gnu-x-arm-eabi. Ok to install?
>
>
> The test was too optimistic, alas. We used to vectorize shifts
> involving 8-bit and 16-bit integral types by clamping the shift count
> at the highest in-range shift count, but that was not correct: such
> narrow shifts expect integral promotion, so larger shift counts should
> be accepted. (int16_t)32768 >> (int16_t)16 must yield 0, not 1 (as
> before the fix).
>
> Unfortunately, in the gimple model of vector units, such large shift
> counts wouldn't be well-defined, so we won't vectorize such shifts any
> more, unless we can tell they're in range or undefined.
>
> So the test that expected the incorrect clamping we no longer perform
> needs to be adjusted. Instead of nobbling the test, Richard Earnshaw
> suggested annotating the test with the expected ranges so as to enable
> the optimization.
>
>
> Co-Authored-By: Richard Earnshaw
>
> for gcc/testsuite/ChangeLog
>
> PR tree-optimization/113281
> * gcc.target/arm/simd/mve-vshr.c: Add expected ranges.
> ---
> gcc/testsuite/gcc.target/arm/simd/mve-vshr.c |2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/gcc/testsuite/gcc.target/arm/simd/mve-vshr.c
> b/gcc/testsuite/gcc.target/arm/simd/mve-vshr.c
> index 8c7adef9ed8f1..35cd0e75be5dc 100644
> --- a/gcc/testsuite/gcc.target/arm/simd/mve-vshr.c
> +++ b/gcc/testsuite/gcc.target/arm/simd/mve-vshr.c
> @@ -9,6 +9,8 @@
>void test_ ## NAME ##_ ## SIGN ## BITS ## x ## NB (TYPE##BITS##_t *
> __restrict__ dest, TYPE##BITS##_t *a, TYPE##BITS##_t *b) { \
> int i; \
> for (i=0; i + if ((unsigned)b[i] >= __CHAR_BIT__ * sizeof (TYPE##BITS##_t))\
Maybe using
if ((unsigned)b[i] >= BITS) \
would be clearer?
Thanks,
Christophe
> + __builtin_unreachable();\
>dest[i] = a[i] OP b[i]; \
> } \
> }
>
>
> --
> Alexandre Oliva, happy hackerhttps://FSFLA.org/blogs/lxo/
>Free Software Activist GNU Toolchain Engineer
> More tolerance and less prejudice are key for inclusion and diversity
> Excluding neuro-others for not behaving ""normal"" is *not* inclusive
Re: [PATCH] arm: Zero/Sign extends for CMSE security on Armv8-M.baseline
Hi Torbjörn!
On Thu, 6 Jun 2024 at 18:47, Torbjörn SVENSSON
wrote:
>
> I would like to push this patch to the following branches:
>
> - releases/gcc-11
> - releases/gcc-12
> - releases/gcc-13
> - releases/gcc-14
> - trunk
>
> Ok?
>
> The problem was highlighted by https://linaro.atlassian.net/browse/GNU-1239
>
> --
>
> Properly handle zero and sign extension for Armv8-M.baseline as
> Cortex-M23 can have the security extension active.
> Currently, there is a internal compiler error on Cortex-M23 for the
> epilog processing of sign extension.
>
> This patch addresses the following CVE-2024-0151 for Armv8-M.baseline.
>
> gcc/ChangeLog:
>
> * config/arm/arm.cc (cmse_nonsecure_call_inline_register_clear):
> Sign extend for Thumb1.
> (thumb1_expand_prologue): Add zero/sign extend.
Quick nitpicking: I think the ICE you are fixing was reported as
https://linaro.atlassian.net/browse/GNU-1205
(GNU-1239 is about your test improvements failing too, in addition to
the existing ones)
and your patch is actually about fixing GCC bug report 115253.
So your commit title should end with "[PR115253]" (or maybe "PR target/115253")
and your ChangeLog should also contain "PR target/115253".
You can use contrib/git_check_commit.py to check your patch is
correctly formatted (otherwise it will be rejected by the commit hooks
anyway).
I haven't looked into the details of the patch yet :-)
Thanks for looking at this,
Christophe
>
> Signed-off-by: Torbjörn SVENSSON
> Co-authored-by: Yvan ROUX
> ---
> gcc/config/arm/arm.cc | 68 ++-
> 1 file changed, 60 insertions(+), 8 deletions(-)
>
> diff --git a/gcc/config/arm/arm.cc b/gcc/config/arm/arm.cc
> index ea0c963a4d6..077cb61f42a 100644
> --- a/gcc/config/arm/arm.cc
> +++ b/gcc/config/arm/arm.cc
> @@ -19220,17 +19220,23 @@ cmse_nonsecure_call_inline_register_clear (void)
> || TREE_CODE (ret_type) == BOOLEAN_TYPE)
> && known_lt (GET_MODE_SIZE (TYPE_MODE (ret_type)), 4))
> {
> - machine_mode ret_mode = TYPE_MODE (ret_type);
> + rtx ret_mode = gen_rtx_REG (TYPE_MODE (ret_type), R0_REGNUM);
> + rtx si_mode = gen_rtx_REG (SImode, R0_REGNUM);
> rtx extend;
> if (TYPE_UNSIGNED (ret_type))
> - extend = gen_rtx_ZERO_EXTEND (SImode,
> - gen_rtx_REG (ret_mode,
> R0_REGNUM));
> + extend = gen_rtx_SET (si_mode, gen_rtx_ZERO_EXTEND (SImode,
> +
> ret_mode));
> + else if (TARGET_THUMB1)
> + {
> + if (known_lt (GET_MODE_SIZE (TYPE_MODE (ret_type)), 2))
> + extend = gen_thumb1_extendqisi2 (si_mode, ret_mode);
> + else
> + extend = gen_thumb1_extendhisi2 (si_mode, ret_mode);
> + }
> else
> - extend = gen_rtx_SIGN_EXTEND (SImode,
> - gen_rtx_REG (ret_mode,
> R0_REGNUM));
> - emit_insn_after (gen_rtx_SET (gen_rtx_REG (SImode, R0_REGNUM),
> -extend), insn);
> -
> + extend = gen_rtx_SET (si_mode, gen_rtx_SIGN_EXTEND (SImode,
> +
> ret_mode));
> + emit_insn_after (extend, insn);
> }
>
>
> @@ -27250,6 +27256,52 @@ thumb1_expand_prologue (void)
>live_regs_mask = offsets->saved_regs_mask;
>lr_needs_saving = live_regs_mask & (1 << LR_REGNUM);
>
> + /* The AAPCS requires the callee to widen integral types narrower
> + than 32 bits to the full width of the register; but when handling
> + calls to non-secure space, we cannot trust the callee to have
> + correctly done so. So forcibly re-widen the result here. */
> + if (IS_CMSE_ENTRY (func_type))
> +{
> + function_args_iterator args_iter;
> + CUMULATIVE_ARGS args_so_far_v;
> + cumulative_args_t args_so_far;
> + bool first_param = true;
> + tree arg_type;
> + tree fndecl = current_function_decl;
> + tree fntype = TREE_TYPE (fndecl);
> + arm_init_cumulative_args (_so_far_v, fntype, NULL_RTX, fndecl);
> + args_so_far = pack_cumulative_args (_so_far_v);
> + FOREACH_FUNCTION_ARGS (fntype, arg_type, args_iter)
> + {
> + rtx arg_rtx;
> +
> + if (VOID_TYPE_P (arg_type))
> + break;
> +
> + function_arg_info arg (arg_type, /*named=*/true);
> + if (!first_param)
> + /* We should advance after processing the argument and pass
> + the argument we're advancing past. */
> + arm_function_arg_advance (args_so_far, arg);
> + first_param = false;
> + arg_rtx = arm_function_arg (args_so_far, arg);
> + gcc_assert (REG_P (arg_rtx));
> + if ((TREE_CODE
Re: [PATCH] Arm: Fix disassembly error in Thumb-1 relaxed load/store [PR115188]
Hi Wilco,
On 6/3/24 15:42, Wilco Dijkstra wrote:
A Thumb-1 memory operand allows single-register LDMIA/STMIA. This doesn't get
printed as LDR/STR with writeback in unified syntax, resulting in strange
assembler errors if writeback is selected. To work around this, use the 'Uw'
constraint that blocks writeback.
Passes bootstrap & regress, OK for commit?
gcc:
PR target/115153
I guess this is typo (should be 115188) ?
* config/arm/sync.md (arm_atomic_load): Use 'Uw' constraint.
(arm_atomic_store): Likewise.
gcc/testsuite:
PR target/115188
* gcc.target/arm/pr115188.c: Add new test.
---
diff --git a/gcc/config/arm/sync.md b/gcc/config/arm/sync.md
index
df8dbe170cacb6b60d56a6f19aadd5a6c9c51f7a..e856ee51d9ae7b945c4d1e9d1f08afeedc95707a
100644
--- a/gcc/config/arm/sync.md
+++ b/gcc/config/arm/sync.md
@@ -65,7 +65,7 @@
(define_insn "arm_atomic_load"
[(set (match_operand:QHSI 0 "register_operand" "=r,l")
(unspec_volatile:QHSI
- [(match_operand:QHSI 1 "memory_operand" "m,m")]
+ [(match_operand:QHSI 1 "memory_operand" "m,Uw")]
VUNSPEC_LDR))]
""
"ldr\t%0, %1"
@@ -81,7 +81,7 @@
)
(define_insn "arm_atomic_store"
- [(set (match_operand:QHSI 0 "memory_operand" "=m,m")
+ [(set (match_operand:QHSI 0 "memory_operand" "=m,Uw")
(unspec_volatile:QHSI
[(match_operand:QHSI 1 "register_operand" "r,l")]
VUNSPEC_STR))]
diff --git a/gcc/testsuite/gcc.target/arm/pr115188.c
b/gcc/testsuite/gcc.target/arm/pr115188.c
new file mode 100644
index
..ef40d7732b77936c845707989465a01ecca5adb0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/pr115188.c
@@ -0,0 +1,10 @@
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_arch_v6m_ok }
+/* { dg-options "-O2 -mthumb" } */-mthumb is included in arm_arch_v6m, so I think you don't need to add it
here?
Thanks,
Christophe
+/* { dg-add-options arm_arch_v6m } */
+
+void init (int *p, int n)
+{
+ for (int i = 0; i < n; i++)
+__atomic_store_4 (p + i, 0, __ATOMIC_RELAXED);
+}
Re: [Linaro-TCWG-CI] gcc-15-168-g21e7aa5f3ea: FAIL: 6 regressions on aarch64
Hi Harald, On Mon, 6 May 2024 at 21:02, wrote: > > Dear contributor, our automatic CI has detected problems related to your > patch(es). Please find some details below. If you have any questions, > please follow up on linaro-toolch...@lists.linaro.org mailing list, Libera's > #linaro-tcwg channel, or ping your favourite Linaro toolchain developer on > the usual project channel. > > We appreciate that it might be difficult to find the necessary logs or > reproduce the issue locally. If you can't get what you need from our CI > within minutes, let us know and we will be happy to help. > > We track this report status in https://linaro.atlassian.net/browse/GNU-1214 , > please let us know if you are looking at the problem and/or when you have a > fix. > > In master-aarch64 after: > > | commit gcc-15-168-g21e7aa5f3ea > | Author: Harald Anlauf > | Date: Mon Apr 29 19:52:52 2024 +0200 > | > | Fortran: fix issues with class(*) assignment [PR114827] > | > | gcc/fortran/ChangeLog: > | > | PR fortran/114827 > | * trans-array.cc (gfc_alloc_allocatable_for_assignment): Take > into > | account _len of unlimited polymorphic entities when > calculating > | ... 9 lines of the commit log omitted. > > FAIL: 6 regressions > > regressions.sum: > === gfortran tests === > > Running gfortran:gfortran.dg/asan/asan.exp ... > FAIL: gfortran.dg/asan/unlimited_polymorphic_34.f90 -fsanitize=address -O0 > execution test > FAIL: gfortran.dg/asan/unlimited_polymorphic_34.f90 -fsanitize=address -O1 > execution test > FAIL: gfortran.dg/asan/unlimited_polymorphic_34.f90 -fsanitize=address -O2 > execution test > FAIL: gfortran.dg/asan/unlimited_polymorphic_34.f90 -fsanitize=address -O3 > -fomit-frame-pointer -funroll-loops -fpeel-loops -ftracer -finline-functions > execution test > FAIL: gfortran.dg/asan/unlimited_polymorphic_34.f90 -fsanitize=address -O3 > -g execution test > FAIL: gfortran.dg/asan/unlimited_polymorphic_34.f90 -fsanitize=address -Os > execution test > > > You can find the failure logs in *.log.1.xz files in > - > https://ci.linaro.org/job/tcwg_gnu_cross_check_gcc--master-aarch64-build/1426/artifact/artifacts/00-sumfiles/ > The full lists of regressions and progressions as well as configure and make > commands are in > - > https://ci.linaro.org/job/tcwg_gnu_cross_check_gcc--master-aarch64-build/1426/artifact/artifacts/notify/ > The list of [ignored] baseline and flaky failures are in > - > https://ci.linaro.org/job/tcwg_gnu_cross_check_gcc--master-aarch64-build/1426/artifact/artifacts/sumfiles/xfails.xfail > > The configuration of this build is: > CI config tcwg_gnu_cross_check_gcc master-aarch64 Sorry for the delay in coming back to you regarding this notification. You can consider this as a false alarm, caused by the fact that the above configurations use QEMU, which is not (currently) compatible with LSAN (which is enabled by ASAN). We are working on a fix in our testing framework to avoid such issues in the future. Thanks, Christophe > > -8<--8<--8<-- > The information below can be used to reproduce a debug environment: > > Current build : > https://ci.linaro.org/job/tcwg_gnu_cross_check_gcc--master-aarch64-build/1426/artifact/artifacts > Reference build : > https://ci.linaro.org/job/tcwg_gnu_cross_check_gcc--master-aarch64-build/1425/artifact/artifacts > > Reproduce last good and first bad builds: > https://git-us.linaro.org/toolchain/ci/interesting-commits.git/plain/gcc/sha1/21e7aa5f3ea44ca2fef8deb8788edffc04901b5c/tcwg_gnu_cross_check_gcc/master-aarch64/reproduction_instructions.txt > > Full commit : > https://github.com/gcc-mirror/gcc/commit/21e7aa5f3ea44ca2fef8deb8788edffc04901b5c > > List of configurations that regressed due to this commit : > * tcwg_gnu_cross_check_gcc > ** master-aarch64 > *** FAIL: 6 regressions > *** > https://git-us.linaro.org/toolchain/ci/interesting-commits.git/plain/gcc/sha1/21e7aa5f3ea44ca2fef8deb8788edffc04901b5c/tcwg_gnu_cross_check_gcc/master-aarch64/details.txt > *** > https://ci.linaro.org/job/tcwg_gnu_cross_check_gcc--master-aarch64-build/1426/artifact/artifacts
Re: [PATCH] wwwdocs: contribute.html: Update consensus on patch content.
On Mon, 20 May 2024 at 15:23, Nick Clifton wrote: > > Hi Christophe, > > > I have a follow-up one: I think the same applies to binutils, but I > > don't think any maintainer / contributor expressed an opinion, and > > IIUC patch policy for binutils is (lightly) documented at > > https://sourceware.org/binutils/wiki/HowToContribute > > Maybe Nick can update it? > > Done. Thanks! > > > (I don't have such rights) > > Would you like them ? It is easy enough to set up. > No need to bother :-) Christophe > Cheers >Nick > >
Re: [PATCH] [testsuite] conditionalize dg-additional-sources on target and type
Hi Alexandre,
On Thu, 23 May 2024 at 15:29, Alexandre Oliva wrote:
>
> On Apr 30, 2024, Christophe Lyon wrote:
>
> > On Tue, 30 Apr 2024 at 01:31, Alexandre Oliva wrote:
> >> >> for gcc/testsuite/ChangeLog
> >> >>
> >> >> * lib/target-supports.exp (check_vect_support_and_set_flags):
> >> >> Decay to link rather than compile.
> >>
> >> Alas, linking may fail because of an incompatible libc, as reported by
> >> Linaro with a link to their issue GNU-1206 (I'm not posting the link to
> >> the fully-Javascrippled Jira web page; it shows nothing useful, and I
> >> can't post feedback there) and to
> >> https://ci.linaro.org/job/tcwg_gnu_embed_check_gcc--master-thumb_m7_hard_eabi-build/10/artifact/artifacts/00-sumfiles/
> >> (where I could get useful information)
> >>
> >> I'm reverting the patch, and I'll see about some alternate approach
>
> > Indeed, that's another instance of the tricky multilibs configuration
> > issues.
>
> > - we run the tests with
> > qemu/-mthumb/-march=armv7e-m+fp.dp/-mtune=cortex-m7/-mfloat-abi=hard/-mfpu=auto
> > which matches the GCC configuration flags,
> > but the vect.exp tests add -mfpu=neon -mfloat-abi=softfp -march=armv7-a
> > and link fails because the toolchain does not support softfp libs
>
> Hello, Christophe, thanks for the info.
>
> I came up with an entirely different approach:
>
>
> g++.dg/vect/pr95401.cc has dg-additional-sources, and that fails when
> check_vect_support_and_set_flags finds vector support lacking for
> execution tests: tests decay to compile tests, and additional sources
> are rejected by the compiler when compiling to a named output file.
>
> At first I considered using some effective target to conditionalize
> the additional sources. There was no support for target-specific
> additional sources, so I added that.
>
> But then, I found that adding an effective target to check whether the
> test involves linking would just make for busy work in this case, and
> so I went ahead and adjusted the handling of additional sources to
> refrain from adding them on compile tests, reporting them as
> unsupported.
>
> That solves the problem without using the newly-added machinery for
> per-target additional sources, but I figured since I'd implemented it
> I might as well contribute it, since there might be other uses for it.
Thanks for improving this, LGTM at quick glance, but I can't approve :-)
Christophe
>
> Regstrapped on x86_64-linux-gnu. Also tested on ppc64-vx7r2 with
> gcc-13. Ok to install?
>
>
> for gcc/ChangeLog
>
> * doc/sourcebuild.texi (dg-additional-sources): Document
> newly-added support for target selectors, and implicit discard
> on non-linking tests that name the compiler output explicitly.
>
> for gcc/testsuite/ChangeLog
>
> * lib/gcc-defs.exp (dg-additional-sources): Support target
> selectors. Make it cumulative.
> (dg-additional-files-options): Take dest and type. Note
> unsupported additional sources when not linking and naming the
> compiler output. Adjust source dirname prepending to cope
> with leading blanks.
> * lib/g++.exp (g++_target_compile): Pass dest and type on to
> dg-additional-files-options.
> * lib/gcc.exp (gcc_target_compile): Likewise.
> * lib/gdc.exp (gdb_target_compile): Likewise.
> * lib/gfortran.exp (gfortran_target_compile): Likewise.
> * lib/go.exp (go_target_compile): Likewise.
> * lib/obj-c++.exp (obj-c++_target_compile): Likewise.
> * lib/objc.exp (objc_target_compile): Likewise.
> * lib/rust.exp (rust_target_compile): Likewise.
> * lib/profopt.exp (profopt-execute): Likewise-ish.
> ---
> gcc/doc/sourcebuild.texi |8 +++-
> gcc/testsuite/lib/g++.exp |2 +-
> gcc/testsuite/lib/gcc-defs.exp | 35 ++-
> gcc/testsuite/lib/gcc.exp |2 +-
> gcc/testsuite/lib/gdc.exp |2 +-
> gcc/testsuite/lib/gfortran.exp |2 +-
> gcc/testsuite/lib/go.exp |2 +-
> gcc/testsuite/lib/obj-c++.exp |2 +-
> gcc/testsuite/lib/objc.exp |2 +-
> gcc/testsuite/lib/profopt.exp |2 +-
> gcc/testsuite/lib/rust.exp |2 +-
> 11 files changed, 46 insertions(+), 15 deletions(-)
>
> diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi
> index 8e4e59ac44c74..e997dbec3334b 100644
> --- a/gcc/doc/sourcebuild.texi
> +++ b/gcc/doc/sourcebuild.texi
> @@ -1320,9 +1320,15 @@ to @var{var_value} before execution of the program
> created by the test
Re: [COMMITTED] Regenerate cygming.opt.urls and mingw.opt.urls
Thank you Mark and sorry for missing this during the reviews.
Christophe
Le dim. 12 mai 2024, 14:54, Mark Wielaard a écrit :
> The new cygming.opt.urls and mingw.opt.urls in the
> gcc/config/mingw/cygming.opt.urls directory need to generated by make
> regenerate-opt-urls in the gcc subdirectory. They still contained
> references to the gcc/config/i386 directory from which they were
> copied.
>
> Fixes: 1f05dfc131c7 ("Reuse MinGW from i386 for AArch64")
> Fixes: e8d003736e6c ("Rename "x86 Windows Options" to "Cygwin and MinGW
> Options"")
>
> gcc/ChangeLog:
>
> * config/mingw/cygming.opt.urls: Regenerate.
> * config/mingw/mingw.opt.urls: Likewise.
> ---
> gcc/config/mingw/cygming.opt.urls | 7 +++
> gcc/config/mingw/mingw.opt.urls | 2 +-
> 2 files changed, 4 insertions(+), 5 deletions(-)
>
> diff --git a/gcc/config/mingw/cygming.opt.urls
> b/gcc/config/mingw/cygming.opt.urls
> index c624e22e4427..af11c4997609 100644
> --- a/gcc/config/mingw/cygming.opt.urls
> +++ b/gcc/config/mingw/cygming.opt.urls
> @@ -1,4 +1,4 @@
> -; Autogenerated by regenerate-opt-urls.py from
> gcc/config/i386/cygming.opt and generated HTML
> +; Autogenerated by regenerate-opt-urls.py from
> gcc/config/mingw/cygming.opt and generated HTML
>
> mconsole
> UrlSuffix(gcc/Cygwin-and-MinGW-Options.html#index-mconsole)
> @@ -9,9 +9,8 @@ UrlSuffix(gcc/Cygwin-and-MinGW-Options.html#index-mdll)
> mnop-fun-dllimport
> UrlSuffix(gcc/Cygwin-and-MinGW-Options.html#index-mnop-fun-dllimport)
>
> -; skipping UrlSuffix for 'mthreads' due to multiple URLs:
> -; duplicate: 'gcc/Cygwin-and-MinGW-Options.html#index-mthreads-1'
> -; duplicate: 'gcc/x86-Options.html#index-mthreads'
> +mthreads
> +UrlSuffix(gcc/Cygwin-and-MinGW-Options.html#index-mthreads-1)
>
> mwin32
> UrlSuffix(gcc/Cygwin-and-MinGW-Options.html#index-mwin32)
> diff --git a/gcc/config/mingw/mingw.opt.urls
> b/gcc/config/mingw/mingw.opt.urls
> index f8ee5be6a535..40fb086606b2 100644
> --- a/gcc/config/mingw/mingw.opt.urls
> +++ b/gcc/config/mingw/mingw.opt.urls
> @@ -1,4 +1,4 @@
> -; Autogenerated by regenerate-opt-urls.py from gcc/config/i386/mingw.opt
> and generated HTML
> +; Autogenerated by regenerate-opt-urls.py from gcc/config/mingw/mingw.opt
> and generated HTML
>
> mcrtdll=
> UrlSuffix(gcc/Cygwin-and-MinGW-Options.html#index-mcrtdll)
> --
> 2.39.3
>
>
[PATCH v2] arm: [MVE intrinsics] Fix support for predicate constants [PR target/114801]
In this PR, we have to handle a case where MVE predicates are supplied
as a const_int, where individual predicates have illegal boolean
values (such as 0xc for a 4-bit boolean predicate). To avoid the ICE,
we hide the constant behind an unspec.
On MVE V8BI and V4BI multi-bit masks are interpreted byte-by-byte at
instruction level, see
https://developer.arm.com/documentation/101028/0012/14--M-profile-Vector-Extension--MVE--intrinsics.
This is a workaround until we change such predicates representation to
V16BImode.
2024-05-06 Christophe Lyon
Jakub Jelinek
PR target/114801
gcc/
* config/arm/arm-mve-builtins.cc
(function_expander::add_input_operand): Handle CONST_INT
predicates.
* mve.md (set_mve_const_pred): New pattern.
* unspec.md (MVE_PRED): New unspec.
gcc/testsuite/
* gcc.target/arm/mve/pr114801.c: New test.
---
gcc/config/arm/arm-mve-builtins.cc | 27 ++-
gcc/config/arm/mve.md | 12 +++
gcc/config/arm/unspecs.md | 1 +
gcc/testsuite/gcc.target/arm/mve/pr114801.c | 37 +
4 files changed, 76 insertions(+), 1 deletion(-)
create mode 100644 gcc/testsuite/gcc.target/arm/mve/pr114801.c
diff --git a/gcc/config/arm/arm-mve-builtins.cc
b/gcc/config/arm/arm-mve-builtins.cc
index 6a5775c67e5..7d5af649857 100644
--- a/gcc/config/arm/arm-mve-builtins.cc
+++ b/gcc/config/arm/arm-mve-builtins.cc
@@ -2205,7 +2205,32 @@ function_expander::add_input_operand (insn_code icode,
rtx x)
mode = GET_MODE (x);
}
else if (VALID_MVE_PRED_MODE (mode))
-x = gen_lowpart (mode, x);
+{
+ if (CONST_INT_P (x) && (mode == V8BImode || mode == V4BImode))
+ {
+ /* In V8BI or V4BI each element has 2 or 4 bits, if those
+bits aren't all the same, gen_lowpart might ICE. Hide
+the move behind an unspec to avoid this.
+V8BI and V4BI multi-bit masks are interpreted
+byte-by-byte at instruction level, see
+
https://developer.arm.com/documentation/101028/0012/14--M-profile-Vector-Extension--MVE--intrinsics.
*/
+ unsigned HOST_WIDE_INT xi = UINTVAL (x);
+ if ((xi & 0x) != ((xi >> 1) & 0x)
+ || (mode == V4BImode
+ && (xi & 0x) != ((xi >> 2) & 0x)))
+ {
+ rtx unspec_x;
+ unspec_x = gen_rtx_UNSPEC (HImode, gen_rtvec (1, x), MVE_PRED);
+ x = force_reg (HImode, unspec_x);
+ }
+
+ }
+ else if (SUBREG_P (x))
+ /* gen_lowpart on a SUBREG can ICE. */
+ x = force_reg (GET_MODE (x), x);
+
+ x = gen_lowpart (mode, x);
+}
m_ops.safe_grow (m_ops.length () + 1, true);
create_input_operand (_ops.last (), x, mode);
diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md
index 35916f62604..d337422d695 100644
--- a/gcc/config/arm/mve.md
+++ b/gcc/config/arm/mve.md
@@ -6621,3 +6621,15 @@ (define_expand "@arm_mve_reinterpret"
}
}
)
+
+;; Hide predicate constants from optimizers
+(define_insn "set_mve_const_pred"
+ [(set
+ (match_operand:HI 0 "s_register_operand" "=r")
+ (unspec:HI [(match_operand:HI 1 "general_operand" "n")] MVE_PRED))]
+ "TARGET_HAVE_MVE"
+{
+return "movw%?\t%0, %L1\t%@ set_mve_const_pred";
+}
+ [(set_attr "type" "mov_imm")]
+)
diff --git a/gcc/config/arm/unspecs.md b/gcc/config/arm/unspecs.md
index 4713ec840ab..336f2fe08e6 100644
--- a/gcc/config/arm/unspecs.md
+++ b/gcc/config/arm/unspecs.md
@@ -1256,4 +1256,5 @@ (define_c_enum "unspec" [
SQRSHRL_48
VSHLCQ_M_
REINTERPRET
+ MVE_PRED
])
diff --git a/gcc/testsuite/gcc.target/arm/mve/pr114801.c
b/gcc/testsuite/gcc.target/arm/mve/pr114801.c
new file mode 100644
index 000..fb3e4d855f9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/mve/pr114801.c
@@ -0,0 +1,37 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_v8_1m_mve_ok } */
+/* { dg-options "-O2" } */
+/* { dg-add-options arm_v8_1m_mve } */
+/* { dg-final { check-function-bodies "**" "" "" } } */
+
+#include
+
+/*
+** test_32:
+**...
+** movwr[0-9]+, 52428 @ set_mve_const_pred
+**...
+*/
+uint32x4_t test_32() {
+ return vdupq_m_n_u32(vdupq_n_u32(0x), 0, 0x);
+}
+
+/*
+** test_16:
+**...
+** movwr[0-9]+, 6927 @ set_mve_const_pred
+**...
+*/
+uint16x8_t test_16() {
+ return vdupq_m_n_u16(vdupq_n_u16(0x), 0, 0x1b0f);
+}
+
+/*
+** test_8:
+**...
+** mov r[0-9]+, #23055 @ movhi
+**...
+*/
+uint8x16_t test_8() {
+ return vdupq_m_n_u8(vdupq_n_u8(0xff), 0, 0x5a0f);
+}
--
2.34.1
Re: [PATCH v3 00/12] Add aarch64-w64-mingw32 target
Hi,
I've just pushed this patch series, congratulations!
Thanks,
Christophe
On Thu, 11 Apr 2024 at 15:40, Evgeny Karpov wrote:
>
> Hello,
>
> Thank you for reviewing v2!
> v3 addresses all comments on v2.
>
> v3 Changes:
> - Exclude the aarch64_calling_abi declaration from the patch series.
> - Refactor x18 adjustment for MS ABI.
> - Remove unnecessary headers.
> - Add an extra comment to explain empty definitions.
> - Use gcc_unreachable for definitions that are needed for compilation,
> but not used by the aarch64-w64-mingw32 target.
> - Retain old index entries.
> - Rebase from 11th April 2024
>
> Regards,
> Evgeny
>
>
> Zac Walker (12):
> Introduce aarch64-w64-mingw32 target
> aarch64: Mark x18 register as a fixed register for MS ABI
> aarch64: Add aarch64-w64-mingw32 COFF
> Reuse MinGW from i386 for AArch64
> Rename section and encoding functions from i386 which will be used in
> aarch64
> Exclude i386 functionality from aarch64 build
> aarch64: Add Cygwin and MinGW environments for AArch64
> aarch64: Add SEH to machine_function
> Rename "x86 Windows Options" to "Cygwin and MinGW Options"
> aarch64: Build and add objects for Cygwin and MinGW for AArch64
> aarch64: Add aarch64-w64-mingw32 target to libatomic
> Add aarch64-w64-mingw32 target to libgcc
>
> fixincludes/mkfixinc.sh | 3 +-
> gcc/config.gcc| 47 +++--
> gcc/config/aarch64/aarch64-abi-ms.h | 34
> gcc/config/aarch64/aarch64-coff.h | 91 +
> gcc/config/aarch64/aarch64-protos.h | 5 +
> gcc/config/aarch64/aarch64.h | 13 +-
> gcc/config/aarch64/cygming.h | 172 ++
> gcc/config/i386/cygming.h | 18 +-
> gcc/config/i386/cygming.opt.urls | 30 ---
> gcc/config/i386/i386-protos.h | 12 +-
> gcc/config/i386/mingw-w64.opt.urls| 2 +-
> gcc/config/lynx.opt.urls | 2 +-
> gcc/config/{i386 => mingw}/cygming.opt| 0
> gcc/config/mingw/cygming.opt.urls | 30 +++
> gcc/config/{i386 => mingw}/cygwin-d.cc| 0
> gcc/config/{i386 => mingw}/mingw-stdint.h | 9 +-
> gcc/config/{i386 => mingw}/mingw.opt | 0
> gcc/config/{i386 => mingw}/mingw.opt.urls | 2 +-
> gcc/config/{i386 => mingw}/mingw32.h | 4 +-
> gcc/config/{i386 => mingw}/msformat-c.cc | 0
> gcc/config/{i386 => mingw}/t-cygming | 23 ++-
> gcc/config/{i386 => mingw}/winnt-cxx.cc | 0
> gcc/config/{i386 => mingw}/winnt-d.cc | 0
> gcc/config/{i386 => mingw}/winnt-stubs.cc | 0
> gcc/config/{i386 => mingw}/winnt.cc | 30 +--
> gcc/doc/invoke.texi | 10 +
> gcc/varasm.cc | 2 +-
> libatomic/configure.tgt | 2 +-
> libgcc/config.host| 23 ++-
> libgcc/config/aarch64/t-no-eh | 2 +
> libgcc/config/{i386 => mingw}/t-gthr-win32| 0
> libgcc/config/{i386 => mingw}/t-mingw-pthread | 0
> 32 files changed, 473 insertions(+), 93 deletions(-)
> create mode 100644 gcc/config/aarch64/aarch64-abi-ms.h
> create mode 100644 gcc/config/aarch64/aarch64-coff.h
> create mode 100644 gcc/config/aarch64/cygming.h
> delete mode 100644 gcc/config/i386/cygming.opt.urls
> rename gcc/config/{i386 => mingw}/cygming.opt (100%)
> create mode 100644 gcc/config/mingw/cygming.opt.urls
> rename gcc/config/{i386 => mingw}/cygwin-d.cc (100%)
> rename gcc/config/{i386 => mingw}/mingw-stdint.h (86%)
> rename gcc/config/{i386 => mingw}/mingw.opt (100%)
> rename gcc/config/{i386 => mingw}/mingw.opt.urls (86%)
> rename gcc/config/{i386 => mingw}/mingw32.h (99%)
> rename gcc/config/{i386 => mingw}/msformat-c.cc (100%)
> rename gcc/config/{i386 => mingw}/t-cygming (73%)
> rename gcc/config/{i386 => mingw}/winnt-cxx.cc (100%)
> rename gcc/config/{i386 => mingw}/winnt-d.cc (100%)
> rename gcc/config/{i386 => mingw}/winnt-stubs.cc (100%)
> rename gcc/config/{i386 => mingw}/winnt.cc (97%)
> create mode 100644 libgcc/config/aarch64/t-no-eh
> rename libgcc/config/{i386 => mingw}/t-gthr-win32 (100%)
> rename libgcc/config/{i386 => mingw}/t-mingw-pthread (100%)
>
> --
> 2.25.1
>
[gcc r15-297] aarch64: Add aarch64-w64-mingw32 target to libatomic
https://gcc.gnu.org/g:0c23efc04b754a1959f7151ef101ad0daba1e5af
commit r15-297-g0c23efc04b754a1959f7151ef101ad0daba1e5af
Author: Zac Walker
Date: Fri Mar 1 02:23:45 2024 +0100
aarch64: Add aarch64-w64-mingw32 target to libatomic
libatomic/ChangeLog:
* configure.tgt: Add aarch64-w64-mingw32 target.
Diff:
---
libatomic/configure.tgt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/libatomic/configure.tgt b/libatomic/configure.tgt
index 4237f283fe40..e49fd57ab418 100644
--- a/libatomic/configure.tgt
+++ b/libatomic/configure.tgt
@@ -44,7 +44,7 @@ case "${target_cpu}" in
aarch64*)
ARCH=aarch64
case "${target}" in
- aarch64*-*-linux*)
+ aarch64*-*-linux* | aarch64-*-mingw*)
if test -n "$enable_aarch64_lse"; then
try_ifunc=yes
fi
[gcc r15-298] Add aarch64-w64-mingw32 target to libgcc
https://gcc.gnu.org/g:d6d7afcdbc04adb0ec42a44b2d7e05600945af42
commit r15-298-gd6d7afcdbc04adb0ec42a44b2d7e05600945af42
Author: Zac Walker
Date: Mon Feb 12 15:22:47 2024 +0100
Add aarch64-w64-mingw32 target to libgcc
Reuse MinGW definitions from i386 for libgcc. Move reused files to
libgcc/config/mingw folder.
libgcc/ChangeLog:
* config.host: Add aarch64-w64-mingw32 target. Adjust targets
after moving MinGW files.
* config/i386/t-gthr-win32: Move to...
* config/mingw/t-gthr-win32: ...here.
* config/i386/t-mingw-pthread: Move to...
* config/mingw/t-mingw-pthread: ...here.
* config/aarch64/t-no-eh: New file. EH is not yet implemented for
the target, and the default definition should be disabled.
Diff:
---
libgcc/config.host| 23 +++
libgcc/config/aarch64/t-no-eh | 2 ++
libgcc/config/{i386 => mingw}/t-gthr-win32| 0
libgcc/config/{i386 => mingw}/t-mingw-pthread | 0
4 files changed, 21 insertions(+), 4 deletions(-)
diff --git a/libgcc/config.host b/libgcc/config.host
index a8e465aa3abb..694602d31859 100644
--- a/libgcc/config.host
+++ b/libgcc/config.host
@@ -452,6 +452,21 @@ aarch64*-*-vxworks7*)
tmake_file="${tmake_file} ${cpu_type}/t-softfp t-softfp t-crtfm"
tmake_file="${tmake_file} t-dfprules"
;;
+aarch64-*-mingw*)
+ case ${target_thread_file} in
+ win32)
+ tmake_thr_file="mingw/t-gthr-win32"
+ ;;
+ posix)
+ tmake_thr_file="mingw/t-mingw-pthread"
+ ;;
+ esac
+ tmake_file="${tmake_file} ${cpu_type}/t-no-eh ${tmake_thr_file}"
+ tmake_file="${tmake_file} t-dfprules"
+ tmake_file="${tmake_file} ${cpu_type}/t-aarch64"
+ tmake_file="${tmake_file} ${cpu_type}/t-lse"
+ tmake_file="${tmake_file} ${cpu_type}/t-softfp t-softfp t-crtfm"
+ ;;
alpha*-*-linux*)
tmake_file="${tmake_file} alpha/t-alpha alpha/t-ieee t-crtfm
alpha/t-linux"
extra_parts="$extra_parts crtfastmath.o"
@@ -870,10 +885,10 @@ i[34567]86-*-mingw*)
fi
case ${target_thread_file} in
win32)
- tmake_thr_file="i386/t-gthr-win32"
+ tmake_thr_file="mingw/t-gthr-win32"
;;
posix)
- tmake_thr_file="i386/t-mingw-pthread"
+ tmake_thr_file="mingw/t-mingw-pthread"
;;
mcf)
tmake_thr_file="i386/t-mingw-mcfgthread"
@@ -897,10 +912,10 @@ i[34567]86-*-mingw*)
x86_64-*-mingw*)
case ${target_thread_file} in
win32)
- tmake_thr_file="i386/t-gthr-win32"
+ tmake_thr_file="mingw/t-gthr-win32"
;;
posix)
- tmake_thr_file="i386/t-mingw-pthread"
+ tmake_thr_file="mingw/t-mingw-pthread"
;;
mcf)
tmake_thr_file="i386/t-mingw-mcfgthread"
diff --git a/libgcc/config/aarch64/t-no-eh b/libgcc/config/aarch64/t-no-eh
new file mode 100644
index ..1802339a5834
--- /dev/null
+++ b/libgcc/config/aarch64/t-no-eh
@@ -0,0 +1,2 @@
+# Not using EH
+LIB2ADDEH =
diff --git a/libgcc/config/i386/t-gthr-win32 b/libgcc/config/mingw/t-gthr-win32
similarity index 100%
rename from libgcc/config/i386/t-gthr-win32
rename to libgcc/config/mingw/t-gthr-win32
diff --git a/libgcc/config/i386/t-mingw-pthread
b/libgcc/config/mingw/t-mingw-pthread
similarity index 100%
rename from libgcc/config/i386/t-mingw-pthread
rename to libgcc/config/mingw/t-mingw-pthread
[gcc r15-296] aarch64: Build and add objects for Cygwin and MinGW for AArch64
https://gcc.gnu.org/g:10a2f11b4101bdea84048ca90cd06e362f254c4c
commit r15-296-g10a2f11b4101bdea84048ca90cd06e362f254c4c
Author: Zac Walker
Date: Tue Feb 20 13:55:51 2024 +0100
aarch64: Build and add objects for Cygwin and MinGW for AArch64
gcc/ChangeLog:
* config.gcc: Build and add objects for Cygwin and MinGW. Add Cygwin
and MinGW options to the target.
Diff:
---
gcc/config.gcc | 5 +
1 file changed, 5 insertions(+)
diff --git a/gcc/config.gcc b/gcc/config.gcc
index 5f9225907a70..cfc2db545d01 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -1278,6 +1278,11 @@ aarch64-*-mingw*)
tm_file="${tm_file} mingw/mingw-stdint.h"
tmake_file="${tmake_file} aarch64/t-aarch64"
target_gtfiles="$target_gtfiles \$(srcdir)/config/mingw/winnt.cc"
+ extra_options="${extra_options} mingw/cygming.opt mingw/mingw.opt"
+ extra_objs="${extra_objs} winnt.o"
+ c_target_objs="${c_target_objs} msformat-c.o"
+ d_target_objs="${d_target_objs} winnt-d.o"
+ tmake_file="${tmake_file} mingw/t-cygming"
case ${enable_threads} in
"" | yes | win32)
thread_file='win32'
[gcc r15-295] Rename "x86 Windows Options" to "Cygwin and MinGW Options"
https://gcc.gnu.org/g:e8d003736e6c3ba9bddbd74bb07b5d91d3674b9f
commit r15-295-ge8d003736e6c3ba9bddbd74bb07b5d91d3674b9f
Author: Zac Walker
Date: Thu Apr 11 13:43:23 2024 +0200
Rename "x86 Windows Options" to "Cygwin and MinGW Options"
Rename "x86 Windows Options" to "Cygwin and MinGW Options".
It will be used also for AArch64.
gcc/ChangeLog:
* config/i386/mingw-w64.opt.urls: Rename options' name and
regenerate option URLs.
* config/lynx.opt.urls: Likewise.
* config/mingw/cygming.opt.urls: Likewise.
* config/mingw/mingw.opt.urls: Likewise.
* doc/invoke.texi: Likewise.
Diff:
---
gcc/config/i386/mingw-w64.opt.urls | 2 +-
gcc/config/lynx.opt.urls | 2 +-
gcc/config/mingw/cygming.opt.urls | 18 +-
gcc/config/mingw/mingw.opt.urls| 2 +-
gcc/doc/invoke.texi| 10 ++
5 files changed, 22 insertions(+), 12 deletions(-)
diff --git a/gcc/config/i386/mingw-w64.opt.urls
b/gcc/config/i386/mingw-w64.opt.urls
index 6bb53ef29b2b..5cceba1d1a17 100644
--- a/gcc/config/i386/mingw-w64.opt.urls
+++ b/gcc/config/i386/mingw-w64.opt.urls
@@ -1,5 +1,5 @@
; Autogenerated by regenerate-opt-urls.py from gcc/config/i386/mingw-w64.opt
and generated HTML
municode
-UrlSuffix(gcc/x86-Windows-Options.html#index-municode)
+UrlSuffix(gcc/Cygwin-and-MinGW-Options.html#index-municode)
diff --git a/gcc/config/lynx.opt.urls b/gcc/config/lynx.opt.urls
index 63e7b9c4b33f..b547138f7ffa 100644
--- a/gcc/config/lynx.opt.urls
+++ b/gcc/config/lynx.opt.urls
@@ -1,5 +1,5 @@
; Autogenerated by regenerate-opt-urls.py from gcc/config/lynx.opt and
generated HTML
mthreads
-UrlSuffix(gcc/x86-Windows-Options.html#index-mthreads-1)
+UrlSuffix(gcc/Cygwin-and-MinGW-Options.html#index-mthreads-1)
diff --git a/gcc/config/mingw/cygming.opt.urls
b/gcc/config/mingw/cygming.opt.urls
index 87799befe3c4..c624e22e4427 100644
--- a/gcc/config/mingw/cygming.opt.urls
+++ b/gcc/config/mingw/cygming.opt.urls
@@ -1,30 +1,30 @@
; Autogenerated by regenerate-opt-urls.py from gcc/config/i386/cygming.opt and
generated HTML
mconsole
-UrlSuffix(gcc/x86-Windows-Options.html#index-mconsole)
+UrlSuffix(gcc/Cygwin-and-MinGW-Options.html#index-mconsole)
mdll
-UrlSuffix(gcc/x86-Windows-Options.html#index-mdll)
+UrlSuffix(gcc/Cygwin-and-MinGW-Options.html#index-mdll)
mnop-fun-dllimport
-UrlSuffix(gcc/x86-Windows-Options.html#index-mnop-fun-dllimport)
+UrlSuffix(gcc/Cygwin-and-MinGW-Options.html#index-mnop-fun-dllimport)
; skipping UrlSuffix for 'mthreads' due to multiple URLs:
+; duplicate: 'gcc/Cygwin-and-MinGW-Options.html#index-mthreads-1'
; duplicate: 'gcc/x86-Options.html#index-mthreads'
-; duplicate: 'gcc/x86-Windows-Options.html#index-mthreads-1'
mwin32
-UrlSuffix(gcc/x86-Windows-Options.html#index-mwin32)
+UrlSuffix(gcc/Cygwin-and-MinGW-Options.html#index-mwin32)
mwindows
-UrlSuffix(gcc/x86-Windows-Options.html#index-mwindows)
+UrlSuffix(gcc/Cygwin-and-MinGW-Options.html#index-mwindows)
mpe-aligned-commons
-UrlSuffix(gcc/x86-Windows-Options.html#index-mpe-aligned-commons)
+UrlSuffix(gcc/Cygwin-and-MinGW-Options.html#index-mpe-aligned-commons)
fset-stack-executable
-UrlSuffix(gcc/x86-Windows-Options.html#index-fno-set-stack-executable)
+UrlSuffix(gcc/Cygwin-and-MinGW-Options.html#index-fno-set-stack-executable)
fwritable-relocated-rdata
-UrlSuffix(gcc/x86-Windows-Options.html#index-fno-writable-relocated-rdata)
+UrlSuffix(gcc/Cygwin-and-MinGW-Options.html#index-fno-writable-relocated-rdata)
diff --git a/gcc/config/mingw/mingw.opt.urls b/gcc/config/mingw/mingw.opt.urls
index 2cbbaadf310d..f8ee5be6a535 100644
--- a/gcc/config/mingw/mingw.opt.urls
+++ b/gcc/config/mingw/mingw.opt.urls
@@ -1,7 +1,7 @@
; Autogenerated by regenerate-opt-urls.py from gcc/config/i386/mingw.opt and
generated HTML
mcrtdll=
-UrlSuffix(gcc/x86-Windows-Options.html#index-mcrtdll)
+UrlSuffix(gcc/Cygwin-and-MinGW-Options.html#index-mcrtdll)
; skipping UrlSuffix for 'pthread' due to multiple URLs:
; duplicate: 'gcc/Link-Options.html#index-pthread-1'
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index ed03a613b4b4..ddcd5213f06a 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -1499,6 +1499,8 @@ See RS/6000 and PowerPC Options.
-munroll-only-small-loops -mlam=@var{choice}}
@emph{x86 Windows Options}
+
+@emph{Cygwin and MinGW Options}
@gccoptlist{-mconsole -mcrtdll=@var{library} -mdll
-mnop-fun-dllimport -mthread
-municode -mwin32 -mwindows -fno-set-stack-executable}
@@ -21041,6 +21043,7 @@ platform.
* C6X Options::
* CRIS Options::
* C-SKY Options::
+* Cygwin and MinGW Options::
* Darwin Options::
* DEC Alpha Options::
* eBPF Options::
@@ -36316,6 +36319,13 @@ positions 62:57 can be used for metadata.
@cindex x86 Windows Options
@cindex Windows Options for x86
+@xref{Cygwin and MinGW Options}.
+
+@node Cygwin and MinGW Options
+@subsection
[gcc r15-293] aarch64: Add Cygwin and MinGW environments for AArch64
https://gcc.gnu.org/g:565b782bfa85332a4aba91dec3b871d2f50f1fb8
commit r15-293-g565b782bfa85332a4aba91dec3b871d2f50f1fb8
Author: Zac Walker
Date: Thu Apr 11 13:41:51 2024 +0200
aarch64: Add Cygwin and MinGW environments for AArch64
Define Cygwin and MinGW environment such as types, SEH definitions,
shared libraries, etc.
gcc/ChangeLog:
* config.gcc: Add Cygwin and MinGW difinitions.
* config/aarch64/aarch64-protos.h
(mingw_pe_maybe_record_exported_symbol): Declare functions
which are used in Cygwin and MinGW environment.
(mingw_pe_section_type_flags): Likewise.
(mingw_pe_unique_section): Likewise.
(mingw_pe_encode_section_info): Likewise.
* config/aarch64/cygming.h: New file.
Diff:
---
gcc/config.gcc | 4 +
gcc/config/aarch64/aarch64-protos.h | 5 ++
gcc/config/aarch64/cygming.h| 172
3 files changed, 181 insertions(+)
diff --git a/gcc/config.gcc b/gcc/config.gcc
index cb1bba73f8d2..5f9225907a70 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -1273,7 +1273,11 @@ aarch64*-*-gnu*)
aarch64-*-mingw*)
tm_file="${tm_file} aarch64/aarch64-abi-ms.h"
tm_file="${tm_file} aarch64/aarch64-coff.h"
+ tm_file="${tm_file} aarch64/cygming.h"
+ tm_file="${tm_file} mingw/mingw32.h"
+ tm_file="${tm_file} mingw/mingw-stdint.h"
tmake_file="${tmake_file} aarch64/t-aarch64"
+ target_gtfiles="$target_gtfiles \$(srcdir)/config/mingw/winnt.cc"
case ${enable_threads} in
"" | yes | win32)
thread_file='win32'
diff --git a/gcc/config/aarch64/aarch64-protos.h
b/gcc/config/aarch64/aarch64-protos.h
index 42639e9efcf1..1d3f94c813ea 100644
--- a/gcc/config/aarch64/aarch64-protos.h
+++ b/gcc/config/aarch64/aarch64-protos.h
@@ -1110,6 +1110,11 @@ extern void aarch64_output_patchable_area (unsigned int,
bool);
extern void aarch64_adjust_reg_alloc_order ();
+extern void mingw_pe_maybe_record_exported_symbol (tree, const char *, int);
+extern unsigned int mingw_pe_section_type_flags (tree, const char *, int);
+extern void mingw_pe_unique_section (tree, int);
+extern void mingw_pe_encode_section_info (tree, rtx, int);
+
bool aarch64_optimize_mode_switching (aarch64_mode_entity);
void aarch64_restore_za (rtx);
diff --git a/gcc/config/aarch64/cygming.h b/gcc/config/aarch64/cygming.h
new file mode 100644
index ..2e7b01feb768
--- /dev/null
+++ b/gcc/config/aarch64/cygming.h
@@ -0,0 +1,172 @@
+/* Operating system specific defines to be used when targeting GCC for
+ hosting on Windows32, using a Unix style C library and tools.
+ Copyright (C) 1995-2024 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+
[gcc r15-294] aarch64: Add SEH to machine_function
https://gcc.gnu.org/g:38e422e2ef539ccf6db1bdd340079631b1141637
commit r15-294-g38e422e2ef539ccf6db1bdd340079631b1141637
Author: Zac Walker
Date: Tue Feb 20 18:10:08 2024 +0100
aarch64: Add SEH to machine_function
SEH is not enabled in aarch64-w64-mingw32 target yet. However, it is
needed to be declared in machine_function for reusing winnt.cc.
gcc/ChangeLog:
* config/aarch64/aarch64.h (struct seh_frame_state): Declare SEH
structure in machine_function.
(GTY): Add SEH field.
Diff:
---
gcc/config/aarch64/aarch64.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h
index 319fe032a4b3..bbf11faaf4b4 100644
--- a/gcc/config/aarch64/aarch64.h
+++ b/gcc/config/aarch64/aarch64.h
@@ -1046,6 +1046,9 @@ struct GTY (()) aarch64_frame
bool is_scs_enabled;
};
+/* Private to winnt.cc. */
+struct seh_frame_state;
+
#ifdef hash_set_h
typedef struct GTY (()) machine_function
{
@@ -1086,6 +1089,9 @@ typedef struct GTY (()) machine_function
still exists and still fulfils its original purpose. the same register
can be reused by other code. */
rtx_insn *advsimd_zero_insn;
+
+ /* During SEH output, this is non-null. */
+ struct seh_frame_state * GTY ((skip (""))) seh;
} machine_function;
#endif
#endif
[gcc r15-292] Exclude i386 functionality from aarch64 build
https://gcc.gnu.org/g:de2bcdaf399d3f97af6ab312893ffe089e69d42b
commit r15-292-gde2bcdaf399d3f97af6ab312893ffe089e69d42b
Author: Zac Walker
Date: Thu Apr 11 13:38:59 2024 +0200
Exclude i386 functionality from aarch64 build
This patch defines TARGET_AARCH64_MS_ABI in config.gcc and uses it to
exclude i386 functionality from aarch64 build and adjust MinGW headers
for AArch64 MS ABI.
gcc/ChangeLog:
* config.gcc: Define TARGET_AARCH64_MS_ABI.
* config/mingw/mingw-stdint.h (INTPTR_TYPE): Use
TARGET_AARCH64_MS_ABI to adjust MinGW headers for
AArch64 MS ABI.
(UINTPTR_TYPE): Likewise.
(defined): Likewise.
* config/mingw/mingw32.h (DEFAULT_ABI): Likewise.
(defined): Likewise.
* config/mingw/winnt.cc (defined): Use TARGET_ARM64_MS_ABI to
exclude ix86_get_callcvt.
(i386_pe_maybe_mangle_decl_assembler_name): Likewise.
(i386_pe_mangle_decl_assembler_name): Likewise.
Diff:
---
gcc/config.gcc | 1 +
gcc/config/mingw/mingw-stdint.h | 9 +++--
gcc/config/mingw/mingw32.h | 4 +++-
gcc/config/mingw/winnt.cc | 8
4 files changed, 19 insertions(+), 3 deletions(-)
diff --git a/gcc/config.gcc b/gcc/config.gcc
index f95417c2e69f..cb1bba73f8d2 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -1284,6 +1284,7 @@ aarch64-*-mingw*)
esac
default_use_cxa_atexit=yes
user_headers_inc_next_post="${user_headers_inc_next_post} float.h"
+ tm_defines="${tm_defines} TARGET_AARCH64_MS_ABI=1"
;;
aarch64*-wrs-vxworks*)
tm_file="${tm_file} elfos.h aarch64/aarch64-elf.h"
diff --git a/gcc/config/mingw/mingw-stdint.h b/gcc/config/mingw/mingw-stdint.h
index c0feade76e9f..debbe829bdf8 100644
--- a/gcc/config/mingw/mingw-stdint.h
+++ b/gcc/config/mingw/mingw-stdint.h
@@ -46,5 +46,10 @@ along with GCC; see the file COPYING3. If not see
#define UINT_FAST32_TYPE "unsigned int"
#define UINT_FAST64_TYPE "long long unsigned int"
-#define INTPTR_TYPE (TARGET_64BIT ? "long long int" : "int")
-#define UINTPTR_TYPE (TARGET_64BIT ? "long long unsigned int" : "unsigned int")
+#if defined (TARGET_AARCH64_MS_ABI)
+# define INTPTR_TYPE "long long int"
+# define UINTPTR_TYPE "long long unsigned int"
+#else
+# define INTPTR_TYPE (TARGET_64BIT ? "long long int" : "int")
+# define UINTPTR_TYPE (TARGET_64BIT ? "long long unsigned int" : "unsigned
int")
+#endif
\ No newline at end of file
diff --git a/gcc/config/mingw/mingw32.h b/gcc/config/mingw/mingw32.h
index 58304fc55f62..08f1b5f06967 100644
--- a/gcc/config/mingw/mingw32.h
+++ b/gcc/config/mingw/mingw32.h
@@ -19,7 +19,9 @@ along with GCC; see the file COPYING3. If not see
[gcc r15-291] Rename section and encoding functions from i386 which will be used in aarch64
https://gcc.gnu.org/g:99d7d5ec8d88415a7e1f74fade0841a0ebbd0092
commit r15-291-g99d7d5ec8d88415a7e1f74fade0841a0ebbd0092
Author: Zac Walker
Date: Tue Feb 20 17:22:31 2024 +0100
Rename section and encoding functions from i386 which will be used in
aarch64
gcc/ChangeLog:
* config/i386/cygming.h (SUBTARGET_ENCODE_SECTION_INFO):
Rename functions in mingw folder which will be reused for
aarch64.
(TARGET_ASM_UNIQUE_SECTION): Likewise.
(TARGET_ASM_NAMED_SECTION): Likewise.
(TARGET_SECTION_TYPE_FLAGS): Likewise.
(ASM_DECLARE_COLD_FUNCTION_NAME): Likewise.
(ASM_OUTPUT_EXTERNAL_LIBCALL): Likewise.
* config/i386/i386-protos.h (i386_pe_unique_section):
Rename into ...
(mingw_pe_unique_section): ... this.
(i386_pe_declare_function_type): Rename into ...
(mingw_pe_declare_function_type): ... this.
(i386_pe_encode_section_info): Rename into ...
(mingw_pe_encode_section_info): ... this.
(i386_pe_maybe_record_exported_symbol): Rename into ...
(mingw_pe_maybe_record_exported_symbol): ... this.
(i386_pe_section_type_flags): Rename into ...
(mingw_pe_section_type_flags): ... this.
(i386_pe_asm_named_section): Rename into ...
(mingw_pe_asm_named_section): ... this.
* config/mingw/winnt.cc (i386_pe_encode_section_info):
Rename into ...
(mingw_pe_encode_section_info): ... this.
(i386_pe_unique_section): Rename into ...
(mingw_pe_unique_section): ... this.
(i386_pe_section_type_flags): Rename into ...
(mingw_pe_section_type_flags): ... this.
(i386_pe_asm_named_section): Rename into ...
(mingw_pe_asm_named_section): ... this.
(i386_pe_asm_output_aligned_decl_common): Likewise.
(i386_pe_declare_function_type): Rename into ...
(mingw_pe_declare_function_type): ... this.
(i386_pe_maybe_record_exported_symbol): Rename into ...
(mingw_pe_maybe_record_exported_symbol): ... this.
(i386_pe_start_function): Likewise.
* varasm.cc (switch_to_comdat_section): Likewise.
Diff:
---
gcc/config/i386/cygming.h | 18 +-
gcc/config/i386/i386-protos.h | 12 ++--
gcc/config/mingw/winnt.cc | 22 +++---
gcc/varasm.cc | 2 +-
4 files changed, 27 insertions(+), 27 deletions(-)
diff --git a/gcc/config/i386/cygming.h b/gcc/config/i386/cygming.h
index 1af5bc380a50..beedf7c398a5 100644
--- a/gcc/config/i386/cygming.h
+++ b/gcc/config/i386/cygming.h
@@ -219,7 +219,7 @@ do {
\
section and we need to set DECL_SECTION_NAME so we do that here.
Note that we can be called twice on the same decl. */
-#define SUBTARGET_ENCODE_SECTION_INFO i386_pe_encode_section_info
+#define SUBTARGET_ENCODE_SECTION_INFO mingw_pe_encode_section_info
/* Local and global relocs can be placed always into readonly memory
for PE-COFF targets. */
@@ -235,7 +235,7 @@ do {
\
#undef ASM_DECLARE_OBJECT_NAME
#define ASM_DECLARE_OBJECT_NAME(STREAM, NAME, DECL)\
do { \
- i386_pe_maybe_record_exported_symbol (DECL, NAME, 1);\
+ mingw_pe_maybe_record_exported_symbol (DECL, NAME, 1); \
ASM_OUTPUT_LABEL ((STREAM), (NAME)); \
} while (0)
@@ -283,16 +283,16 @@ do { \
/* Windows uses explicit import from shared libraries. */
#define MULTIPLE_SYMBOL_SPACES 1
-#define TARGET_ASM_UNIQUE_SECTION i386_pe_unique_section
+#define TARGET_ASM_UNIQUE_SECTION mingw_pe_unique_section
#define TARGET_ASM_FUNCTION_RODATA_SECTION default_no_function_rodata_section
#define SUPPORTS_ONE_ONLY 1
/* Switch into a generic section. */
-#define TARGET_ASM_NAMED_SECTION i386_pe_asm_named_section
+#define TARGET_ASM_NAMED_SECTION mingw_pe_asm_named_section
/* Select attributes for named sections. */
-#define TARGET_SECTION_TYPE_FLAGS i386_pe_section_type_flags
+#define TARGET_SECTION_TYPE_FLAGS mingw_pe_section_type_flags
/* Write the extra assembler code needed to declare a function
properly. */
@@ -307,7 +307,7 @@ do {\
#define ASM_DECLARE_COLD_FUNCTION_NAME(FILE, NAME, DECL) \
do \
{ \
- i386_pe_declare_function_type (FILE, NAME, 0); \
+ mingw_pe_declare_function_type (FILE, NAME, 0); \
i386_pe_seh_cold_init (FILE, NAME); \
[gcc r15-290] Reuse MinGW from i386 for AArch64
https://gcc.gnu.org/g:1f05dfc131c7996a85dd82b3300f7b5f93d4b1bd
commit r15-290-g1f05dfc131c7996a85dd82b3300f7b5f93d4b1bd
Author: Zac Walker
Date: Fri Mar 1 02:41:50 2024 +0100
Reuse MinGW from i386 for AArch64
This patch creates a new config/mingw directory to share MinGW
related definitions, and moves there the corresponding existing files
from config/i386.
gcc/ChangeLog:
* config.gcc: Adjust targets after moving MinGW related files
from i386 to mingw folder.
* config/i386/cygming.opt: Move to...
* config/mingw/cygming.opt: ...here.
* config/i386/cygming.opt.urls: Move to...
* config/mingw/cygming.opt.urls: ...here.
* config/i386/cygwin-d.cc: Move to...
* config/mingw/cygwin-d.cc: ...here.
* config/i386/mingw-stdint.h: Move to...
* config/mingw/mingw-stdint.h: ...here.
* config/i386/mingw.opt: Move to...
* config/mingw/mingw.opt: ...here.
* config/i386/mingw.opt.urls: Move to...
* config/mingw/mingw.opt.urls: ...here.
* config/i386/mingw32.h: Move to...
* config/mingw/mingw32.h: ...here.
* config/i386/msformat-c.cc: Move to...
* config/mingw/msformat-c.cc: ...here.
* config/i386/t-cygming: Move to...
* config/mingw/t-cygming: ...here and updated.
* config/i386/winnt-cxx.cc: Move to...
* config/mingw/winnt-cxx.cc: ...here.
* config/i386/winnt-d.cc: Move to...
* config/mingw/winnt-d.cc: ...here.
* config/i386/winnt-stubs.cc: Move to...
* config/mingw/winnt-stubs.cc: ...here.
* config/i386/winnt.cc: Move to...
* config/mingw/winnt.cc: ...here.
Diff:
---
gcc/config.gcc | 22 +++---
gcc/config/{i386 => mingw}/cygming.opt | 0
gcc/config/{i386 => mingw}/cygming.opt.urls | 0
gcc/config/{i386 => mingw}/cygwin-d.cc | 0
gcc/config/{i386 => mingw}/mingw-stdint.h | 0
gcc/config/{i386 => mingw}/mingw.opt| 0
gcc/config/{i386 => mingw}/mingw.opt.urls | 0
gcc/config/{i386 => mingw}/mingw32.h| 0
gcc/config/{i386 => mingw}/msformat-c.cc| 0
gcc/config/{i386 => mingw}/t-cygming| 23 +--
gcc/config/{i386 => mingw}/winnt-cxx.cc | 0
gcc/config/{i386 => mingw}/winnt-d.cc | 0
gcc/config/{i386 => mingw}/winnt-stubs.cc | 0
gcc/config/{i386 => mingw}/winnt.cc | 0
14 files changed, 24 insertions(+), 21 deletions(-)
diff --git a/gcc/config.gcc b/gcc/config.gcc
index 1dcba6be6502..f95417c2e69f 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -2167,9 +2167,9 @@ i[4567]86-wrs-vxworks*|x86_64-wrs-vxworks7*)
i[34567]86-*-cygwin*)
tm_file="${tm_file} i386/unix.h i386/bsd.h i386/gas.h i386/cygming.h
i386/cygwin.h i386/cygwin-stdint.h"
xm_file=i386/xm-cygwin.h
- tmake_file="${tmake_file} i386/t-cygming t-slibgcc"
- target_gtfiles="$target_gtfiles \$(srcdir)/config/i386/winnt.cc"
- extra_options="${extra_options} i386/cygming.opt i386/cygwin.opt"
+ tmake_file="${tmake_file} mingw/t-cygming t-slibgcc"
+ target_gtfiles="$target_gtfiles \$(srcdir)/config/mingw/winnt.cc"
+ extra_options="${extra_options} mingw/cygming.opt i386/cygwin.opt"
extra_objs="${extra_objs} winnt.o winnt-stubs.o"
c_target_objs="${c_target_objs} msformat-c.o"
cxx_target_objs="${cxx_target_objs} winnt-cxx.o msformat-c.o"
@@ -2185,9 +2185,9 @@ x86_64-*-cygwin*)
need_64bit_isa=yes
tm_file="${tm_file} i386/unix.h i386/bsd.h i386/gas.h i386/cygming.h
i386/cygwin.h i386/cygwin-w64.h i386/cygwin-stdint.h"
xm_file=i386/xm-cygwin.h
- tmake_file="${tmake_file} i386/t-cygming t-slibgcc"
- target_gtfiles="$target_gtfiles \$(srcdir)/config/i386/winnt.cc"
- extra_options="${extra_options} i386/cygming.opt i386/cygwin.opt"
+ tmake_file="${tmake_file} mingw/t-cygming t-slibgcc"
+ target_gtfiles="$target_gtfiles \$(srcdir)/config/mingw/winnt.cc"
+ extra_options="${extra_options} mingw/cygming.opt i386/cygwin.opt"
extra_objs="${extra_objs} winnt.o winnt-stubs.o"
c_target_objs="${c_target_objs} msformat-c.o"
cxx_target_objs="${cxx_target_objs} winnt-cxx.o msformat-c.o"
@@ -2223,7 +2223,7 @@ i[34567]86-*-mingw* | x86_64-*-mingw*)
if test x$enable_threads = xmcf ; then
tm_file="${tm_file} i386/mingw-mcfgthread.h"
fi
- tm_file="${tm_file} i386/mingw32.h"
+ tm_file="${tm_file} mingw/mingw32.h"
# This makes the logic if mingw's or the w64 feature set has to be used
case ${target} in
*-w64-*)
@@ -2252,8 +2252,8 @@ i[34567]86-*-mingw* | x86_64-*-mingw*)
*)
;;
esac
- tm_file="${tm_file}
[gcc r15-289] aarch64: Add aarch64-w64-mingw32 COFF
https://gcc.gnu.org/g:21fbaa1a2d274a36454332a6e10a496024bbc560
commit r15-289-g21fbaa1a2d274a36454332a6e10a496024bbc560
Author: Zac Walker
Date: Thu Apr 11 14:46:07 2024 +0200
aarch64: Add aarch64-w64-mingw32 COFF
Define ASM specific for COFF format on AArch64.
gcc/ChangeLog:
* config.gcc: Add COFF format support definitions.
* config/aarch64/aarch64-coff.h: New file.
Diff:
---
gcc/config.gcc| 1 +
gcc/config/aarch64/aarch64-coff.h | 91 +++
2 files changed, 92 insertions(+)
diff --git a/gcc/config.gcc b/gcc/config.gcc
index 007a64d010d5..1dcba6be6502 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -1272,6 +1272,7 @@ aarch64*-*-gnu*)
;;
aarch64-*-mingw*)
tm_file="${tm_file} aarch64/aarch64-abi-ms.h"
+ tm_file="${tm_file} aarch64/aarch64-coff.h"
tmake_file="${tmake_file} aarch64/t-aarch64"
case ${enable_threads} in
"" | yes | win32)
diff --git a/gcc/config/aarch64/aarch64-coff.h
b/gcc/config/aarch64/aarch64-coff.h
new file mode 100644
index ..81fd9954f755
--- /dev/null
+++ b/gcc/config/aarch64/aarch64-coff.h
@@ -0,0 +1,91 @@
+/* Machine description for AArch64 architecture.
+ Copyright (C) 2024 Free Software Foundation, Inc.
+
+ This file is part of GCC.
+
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+
+ GCC is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3. If not see
+
[gcc r15-288] aarch64: Mark x18 register as a fixed register for MS ABI
https://gcc.gnu.org/g:b9415046fa27d6b3faea89871dbb84b673afadaf
commit r15-288-gb9415046fa27d6b3faea89871dbb84b673afadaf
Author: Zac Walker
Date: Thu Apr 11 13:30:27 2024 +0200
aarch64: Mark x18 register as a fixed register for MS ABI
Define the MS ABI for aarch64-w64-mingw32.
Adjust FIXED_REGISTERS, CALL_REALLY_USED_REGISTERS and
STATIC_CHAIN_REGNUM for AArch64 MS ABI.
The X18 register is reserved on Windows for the TEB.
gcc/ChangeLog:
* config.gcc: Define TARGET_AARCH64_MS_ABI when
AArch64 MS ABI is used.
* config/aarch64/aarch64.h (FIXED_X18): Adjust
FIXED_REGISTERS, CALL_REALLY_USED_REGISTERS and
STATIC_CHAIN_REGNUM for AArch64 MS ABI.
(CALL_USED_X18): Likewise.
(FIXED_REGISTERS): Likewise.
* config/aarch64/aarch64-abi-ms.h: New file.
Diff:
---
gcc/config.gcc | 1 +
gcc/config/aarch64/aarch64-abi-ms.h | 34 ++
gcc/config/aarch64/aarch64.h| 7 +--
3 files changed, 40 insertions(+), 2 deletions(-)
diff --git a/gcc/config.gcc b/gcc/config.gcc
index 0a737bf37ae0..007a64d010d5 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -1271,6 +1271,7 @@ aarch64*-*-gnu*)
tm_defines="${tm_defines} TARGET_DEFAULT_ASYNC_UNWIND_TABLES=1"
;;
aarch64-*-mingw*)
+ tm_file="${tm_file} aarch64/aarch64-abi-ms.h"
tmake_file="${tmake_file} aarch64/t-aarch64"
case ${enable_threads} in
"" | yes | win32)
diff --git a/gcc/config/aarch64/aarch64-abi-ms.h
b/gcc/config/aarch64/aarch64-abi-ms.h
new file mode 100644
index ..15dc33d04749
--- /dev/null
+++ b/gcc/config/aarch64/aarch64-abi-ms.h
@@ -0,0 +1,34 @@
+/* Machine description for AArch64 MS ABI.
+ Copyright (C) 2024 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+
[gcc r15-287] Introduce aarch64-w64-mingw32 target
https://gcc.gnu.org/g:13bad1ac7a6ea4dbbde67c69d31c218a2f2d7a5d
commit r15-287-g13bad1ac7a6ea4dbbde67c69d31c218a2f2d7a5d
Author: Zac Walker
Date: Fri Mar 1 01:40:53 2024 +0100
Introduce aarch64-w64-mingw32 target
Add the initial aarch64-w64-mingw32 target for gcc.
This is the first commit in a sequence of patch series to add
new aarch64-w64-mingw32 target.
Coauthors: Zac Walker ,
Mark Harmstone and
Ron Riddle
Refactored, prepared, and validated by
Radek Barton and
Evgeny Karpov
fixincludes/ChangeLog:
* mkfixinc.sh: Extend for *-mingw32* targets.
gcc/ChangeLog:
* config.gcc: Add aarch64-w64-mingw32 target.
Diff:
---
fixincludes/mkfixinc.sh | 3 +--
gcc/config.gcc | 13 +
2 files changed, 14 insertions(+), 2 deletions(-)
diff --git a/fixincludes/mkfixinc.sh b/fixincludes/mkfixinc.sh
index df90720b716f..7112f4dcd64b 100755
--- a/fixincludes/mkfixinc.sh
+++ b/fixincludes/mkfixinc.sh
@@ -12,8 +12,7 @@ target=fixinc.sh
# Check for special fix rules for particular targets
case $machine in
i?86-*-cygwin* | \
-i?86-*-mingw32* | \
-x86_64-*-mingw32* | \
+*-mingw32* | \
powerpc-*-eabisim* | \
powerpc-*-eabi*| \
powerpc-*-rtems* | \
diff --git a/gcc/config.gcc b/gcc/config.gcc
index 65bbe9e840fc..0a737bf37ae0 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -1270,6 +1270,19 @@ aarch64*-*-gnu*)
tmake_file="${tmake_file} aarch64/t-aarch64"
tm_defines="${tm_defines} TARGET_DEFAULT_ASYNC_UNWIND_TABLES=1"
;;
+aarch64-*-mingw*)
+ tmake_file="${tmake_file} aarch64/t-aarch64"
+ case ${enable_threads} in
+ "" | yes | win32)
+ thread_file='win32'
+ ;;
+ posix)
+ thread_file='posix'
+ ;;
+ esac
+ default_use_cxa_atexit=yes
+ user_headers_inc_next_post="${user_headers_inc_next_post} float.h"
+ ;;
aarch64*-wrs-vxworks*)
tm_file="${tm_file} elfos.h aarch64/aarch64-elf.h"
tm_file="${tm_file} vx-common.h vxworks.h aarch64/aarch64-vxworks.h"
Re: [PATCH] libgm2: re-generate with autoreconf
On Thu, 2 May 2024 at 15:47, Gaius Mulley wrote: > > Simon Marchi writes: > > > > > I don't have access to the gcc repo, so could you please push the patch > > on my behalf? > > all done - many thanks for the patch! > Great, I think we now have to update autoregen.py on the buildbot so that it stops complaining :-) Thanks, Christophe > regards, > Gaius
Re: [PATCH] libgfortran: Fix up the autoreconf warnings.
On Thu, 2 May 2024 at 23:13, FX Coudert wrote: > > > libgfortran/ChangeLog: > > * Makefile.am: Use sub-dirs, amend recipies accordingly. > > * Makefile.in: Regenerate. > > Thanks Iain, I’ve tested it both with and without maintainer mode, and > regenerated files with no issue. I can also confirm that the many autoreconf > warnings that plagued libgfortran are now gone. > > Push as affd24bfc62203db9f9937c0d6cf8f1f75b80d72 > Nice, I can see on Sourceware's buildbot that there is now zero warning in libgfortran. Thanks, Christophe > FX
Re: [PATCH] fixincludes: add AC_CONFIG_MACRO_DIRS to configure.ac
On Tue, 30 Apr 2024 at 17:47, Simon Marchi wrote: > > On 4/30/24 4:54 AM, Christophe Lyon wrote: > > On Tue, 30 Apr 2024 at 04:25, Simon Marchi wrote: > >> > >> Add an "AC_CONFIG_MACRO_DIRS" call in configure.ac, with the same > >> directories as specified in "ACLOCAL_AMFLAGS", in Makefile.in. > >> > >> This makes it possible to re-generate aclocal.m4 using "autoreconf". > > > > Thanks, this LGTM, although like in your other patch, we need a > > ChangeLog entry in the commit message. > > > > Christophe > > Here is the ChangeLog entry: > > fixincludes/ChangeLog: > > * configure.ac: Add AC_CONFIG_MACRO_DIRS. > * configure: Re-generate. > > I don't have access to the gcc repo, so if/when this patch gets > approved, can you push it on my behalf? Sure! > > Thanks, > > Simon
Re: [PATCH] decay vect tests from run to link for pr95401
Hi Alexandre, On Tue, 30 Apr 2024 at 01:31, Alexandre Oliva wrote: > > On Apr 22, 2024, Richard Biener wrote: > > >> Regstrapped on x86_64-linux-gnu and ppc64el-linux-gnu. Also tested with > >> gcc-13 on ppc64-vx7r2 and ppc-vx7r2. Ok to install? > > > That makes sense. OK > > >> for gcc/testsuite/ChangeLog > >> > >> * lib/target-supports.exp (check_vect_support_and_set_flags): > >> Decay to link rather than compile. > > Alas, linking may fail because of an incompatible libc, as reported by > Linaro with a link to their issue GNU-1206 (I'm not posting the link to > the fully-Javascrippled Jira web page; it shows nothing useful, and I > can't post feedback there) and to > https://ci.linaro.org/job/tcwg_gnu_embed_check_gcc--master-thumb_m7_hard_eabi-build/10/artifact/artifacts/00-sumfiles/ > (where I could get useful information) > > I'm reverting the patch, and I'll see about some alternate approach that > can accommodate this scenario after I return from LibrePlanet. > Indeed, that's another instance of the tricky multilibs configuration issues. In this case: - we configure GCC: --disable-multilib --with-mode=thumb --with-cpu=cortex-m7 --with-float=hard --target=arm-eabi (we disable multilibs to save build time) - we run the tests with qemu/-mthumb/-march=armv7e-m+fp.dp/-mtune=cortex-m7/-mfloat-abi=hard/-mfpu=auto which matches the GCC configuration flags, but the vect.exp tests add -mfpu=neon -mfloat-abi=softfp -march=armv7-a and link fails because the toolchain does not support softfp libs HTH Thanks, Christophe > -- > Alexandre Oliva, happy hackerhttps://FSFLA.org/blogs/lxo/ >Free Software Activist GNU Toolchain Engineer > More tolerance and less prejudice are key for inclusion and diversity > Excluding neuro-others for not behaving ""normal"" is *not* inclusive
[gcc r15-65] Fix pretty printers regexp for GDB output
https://gcc.gnu.org/g:6d4593a178b49cab205d81cdf36f52e12eabbc6d
commit r15-65-g6d4593a178b49cab205d81cdf36f52e12eabbc6d
Author: Christophe Lyon
Date: Thu Jan 25 15:43:56 2024 +
Fix pretty printers regexp for GDB output
GDB emits end of lines as \r\n, we currently match any >0 number of
either \n or \r, possibly leading to mismatches under racy conditions.
I noticed this while running the GCC testsuite using the equivalent of
GDB's READ1 feature [1] which helps detecting bufferization issues.
We try to match
\n$1 = empty std::tuple\r
against {^(type|\$([0-9]+)) = ([^\n\r]*)[\n\r]+} which fails because
of the leading \n (which was left in the buffer after the previous
"skipping" pattern matched the preceding \r).
This patch accepts any number of leading \n and/or \r in the "got" clause.
Also take this opportunity to quote \r and \r in the logs, to make
debugging such issues easier.
Tested on aarch64-linux-gnu.
[1]
https//github.com/bminor/binutils-gdb/blob/master/gdb/testsuite/README#L269
2024-01-24 Christophe Lyon
libstdc++-v3/
* testsuite/lib/gdb-test.exp (gdb-test): Fix regexp. Quote
newlines in logs.
Diff:
---
libstdc++-v3/testsuite/lib/gdb-test.exp | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/libstdc++-v3/testsuite/lib/gdb-test.exp
b/libstdc++-v3/testsuite/lib/gdb-test.exp
index 31206f2fc32..2ec5596983d 100644
--- a/libstdc++-v3/testsuite/lib/gdb-test.exp
+++ b/libstdc++-v3/testsuite/lib/gdb-test.exp
@@ -194,8 +194,11 @@ proc gdb-test { marker {selector {}} {load_xmethods 0} } {
set test_counter 0
remote_expect target [timeout_value] {
- -re {^(type|\$([0-9]+)) = ([^\n\r]*)[\n\r]+} {
- send_log "got: $expect_out(buffer)"
+ -re {^[\n\r]*(type|\$([0-9]+)) = ([^\n\r]*)[\n\r]+} {
+ # Escape newlines so that we can print them.
+ set escaped [string map {"\n" "\\n"} $expect_out(buffer)]
+ set escaped2 [string map {"\r" "\\r"} $escaped]
+ send_log "got: $escaped2"
incr test_counter
set first $expect_out(3,string)
@@ -251,7 +254,10 @@ proc gdb-test { marker {selector {}} {load_xmethods 0} } {
}
-re {^[^$][^\n\r]*[\n\r]+} {
- send_log "skipping: $expect_out(buffer)"
+ # Escape newlines so that we can print them.
+ set escaped [string map {"\n" "\\n"} $expect_out(buffer)]
+ set escaped2 [string map {"\r" "\\r"} $escaped]
+ send_log "skipping: $escaped2"
exp_continue
}
Re: [PATCH] fixincludes: add AC_CONFIG_MACRO_DIRS to configure.ac
On Tue, 30 Apr 2024 at 04:25, Simon Marchi wrote: > > Add an "AC_CONFIG_MACRO_DIRS" call in configure.ac, with the same > directories as specified in "ACLOCAL_AMFLAGS", in Makefile.in. > > This makes it possible to re-generate aclocal.m4 using "autoreconf". Thanks, this LGTM, although like in your other patch, we need a ChangeLog entry in the commit message. Christophe > --- > fixincludes/configure| 1 + > fixincludes/configure.ac | 1 + > 2 files changed, 2 insertions(+) > > diff --git a/fixincludes/configure b/fixincludes/configure > index 662c94dc1120..7147c9a618aa 100755 > --- a/fixincludes/configure > +++ b/fixincludes/configure > @@ -4627,6 +4627,7 @@ $as_echo "$ac_cv_path_SED" >&6; } >rm -f conftest.sed > > > + > # Figure out what compiler warnings we can enable. > # See config/warnings.m4 for details. > > diff --git a/fixincludes/configure.ac b/fixincludes/configure.ac > index 4e78511d20fc..3d177699ebfa 100644 > --- a/fixincludes/configure.ac > +++ b/fixincludes/configure.ac > @@ -7,6 +7,7 @@ AC_CANONICAL_SYSTEM > AC_PROG_CC > AC_USE_SYSTEM_EXTENSIONS > AC_PROG_SED > +AC_CONFIG_MACRO_DIRS([.. ../config]) > > # Figure out what compiler warnings we can enable. > # See config/warnings.m4 for details. > > base-commit: 22b20ac6c6aead2d3f36c413a77dd0b80adfec39 > -- > 2.44.0 >
Re: [PATCH] libgm2: re-generate with autoreconf
On Tue, 30 Apr 2024 at 04:01, Simon Marchi wrote: > > I get a diff when running "autoreconf" in this directory. I think that > the current state is erroneous: it appears to have been generated using > > aclocal -I ../config -I .. > > even though configure.ac and Makefile.am list the include flag in the > reverse order: > >aclocal -I .. -I ../config > > Running "autoreconf" uses the latter order, so I think that's the > "right" output. > > No functional difference expected. Thanks, this matches what I noticed. I'm not a maintainer, so I cannot approve, but a minor remark: in GCC we still need a ChangeLog entry in the commit message. Christophe > --- > libgm2/Makefile.in | 10 +- > libgm2/aclocal.m4 | 10 +- > libgm2/libm2cor/Makefile.in | 10 +- > libgm2/libm2iso/Makefile.in | 10 +- > libgm2/libm2log/Makefile.in | 10 +- > libgm2/libm2min/Makefile.in | 10 +- > libgm2/libm2pim/Makefile.in | 10 +- > 7 files changed, 35 insertions(+), 35 deletions(-) > > diff --git a/libgm2/Makefile.in b/libgm2/Makefile.in > index f259df7842cf..9cd79824a53d 100644 > --- a/libgm2/Makefile.in > +++ b/libgm2/Makefile.in > @@ -90,15 +90,15 @@ host_triplet = @host@ > target_triplet = @target@ > subdir = . > ACLOCAL_M4 = $(top_srcdir)/aclocal.m4 > -am__aclocal_m4_deps = $(top_srcdir)/../libtool.m4 \ > - $(top_srcdir)/../ltoptions.m4 $(top_srcdir)/../ltsugar.m4 \ > - $(top_srcdir)/../ltversion.m4 $(top_srcdir)/../lt~obsolete.m4 \ > - $(top_srcdir)/../config/acx.m4 \ > +am__aclocal_m4_deps = $(top_srcdir)/../config/acx.m4 \ > $(top_srcdir)/../config/depstand.m4 \ > $(top_srcdir)/../config/lead-dot.m4 \ > $(top_srcdir)/../config/multi.m4 \ > $(top_srcdir)/../config/no-executables.m4 \ > - $(top_srcdir)/../config/override.m4 $(top_srcdir)/acinclude.m4 \ > + $(top_srcdir)/../config/override.m4 \ > + $(top_srcdir)/../libtool.m4 $(top_srcdir)/../ltoptions.m4 \ > + $(top_srcdir)/../ltsugar.m4 $(top_srcdir)/../ltversion.m4 \ > + $(top_srcdir)/../lt~obsolete.m4 $(top_srcdir)/acinclude.m4 \ > $(top_srcdir)/../config/gc++filt.m4 \ > $(top_srcdir)/../config/tls.m4 $(top_srcdir)/../config/gthr.m4 \ > $(top_srcdir)/../config/cet.m4 $(top_srcdir)/configure.ac > diff --git a/libgm2/aclocal.m4 b/libgm2/aclocal.m4 > index bee67b05dee2..19cfb0d1eb26 100644 > --- a/libgm2/aclocal.m4 > +++ b/libgm2/aclocal.m4 > @@ -1187,15 +1187,15 @@ AC_SUBST([am__tar]) > AC_SUBST([am__untar]) > ]) # _AM_PROG_TAR > > -m4_include([../libtool.m4]) > -m4_include([../ltoptions.m4]) > -m4_include([../ltsugar.m4]) > -m4_include([../ltversion.m4]) > -m4_include([../lt~obsolete.m4]) > m4_include([../config/acx.m4]) > m4_include([../config/depstand.m4]) > m4_include([../config/lead-dot.m4]) > m4_include([../config/multi.m4]) > m4_include([../config/no-executables.m4]) > m4_include([../config/override.m4]) > +m4_include([../libtool.m4]) > +m4_include([../ltoptions.m4]) > +m4_include([../ltsugar.m4]) > +m4_include([../ltversion.m4]) > +m4_include([../lt~obsolete.m4]) > m4_include([acinclude.m4]) > diff --git a/libgm2/libm2cor/Makefile.in b/libgm2/libm2cor/Makefile.in > index 63299388dd8f..f9952cff71a7 100644 > --- a/libgm2/libm2cor/Makefile.in > +++ b/libgm2/libm2cor/Makefile.in > @@ -108,15 +108,15 @@ target_triplet = @target@ > @BUILD_CORLIB_TRUE@@ENABLE_DARWIN_AT_RPATH_TRUE@am__append_1 = > -nodefaultrpaths -Wl,-rpath,@loader_path/ > subdir = libm2cor > ACLOCAL_M4 = $(top_srcdir)/aclocal.m4 > -am__aclocal_m4_deps = $(top_srcdir)/../libtool.m4 \ > - $(top_srcdir)/../ltoptions.m4 $(top_srcdir)/../ltsugar.m4 \ > - $(top_srcdir)/../ltversion.m4 $(top_srcdir)/../lt~obsolete.m4 \ > - $(top_srcdir)/../config/acx.m4 \ > +am__aclocal_m4_deps = $(top_srcdir)/../config/acx.m4 \ > $(top_srcdir)/../config/depstand.m4 \ > $(top_srcdir)/../config/lead-dot.m4 \ > $(top_srcdir)/../config/multi.m4 \ > $(top_srcdir)/../config/no-executables.m4 \ > - $(top_srcdir)/../config/override.m4 $(top_srcdir)/acinclude.m4 \ > + $(top_srcdir)/../config/override.m4 \ > + $(top_srcdir)/../libtool.m4 $(top_srcdir)/../ltoptions.m4 \ > + $(top_srcdir)/../ltsugar.m4 $(top_srcdir)/../ltversion.m4 \ > + $(top_srcdir)/../lt~obsolete.m4 $(top_srcdir)/acinclude.m4 \ > $(top_srcdir)/../config/gc++filt.m4 \ > $(top_srcdir)/../config/tls.m4 $(top_srcdir)/../config/gthr.m4 \ > $(top_srcdir)/../config/cet.m4 $(top_srcdir)/configure.ac > diff --git a/libgm2/libm2iso/Makefile.in b/libgm2/libm2iso/Makefile.in > index 964c6da85270..370837f15b82 100644 > --- a/libgm2/libm2iso/Makefile.in > +++ b/libgm2/libm2iso/Makefile.in > @@ -108,15 +108,15 @@ target_triplet = @target@ > @BUILD_ISOLIB_TRUE@@ENABLE_DARWIN_AT_RPATH_TRUE@am__append_1 = > -nodefaultrpaths -Wl,-rpath,@loader_path/ > subdir = libm2iso > ACLOCAL_M4 =
Re: [PATCH] arm: [MVE intrinsics] Fix support for predicate constants [PR target/114801]
On Mon, 29 Apr 2024 at 15:29, Jakub Jelinek wrote:
>
> On Fri, Apr 26, 2024 at 11:10:12PM +, Christophe Lyon wrote:
> > --- /dev/null
> > +++ b/gcc/testsuite/gcc.target/arm/mve/pr114801.c
> > @@ -0,0 +1,36 @@
> > +/* { dg-do compile } */
> > +/* { dg-require-effective-target arm_v8_1m_mve_ok } */
> > +/* { dg-add-options arm_v8_1m_mve } */
> > +/* { dg-final { check-function-bodies "**" "" "" } } */
> > +
> > +#include
> > +
> > +/*
> > +** test_32:
> > +**...
> > +** mov r[0-9]+, #65535 @ movhi
> > +**...
> > +*/
> > +uint32x4_t test_32() {
> > + return vdupq_m_n_u32(vdupq_n_u32(0), 0, 0x);
>
> Just a testcase nit. I think testing 0x isn't that useful,
> it tests the same 4 bits 4 times.
> Might be more interesting to test 4 different 4 bit elements,
> one of them 0 (to verify it doesn't turn that into all ones),
> one all 1s (that is the other valid case) and then 2 random
> other values in between.
>
> > +}
> > +
> > +/*
> > +** test_16:
> > +**...
> > +** mov r[0-9]+, #52428 @ movhi
> > +**...
> > +*/
> > +uint16x8_t test_16() {
> > + return vdupq_m_n_u16(vdupq_n_u16(0), 0, 0x);
>
> And for these it can actually test all 4 possible 2 bit elements,
> so say 0x3021
>
> > +}
> > +
> > +/*
> > +** test_8:
> > +**...
> > +** mov r[0-9]+, #52428 @ movhi
> > +**...
> > +*/
> > +uint8x16_t test_8() {
> > + return vdupq_m_n_u8(vdupq_n_u8(0), 0, 0x);
>
> and here use some random pattern.
>
> BTW, the patch is ok for 14.1 if it is approved and committed today
> (so that it can be cherry-picked tomorrow morning at latest to the branch).
Thanks for your comments, I'll update the testcase, but Andre provided
additional info in the PR:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114801#c17
I tried just removing the call to gcc_unreachable in
rtx_vector_builder::find_cached_value and that does the trick, but I'm
worried by such a change.
Christophe
>
> Jakub
>
Re: [PATCH] rust: Add rust.install-dvi and rust.install-html rules
On Mon, 29 Apr 2024 at 15:24, Arthur Cohen wrote: > > Thanks Christophe! > > I've added your patch as part of a documentation pull-request I'm adding > to our dev repo: https://github.com/Rust-GCC/gccrs/pull/2966 > > It'll be upstreamed with the next batch of commits we send, as soon as > trunk reopens fully for 15.1. > Thanks! Note that I already pushed the patch as r14-9865-g73fb0a6153f478 so you may have conflicts (easy to fix ;-) ) Christophe > Best, > > Arthur > > On 4/4/24 18:27, Christophe Lyon wrote: > > rust has the (empty) rust.dvi and rust.html rules, but lacks the > > (empty) rust.install-dvi and rust.install-html ones. > > > > 2024-04-04 Christophe Lyon > > > > gcc/rust/ > > * Make-lang.in (rust.install-dvi, rust.install-html): New rules. > > --- > > gcc/rust/Make-lang.in | 2 ++ > > 1 file changed, 2 insertions(+) > > > > diff --git a/gcc/rust/Make-lang.in b/gcc/rust/Make-lang.in > > index 4d646018792..4d73412739d 100644 > > --- a/gcc/rust/Make-lang.in > > +++ b/gcc/rust/Make-lang.in > > @@ -342,6 +342,8 @@ selftest-rust-valgrind: $(RUST_SELFTEST_DEPS) > > # should have dependencies on info files that should be installed. > > rust.install-info: > > > > +rust.install-dvi: > > +rust.install-html: > > rust.install-pdf: > > > > # Install man pages for the front end. This target should ignore errors.
[PATCH] arm: [MVE intrinsics] Fix support for predicate constants [PR target/114801]
In this PR, we have to handle a case where MVE predicates are supplied
as a const_int, where individual predicates have illegal boolean
values (such as 0xc for a 4-bit boolean predicate). To avoid the ICE,
we canonicalize them, replacing a non-null value with -1.
2024-04-26 Christophe Lyon
Jakub Jelinek
PR target/114801
gcc/
* config/arm/arm-mve-builtins.cc
(function_expander::add_input_operand): Handle CONST_INT
predicates.
gcc/testsuite/
* gcc.target/arm/mve/pr114801.c: New test.
---
gcc/config/arm/arm-mve-builtins.cc | 21 +++-
gcc/testsuite/gcc.target/arm/mve/pr114801.c | 36 +
2 files changed, 56 insertions(+), 1 deletion(-)
create mode 100644 gcc/testsuite/gcc.target/arm/mve/pr114801.c
diff --git a/gcc/config/arm/arm-mve-builtins.cc
b/gcc/config/arm/arm-mve-builtins.cc
index 6a5775c67e5..f338ab36434 100644
--- a/gcc/config/arm/arm-mve-builtins.cc
+++ b/gcc/config/arm/arm-mve-builtins.cc
@@ -43,6 +43,7 @@
#include "stringpool.h"
#include "attribs.h"
#include "diagnostic.h"
+#include "rtx-vector-builder.h"
#include "arm-protos.h"
#include "arm-builtins.h"
#include "arm-mve-builtins.h"
@@ -2205,7 +2206,25 @@ function_expander::add_input_operand (insn_code icode,
rtx x)
mode = GET_MODE (x);
}
else if (VALID_MVE_PRED_MODE (mode))
-x = gen_lowpart (mode, x);
+{
+ if (CONST_INT_P (x) && (mode == V8BImode || mode == V4BImode))
+ {
+ /* In V8BI or V4BI each element has 2 or 4 bits, if those
+bits aren't all the same, it is UB and gen_lowpart might
+ICE. Canonicalize all the 2 or 4 bits to all ones if any
+of them is non-zero. */
+ unsigned HOST_WIDE_INT xi = UINTVAL (x);
+ xi |= ((xi & 0x) << 1) | ((xi & 0x) >> 1);
+ if (mode == V4BImode)
+ xi |= ((xi & 0x) << 2) | ((xi & 0x) >> 2);
+ x = gen_int_mode (xi, HImode);
+ }
+ else if (SUBREG_P (x))
+ /* gen_lowpart on a SUBREG can ICE. */
+ x = force_reg (GET_MODE (x), x);
+
+ x = gen_lowpart (mode, x);
+}
m_ops.safe_grow (m_ops.length () + 1, true);
create_input_operand (_ops.last (), x, mode);
diff --git a/gcc/testsuite/gcc.target/arm/mve/pr114801.c
b/gcc/testsuite/gcc.target/arm/mve/pr114801.c
new file mode 100644
index 000..676b109f9b8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/mve/pr114801.c
@@ -0,0 +1,36 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_v8_1m_mve_ok } */
+/* { dg-add-options arm_v8_1m_mve } */
+/* { dg-final { check-function-bodies "**" "" "" } } */
+
+#include
+
+/*
+** test_32:
+**...
+** mov r[0-9]+, #65535 @ movhi
+**...
+*/
+uint32x4_t test_32() {
+ return vdupq_m_n_u32(vdupq_n_u32(0), 0, 0x);
+}
+
+/*
+** test_16:
+**...
+** mov r[0-9]+, #52428 @ movhi
+**...
+*/
+uint16x8_t test_16() {
+ return vdupq_m_n_u16(vdupq_n_u16(0), 0, 0x);
+}
+
+/*
+** test_8:
+**...
+** mov r[0-9]+, #52428 @ movhi
+**...
+*/
+uint8x16_t test_8() {
+ return vdupq_m_n_u8(vdupq_n_u8(0), 0, 0x);
+}
--
2.34.1
Re: [PATCH] wwwdocs: contribute.html: Update consensus on patch content.
On Fri, 26 Apr 2024 at 10:25, Christophe Lyon wrote: > > On Thu, 25 Apr 2024 at 17:44, Carlos O'Donell wrote: > > > > Discussion is here: > > https://inbox.sourceware.org/gcc/CAPS5khZeWkAD=v8ka9g5eecdnk3bdhfnzjumpvc+hedmkvj...@mail.gmail.com/ > > > > Rough consensus from Jakub Jelinek, Richard Biener and others is > > that maintainers are for the change. > > > > This changes the contribution notes to allow it. > > Thank you Carlos for the patch and helping with the discussions! > > Christophe > And BTW sorry I wasn't able to attend the meeting yesterday, thanks Thiago for raising the question. I have a follow-up one: I think the same applies to binutils, but I don't think any maintainer / contributor expressed an opinion, and IIUC patch policy for binutils is (lightly) documented at https://sourceware.org/binutils/wiki/HowToContribute Maybe Nick can update it? (I don't have such rights) Thanks, Christophe > > --- > > htdocs/contribute.html | 5 +++-- > > 1 file changed, 3 insertions(+), 2 deletions(-) > > > > diff --git a/htdocs/contribute.html b/htdocs/contribute.html > > index 7c1ae323..e8137edc 100644 > > --- a/htdocs/contribute.html > > +++ b/htdocs/contribute.html > > @@ -195,8 +195,9 @@ of your testing. > > > > The patch itself > > > > -Do not include generated files as part of the patch, just mention > > -them in the ChangeLog (e.g., "* configure: Regenerate."). > > +The patch should include everything you are changing (including > > +regenerated files which should be noted in the ChangeLog e.g. > > +"* configure: Regenerate."). > > > > > > > > -- > > 2.44.0 > >
Re: [PATCH] wwwdocs: contribute.html: Update consensus on patch content.
On Thu, 25 Apr 2024 at 17:44, Carlos O'Donell wrote: > > Discussion is here: > https://inbox.sourceware.org/gcc/CAPS5khZeWkAD=v8ka9g5eecdnk3bdhfnzjumpvc+hedmkvj...@mail.gmail.com/ > > Rough consensus from Jakub Jelinek, Richard Biener and others is > that maintainers are for the change. > > This changes the contribution notes to allow it. Thank you Carlos for the patch and helping with the discussions! Christophe > --- > htdocs/contribute.html | 5 +++-- > 1 file changed, 3 insertions(+), 2 deletions(-) > > diff --git a/htdocs/contribute.html b/htdocs/contribute.html > index 7c1ae323..e8137edc 100644 > --- a/htdocs/contribute.html > +++ b/htdocs/contribute.html > @@ -195,8 +195,9 @@ of your testing. > > The patch itself > > -Do not include generated files as part of the patch, just mention > -them in the ChangeLog (e.g., "* configure: Regenerate."). > +The patch should include everything you are changing (including > +regenerated files which should be noted in the ChangeLog e.g. > +"* configure: Regenerate."). > > > > -- > 2.44.0 >
Re: [pushed] c++/modules: make bits_in/out move-constructible
Hi Patrick,
On Sat, 13 Apr 2024 at 22:12, Patrick Palka wrote:
>
> Pushed as obvious after verifying C++11 bootstrap is restored.
I guess this also fixes the bootstrap_ubsan breakage on aarch64
reported by Linaro CI?
See https://linaro.atlassian.net/browse/GNU-1199
(I think you also received a notification about this a few days ago?)
Thanks,
Christophe
>
> -- >8 --
>
> gcc/cp/ChangeLog:
>
> * module.cc (struct bytes_in::bits_in): Define defaulted
> move ctor.
> (struct bytes_out::bits_out): Likewise.
> ---
> gcc/cp/module.cc | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/gcc/cp/module.cc b/gcc/cp/module.cc
> index bbed82652d4..c6f71e11515 100644
> --- a/gcc/cp/module.cc
> +++ b/gcc/cp/module.cc
> @@ -706,6 +706,7 @@ struct bytes_in::bits_in {
> bflush ();
>}
>
> + bits_in(bits_in&&) = default;
>bits_in(const bits_in&) = delete;
>bits_in& operator=(const bits_in&) = delete;
>
> @@ -752,6 +753,7 @@ struct bytes_out::bits_out {
> bflush ();
>}
>
> + bits_out(bits_out&&) = default;
>bits_out(const bits_out&) = delete;
>bits_out& operator=(const bits_out&) = delete;
>
> --
> 2.44.0.591.g8f7582d995
>
Re: [PATCH] contrib: Add autoregen.py
On Fri, 19 Apr 2024 at 11:03, Christophe Lyon
wrote:
>
> This script is a copy of the current script used by Sourceware's
> autoregen buildbots.
>
> It is intended as a helper to regenerate files managed by autotools
> (autoconf, automake, aclocal, ), as well as the toplevel
> Makefile.in which is created by autogen.
>
> Other files can be updated when using maintainer-mode, but this is not
> covered by this script.
>
> 2024-04-19 Christophe Lyon
>
> contrib/
> * autogen.py: New script.
Of course this should read "autoregen.py" :-)
> ---
> contrib/autoregen.py | 221 +++
> 1 file changed, 221 insertions(+)
> create mode 100755 contrib/autoregen.py
>
> diff --git a/contrib/autoregen.py b/contrib/autoregen.py
> new file mode 100755
> index 000..faffc88c5bd
> --- /dev/null
> +++ b/contrib/autoregen.py
> @@ -0,0 +1,221 @@
> +#!/usr/bin/env python3
> +
> +# This script helps to regenerate files managed by autotools and
> +# autogen in binutils-gdb and gcc repositories.
> +
> +# It can be used by buildbots to check that the current repository
> +# contents has been updated correctly, and by developers to update
> +# such files as expected.
> +
> +import os
> +import shutil
> +import subprocess
> +from pathlib import Path
> +
> +
> +# On Gentoo, vanilla unpatched autotools are packaged separately.
> +# We place the vanilla names first as we want to prefer those if both exist.
> +AUTOCONF_NAMES = ["autoconf-vanilla-2.69", "autoconf-2.69", "autoconf"]
> +AUTOMAKE_NAMES = ["automake-vanilla-1.15", "automake-1.15.1", "automake"]
> +ACLOCAL_NAMES = ["aclocal-vanilla-1.15", "aclocal-1.15.1", "aclocal"]
> +AUTOHEADER_NAMES = ["autoheader-vanilla-2.69", "autoheader-2.69",
> "autoheader"]
> +AUTORECONF_NAMES = ["autoreconf-vanilla-2.69", "autoreconf-2.69",
> "autoreconf"]
> +
> +# Pick the first for each list that exists on this system.
> +AUTOCONF_BIN = next(name for name in AUTOCONF_NAMES if shutil.which(name))
> +AUTOMAKE_BIN = next(name for name in AUTOMAKE_NAMES if shutil.which(name))
> +ACLOCAL_BIN = next(name for name in ACLOCAL_NAMES if shutil.which(name))
> +AUTOHEADER_BIN = next(name for name in AUTOHEADER_NAMES if
> shutil.which(name))
> +AUTORECONF_BIN = next(name for name in AUTORECONF_NAMES if
> shutil.which(name))
> +
> +AUTOGEN_BIN = "autogen"
> +
> +# autoconf-wrapper and automake-wrapper from Gentoo look at this environment
> variable.
> +# It's harmless to set it on other systems though.
> +EXTRA_ENV = {
> +"WANT_AUTOCONF": AUTOCONF_BIN.split("-", 1)[1] if "-" in AUTOCONF_BIN
> else "",
> +"WANT_AUTOMAKE": AUTOMAKE_BIN.split("-", 1)[1] if "-" in AUTOMAKE_BIN
> else "",
> +"AUTOCONF": AUTOCONF_BIN,
> +"ACLOCAL": ACLOCAL_BIN,
> +"AUTOMAKE": AUTOMAKE_BIN,
> +"AUTOGEN": AUTOGEN_BIN,
> +}
> +ENV = os.environ.copy()
> +ENV.update(EXTRA_ENV)
> +
> +
> +# Directories we should skip entirely because they're vendored or have
> different
> +# autotools versions.
> +SKIP_DIRS = [
> +# readline and minizip are maintained with different autotools versions
> +"readline",
> +"minizip",
> +]
> +
> +# these directories are known to be re-generatable with a simple autoreconf
> +# without special -I flags
> +# Entries commented out (and directories not listed) are handled by
> +# regenerate_manually().
> +AUTORECONF_DIRS = [
> +# subdirs common to binutils-gdb and gcc
> +"libbacktrace",
> +"libdecnumber", # No Makefile.am
> +"libiberty", # No Makefile.am
> +"zlib",
> +
> +# binutils-gdb subdirs
> +"bfd",
> +"binutils",
> +"etc",
> +"gas",
> +"gdb",
> +"gdbserver",
> +"gdbsupport",
> +"gnulib",
> +"gold",
> +"gprof",
> +"gprofng",
> +"gprofng/libcollector",
> +"ld",
> +"libctf",
> +"libsframe",
> +"opcodes",
> +"sim",
> +
> +# gcc subdirs
> +"c++tools", # No aclocal.m4
> +"gcc", # No Makefile.am
> +#"fixincludes", # autoreconf complains about GCC_AC_FUNC_MMAP_BLACKLIST
> +"gnattools
[PATCH] contrib: Add autoregen.py
This script is a copy of the current script used by Sourceware's
autoregen buildbots.
It is intended as a helper to regenerate files managed by autotools
(autoconf, automake, aclocal, ), as well as the toplevel
Makefile.in which is created by autogen.
Other files can be updated when using maintainer-mode, but this is not
covered by this script.
2024-04-19 Christophe Lyon
contrib/
* autogen.py: New script.
---
contrib/autoregen.py | 221 +++
1 file changed, 221 insertions(+)
create mode 100755 contrib/autoregen.py
diff --git a/contrib/autoregen.py b/contrib/autoregen.py
new file mode 100755
index 000..faffc88c5bd
--- /dev/null
+++ b/contrib/autoregen.py
@@ -0,0 +1,221 @@
+#!/usr/bin/env python3
+
+# This script helps to regenerate files managed by autotools and
+# autogen in binutils-gdb and gcc repositories.
+
+# It can be used by buildbots to check that the current repository
+# contents has been updated correctly, and by developers to update
+# such files as expected.
+
+import os
+import shutil
+import subprocess
+from pathlib import Path
+
+
+# On Gentoo, vanilla unpatched autotools are packaged separately.
+# We place the vanilla names first as we want to prefer those if both exist.
+AUTOCONF_NAMES = ["autoconf-vanilla-2.69", "autoconf-2.69", "autoconf"]
+AUTOMAKE_NAMES = ["automake-vanilla-1.15", "automake-1.15.1", "automake"]
+ACLOCAL_NAMES = ["aclocal-vanilla-1.15", "aclocal-1.15.1", "aclocal"]
+AUTOHEADER_NAMES = ["autoheader-vanilla-2.69", "autoheader-2.69", "autoheader"]
+AUTORECONF_NAMES = ["autoreconf-vanilla-2.69", "autoreconf-2.69", "autoreconf"]
+
+# Pick the first for each list that exists on this system.
+AUTOCONF_BIN = next(name for name in AUTOCONF_NAMES if shutil.which(name))
+AUTOMAKE_BIN = next(name for name in AUTOMAKE_NAMES if shutil.which(name))
+ACLOCAL_BIN = next(name for name in ACLOCAL_NAMES if shutil.which(name))
+AUTOHEADER_BIN = next(name for name in AUTOHEADER_NAMES if shutil.which(name))
+AUTORECONF_BIN = next(name for name in AUTORECONF_NAMES if shutil.which(name))
+
+AUTOGEN_BIN = "autogen"
+
+# autoconf-wrapper and automake-wrapper from Gentoo look at this environment
variable.
+# It's harmless to set it on other systems though.
+EXTRA_ENV = {
+"WANT_AUTOCONF": AUTOCONF_BIN.split("-", 1)[1] if "-" in AUTOCONF_BIN else
"",
+"WANT_AUTOMAKE": AUTOMAKE_BIN.split("-", 1)[1] if "-" in AUTOMAKE_BIN else
"",
+"AUTOCONF": AUTOCONF_BIN,
+"ACLOCAL": ACLOCAL_BIN,
+"AUTOMAKE": AUTOMAKE_BIN,
+"AUTOGEN": AUTOGEN_BIN,
+}
+ENV = os.environ.copy()
+ENV.update(EXTRA_ENV)
+
+
+# Directories we should skip entirely because they're vendored or have
different
+# autotools versions.
+SKIP_DIRS = [
+# readline and minizip are maintained with different autotools versions
+"readline",
+"minizip",
+]
+
+# these directories are known to be re-generatable with a simple autoreconf
+# without special -I flags
+# Entries commented out (and directories not listed) are handled by
+# regenerate_manually().
+AUTORECONF_DIRS = [
+# subdirs common to binutils-gdb and gcc
+"libbacktrace",
+"libdecnumber", # No Makefile.am
+"libiberty", # No Makefile.am
+"zlib",
+
+# binutils-gdb subdirs
+"bfd",
+"binutils",
+"etc",
+"gas",
+"gdb",
+"gdbserver",
+"gdbsupport",
+"gnulib",
+"gold",
+"gprof",
+"gprofng",
+"gprofng/libcollector",
+"ld",
+"libctf",
+"libsframe",
+"opcodes",
+"sim",
+
+# gcc subdirs
+"c++tools", # No aclocal.m4
+"gcc", # No Makefile.am
+#"fixincludes", # autoreconf complains about GCC_AC_FUNC_MMAP_BLACKLIST
+"gnattools", # No aclocal.m4
+"gotools",
+"libada", # No aclocal.m4
+"libatomic",
+"libcc1",
+"libcody", # No aclocal.m4
+"libcpp", # No Makefile.am
+"libffi",
+"libgcc", # No aclocal.m4
+"libgfortran",
+# Hack: ACLOCAL_AMFLAGS = -I .. -I ../config in Makefile.in but we
+# apply -I../config -I.. otherwise we do not match the current
+# contents
+#"libgm2",
+"libgo",
+"libgomp",
+"libgrust",
+"libitm",
+"libobjc", # No Makefile.am
+"libphobos",
+"libquadmath",
+&quo
Re: [PATCH] libgcc: Fix up __divmodbitint4 [PR114755]
On Thu, 18 Apr 2024 at 09:37, Jakub Jelinek wrote:
>
> Hi!
>
> The following testcase aborts on aarch64-linux but does not on x86_64-linux.
> In both cases there is UB in the __divmodbitint4 implemenetation.
> When the divisor is negative with most significant limb (even when partial)
> all ones, has at least 2 limbs and the second most significant limb has the
> most significant bit clear, when this number is negated, it will have 0
> in the most significant limb.
> Already in the PR114397 r14-9592 fix I was dealing with such divisors, but
> thought the problem is only if because of that un < vn doesn't imply the
> quotient is 0 and remainder u.
> But as this testcase shows, the problem is with such divisors always.
> What happens is that we use __builtin_clz* on the most significant limb,
> and assume it will not be 0 because that is UB for the builtins.
> Normally the most significant limb of the divisor shouldn't be 0, as
> guaranteed by the bitint_reduce_prec e.g. for the positive numbers, unless
> the divisor is just 0 (but for vn == 1 we have special cases).
Just curious: could this have been caught by ubsan? (I don't know if
it knows about clz)
Thanks,
Christophe
>
> The following patch moves the handling of this corner case a few lines
> earlier before the un < vn check, because adjusting the vn later is harder.
>
> Bootstrapped/regtested on x86_64-linux and i686-linux, plus tested with
> make check-gcc -j32 -k GCC_TEST_RUN_EXPENSIVE=1
> RUNTESTFLAGS="GCC_TEST_RUN_EXPENSIVE=1 dg.exp='*bitint* pr112673.c
> builtin-stdc-bit-*.c pr112566-2.c pr112511.c' dg-torture.exp=*bitint*
> dfp.exp=*bitint*"
> on aarch64-linux, ok for trunk?
>
> 2024-04-18 Jakub Jelinek
>
> PR libgcc/114755
> * libgcc2.c (__divmodbitint4): Perform the decrement on negative
> v with most significant limb all ones and the second least
> significant limb with most significant bit clear always, regardless of
> un < vn.
>
> * gcc.dg/torture/bitint-69.c: New test.
>
> --- libgcc/libgcc2.c.jj 2024-03-21 13:07:43.629886730 +0100
> +++ libgcc/libgcc2.c2024-04-17 19:00:55.453691368 +0200
> @@ -1705,69 +1705,62 @@ __divmodbitint4 (UBILtype *q, SItype qpr
>USItype rn = ((USItype) rprec + W_TYPE_SIZE - 1) / W_TYPE_SIZE;
>USItype up = auprec % W_TYPE_SIZE;
>USItype vp = avprec % W_TYPE_SIZE;
> + /* If vprec < 0 and the top limb of v is all ones and the second most
> + significant limb has most significant bit clear, then just decrease
> + vn/avprec/vp, because after negation otherwise v2 would have most
> + significant limb clear. */
> + if (vprec < 0
> + && ((v[BITINT_END (0, vn - 1)] | (vp ? ((UWtype) -1 << vp) : 0))
> + == (UWtype) -1)
> + && vn > 1
> + && (Wtype) v[BITINT_END (1, vn - 2)] >= 0)
> +{
> + vp = 0;
> + --vn;
> +#if __LIBGCC_BITINT_ORDER__ == __ORDER_BIG_ENDIAN__
> + ++v;
> +#endif
> +}
>if (__builtin_expect (un < vn, 0))
> {
> - /* If abs(v) > abs(u), then q is 0 and r is u.
> -Unfortunately un < vn doesn't always mean abs(v) > abs(u).
> -If uprec > 0 and vprec < 0 and vn == un + 1, if the
> -top limb of v is all ones and the second most significant
> -limb has most significant bit clear, then just decrease
> -vn/avprec/vp and continue, after negation both numbers
> -will have the same number of limbs. */
> - if (un + 1 == vn
> - && uprec >= 0
> - && vprec < 0
> - && ((v[BITINT_END (0, vn - 1)] | (vp ? ((UWtype) -1 << vp) : 0))
> - == (UWtype) -1)
> - && (Wtype) v[BITINT_END (1, vn - 2)] >= 0)
> - {
> - vp = 0;
> - --vn;
> + /* q is 0 and r is u. */
> + if (q)
> + __builtin_memset (q, 0, qn * sizeof (UWtype));
> + if (r == NULL)
> + return;
> #if __LIBGCC_BITINT_ORDER__ == __ORDER_BIG_ENDIAN__
> - ++v;
> + r += rn - 1;
> + u += un - 1;
> #endif
> + if (up)
> + --un;
> + if (rn < un)
> + un = rn;
> + for (rn -= un; un; --un)
> + {
> + *r = *u;
> + r += BITINT_INC;
> + u += BITINT_INC;
> }
> - else
> + if (!rn)
> + return;
> + if (up)
> {
> - /* q is 0 and r is u. */
> - if (q)
> - __builtin_memset (q, 0, qn * sizeof (UWtype));
> - if (r == NULL)
> + if (uprec > 0)
> + *r = *u & (((UWtype) 1 << up) - 1);
> + else
> + *r = *u | ((UWtype) -1 << up);
> + r += BITINT_INC;
> + if (!--rn)
> return;
> -#if __LIBGCC_BITINT_ORDER__ == __ORDER_BIG_ENDIAN__
> - r += rn - 1;
> - u += un - 1;
> -#endif
> - if (up)
> - --un;
> - if (rn < un)
> - un = rn;
> - for (rn -= un; un; --un)
> - {
> - *r = *u;
> - r += BITINT_INC;
> - u +=
Re: Updated Sourceware infrastructure plans
Hi, On Thu, 18 Apr 2024 at 10:15, FX Coudert wrote: > > > I regenerate auto* files from time to time for libgfortran. Regenerating > > them has always been very fragile (using --enable-maintainer-mode), > > and difficult to get right. > > I have never found them difficult to regenerate, but if you have only a non > maintainer build, it is a pain to have to make a new maintainer build for a > minor change. > FWIW, we have noticed lots of warnings from autoreconf in libgfortran. I didn't try to investigate, since the regenerated files are identical to what is currently in the repo. For instance, you can download the "stdio" output from the autoregen.py step in https://builder.sourceware.org/buildbot/#/builders/269/builds/4373 Thanks, Christophe > Moreover, our m4 code is particularly painful to use and unreadable. I have > been wondering for some time: should we switch to simpler Python scripts? It > would also mean that we would have fewer files in the generated/ folder: > right now, every time we add new combinations of types, we have a > combinatorial explosion of files. > > $ ls generated/sum_* > generated/sum_c10.c generated/sum_c17.c generated/sum_c8.c > generated/sum_i16.c generated/sum_i4.c generated/sum_r10.c > generated/sum_r17.c generated/sum_r8.c > generated/sum_c16.c generated/sum_c4.c generated/sum_i1.c > generated/sum_i2.c generated/sum_i8.c generated/sum_r16.c generated/sum_r4.c > > We could imagine having a single file for all sum intrinsics. > > How do Fortran maintainers feel about that? > > FX
[gcc r14-10006] libcpp: Regenerate aclocal.m4 and configure [PR 114748]
https://gcc.gnu.org/g:a9fefbf71726bb0ce89c79e547ab3319af3227a8 commit r14-10006-ga9fefbf71726bb0ce89c79e547ab3319af3227a8 Author: Christophe Lyon Date: Wed Apr 17 13:56:19 2024 + libcpp: Regenerate aclocal.m4 and configure [PR 114748] As discussed in the PR, aclocal.m4 and configure were incorrectly regenerated at some point. 2024-04-17 Christophe Lyon PR preprocessor/114748 libcpp/ * aclocal.m4: Regenerate. * configure: Regenerate. Diff: --- libcpp/aclocal.m4 | 1 + libcpp/configure | 3 +++ 2 files changed, 4 insertions(+) diff --git a/libcpp/aclocal.m4 b/libcpp/aclocal.m4 index 4fc81709622..4d898ea2c97 100644 --- a/libcpp/aclocal.m4 +++ b/libcpp/aclocal.m4 @@ -26,6 +26,7 @@ m4_include([../config/lib-ld.m4]) m4_include([../config/lib-link.m4]) m4_include([../config/lib-prefix.m4]) m4_include([../config/nls.m4]) +m4_include([../config/override.m4]) m4_include([../config/po.m4]) m4_include([../config/progtest.m4]) m4_include([../config/warnings.m4]) diff --git a/libcpp/configure b/libcpp/configure index 8a38c0546e3..32d6aaa3069 100755 --- a/libcpp/configure +++ b/libcpp/configure @@ -2670,6 +2670,9 @@ ac_compiler_gnu=$ac_cv_c_compiler_gnu + + + ac_aux_dir= for ac_dir in "$srcdir" "$srcdir/.." "$srcdir/../.."; do if test -f "$ac_dir/install-sh"; then
[PATCH] libcpp: Regenerate aclocal.m4 and configure [PR 114748]
As discussed in the PR, aclocal.m4 and configure were incorrectly regenerated at some point. 2024-04-17 Christophe Lyon PR preprocessor/114748 libcpp/ * aclocal.m4: Regenerate. * configure: Regenerate. --- libcpp/aclocal.m4 | 1 + libcpp/configure | 3 +++ 2 files changed, 4 insertions(+) diff --git a/libcpp/aclocal.m4 b/libcpp/aclocal.m4 index 4fc81709622..4d898ea2c97 100644 --- a/libcpp/aclocal.m4 +++ b/libcpp/aclocal.m4 @@ -26,6 +26,7 @@ m4_include([../config/lib-ld.m4]) m4_include([../config/lib-link.m4]) m4_include([../config/lib-prefix.m4]) m4_include([../config/nls.m4]) +m4_include([../config/override.m4]) m4_include([../config/po.m4]) m4_include([../config/progtest.m4]) m4_include([../config/warnings.m4]) diff --git a/libcpp/configure b/libcpp/configure index 8a38c0546e3..32d6aaa3069 100755 --- a/libcpp/configure +++ b/libcpp/configure @@ -2670,6 +2670,9 @@ ac_compiler_gnu=$ac_cv_c_compiler_gnu + + + ac_aux_dir= for ac_dir in "$srcdir" "$srcdir/.." "$srcdir/../.."; do if test -f "$ac_dir/install-sh"; then -- 2.34.1
Re: [PATCH] [testsuite] Fix pretty printers regexps for GDB output
ping?
On Tue, 6 Feb 2024 at 10:26, Christophe Lyon wrote:
>
> ping?
>
> On Thu, 25 Jan 2024 at 16:54, Christophe Lyon
> wrote:
> >
> > On Wed, 24 Jan 2024 at 12:02, Jonathan Wakely wrote:
> > >
> > > On Wed, 24 Jan 2024 at 10:48, Christophe Lyon wrote:
> > > >
> > > > GDB emits end of lines as \r\n, we currently match the reverse \n\r,
> > >
> > > We currently match [\n\r]+ which should match any of \n, \r, \n\r or \r\n
> > >
> >
> > Hmm, right, sorry I had this patch in my tree for quite some time, but
> > wrote the description just now, so I read a bit too quickly.
> >
> > >
> > > > possibly leading to mismatches under racy conditions.
> > >
> > > What do we incorrectly match? Is the problem that a \r\n sequence
> > > might be incompletely printed, due to buffering, and so the regex only
> > > sees (and matches) the \r which then leaves an unwanted \n in the
> > > stream, which then interferes with the next match? I don't understand
> > > why that problem wouldn't just result in a failed match with your new
> > > regex though.
> > >
> > Exactly: READ1 forces read() to return 1 byte at a time, so we leave
> > an unwanted \r in front of a string that should otherwise match the
> > "got" case.
> >
> > >
> > > >
> > > > I noticed this while running the GCC testsuite using the equivalent of
> > > > GDB's READ1 feature [1] which helps detecting bufferization issues.
> > > >
> > > > Adjusting the first regexp to match the right order implied fixing the
> > > > second one, to skip the empty lines.
> > >
> > > At the very least, this part of the description is misleading. The
> > > existing regex matches "the right order" already. The change is to
> > > match *exactly* \r\n instead of any mix of CR and LF characters.
> > > That's not about matching "the right order", it's being more precise
> > > in what we match.
> > >
> > > But I'm still confused about what the failure scenario is and how the
> > > change fixes it.
> > >
> >
> > I followed what the GDB testsuite does (it matches \r\n at the end of
> > many regexps), but in fact it seems it's not needed:
> > it works if I update the "got" regexp like this (ie. accept any number
> > of leading \r or \n):
> > - -re {^(type|\$([0-9]+)) = ([^\n\r]*)[\n\r]+} {
> > + -re {^[\n\r]*(type|\$([0-9]+)) = ([^\n\r]*)[\n\r]+} {
> > and leave the "skipping" regexp as it is currently.
> >
> > Is the new attached version OK?
> >
> > Thanks,
> >
> > Christophe
> >
> > > >
> > > > Tested on aarch64-linux-gnu.
> > > >
> > > > [1]
> > > > https//github.com/bminor/binutils-gdb/blob/master/gdb/testsuite/README#L269
> > > >
> > > > 2024-01-24 Christophe Lyon
> > > >
> > > > libstdc++-v3/
> > > > * testsuite/lib/gdb-test.exp (gdb-test): Fix regexps.
> > > > ---
> > > > libstdc++-v3/testsuite/lib/gdb-test.exp | 4 ++--
> > > > 1 file changed, 2 insertions(+), 2 deletions(-)
> > > >
> > > > diff --git a/libstdc++-v3/testsuite/lib/gdb-test.exp
> > > > b/libstdc++-v3/testsuite/lib/gdb-test.exp
> > > > index 31206f2fc32..0de8d9ee153 100644
> > > > --- a/libstdc++-v3/testsuite/lib/gdb-test.exp
> > > > +++ b/libstdc++-v3/testsuite/lib/gdb-test.exp
> > > > @@ -194,7 +194,7 @@ proc gdb-test { marker {selector {}} {load_xmethods
> > > > 0} } {
> > > >
> > > > set test_counter 0
> > > > remote_expect target [timeout_value] {
> > > > - -re {^(type|\$([0-9]+)) = ([^\n\r]*)[\n\r]+} {
> > > > + -re {^(type|\$([0-9]+)) = ([^\n\r]*)\r\n} {
> > > > send_log "got: $expect_out(buffer)"
> > > >
> > > > incr test_counter
> > > > @@ -250,7 +250,7 @@ proc gdb-test { marker {selector {}} {load_xmethods
> > > > 0} } {
> > > > return
> > > > }
> > > >
> > > > - -re {^[^$][^\n\r]*[\n\r]+} {
> > > > + -re {^[\r\n]*[^$][^\n\r]*\r\n} {
> > > > send_log "skipping: $expect_out(buffer)"
> > > > exp_continue
> > > > }
> > > > --
> > > > 2.34.1
> > > >
> > >
[gcc r14-9865] rust: Add rust.install-dvi and rust.install-html rules
https://gcc.gnu.org/g:73fb0a6153f4781587c925c56683b61632e63dee commit r14-9865-g73fb0a6153f4781587c925c56683b61632e63dee Author: Christophe Lyon Date: Thu Apr 4 16:21:46 2024 + rust: Add rust.install-dvi and rust.install-html rules rust has the (empty) rust.dvi and rust.html rules, but lacks the (empty) rust.install-dvi and rust.install-html ones. 2024-04-04 Christophe Lyon gcc/rust/ * Make-lang.in (rust.install-dvi, rust.install-html): New rules. Diff: --- gcc/rust/Make-lang.in | 2 ++ 1 file changed, 2 insertions(+) diff --git a/gcc/rust/Make-lang.in b/gcc/rust/Make-lang.in index 4d646018792..4d73412739d 100644 --- a/gcc/rust/Make-lang.in +++ b/gcc/rust/Make-lang.in @@ -342,6 +342,8 @@ selftest-rust-valgrind: $(RUST_SELFTEST_DEPS) # should have dependencies on info files that should be installed. rust.install-info: +rust.install-dvi: +rust.install-html: rust.install-pdf: # Install man pages for the front end. This target should ignore errors.
Re: [RFC] add regenerate Makefile target
Hi, On Mon, 25 Mar 2024 at 15:19, Christophe Lyon wrote: > > On Thu, 21 Mar 2024 at 15:32, Christophe Lyon > wrote: > > > > On Wed, 20 Mar 2024 at 16:34, Simon Marchi wrote: > > > > > > On 3/18/24 13:25, Christophe Lyon wrote: > > > > Well the rule to regenerate Makefile.in (eg in in opcodes/) is a bit > > > > more complex > > > > than just calling automake. IIUC it calls automake --foreign it any of > > > > *.m4 file from $(am__configure_deps) that is newer than Makefile.in > > > > (with an early exit in the loop), does nothing if Makefile.am or > > > > doc/local.mk are newer than Makefile.in, and then calls 'automake > > > > --foreign Makefile' > > > > > > The rules looks complex because they've been generated by automake, this > > > Makefile.in is not written by hand. And I guess automake has put > > > `--foreign` there because foreign is used in Makefile.am: > > Yes, I know :-) > > > > > > > > AUTOMAKE_OPTIONS = foreign no-dist > > > > > > But a simple call so `automake -f` (or `autoreconf -f`) just works, as > > > automake picks up the foreign option from AUTOMAKE_OPTIONS, so a human > > > or an external script who wants to regenerate things would probably just > > > use that. > > > > Indeed. I guess my concern is: if some change happens to > > Makefile.am/Makefile.in which would imply that 'autoreconf -f' would > > not work, how do we make sure autoregen.py (or whatever script) is > > updated accordingly? Or maybe whatever change is made to > > Makefile.am/Makefile.in, 'autoreconf -f' is supposed to handle it > > without additional flag? > > > I think I've just noticed a variant of this: if you look at > opcodes/Makefile.in, you can see that aclocal.m4 depends on > configure.ac (among others). So if configure.ac is updated, a > maintainer-mode rule in Makefile.in will call aclocal and regenerate > aclocal.m4. > > However, autoregen.py calls aclocal only if configure.ac contains > AC_CONFIG_MACRO_DIRS, which is not the case here. > > That's probably a bug in opcode/configure.ac, but still the current > Makefile.in machinery would update aclocal.m4 as needed when > autoregen.py will not. > > I haven't audited all configure.ac but there are probably other > occurrences of this. > Another discrepancy I've just noticed: if you look at libsframe/Makefile.am, you can see that ACLOCAL_AMFLAGS = -I .. -I ../config -I ../bfd, so if you run autoreconf -f, it will invoke aclocal with these flags (the same is performed by the aclocal.m4 regeneration rule in the Makefile), but autoregen.py won't run aclocal because configure.ac does not define AC_CONFIG_MACRO_DIRS, and even if it did, it would only use -I../config I guess the same applies for several other subdirs. So in general how do we make sure autoregen.py uses the right flags? Or what prevents us from just using autoreconf -f? If that does not work because configure.ac/Makeline.am and others have bugs, maybe we should fix those bugs instead? which makes me think about Eric's reply: > `autoreconf -f` works fine in individual subdirectories, the problem > is that the top-level configure.ac doesn't use the AC_CONFIG_SUBDIRS > macro to specify its subdirectories, but rather uses its own > hand-rolled method of specifying subdirectories that autoreconf > doesn't know about. This means that autoreconf won't automatically > recurse into all the necessary subdirectories by itself automatically, > and instead has to be run manually in each subdirectory separately. It's not clear to me if that "problem" is a bug, or a design decision we must take into account when writing tools to help regeneration? > Also the various subdirectories are inconsistent about whether they > have a rule for running it (autoreconf) from the Makefile or not, should that be considered a bug, and fixed? > which usually comes down to whether the subdirectory uses automake for > its Makefile or not (the top-level Makefile doesn't; it uses its own > weird autogen-based regeneration method instead, which means that it > misses out on all the built-in rules that automake would implicitly > generate, including ones related to build system regeneration). Thanks, Christophe > Christophe > > > > > > > > The bot I want to put in place would regenerate things as they are > > > > supposed to be, then build and run the testsuite to make sure that > > > > what is supposed to be committed would work (if the committer > > > > regenerates everything correctly) > > > > > > For your job, would it be fine to just force-regenerate
[gcc r14-9807] modula2: Add m2.install-dvi in gcc/m2/Make-lang.in
https://gcc.gnu.org/g:6f1005649ff5f544eefba29ba4fb121dba0c6683 commit r14-9807-g6f1005649ff5f544eefba29ba4fb121dba0c6683 Author: Christophe Lyon Date: Thu Apr 4 16:15:12 2024 + modula2: Add m2.install-dvi in gcc/m2/Make-lang.in m2 has a m2.dvi build rule, but lacks the m2.install-dvi one. 2024-04-04 Christophe Lyon gcc/m2/ * Make-lang.in (m2.install-dvi): New rule. Diff: --- gcc/m2/Make-lang.in | 12 1 file changed, 12 insertions(+) diff --git a/gcc/m2/Make-lang.in b/gcc/m2/Make-lang.in index e56240b4c44..0abd8ce1455 100644 --- a/gcc/m2/Make-lang.in +++ b/gcc/m2/Make-lang.in @@ -162,6 +162,18 @@ m2.dvi: doc/m2.dvi doc/m2.dvi: $(TEXISRC) $(objdir)/m2/images/gnu.eps $(TEXI2DVI) -c -I $(objdir)/m2 -I $(srcdir)/doc/include -o $@ $(srcdir)/doc/gm2.texi +M2_DVIFILES = doc/m2.dvi + +m2.install-dvi: $(M2_DVIFILES) + @$(NORMAL_INSTALL) + test -z "$(dvidir)/gcc" || $(mkinstalldirs) "$(DESTDIR)$(dvidir)/gcc" + @list='$(M2_DVIFILES)'; for p in $$list; do \ + if test -f "$$p"; then d=; else d="$(srcdir)/"; fi; \ + f=$(dvi__strip_dir) \ + echo " $(INSTALL_DATA) '$$d$$p' '$(DESTDIR)$(dvidir)/gcc/$$f'"; \ + $(INSTALL_DATA) "$$d$$p" "$(DESTDIR)$(dvidir)/gcc/$$f"; \ + done + doc/m2.ps: doc/m2.dvi dvips -o $@ $<
Re: Patches submission policy change
On Thu, 4 Apr 2024 at 10:12, Jan Beulich wrote: > > On 03.04.2024 15:11, Christophe Lyon wrote: > > On Wed, 3 Apr 2024 at 10:30, Jan Beulich wrote: > >> > >> On 03.04.2024 10:22, Christophe Lyon wrote: > >>> Dear release managers and developers, > >>> > >>> TL;DR: For the sake of improving precommit CI coverage and simplifying > >>> workflows, I’d like to request a patch submission policy change, so > >>> that we now include regenerated files. This was discussed during the > >>> last GNU toolchain office hours meeting [1] (2024-03-28). > >>> > >>> Benefits or this change include: > >>> - Increased compatibility with precommit CI > >>> - No need to manually edit patches before submitting, thus the “git > >>> send-email” workflow is simplified > >>> - Patch reviewers can be confident that the committed patch will be > >>> exactly what they approved > >>> - Precommit CI can test exactly what has been submitted > >>> > >>> Any concerns/objections? > >> > >> Yes: Patch size. And no, not sending patches inline is bad practice. > > Not sure what you mean? Do you mean sending patches as attachments is > > bad practice? > > Yes. It makes it difficult to reply to them (with proper reply context). Agreed. > > >> Even assuming sending patches bi-modal (inline and as attachment) works > >> (please indicate whether that's the case), it would mean extra work on > >> the sending side. > >> > > For the CI perspective, we use what patchwork is able to detect as patches. > > Looking at recent patches submissions, it seems patchwork is able to > > cope with the output of git format-patch/git send-email, as well as > > attachments. > > There are cases where patchwork is not able to detect the patch, but I > > don't know patchwork's exact specifications. > > Question was though: If a patch was sent inline plus attachment, what > would CI use as the patch to apply? IOW would it be an option to > attach the un-stripped patch, while inlining the stripped one? > Sorry, I don't know how patchwork would handle such a case. Thanks, Christophe > Jan >
Re: Patches submission policy change
Hi Mark, On 4/4/24 23:35, Mark Wielaard wrote: Hi Christophe, On Wed, Apr 03, 2024 at 10:22:24AM +0200, Christophe Lyon via Gdb wrote: TL;DR: For the sake of improving precommit CI coverage and simplifying workflows, I’d like to request a patch submission policy change, so that we now include regenerated files. This was discussed during the last GNU toolchain office hours meeting [1] (2024-03-28). Benefits or this change include: - Increased compatibility with precommit CI - No need to manually edit patches before submitting, thus the “git send-email” workflow is simplified - Patch reviewers can be confident that the committed patch will be exactly what they approved - Precommit CI can test exactly what has been submitted Any concerns/objections? I am all for it. It will make testing patches easier for everyone. I do think we still need a better way to make sure all generated files can be regenerated. If only to check that the files were generated correctly with the correct versions. The autoregen buildbots are able to catch some, but not all such mistakes. wrt to the mailinglists maybe getting larger patches, I think most will still be under 400K and I wouldn't raise the limit (because most such larger emails are really just spam). But we might want to get more mailinglist moderators. gcc-patches, binutils and gdb-patches all have only one moderator (Jeff, Ian and Thiago). It would probably be good if there were more. Any volunteers? It shouldn't be more than 1 to 3 emails a week (sadly most of them spam). I'm happy to help with moderation of any/all of these 3 lists. Thanks, Christophe Cheers, Mark
[gcc r14-9800] go: Add go.install-dvi rule in go/Make-lang.in
https://gcc.gnu.org/g:12b04452b40d49bb5322653cb5716b1ebf71b73d commit r14-9800-g12b04452b40d49bb5322653cb5716b1ebf71b73d Author: Christophe Lyon Date: Thu Apr 4 16:18:52 2024 + go: Add go.install-dvi rule in go/Make-lang.in go has a go.dvi build rule, but lacks the go.install-dvi one. 2024-04-04 Christophe Lyon gcc/go/ * Make-lang.in (go.install-dvi): New rule. Diff: --- gcc/go/Make-lang.in | 10 ++ 1 file changed, 10 insertions(+) diff --git a/gcc/go/Make-lang.in b/gcc/go/Make-lang.in index 9a31eafa219..5c569a40389 100644 --- a/gcc/go/Make-lang.in +++ b/gcc/go/Make-lang.in @@ -175,6 +175,16 @@ go.install-pdf: doc/gccgo.pdf $(INSTALL_DATA) "$$d$$p" "$(DESTDIR)$(pdfdir)/gcc/$$f"; \ done +go.install-dvi: doc/gccgo.dvi + @$(NORMAL_INSTALL) + test -z "$(dvidir)" || $(mkinstalldirs) "$(DESTDIR)$(dvidir)/gcc" + @for p in doc/gccgo.dvi; do \ + if test -f "$$p"; then d=; else d="$(srcdir)/"; fi; \ + f=$(dvi__strip_dir) \ + echo " $(INSTALL_DATA) '$$d$$p' '$(DESTDIR)$(dvidir)/gcc/$$f'"; \ + $(INSTALL_DATA) "$$d$$p" "$(DESTDIR)$(dvidir)/gcc/$$f"; \ + done + go.install-html: $(build_htmldir)/go @$(NORMAL_INSTALL) test -z "$(htmldir)" || $(mkinstalldirs) "$(DESTDIR)$(htmldir)"
[PATCH] rust: Add rust.install-dvi and rust.install-html rules
rust has the (empty) rust.dvi and rust.html rules, but lacks the (empty) rust.install-dvi and rust.install-html ones. 2024-04-04 Christophe Lyon gcc/rust/ * Make-lang.in (rust.install-dvi, rust.install-html): New rules. --- gcc/rust/Make-lang.in | 2 ++ 1 file changed, 2 insertions(+) diff --git a/gcc/rust/Make-lang.in b/gcc/rust/Make-lang.in index 4d646018792..4d73412739d 100644 --- a/gcc/rust/Make-lang.in +++ b/gcc/rust/Make-lang.in @@ -342,6 +342,8 @@ selftest-rust-valgrind: $(RUST_SELFTEST_DEPS) # should have dependencies on info files that should be installed. rust.install-info: +rust.install-dvi: +rust.install-html: rust.install-pdf: # Install man pages for the front end. This target should ignore errors. -- 2.34.1
[PATCH] modula2: Add m2.install-dvi in gcc/m2/Make-lang.in
m2 has a m2.dvi build rule, but lacks the m2.install-dvi one. 2024-04-04 Christophe Lyon gcc/m2/ * Make-lang.in (m2.install-dvi): New rule. --- gcc/m2/Make-lang.in | 12 1 file changed, 12 insertions(+) diff --git a/gcc/m2/Make-lang.in b/gcc/m2/Make-lang.in index e56240b4c44..0abd8ce1455 100644 --- a/gcc/m2/Make-lang.in +++ b/gcc/m2/Make-lang.in @@ -162,6 +162,18 @@ m2.dvi: doc/m2.dvi doc/m2.dvi: $(TEXISRC) $(objdir)/m2/images/gnu.eps $(TEXI2DVI) -c -I $(objdir)/m2 -I $(srcdir)/doc/include -o $@ $(srcdir)/doc/gm2.texi +M2_DVIFILES = doc/m2.dvi + +m2.install-dvi: $(M2_DVIFILES) + @$(NORMAL_INSTALL) + test -z "$(dvidir)/gcc" || $(mkinstalldirs) "$(DESTDIR)$(dvidir)/gcc" + @list='$(M2_DVIFILES)'; for p in $$list; do \ + if test -f "$$p"; then d=; else d="$(srcdir)/"; fi; \ + f=$(dvi__strip_dir) \ + echo " $(INSTALL_DATA) '$$d$$p' '$(DESTDIR)$(dvidir)/gcc/$$f'"; \ + $(INSTALL_DATA) "$$d$$p" "$(DESTDIR)$(dvidir)/gcc/$$f"; \ + done + doc/m2.ps: doc/m2.dvi dvips -o $@ $< -- 2.34.1
[PATCH] go: Add go.install-dvi rule in go/Make-lang.in
go has a go.dvi build rule, but lacks the go.install-dvi one. 2024-04-04 Christophe Lyon gcc/go/ * Make-lang.in (go.install-dvi): New rule. --- gcc/go/Make-lang.in | 10 ++ 1 file changed, 10 insertions(+) diff --git a/gcc/go/Make-lang.in b/gcc/go/Make-lang.in index 9a31eafa219..5c569a40389 100644 --- a/gcc/go/Make-lang.in +++ b/gcc/go/Make-lang.in @@ -175,6 +175,16 @@ go.install-pdf: doc/gccgo.pdf $(INSTALL_DATA) "$$d$$p" "$(DESTDIR)$(pdfdir)/gcc/$$f"; \ done +go.install-dvi: doc/gccgo.dvi + @$(NORMAL_INSTALL) + test -z "$(dvidir)" || $(mkinstalldirs) "$(DESTDIR)$(dvidir)/gcc" + @for p in doc/gccgo.dvi; do \ + if test -f "$$p"; then d=; else d="$(srcdir)/"; fi; \ + f=$(dvi__strip_dir) \ + echo " $(INSTALL_DATA) '$$d$$p' '$(DESTDIR)$(dvidir)/gcc/$$f'"; \ + $(INSTALL_DATA) "$$d$$p" "$(DESTDIR)$(dvidir)/gcc/$$f"; \ + done + go.install-html: $(build_htmldir)/go @$(NORMAL_INSTALL) test -z "$(htmldir)" || $(mkinstalldirs) "$(DESTDIR)$(htmldir)" -- 2.34.1
Re: Patches submission policy change
On Wed, 3 Apr 2024 at 14:59, Joel Sherrill wrote: > > Another possible issue which may be better now than in years past > is that the versions of autoconf/automake required often had to be > installed by hand. I think newlib has gotten better but before the > rework on its Makefile/configure, I had a special install of autotools > which precisely matched what it required. > > And that led to very few people being able to successfully regenerate. > > Is that avoidable? > > OTOH the set of people touching these files may be small enough that > pain isn't an issue. > For binutils/gcc/gdb we still have to use specific versions which are generally not the distro's ones. So indeed, the number of people having to update autotools-related files is relatively small, but there are other files which are regenerated during the build process when maintainer-mode is enabled (for instance parts of the gcc documentation, or opcodes tables in binutils, and these are modified by more people. Thanks, Christophe > --joel > > On Wed, Apr 3, 2024 at 5:22 AM Jan Beulich via Gcc wrote: >> >> On 03.04.2024 10:57, Richard Biener wrote: >> > On Wed, 3 Apr 2024, Jan Beulich wrote: >> >> On 03.04.2024 10:45, Jakub Jelinek wrote: >> >>> On Wed, Apr 03, 2024 at 10:22:24AM +0200, Christophe Lyon wrote: >> >>>> Any concerns/objections? >> >>> >> >>> I'm all for it, in fact I've been sending it like that myself for years >> >>> even when the policy said not to. In most cases, the diff for the >> >>> regenerated files is very small and it helps even in patch review to >> >>> actually check if the configure.ac/m4 etc. changes result just in the >> >>> expected changes and not some unrelated ones (e.g. caused by user using >> >>> wrong version of autoconf/automake etc.). >> >>> There can be exceptions, e.g. when in GCC we update from a new version >> >>> of Unicode, the regenerated ucnid.h diff can be large and >> >>> uname2c.h can be huge, such that it can trigger the mailing list size >> >>> limits even when the patch is compressed, see e.g. >> >>> https://gcc.gnu.org/pipermail/gcc-patches/2023-November/636427.html >> >>> https://gcc.gnu.org/pipermail/gcc-patches/2023-November/636426.html >> >>> But I think most configure or Makefile changes should be pretty small, >> >>> usual changes shouldn't rewrite everything in those files. >> >> >> >> Which may then call for a policy saying "include generate script diff-s, >> >> but don't include generated data file ones"? At least on the binutils >> >> side, dealing (for CI) with what e.g. opcodes/*-gen produce ought to be >> >> possible by having something along the lines of "maintainer mode light". >> > >> > I'd say we should send generated files when it fits the mailing list >> > limits (and possibly simply lift those limits?). >> >> Well, that would allow patches making it through, but it would still >> severely increase overall size. I'm afraid more people than not also >> fail to cut down reply context, so we'd further see (needlessly) huge >> replies to patches as well. >> >> Additionally - how does one up front determine "fits the mailing list >> limits"? My mail UI (Thunderbird) doesn't show me the size of a message >> until I've actually sent it. >> >> > As a last resort >> > do a series splitting the re-generation out (but I guess this would >> > confuse the CI as well and of course for the push you want to squash >> > again). >> >> Yeah, unless the CI would only ever test full series, this wouldn't help. >> It's also imo even more cumbersome than simply stripping the generated >> file parts from emails. >> >> Jan
Re: Patches submission policy change
On Wed, 3 Apr 2024 at 12:21, Jan Beulich wrote: > > On 03.04.2024 10:57, Richard Biener wrote: > > On Wed, 3 Apr 2024, Jan Beulich wrote: > >> On 03.04.2024 10:45, Jakub Jelinek wrote: > >>> On Wed, Apr 03, 2024 at 10:22:24AM +0200, Christophe Lyon wrote: > >>>> Any concerns/objections? > >>> > >>> I'm all for it, in fact I've been sending it like that myself for years > >>> even when the policy said not to. In most cases, the diff for the > >>> regenerated files is very small and it helps even in patch review to > >>> actually check if the configure.ac/m4 etc. changes result just in the > >>> expected changes and not some unrelated ones (e.g. caused by user using > >>> wrong version of autoconf/automake etc.). > >>> There can be exceptions, e.g. when in GCC we update from a new version > >>> of Unicode, the regenerated ucnid.h diff can be large and > >>> uname2c.h can be huge, such that it can trigger the mailing list size > >>> limits even when the patch is compressed, see e.g. > >>> https://gcc.gnu.org/pipermail/gcc-patches/2023-November/636427.html > >>> https://gcc.gnu.org/pipermail/gcc-patches/2023-November/636426.html > >>> But I think most configure or Makefile changes should be pretty small, > >>> usual changes shouldn't rewrite everything in those files. > >> > >> Which may then call for a policy saying "include generate script diff-s, > >> but don't include generated data file ones"? At least on the binutils > >> side, dealing (for CI) with what e.g. opcodes/*-gen produce ought to be > >> possible by having something along the lines of "maintainer mode light". > > > > I'd say we should send generated files when it fits the mailing list > > limits (and possibly simply lift those limits?). > > Well, that would allow patches making it through, but it would still > severely increase overall size. I'm afraid more people than not also > fail to cut down reply context, so we'd further see (needlessly) huge > replies to patches as well. > > Additionally - how does one up front determine "fits the mailing list > limits"? My mail UI (Thunderbird) doesn't show me the size of a message > until I've actually sent it. > > > As a last resort > > do a series splitting the re-generation out (but I guess this would > > confuse the CI as well and of course for the push you want to squash > > again). > > Yeah, unless the CI would only ever test full series, this wouldn't help. > It's also imo even more cumbersome than simply stripping the generated > file parts from emails. > Our CI starts by testing the full series, then iterates by dropping the top-most patches one by one, to make sure no patch breaks something that is fixed in a later patch. This is meant to be additional information for patch reviewers, if they use patchwork to assist them. Other CIs may behave differently though. Thanks, Christophe > Jan
Re: Patches submission policy change
On Wed, 3 Apr 2024 at 10:30, Jan Beulich wrote: > > On 03.04.2024 10:22, Christophe Lyon wrote: > > Dear release managers and developers, > > > > TL;DR: For the sake of improving precommit CI coverage and simplifying > > workflows, I’d like to request a patch submission policy change, so > > that we now include regenerated files. This was discussed during the > > last GNU toolchain office hours meeting [1] (2024-03-28). > > > > Benefits or this change include: > > - Increased compatibility with precommit CI > > - No need to manually edit patches before submitting, thus the “git > > send-email” workflow is simplified > > - Patch reviewers can be confident that the committed patch will be > > exactly what they approved > > - Precommit CI can test exactly what has been submitted > > > > Any concerns/objections? > > Yes: Patch size. And no, not sending patches inline is bad practice. Not sure what you mean? Do you mean sending patches as attachments is bad practice? > Even assuming sending patches bi-modal (inline and as attachment) works > (please indicate whether that's the case), it would mean extra work on > the sending side. > For the CI perspective, we use what patchwork is able to detect as patches. Looking at recent patches submissions, it seems patchwork is able to cope with the output of git format-patch/git send-email, as well as attachments. There are cases where patchwork is not able to detect the patch, but I don't know patchwork's exact specifications. Thanks, Christophe > Jan
Patches submission policy change
Dear release managers and developers, TL;DR: For the sake of improving precommit CI coverage and simplifying workflows, I’d like to request a patch submission policy change, so that we now include regenerated files. This was discussed during the last GNU toolchain office hours meeting [1] (2024-03-28). Benefits or this change include: - Increased compatibility with precommit CI - No need to manually edit patches before submitting, thus the “git send-email” workflow is simplified - Patch reviewers can be confident that the committed patch will be exactly what they approved - Precommit CI can test exactly what has been submitted Any concerns/objections? As discussed on the lists and during the meeting, we have been facing issues with testing a class of patches: those which imply regenerating some files. Indeed, for binutils and gcc, the current patch submission policy is to *not* include the regenerated files (IIUC the policy is different for gdb [2]). This means that precommit CI receives an incomplete patch, leading to wrong and misleading regression reports, and complaints/frustration. (our notifications now include a warning, making it clear that we do not regenerate files ;-) ) I thought the solution was as easy as adding –enable-maintainer-mode to the configure arguments but this has proven to be broken (random failures with highly parallel builds). I tried to workaround that by adding new “regenerate” rules in the makefiles, that we could build at -j1 before running the real build with a higher parallelism level, but this is not ideal, not to mention that in the case of gcc, configuring target libraries requires having built all-gcc before, which is quite slow at -j1. Another approach used in binutils and gdb builtbots is a dedicated script (aka autoregen.py) which calls autotools as appropriate. It could be extended to update other types of files, but this can be a bit tricky (eg. some opcodes files require to build a generator first, some doc fragments also use non-trivial build sequences), and it creates a maintenance issue: the build recipe is duplicated in the script and in the makefiles. Such a script has proven to be useful though in postcommit CI, to catch regeneration errors. Having said that, it seems that for the sake of improving usefulness of precommit CI, the simplest way forward is to change the policy to include regenerated files. This does not seem to be a burden for developers, since they have to regenerate the files before pushing their patches anyway, and it also enables reviewers to make sure the generated files are correct. Said differently, if you want to increase the chances of having your patches tested by precommit CI, make sure to include all the regenerated files, otherwise you might receive failure notifications. Any concerns/objections? Thanks, Christophe [1] https://gcc.gnu.org/wiki/OfficeHours#Meeting:_2024-03-28_.40_1100h_EST5EDT [2] https://inbox.sourceware.org/gdb/cc0a5c86-a041-429a-9890-efd393760...@simark.ca/
[gcc r14-9755] aarch64: Fix typo in comment about FEATURE_STRING
https://gcc.gnu.org/g:d5aa2ca06aa7a6a2f826c4da19204b6db1402995
commit r14-9755-gd5aa2ca06aa7a6a2f826c4da19204b6db1402995
Author: Christophe Lyon
Date: Fri Mar 29 14:25:05 2024 +
aarch64: Fix typo in comment about FEATURE_STRING
Fix the comment to document FEATURE_STRING instead of FEAT_STRING.
2024-03-29 Christophe Lyon
gcc/
* config/aarch64/aarch64-option-extensions.def: Fix comment.
Diff:
---
gcc/config/aarch64/aarch64-option-extensions.def | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/gcc/config/aarch64/aarch64-option-extensions.def
b/gcc/config/aarch64/aarch64-option-extensions.def
index 061a145e9e7..aa3cd99f791 100644
--- a/gcc/config/aarch64/aarch64-option-extensions.def
+++ b/gcc/config/aarch64/aarch64-option-extensions.def
@@ -54,14 +54,14 @@
If a feature A appears in this list then the list implicitly includes
any features that are transitively dependent on A (according to REQUIRES).
- - FEAT_STRING is a string containing the entries in the 'Features' field of
- /proc/cpuinfo on a GNU/Linux system that correspond to this architecture
- extension being available. Sometimes multiple entries are needed to
enable
- the extension (for example, the 'crypto' extension depends on four
- entries: aes, pmull, sha1, sha2 being present). In that case this field
- should contain a space (" ") separated list of the strings in 'Features'
- that are required. Their order is not important. An empty string means
- do not detect this feature during auto detection.
+ - FEATURE_STRING is a string containing the entries in the 'Features' field
+ of /proc/cpuinfo on a GNU/Linux system that correspond to this
+ architecture extension being available. Sometimes multiple entries are
+ needed to enable the extension (for example, the 'crypto' extension
+ depends on four entries: aes, pmull, sha1, sha2 being present). In that
+ case this field should contain a space (" ") separated list of the strings
+ in 'Features' that are required. Their order is not important. An empty
+ string means do not detect this feature during auto detection.
- OPT_FLAGS is a list of feature IDENTS that should be enabled (along with
their transitive dependencies) when the specified FMV feature is present.
[gcc r14-9734] modula2: Fix m2.install-info in gcc/m2/Make-lang.in
https://gcc.gnu.org/g:14d0c863aa9415f5d78047910233d67d91f4ecf5 commit r14-9734-g14d0c863aa9415f5d78047910233d67d91f4ecf5 Author: Christophe Lyon Date: Fri Mar 29 17:59:38 2024 + modula2: Fix m2.install-info in gcc/m2/Make-lang.in Fix a few typos: the generated filename is m2.info (not gm2.info, and gm2$(exeext) is a file not a directory (so test -d would always fail). 2024-03-29 Christophe Lyon gcc/m2/ * Make-lang.in (m2.install-info): Fix rule. Diff: --- gcc/m2/Make-lang.in | 14 +++--- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/gcc/m2/Make-lang.in b/gcc/m2/Make-lang.in index 2d8a47a1b1f..e56240b4c44 100644 --- a/gcc/m2/Make-lang.in +++ b/gcc/m2/Make-lang.in @@ -400,20 +400,20 @@ m2.install-common: installdirs done m2.install-info: installdirs - if [ -d gm2$(exeext) ] ; then \ - if [ -f $(objdir)/doc/gm2.info ]; then \ - rm -f $(DESTDIR)$(infodir)/gm2.info*; \ - for f in $(objdir)/doc/gm2.info*; do \ + if [ -f gm2$(exeext) ] ; then \ + if [ -f $(objdir)/doc/m2.info ]; then \ + rm -f $(DESTDIR)$(infodir)/m2.info*; \ + for f in $(objdir)/doc/m2.info*; do \ realfile=`echo $$f | sed -e 's|.*/\([^/]*\)$$|\1|'`; \ rm -f $(DESTDIR)$(infodir)/`basename $$realfile`; \ $(INSTALL_DATA) $$f $(DESTDIR)$(infodir)/`basename $$realfile`; \ done; \ - chmod a-x $(DESTDIR)$(infodir)/gm2.info*; \ + chmod a-x $(DESTDIR)$(infodir)/m2.info*; \ else true; fi; \ else true; fi - -if [ -f gm2$(exeext) ] && [ -f $(DESTDIR)$(infodir)/gm2.info ]; then \ + -if [ -f gm2$(exeext) ] && [ -f $(DESTDIR)$(infodir)/m2.info ]; then \ if $(SHELL) -c 'install-info --version' >/dev/null 2>&1; then \ - install-info --dir-file=$(infodir)/dir $(DESTDIR)$(infodir)/gm2.info; \ + install-info --dir-file=$(infodir)/dir $(DESTDIR)$(infodir)/m2.info; \ else true; fi; \ else true; fi
[gcc r14-9733] modula2: Add m2.install-html rule to gcc/m2/Make-lang.in
https://gcc.gnu.org/g:ec2c15f14f2278d431756f3d05e6ab7f436bea5e commit r14-9733-gec2c15f14f2278d431756f3d05e6ab7f436bea5e Author: Christophe Lyon Date: Fri Mar 29 17:10:36 2024 + modula2: Add m2.install-html rule to gcc/m2/Make-lang.in This rule was missing, and 'make install-html' was failing. It is copied from the corresponding one in fortran. 2024-03-29 Christophe Lyon gcc/m2/ * Make-lang.in (install-html): New rule. Diff: --- gcc/m2/Make-lang.in | 19 +++ 1 file changed, 19 insertions(+) diff --git a/gcc/m2/Make-lang.in b/gcc/m2/Make-lang.in index ef6990ce617..2d8a47a1b1f 100644 --- a/gcc/m2/Make-lang.in +++ b/gcc/m2/Make-lang.in @@ -206,6 +206,25 @@ $(build_htmldir)/m2/index.html: $(TEXISRC) $(objdir)/m2/images/gnu.eps rm -f $(@D)/* $(TEXI2HTML) -I $(objdir)/m2 -I $(srcdir)/m2 -I $(gcc_docdir)/include -o $(@D) $< +M2_HTMLFILES = $(build_htmldir)/m2 + +m2.install-html: $(M2_HTMLFILES) + @$(NORMAL_INSTALL) + test -z "$(htmldir)" || $(mkinstalldirs) "$(DESTDIR)$(htmldir)" + @list='$(M2_HTMLFILES)'; for p in $$list; do \ + if test -f "$$p" || test -d "$$p"; then d=""; else d="$(srcdir)/"; fi; \ + f=$(html__strip_dir) \ + if test -d "$$d$$p"; then \ + echo " $(mkinstalldirs) '$(DESTDIR)$(htmldir)/$$f'"; \ + $(mkinstalldirs) "$(DESTDIR)$(htmldir)/$$f" || exit 1; \ + echo " $(INSTALL_DATA) '$$d$$p'/* '$(DESTDIR)$(htmldir)/$$f'"; \ + $(INSTALL_DATA) "$$d$$p"/* "$(DESTDIR)$(htmldir)/$$f"; \ + else \ + echo " $(INSTALL_DATA) '$$d$$p' '$(DESTDIR)$(htmldir)/$$f'"; \ + $(INSTALL_DATA) "$$d$$p" "$(DESTDIR)$(htmldir)/$$f"; \ + fi; \ + done + # gm2-libs.texi m2/gm2-libs.texi: gm2-libs.texi-check; @true
[PATCH 2/2] modula2: Fix m2.install-info in gcc/m2/Make-lang.in
Fix a few typos: the generated filename is m2.info (not gm2.info, and gm2$(exeext) is a file not a directory (so test -d would always fail). 2024-03-29 Christophe Lyon gcc/m2/ * Make-lang.in (m2.install-info): Fix rule. --- gcc/m2/Make-lang.in | 14 +++--- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/gcc/m2/Make-lang.in b/gcc/m2/Make-lang.in index 2d8a47a1b1f..e56240b4c44 100644 --- a/gcc/m2/Make-lang.in +++ b/gcc/m2/Make-lang.in @@ -400,20 +400,20 @@ m2.install-common: installdirs done m2.install-info: installdirs - if [ -d gm2$(exeext) ] ; then \ - if [ -f $(objdir)/doc/gm2.info ]; then \ - rm -f $(DESTDIR)$(infodir)/gm2.info*; \ - for f in $(objdir)/doc/gm2.info*; do \ + if [ -f gm2$(exeext) ] ; then \ + if [ -f $(objdir)/doc/m2.info ]; then \ + rm -f $(DESTDIR)$(infodir)/m2.info*; \ + for f in $(objdir)/doc/m2.info*; do \ realfile=`echo $$f | sed -e 's|.*/\([^/]*\)$$|\1|'`; \ rm -f $(DESTDIR)$(infodir)/`basename $$realfile`; \ $(INSTALL_DATA) $$f $(DESTDIR)$(infodir)/`basename $$realfile`; \ done; \ - chmod a-x $(DESTDIR)$(infodir)/gm2.info*; \ + chmod a-x $(DESTDIR)$(infodir)/m2.info*; \ else true; fi; \ else true; fi - -if [ -f gm2$(exeext) ] && [ -f $(DESTDIR)$(infodir)/gm2.info ]; then \ + -if [ -f gm2$(exeext) ] && [ -f $(DESTDIR)$(infodir)/m2.info ]; then \ if $(SHELL) -c 'install-info --version' >/dev/null 2>&1; then \ - install-info --dir-file=$(infodir)/dir $(DESTDIR)$(infodir)/gm2.info; \ + install-info --dir-file=$(infodir)/dir $(DESTDIR)$(infodir)/m2.info; \ else true; fi; \ else true; fi -- 2.34.1
[PATCH 1/2] modula2: Add m2.install-html rule to gcc/m2/Make-lang.in
This rule was missing, and 'make install-html' was failing. It is copied from the corresponding one in fortran. 2024-03-29 Christophe Lyon gcc/m2/ * Make-lang.in (install-html): New rule. --- gcc/m2/Make-lang.in | 19 +++ 1 file changed, 19 insertions(+) diff --git a/gcc/m2/Make-lang.in b/gcc/m2/Make-lang.in index ef6990ce617..2d8a47a1b1f 100644 --- a/gcc/m2/Make-lang.in +++ b/gcc/m2/Make-lang.in @@ -206,6 +206,25 @@ $(build_htmldir)/m2/index.html: $(TEXISRC) $(objdir)/m2/images/gnu.eps rm -f $(@D)/* $(TEXI2HTML) -I $(objdir)/m2 -I $(srcdir)/m2 -I $(gcc_docdir)/include -o $(@D) $< +M2_HTMLFILES = $(build_htmldir)/m2 + +m2.install-html: $(M2_HTMLFILES) + @$(NORMAL_INSTALL) + test -z "$(htmldir)" || $(mkinstalldirs) "$(DESTDIR)$(htmldir)" + @list='$(M2_HTMLFILES)'; for p in $$list; do \ + if test -f "$$p" || test -d "$$p"; then d=""; else d="$(srcdir)/"; fi; \ + f=$(html__strip_dir) \ + if test -d "$$d$$p"; then \ + echo " $(mkinstalldirs) '$(DESTDIR)$(htmldir)/$$f'"; \ + $(mkinstalldirs) "$(DESTDIR)$(htmldir)/$$f" || exit 1; \ + echo " $(INSTALL_DATA) '$$d$$p'/* '$(DESTDIR)$(htmldir)/$$f'"; \ + $(INSTALL_DATA) "$$d$$p"/* "$(DESTDIR)$(htmldir)/$$f"; \ + else \ + echo " $(INSTALL_DATA) '$$d$$p' '$(DESTDIR)$(htmldir)/$$f'"; \ + $(INSTALL_DATA) "$$d$$p" "$(DESTDIR)$(htmldir)/$$f"; \ + fi; \ + done + # gm2-libs.texi m2/gm2-libs.texi: gm2-libs.texi-check; @true -- 2.34.1
[committed] [aarch64, testsuite]: Fix lrcpc3 testcase
There was a typo in the testcase, with GCC_CPUINFO pointing to the
wrong file.
Committed as obvious.
2024-03-29 Christophe Lyon
gcc/testsuite/
* gcc.target/aarch64/cpunative/native_cpu_24.c: Fix GCC_CPUINFO.
---
gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_24.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_24.c
b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_24.c
index 05dc870885f..3a720cc8552 100644
--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_24.c
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_24.c
@@ -1,5 +1,5 @@
/* { dg-do compile { target { { aarch64*-*-linux*} && native } } } */
-/* { dg-set-compiler-env-var GCC_CPUINFO
"$srcdir/gcc.target/aarch64/cpunative/info_23" } */
+/* { dg-set-compiler-env-var GCC_CPUINFO
"$srcdir/gcc.target/aarch64/cpunative/info_24" } */
/* { dg-additional-options "-mcpu=native --save-temps " } */
int main()
--
2.34.1
[gcc r14-9725] Fix lrcpc3 testcase
https://gcc.gnu.org/g:28dca4be504dda29f55eafe958cdf299ec89b94e
commit r14-9725-g28dca4be504dda29f55eafe958cdf299ec89b94e
Author: Christophe Lyon
Date: Fri Mar 29 14:19:59 2024 +
Fix lrcpc3 testcase
There was a typo in the testcase, with GCC_CPUINFO pointing to the
wrong file.
2024-03-29 Christophe Lyon
gcc/testsuite/
* gcc.target/aarch64/cpunative/native_cpu_24.c: Fix GCC_CPUINFO.
Diff:
---
gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_24.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_24.c
b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_24.c
index 05dc870885f..3a720cc8552 100644
--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_24.c
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_24.c
@@ -1,5 +1,5 @@
/* { dg-do compile { target { { aarch64*-*-linux*} && native } } } */
-/* { dg-set-compiler-env-var GCC_CPUINFO
"$srcdir/gcc.target/aarch64/cpunative/info_23" } */
+/* { dg-set-compiler-env-var GCC_CPUINFO
"$srcdir/gcc.target/aarch64/cpunative/info_24" } */
/* { dg-additional-options "-mcpu=native --save-temps " } */
int main()
[PATCH] aarch64: Fix typo in comment about FEATURE_STRING
Fix the comment to document FEATURE_STRING instead of FEAT_STRING.
2024-03-29 Christophe Lyon
gcc/
* config/aarch64/aarch64-option-extensions.def: Fix comment.
---
gcc/config/aarch64/aarch64-option-extensions.def | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/gcc/config/aarch64/aarch64-option-extensions.def
b/gcc/config/aarch64/aarch64-option-extensions.def
index 061a145e9e7..aa3cd99f791 100644
--- a/gcc/config/aarch64/aarch64-option-extensions.def
+++ b/gcc/config/aarch64/aarch64-option-extensions.def
@@ -54,14 +54,14 @@
If a feature A appears in this list then the list implicitly includes
any features that are transitively dependent on A (according to REQUIRES).
- - FEAT_STRING is a string containing the entries in the 'Features' field of
- /proc/cpuinfo on a GNU/Linux system that correspond to this architecture
- extension being available. Sometimes multiple entries are needed to
enable
- the extension (for example, the 'crypto' extension depends on four
- entries: aes, pmull, sha1, sha2 being present). In that case this field
- should contain a space (" ") separated list of the strings in 'Features'
- that are required. Their order is not important. An empty string means
- do not detect this feature during auto detection.
+ - FEATURE_STRING is a string containing the entries in the 'Features' field
+ of /proc/cpuinfo on a GNU/Linux system that correspond to this
+ architecture extension being available. Sometimes multiple entries are
+ needed to enable the extension (for example, the 'crypto' extension
+ depends on four entries: aes, pmull, sha1, sha2 being present). In that
+ case this field should contain a space (" ") separated list of the strings
+ in 'Features' that are required. Their order is not important. An empty
+ string means do not detect this feature during auto detection.
- OPT_FLAGS is a list of feature IDENTS that should be enabled (along with
their transitive dependencies) when the specified FMV feature is present.
--
2.34.1
