Re: Question on lower-subreg.c
On Thu, Jan 24, 2013 at 11:57 PM, Bin.Cheng wrote:
>
> I read code in lower-subreg.c and found GCC only split some of
> multi-word mode instructions, like load from memory into pseudo reg,
> etc. The related code is in find_decomposable_subregs.
>
> So for below example from PR56102:
>
> double g = 1.0;
> double func(int a, double d)
> {
> if (a > 0)
> return 0.0 + g;
> else
> return 2.0 + d;
> }
>
> compiling with:
> ./arm-none-eabi-gcc -mthumb -mcpu=cortex-m0 -Os test.c -S -o test.S
>
> If split is done for all DFmode insns, it will save us code size by
> sharing constant pool in program.
On most platforms that would hurt performance, because most platforms
have a single instruction to load and store a DFmode value into a
floating point register. In fact I suspect that transformation would
be a poor choice on any target that has 64-bit floating point
registers at all.
it would be a reasonable optimization for a target that has no
floating point registers and that stores all DFmode values as a pair
of 32-bit registers. If you care about such a target, it would be
reasonable to add support to lower-subreg for that case.
Ian
Re: Question on lower-subreg.c
On Fri, Jan 25, 2013 at 3:57 PM, Bin.Cheng wrote:
> Hi,
> I read code in lower-subreg.c and found GCC only split some of
> multi-word mode instructions, like load from memory into pseudo reg,
> etc. The related code is in find_decomposable_subregs.
>
> So for below example from PR56102:
>
> double g = 1.0;
> double func(int a, double d)
> {
> if (a > 0)
> return 0.0 + g;
> else
> return 2.0 + d;
> }
>
> compiling with:
> ./arm-none-eabi-gcc -mthumb -mcpu=cortex-m0 -Os test.c -S -o test.S
>
> If split is done for all DFmode insns, it will save us code size by
> sharing constant pool in program.
>
> My questions are:
> 1. Why don't split other multi-word insns?
> 2. Is it possible to do it in subreg2 pass, or in backend?
> I know little about lower-subreg.c, did I miss something important?
>
Sorry that I missed the point the subreg passes is only used to split
multi-word pseudo which appeared in SUBREG.
--
Best Regards.
Question on lower-subreg.c
Hi,
I read code in lower-subreg.c and found GCC only split some of
multi-word mode instructions, like load from memory into pseudo reg,
etc. The related code is in find_decomposable_subregs.
So for below example from PR56102:
double g = 1.0;
double func(int a, double d)
{
if (a > 0)
return 0.0 + g;
else
return 2.0 + d;
}
compiling with:
./arm-none-eabi-gcc -mthumb -mcpu=cortex-m0 -Os test.c -S -o test.S
If split is done for all DFmode insns, it will save us code size by
sharing constant pool in program.
My questions are:
1. Why don't split other multi-word insns?
2. Is it possible to do it in subreg2 pass, or in backend?
I know little about lower-subreg.c, did I miss something important?
Thanks very much.
--
Best Regards.
