Re: Zero extractions and zero extends
Jean Christophe Beyler jean.christophe.bey...@gmail.com writes: typedef struct sTestUnsignedChar { uint64_t a:1; }STestUnsignedChar; uint64_t getU (STestUnsignedChar a) { return a.a; } I get this in the DCE pass : (insn 6 3 7 2 bitfield2.c:8 (set (subreg:DI (reg:QI 75) 0) (zero_extract:DI (reg/v:DI 73 [ a ]) (const_int 1 [0x1]) (const_int 0 [0x0]))) 63 {extzvdi} (expr_list:REG_DEAD (reg/v:DI 73 [ a ]) (nil))) (insn 7 6 12 2 bitfield2.c:8 (set (reg:DI 74) (zero_extend:DI (reg:QI 75))) 51 {zero_extendqidi2} (expr_list:REG_DEAD (reg:QI 75) (nil))) (on the x86 port, I get a and instead of the zero_extract) However, on the combine pass both stay, whereas in the x86 port, the zero_extend is removed. Where is this decided exactly ? I've checked the costs of the instructions, I have the same thing as the x86 port. Maybe it is turned into an (and:DI .. (const_int 1)) and you don't recognize that? Check your combine dump file, that should tell you what is the pattern that combine came up with while dealing with these two insns. Adam
Zero extractions and zero extends
Dear all, If I consider this code typedef struct sTestUnsignedChar { uint64_t a:1; }STestUnsignedChar; uint64_t getU (STestUnsignedChar a) { return a.a; } I get this in the DCE pass : (insn 6 3 7 2 bitfield2.c:8 (set (subreg:DI (reg:QI 75) 0) (zero_extract:DI (reg/v:DI 73 [ a ]) (const_int 1 [0x1]) (const_int 0 [0x0]))) 63 {extzvdi} (expr_list:REG_DEAD (reg/v:DI 73 [ a ]) (nil))) (insn 7 6 12 2 bitfield2.c:8 (set (reg:DI 74) (zero_extend:DI (reg:QI 75))) 51 {zero_extendqidi2} (expr_list:REG_DEAD (reg:QI 75) (nil))) (on the x86 port, I get a and instead of the zero_extract) However, on the combine pass both stay, whereas in the x86 port, the zero_extend is removed. Where is this decided exactly ? I've checked the costs of the instructions, I have the same thing as the x86 port. Thanks for all your help, Jean Christophe Beyler