[Bug c++/113360] [13/14 Regression] Truncated constexpr error messages with -std=c++23/26
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113360 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P2 CC||law at gcc dot gnu.org
[Bug sanitizer/113284] [14 regression] many failures in asan after r14-6946-ge66dc37b299cac
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113284 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org Priority|P3 |P2
[Bug analyzer/113314] [14 Regression] -Wanalyzer-infinite-loop false positive seen on haproxy's fd.c
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113314 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org Priority|P3 |P2
[Bug rtl-optimization/113390] [14 Regression] ICE: in model_update_limit_points_in_group, at haifa-sched.cc:1986 with -O2 --param=max-sched-region-insns=200 --param=max-sched-extend-regions-iters=2
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113390 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P1
[Bug testsuite/113428] [14 regression] gcc.dg/gomp/bad-array-section-c-3.c fails after r14-7158-gb5476e4c881b0d
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113428 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org Priority|P3 |P2
[Bug tree-optimization/113441] [14 Regression] Fail to fold the last element with multiple loop since g:2efe3a7de0107618397264017fb045f237764cc7
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113441 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org Priority|P3 |P2
[Bug analyzer/113505] [14 Regression] ICE: SIGSEGV in tree_class_check (tree.h:3766) with -O -fdump-analyzer -fanalyzer
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113505 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org Priority|P3 |P1
[Bug analyzer/113496] [12/13/14 Regression] ICE: in cmp, at analyzer/constraint-manager.cc:782 with -fanalyzer -fdump-analyzer
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113496 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P1 CC||law at gcc dot gnu.org
[Bug debug/113519] [14 Regression] ICE: in replace_child, at dwarf2out.cc:5704 with -g -fdebug-types-section -fsso-struct=big-endian (or little-endian if the target is big-endian)
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113519 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P1 CC||law at gcc dot gnu.org
[Bug middle-end/113525] [11/12/13/14 Regression] GCC does not recognize "-fdump-rtl-sibling" command line option
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113525 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org Priority|P3 |P2
[Bug target/113542] [14 Regression] gcc.target/arm/bics_3.c regression after change for pr111267
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113542 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P2 CC||law at gcc dot gnu.org
[Bug testsuite/113558] [14 regression] gcc.dg/vect/vect-outer-4c-big-array.c etc. FAIL
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113558 Jeffrey A. Law changed: What|Removed |Added Resolution|--- |FIXED Status|UNCONFIRMED |RESOLVED CC||law at gcc dot gnu.org --- Comment #5 from Jeffrey A. Law --- Should be fixed on the trunk now.
[Bug debug/113562] [14 Regression] FAIL: gcc.dg/guality/pr54796.c
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113562 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P2 CC||law at gcc dot gnu.org
[Bug rtl-optimization/113597] [14 Regression] aarch64: Significant code quality regression since r14-8346-ga98d5130a6dcff
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113597 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P2 CC||law at gcc dot gnu.org
[Bug target/113600] [14 regression] 525.x264_r run-time regresses by 8% with PGO -Ofast -march=znver4
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113600 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P2 CC||law at gcc dot gnu.org
[Bug analyzer/113606] [14 Regression] -Wanalyzer-infinite-recursion false positive on code involving strstr, memset, strnlen and -D_FORTIFY_SOURCE
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113606 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P2 CC||law at gcc dot gnu.org
[Bug target/113618] [14 Regression] AArch64: memmove idiom regression
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113618 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org Priority|P3 |P2
[Bug analyzer/113619] [14 Regression] -Wanalyzer-tainted-divisor false positive seen in Linux kernel's fs/ceph/ioctl.c
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113619 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P2 CC||law at gcc dot gnu.org
[Bug target/113641] [13/14 regression] 510.parest_r with PGO at O2 slower than GCC 12 (7% on Zen 3&2, 4% on CascadeLake) since r13-4272-g8caf155a3d6e23
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113641 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org Priority|P3 |P2
[Bug tree-optimization/113662] [13/14 Regression] Wrong code for std::sort with fancy pointer since r13-6945-g429a7a88438cc8
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113662 Jeffrey A. Law changed: What|Removed |Added Last reconfirmed||2024-03-07 Ever confirmed|0 |1 Priority|P3 |P1 CC||law at gcc dot gnu.org Status|UNCONFIRMED |NEW
[Bug testsuite/113685] [14 regression] gcc.dg/vect/vect-117.c fails profile checking with Invalid sum after r14-4089-gd45ddc2c04e471
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113685 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P2 CC||law at gcc dot gnu.org
[Bug tree-optimization/113714] [11/12/13/14 Regression] Missed optimization for redundancy computation elimination: -(w+d-x)-x => -(w+d)
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113714 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P2 CC||law at gcc dot gnu.org
[Bug middle-end/113724] [14 Regression][OpenMP] ICE (segfault) when mapping a struct in omp_gather_mapping_groups_1
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113724 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org Priority|P3 |P1
[Bug tree-optimization/113752] [14 Regression] warning: ‘%s’ directive writing up to 10218 bytes into a region of size between 0 and 10240 [-Wformat-overflow=] since r14-261-g0ef3756adf078c
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113752 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org Priority|P3 |P2
[Bug gcov-profile/113765] [14 Regression] ICE: autofdo: val-profiler-threads-1.c compilation, error: probability of edge from entry block not initialized
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113765 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P1 CC||law at gcc dot gnu.org
[Bug target/113832] [14 Regression] 6% exec time regression of 464.h264ref on aarch64
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113832 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P2 CC||law at gcc dot gnu.org
[Bug target/113847] [14 Regression] 10% slowdown of 462.libquantum on AMD Ryzen 7700X and Ryzen 7900X
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113847 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org Priority|P3 |P2
[Bug libstdc++/113835] [13/14 Regression] compiling std::vector with const size in C++20 is slow
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113835 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P2 CC||law at gcc dot gnu.org
[Bug libgomp/113867] [14 Regression][OpenMP] Wrong code with mapping pointers in structs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113867 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P1 CC||law at gcc dot gnu.org
[Bug c++/113924] [11/12/13/14 Regression] worse diagnostic for invalid decltype since r10-5347
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113924 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P2 CC||law at gcc dot gnu.org
[Bug ipa/113996] [11/12/13/14 Regression] ICE with LTO at -O2 and above with some Ada code
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113996 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org Priority|P3 |P1
[Bug tree-optimization/114057] [14 Regression] 435.gromacs fails verification with -Ofast -march={znver2,znver4} and PGO after r14-7272-g57f611604e8bab
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114057 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P1 CC||law at gcc dot gnu.org
[Bug target/114134] [14 Regression] Extra mov instructions for simple function compared with GCC13 since r14-2386
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114134 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P2 CC||law at gcc dot gnu.org
[Bug tree-optimization/114151] [14 Regression] weird and inefficient codegen and addressing modes since r14-9193
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114151 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org Priority|P3 |P2
[Bug tree-optimization/114238] [14 regression] Multiple 554.roms_r run-time regressions (4%-20%) since r14-9193-ga0b1798042d033
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114238 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P2 CC||law at gcc dot gnu.org
[Bug rtl-optimization/114261] [13/14 Regression] Scheduling takes excessive time (97%)
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114261 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org Priority|P3 |P2
[Bug rtl-optimization/108792] [11/12/13/14 Regression] ICE in reset_sched_cycles_in_current_ebb, at sel-sched.cc:7147
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108792 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org Priority|P2 |P4
[Bug tree-optimization/110199] [12/13/14 Regression] Missing VRP transformation with MIN_EXPR and known relation
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110199 Jeffrey A. Law changed: What|Removed |Added Assignee|unassigned at gcc dot gnu.org |law at gcc dot gnu.org Status|UNCONFIRMED |NEW Ever confirmed|0 |1 Last reconfirmed||2024-03-07 CC||law at gcc dot gnu.org --- Comment #6 from Jeffrey A. Law --- I think this is trivial to do in DOM and not handling these cases could easily be seen as an oversight. When we fail to find an expression in the hash table of available expressions, we have a bit of existing code that can ask about a relation between two operands of a binary operator and based on that relation possibly simplify the original expression. So for example, if we have: _4 = MIN_EXPR ; And the MIN_EXPR expression isn't in the hash table, we look to see if we have recorded a_2 == b_3 and if so we simplify the MIN_EXPR into a copy. So this is just a matter of extending that code ever so slightly to do an additional lookup.
[Bug middle-end/113738] [14 Regression] ICE: in df_reg_chain_verify_unmarked, at df-scan.cc:4001 with -O2 -march=rv64gcv
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113738 Jeffrey A. Law changed: What|Removed |Added Status|NEW |RESOLVED Resolution|--- |FIXED --- Comment #2 from Jeffrey A. Law --- This was fixed on the trunk by Juzhe a while back: commit d29136ad3282905145e24d7ec10b6efe4ab5d2f1 Author: Juzhe-Zhong Date: Tue Feb 6 07:12:24 2024 +0800 RISC-V: Fix infinite compilation of VSETVL PASS This patch fixes issue reported by Jeff. Testing is running. Ok for trunk if I passed the testing with no regression ? gcc/ChangeLog: * config/riscv/riscv-vsetvl.cc (pre_vsetvl::emit_vsetvl): Fix inifinite compilation. (pre_vsetvl::remove_vsetvl_pre_insns): Ditto.
[Bug middle-end/113738] [14 Regression] ICE: in df_reg_chain_verify_unmarked, at df-scan.cc:4001 with -O2 -march=rv64gcv
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113738 Jeffrey A. Law changed: What|Removed |Added Last reconfirmed||2024-03-06 Ever confirmed|0 |1 Status|UNCONFIRMED |NEW
[Bug target/109760] riscv Internal compiler error in extract_insn after addition of XTheadCondMov
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109760 Jeffrey A. Law changed: What|Removed |Added Status|NEW |RESOLVED Resolution|--- |FIXED --- Comment #3 from Jeffrey A. Law --- Di fixed this a while back. Bisection points to this: commit 55914b016de8c8514c58eb59822677a69e44135c Author: Die Li Date: Fri May 19 23:00:13 2023 -0600 Fix riscv_expand_conditional_move. Two issues have been observed in current riscv_expand_conditional_move implementation. 1. Before introduction of TARGET_XTHEADCONDMOV, op0 of comparision expression is used for mode comparision with word_mode, but after TARGET_XTHEADCONDMOV megered with TARGET_SFB_ALU, dest of if-then-else is used for mode comparision with word_mode, and from md file mode of dest is DI or SI which can be different with word_mode in RV64. 2. TARGET_XTHEADCONDMOV cannot be generated when the mode of the comparison is E_VOID.
[Bug target/109760] riscv Internal compiler error in extract_insn after addition of XTheadCondMov
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109760 Jeffrey A. Law changed: What|Removed |Added Last reconfirmed||2024-03-06 Ever confirmed|0 |1 Status|UNCONFIRMED |NEW
[Bug target/113001] [14 Regression] RISCV Zicond ICE: in extract_insn, at recog.cc:2812 with -O2 rv64gcv_zicond
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113001 Jeffrey A. Law changed: What|Removed |Added Resolution|--- |FIXED Status|NEW |RESOLVED --- Comment #5 from Jeffrey A. Law --- Fixed on the trunk.
[Bug target/113001] [14 Regression] RISCV Zicond ICE: in extract_insn, at recog.cc:2812 with -O2 rv64gcv_zicond
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113001 --- Comment #3 from Jeffrey A. Law --- *** Bug 112871 has been marked as a duplicate of this bug. ***
[Bug target/112871] [14 Regression] RISCV ICE: in extract_insn, at recog.cc:2804 (unrecognizable insn) with -01 rv32gc_zicond
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112871 Jeffrey A. Law changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|--- |DUPLICATE --- Comment #3 from Jeffrey A. Law --- Same path through the conditional move expansion code. *** This bug has been marked as a duplicate of bug 113001 ***
[Bug testsuite/114221] gcc.c-torture/execute/20101011-1.c fails for H8/300
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114221 Jeffrey A. Law changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|--- |FIXED --- Comment #1 from Jeffrey A. Law --- Fixed on the trunk.
[Bug rtl-optimization/110369] [14 Regression] wrong code on x86_64-linux-gnu with sel-scheduling
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110369 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org Priority|P3 |P4
[Bug rtl-optimization/110390] [13/14 regression] ICE on valid code on x86_64-linux-gnu with sel-scheduling: in av_set_could_be_blocked_by_bookkeeping_p, at sel-sched.cc:3609 since r13-3596-ge7310e24b1
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110390 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org Priority|P3 |P4
[Bug fortran/110725] [13/14 Regression] internal compiler error: in expand_expr_real_1, at expr.cc:10897
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110725 Jeffrey A. Law changed: What|Removed |Added Resolution|--- |FIXED Status|NEW |RESOLVED CC||law at gcc dot gnu.org --- Comment #10 from Jeffrey A. Law --- Fixed on the trunk.
[Bug tree-optimization/110841] [14 Regression] Dead Code Elimination Regression since r14-2675-gef28aadad6e
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110841 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org Resolution|--- |FIXED Status|ASSIGNED|RESOLVED --- Comment #6 from Jeffrey A. Law --- Per comment #2 and #3.
[Bug tree-optimization/110942] [14 Regression] Dead Code Elimination Regression at -O3 since r14-1165-g257c2be7ff8
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110942 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org Resolution|--- |FIXED Status|NEW |RESOLVED --- Comment #6 from Jeffrey A. Law --- Per c#5
[Bug target/111600] [14 Regression] RISC-V bootstrap time regression
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111600 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P4
[Bug other/113575] [14 Regression] memory hog building insn-opinit.o (i686-linux-gnu -> riscv64-linux-gnu)
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113575 Jeffrey A. Law changed: What|Removed |Added Resolution|--- |FIXED Status|NEW |RESOLVED --- Comment #17 from Jeffrey A. Law --- Forgot to change state. Fixed on the trunk.
[Bug bootstrap/84402] [meta] GCC build system: parallelism bottleneck
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84402 Bug 84402 depends on bug 113575, which changed state. Bug 113575 Summary: [14 Regression] memory hog building insn-opinit.o (i686-linux-gnu -> riscv64-linux-gnu) https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113575 What|Removed |Added Status|NEW |RESOLVED Resolution|--- |FIXED
[Bug c++/112301] [12/13/14 regression] Double destruction of returned object when exiting the scope causes an exception which gets rethrown since r12-6333-gb10e031458d541
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112301 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org Resolution|--- |FIXED Status|ASSIGNED|RESOLVED --- Comment #9 from Jeffrey A. Law --- Jason fixed this and backported the fix to the gcc-12 and gcc-13 branches.
[Bug target/112871] [14 Regression] RISCV ICE: in extract_insn, at recog.cc:2804 (unrecognizable insn) with -01 rv32gc_zicond
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112871 Jeffrey A. Law changed: What|Removed |Added Assignee|unassigned at gcc dot gnu.org |law at gcc dot gnu.org CC||law at gcc dot gnu.org Priority|P3 |P4
[Bug rust/113461] [14 Regression] rust-proc-macro.cc:174:15: error: format '%lu' expects argument of type 'long unsigned int', but argument 3 has type 'long long unsigned int' [-Werror=format=]
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113461 Jeffrey A. Law changed: What|Removed |Added Resolution|--- |FIXED Status|NEW |RESOLVED CC||law at gcc dot gnu.org --- Comment #5 from Jeffrey A. Law --- Should be fixed on the trunk now.
[Bug target/113001] [14 Regression] RISCV Zicond ICE: in extract_insn, at recog.cc:2812 with -O2 rv64gcv_zicond
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113001 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P4
[Bug middle-end/113179] [11/12/13/14 Regression] MIPS: INS is used for long long, before SLL
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113179 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P4 CC||law at gcc dot gnu.org
[Bug target/113226] [14 Regression] testsuite/std/ranges/iota/max_size_type.cc fails for cris-elf after r14-6888-ga138b99646a555
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113226 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org Priority|P3 |P4
[Bug target/113346] [14 Regression] epiphany-elf build failure
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113346 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P5 CC||law at gcc dot gnu.org
[Bug fortran/113384] [14 Regression] FAIL: gfortran.dg/array_reference_1.f90 -O0 execution test
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113384 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org Priority|P3 |P4
[Bug rtl-optimization/113533] [14 Regression] Code generation regression after change for pr111267
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113533 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P4
[Bug other/113575] [14 Regression] memory hog building insn-opinit.o (i686-linux-gnu -> riscv64-linux-gnu)
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113575 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org --- Comment #16 from Jeffrey A. Law --- Fixed on the trunk.
[Bug target/113790] [14 Regression][riscv64] ICE in curr_insn_transform, at lra-constraints.cc:4294 since r14-4944-gf55cdce3f8dd85
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113790 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P4
[Bug target/113790] [14 Regression][riscv64] ICE in curr_insn_transform, at lra-constraints.cc:4294 since r14-4944-gf55cdce3f8dd85
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113790 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org Last reconfirmed||2024-03-04 Status|UNCONFIRMED |NEW Ever confirmed|0 |1
[Bug target/114000] [11/12/13/14 Regression] ICE: in force_nonfallthru_and_redirect, at cfgrtl.cc:1556 with -O2 -freorder-blocks-and-partition -fPIC -mexplicit-relocs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114000 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P4
[Bug target/114000] [11/12/13/14 Regression] ICE: in force_nonfallthru_and_redirect, at cfgrtl.cc:1556 with -O2 -freorder-blocks-and-partition -fPIC -mexplicit-relocs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114000 Jeffrey A. Law changed: What|Removed |Added Status|UNCONFIRMED |NEW Ever confirmed|0 |1 Last reconfirmed||2024-03-04
[Bug debug/100523] [11/12/13/14 Regression] armv8.1-m.main -fcompare-debug failure with -O -fmodulo-sched -mtune=cortex-a53
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100523 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org Priority|P3 |P4
[Bug rtl-optimization/110317] [12/13/14 Regression] ICE at -O2 and -O3 with "-fno-tree-pre -fno-tree-dce -fno-tree-dse -fselective-scheduling2": in move_exprs_to_boundary, at sel-sched.cc:5228
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110317 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P4 CC||law at gcc dot gnu.org
[Bug rtl-optimization/110391] [12/13/14 Regression] wrong code at -O2 and -O3 with "-fsel-sched-pipelining -fselective-scheduling2" on x86_64-linux-gnu
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110391 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P4 CC||law at gcc dot gnu.org
[Bug rtl-optimization/112758] [13/14 Regression] Inconsistent Bitwise AND Operation Result between int and long long int
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112758 --- Comment #19 from Jeffrey A. Law --- Fixed by Jakub's patch on the trunk.
[Bug target/113010] [RISCV] sign-extension lost in comparison with constant embedded in comma-op expression
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113010 Jeffrey A. Law changed: What|Removed |Added Status|NEW |RESOLVED CC||law at gcc dot gnu.org Resolution|--- |FIXED --- Comment #11 from Jeffrey A. Law --- Fixed by Greg's patch on the trunk. No current plans to backport.
[Bug c++/113976] [11/12/13/14 Regression] explicit instantiation of const variable template following implicit instantiation is assembled in .rodata instead of .bss since r8-2857-g2ec399d8a6c9c2
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113976 --- Comment #3 from Jeffrey A. Law --- What does the standard say about changing const objects?
[Bug target/84201] 549.fotonik3d_r from SPEC2017 fails verification with recent Intel and AMD CPUs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84201 Jeffrey A. Law changed: What|Removed |Added CC||vineetg at gcc dot gnu.org --- Comment #20 from Jeffrey A. Law --- *** Bug 113570 has been marked as a duplicate of this bug. ***
[Bug middle-end/26163] [meta-bug] missed optimization in SPEC (2k17, 2k and 2k6 and 95)
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=26163 Bug 26163 depends on bug 113570, which changed state. Bug 113570 Summary: RISC-V: SPEC2017 549 fotonik3d miscompilation in autovec VLS 256 build https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113570 What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|--- |DUPLICATE
[Bug target/113570] RISC-V: SPEC2017 549 fotonik3d miscompilation in autovec VLS 256 build
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113570 Jeffrey A. Law changed: What|Removed |Added Resolution|--- |DUPLICATE Status|UNCONFIRMED |RESOLVED --- Comment #4 from Jeffrey A. Law --- Just looked a little closer. Looks like the same signature. Essentially you can't use -Ofast (or fast-math in general) with this benchmark, especially with vectorization. *** This bug has been marked as a duplicate of bug 84201 ***
[Bug target/113570] RISC-V: SPEC2017 549 fotonik3d miscompilation in autovec VLS 256 build
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113570 --- Comment #3 from Jeffrey A. Law --- See pr84201 for more details as well as https://www.spec.org/cpu2017/Docs/benchmarks/549.fotonik3d_r.html
[Bug rtl-optimization/113533] New: [14 Regression] Code generation regression after change for pr111267
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113533
Bug ID: 113533
Summary: [14 Regression] Code generation regression after
change for pr111267
Product: gcc
Version: 14.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: rtl-optimization
Assignee: unassigned at gcc dot gnu.org
Reporter: law at gcc dot gnu.org
Target Milestone: ---
sh3-linux-gnu or sh3eb-linux-gnu is showing a code generation regression after
the changes for pr111267.
test_01 with -O1 shows the problem nicely:
int
test_01 (unsigned char* a)
{
/* 1x cmp/pz, 1x addc */
return a[0] + (a[0] < 128);
}
Before:
test_01:
mov.b @r4,r1
extu.b r1,r0
cmp/pz r1
mov #0,r1
rts
addcr1,r0
After:
test_01:
mov.b @r4,r0
extu.b r0,r0
mov.b @r4,r1
cmp/pz r1
mov #0,r1
rts
addcr1,r0
Note the extra memory load.
I'm not actively working on this.
[Bug target/82420] ICE with -malign-int and -m68000
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82420 Jeffrey A. Law changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|--- |FIXED Target Milestone|--- |14.0 CC||law at gcc dot gnu.org --- Comment #8 from Jeffrey A. Law --- Fixed on the trunk. No plans to backport.
[Bug target/111279] ICE: Segmentation fault with m68k,SJLJ and -malign-int
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111279 Jeffrey A. Law changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED CC||law at gcc dot gnu.org Resolution|--- |FIXED Target Milestone|--- |14.0 --- Comment #7 from Jeffrey A. Law --- Should be fixed on the trunk. No plans to backport.
[Bug target/108640] ICE compiling busybox for m68k in change_address_1, at emit-rtl.cc:2283
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108640 Jeffrey A. Law changed: What|Removed |Added Resolution|--- |FIXED CC||law at gcc dot gnu.org Status|NEW |RESOLVED --- Comment #9 from Jeffrey A. Law --- Fixed on the trunk. No plans to backport.
[Bug target/110934] m68k: ICE with -fzero-call-used-regs=all compiling openssh 9.3p2
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110934 Jeffrey A. Law changed: What|Removed |Added Resolution|--- |FIXED CC||law at gcc dot gnu.org Status|NEW |RESOLVED --- Comment #14 from Jeffrey A. Law --- Fixed on the trunk. No plans to backport.
[Bug other/113399] [14 Regression] -ffold-mem-offsets should not be a target option
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113399 --- Comment #4 from Jeffrey A. Law --- Just something that was missed when this option was changed from target dependent to target independent. It definitely should not be a target option.
[Bug rtl-optimization/112398] Suboptimal code generation for xor pattern on subreg
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112398 --- Comment #5 from Jeffrey A. Law --- I don't think we need to do any significant bit tracking to optimize the original neg8 test. I think we can be handled entirely within the simplify-rtx framework.I've got a junior engineer that's going to take a peek at this -- so don't go and fix it Andrew ;-)
[Bug rtl-optimization/112398] Suboptimal code generation for xor pattern on subreg
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112398 Jeffrey A. Law changed: What|Removed |Added Last reconfirmed|2023-11-05 00:00:00 |2024-01-13 Status|UNCONFIRMED |NEW Ever confirmed|0 |1
[Bug middle-end/111378] Missed optimization for comparing with exact_log2 constants
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111378 --- Comment #4 from Jeffrey A. Law --- Whether or not this is an optimization or a pessimization is dependent on the target -- some targets can express the constant trivially in a branch conditions, others can not. Some targets have barrel shifters, others do not. In some cases the constant might get hoisted out of a loop, reducing the cost, but increasing register pressure, etc. If you look at a typical RISC target the transformation just trades constant construction for a shift. For constants that can be constructed in a single instruction neither sequence is inherently faster than the other. However, the shift sequence has an additional data dependency relative to the constant construction approach, so the shifted input approach would be considered slightly less desirable. For RISC-V we can construct any power of two constant in a single instruction if we have the zbs extension (which should be common in modern implementations). I suspect it would not be profitable on MIPS or PPC either as I think they have branches with ordered comparisons of two registers and the ability to construct 2^n in a single instrution. aarch64 seems to be the one target where this could be the helpful based on c#1. I guess it doesn't have branches with ordered comparisons of two registers and instead has to do an explicit comparison. Anyway, just wanted to get various thoughts recorded.
[Bug testsuite/113167] [14 Regression] gcc.dg/tree-ssa/gen-vect-26.c started failing many targets after recent change
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113167 --- Comment #7 from Jeffrey A. Law --- So far that's the only fallout I've seen on the embedded targets. The qemu emulated natives aren't running as I've got some kind of network problem here and the workers are going offline after a few hours causing those builds to fail.
[Bug tree-optimization/113167] New: [14 Regression] gcc.dg/tree-ssa/gen-vect-26.c started failing many targets after recent change
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113167 Bug ID: 113167 Summary: [14 Regression] gcc.dg/tree-ssa/gen-vect-26.c started failing many targets after recent change Product: gcc Version: 14.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component: tree-optimization Assignee: unassigned at gcc dot gnu.org Reporter: law at gcc dot gnu.org Target Milestone: --- Many targets are now seeing this failure: FAIL: gcc.dg/tree-ssa/gen-vect-26.c scan-tree-dump-times vect "Alignment of access forced using peeling" 1 Which has been bisected to: commit 01f4251b8775c832a92d55e2df57c9ac72eaceef (HEAD) Author: Tamar Christina Date: Sun Dec 24 19:18:12 2023 + middle-end: Support vectorization of loops with multiple exits. Hi All, This patch adds initial support for early break vectorization in GCC. In other words it implements support for vectorization of loops with multiple exits. The support is added for any target that implements a vector cbranch optab, this includes both fully masked and non-masked targets. [ ... ] The regression is seen on just about every cross target I'm testing. So just to pick one, fr30-elf. Since this is a scan failure, you don't need a full toolchain to reproduce, just the compiler proper.
[Bug target/110201] RISC-V: __builtin_riscv_sm4ks and __builtin_riscv_sm4ed produce invalid assembly
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110201 Jeffrey A. Law changed: What|Removed |Added Resolution|--- |FIXED Status|NEW |RESOLVED --- Comment #9 from Jeffrey A. Law --- Should (finally) be fixed on the trunk.
[Bug target/112413] Wrong switch jump table offset
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112413 Jeffrey A. Law changed: What|Removed |Added Resolution|--- |FIXED Status|UNCONFIRMED |RESOLVED CC||law at gcc dot gnu.org --- Comment #9 from Jeffrey A. Law --- Fixed on the trunk. No plans to backport.
[Bug tree-optimization/112848] [14 regression] ICE compiling gcc.dg/tree-ssa/ssa-sink-16.c after r14-6114-gde0ab339a79535
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112848 Jeffrey A. Law changed: What|Removed |Added Status|UNCONFIRMED |NEW Last reconfirmed||2023-12-04 Ever confirmed|0 |1 CC||law at gcc dot gnu.org --- Comment #2 from Jeffrey A. Law --- Also seeing on microblaze-linux.
[Bug debug/112674] New: [14 Regression] Compare-debug failure after recent change on c6x
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112674
Bug ID: 112674
Summary: [14 Regression] Compare-debug failure after recent
change on c6x
Product: gcc
Version: 14.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: debug
Assignee: unassigned at gcc dot gnu.org
Reporter: law at gcc dot gnu.org
Target Milestone: ---
This patch:
commit 6bf66276e3e41d5d92f7b7260e98b6a111653805
Author: Richard Biener
Date: Wed Nov 22 11:10:41 2023 +0100
tree-optimization/112344 - wrong final value replacement
When performing final value replacement chrec_apply that's used to
compute the overall effect of niters to a CHREC doesn't consider that
the overall increment of { -2147483648, +, 2 } doesn't fit in
a signed integer when the loop iterates until the value of the IV
of 20. The following fixes this mistake, carrying out the multiply
and add in an unsigned type instead, avoiding undefined overflow
and thus later miscompilation by path range analysis.
PR tree-optimization/112344
* tree-chrec.cc (chrec_apply): Perform the overall increment
calculation and increment in an unsigned type.
* gcc.dg/torture/pr112344.c: New testcase.
Is causing a compare-debug failure on the c6x port:
c6x-sim: gcc.dg/pr65779.c (test for excess errors)
I haven't dug into this any deeper. It could well be a c6x bug in the end.
While it may sound similar to pr109777, pr109777 has been debugged far enough
to lay the blame on the bfin backend.
[Bug debug/112674] [14 Regression] Compare-debug failure after recent change on c6x
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112674 --- Comment #1 from Jeffrey A. Law --- And possibly more interesting than the compare-debug failure is this patch seems to be causing Wstringop-overflow-17 to fail on multiple targets, including c6x.
[Bug tree-optimization/112530] [14 Regression] New ICE in gimple->rtl expansion after recent change
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112530 Jeffrey A. Law changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|--- |DUPLICATE --- Comment #3 from Jeffrey A. Law --- Confirmed the patch for 112481 fixes this problem. *** This bug has been marked as a duplicate of bug 112481 ***
[Bug target/112481] [14 Regression] RISCV: ICE: Segmentation fault when compiling pr110817-3.c
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112481 --- Comment #14 from Jeffrey A. Law --- *** Bug 112530 has been marked as a duplicate of this bug. ***
[Bug tree-optimization/112530] New: [14 Regression] New ICE in gimple->rtl expansion after recent change
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112530 Bug ID: 112530 Summary: [14 Regression] New ICE in gimple->rtl expansion after recent change Product: gcc Version: 14.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component: tree-optimization Assignee: unassigned at gcc dot gnu.org Reporter: law at gcc dot gnu.org Target Milestone: --- This change: commit a5922427c29fad177251d89cc946d1c5bfc135eb Author: Andrew Stubbs Date: Fri Oct 20 16:26:51 2023 +0100 vect: Don't set excess bits in unform masks AVX ignores any excess bits in the mask (at least for vector sizes >=8), but AMD GCN magically uses a larger vector than was intended (the smaller sizes are "fake"), leading to wrong-code. This patch fixes amdgcn execution failures in gcc.dg/vect/pr81740-1.c, gfortran.dg/c-interop/contiguous-1.f90, gfortran.dg/c-interop/ff-descriptor-7.f90, and others. gcc/ChangeLog: * expr.cc (store_constructor): Add "and" operation to uniform mask generation. Causes regressions on the alpha port (these can be seen with a simple cross compiler, a full toolchain is not necessary): gcc.c-torture/execute/pr110817-3.c -O1 (test for excess errors) gcc.c-torture/execute/pr110817-3.c -O2 (test for excess errors) gcc.c-torture/execute/pr110817-3.c -O2 -flto -fno-use-linker-plugin -flto-partition=none (test for excess errors) gcc.c-torture/execute/pr110817-3.c -O3 -g (test for excess errors) gcc.c-torture/execute/pr110817-3.c -Os (test for excess errors) dump file: j.c.262r.expand j.c: In function ‘main’: j.c:10:28: internal compiler error: Segmentation fault 10 | volatile signed int t = x[0]; | ~^~~ 0x1510fc4 crash_signal /home/jlaw/test/gcc/gcc/toplev.cc:316 0x7fcfa388efcf ??? ./signal/../sysdeps/unix/sysv/linux/x86_64/libc_sigaction.c:0 0xf81369 emit_move_insn(rtx_def*, rtx_def*) /home/jlaw/test/gcc/gcc/expr.cc:4249 0xf8d86c store_constructor(tree_node*, rtx_def*, int, poly_int<1u, long>, bool) /home/jlaw/test/gcc/gcc/expr.cc:7494 0xf93de0 expand_constructor /home/jlaw/test/gcc/gcc/expr.cc:8970 0xf9de14 expand_expr_real_1(tree_node*, rtx_def*, machine_mode, expand_modifier, rtx_def**, bool) /home/jlaw/test/gcc/gcc/expr.cc:11245 0xf93e9f expand_expr_real(tree_node*, rtx_def*, machine_mode, expand_modifier, rtx_def**, bool) /home/jlaw/test/gcc/gcc/expr.cc:9049 0xf9bd72 expand_expr_real_1(tree_node*, rtx_def*, machine_mode, expand_modifier, rtx_def**, bool) /home/jlaw/test/gcc/gcc/expr.cc:10860 0xf93e9f expand_expr_real(tree_node*, rtx_def*, machine_mode, expand_modifier, rtx_def**, bool) /home/jlaw/test/gcc/gcc/expr.cc:9049 0xdc48ba expand_expr(tree_node*, rtx_def*, machine_mode, expand_modifier) /home/jlaw/test/gcc/gcc/expr.h:310 [ ... ]
[Bug target/112481] [14 Regression] RISCV: ICE: Segmentation fault when compiling pr110817-3.c
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112481 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org --- Comment #11 from Jeffrey A. Law --- It's sensible, but what's the value in having a SImode variant on rv64 when we have WORD_REGISTER_OPERATIONS defined? I think the right fix here is to remove that pattern (and potentially others like it).
[Bug target/112478] riscv: asm clobbers not honored
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112478 Jeffrey A. Law changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|--- |INVALID --- Comment #4 from Jeffrey A. Law --- You're using an ASM to implement a call. That means your asm is responsible for dealing with all ABI issues, including saving/restoring registers around the call. Essentially GCC has no visibility into what your ASM does. It's just a text string that gets passed through to the assembler. The fact that it worked before was more an accident than by design. Basically GCC doesn't know your ASM performs a call, so it thinks the function is a leaf. I would _strongly_ recommend you not implement calls via ASMs. I've watched developers try to do that for 30+ years. It rarely ends well.
[Bug rtl-optimization/112415] [14 regression] Python 3.11 miscompiled on HPPA with new RTL fold mem offset pass, since r14-4664-g04c9cf5c786b94
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112415 --- Comment #43 from Jeffrey A. Law --- I would expect allowing larger offsets before reload to be a significant problem. The core issue is integer memory operations allow 14 bits while FP only allows 5. During reloading we don't know if any given memory reference is FP or integer. xmpyu plays a role here too since it's going to require FP registers in integer modes. But what I don't understand is why f-m-o fails to push the offset into the memory reference -- it should be conditional on the insn being recognized. And since it's after reload we know if we're doing an FP or integer load.
