[Bug target/87883] [ARM] ICE: Segmentation fault in arm_regno_class

2018-11-23 Thread mihail.ionescu at arm dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87883

Mihail Ionescu  changed:

   What|Removed |Added

 Status|ASSIGNED|RESOLVED
 Resolution|--- |WONTFIX

--- Comment #3 from Mihail Ionescu  ---
Hi Jozeph,

I will close it for now.
I had a look at your patch and even if the segfault is fixed, it won't work
unless arm_active_target.isa is initialised beforehand which does not seem to
be possible without making some major changes.

Best regards,
Mihail

[Bug target/88167] New: [ARM] Function __builtin_return_address returns invalid address

2018-11-23 Thread mihail.ionescu at arm dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88167

Bug ID: 88167
   Summary: [ARM] Function __builtin_return_address returns
invalid address
   Product: gcc
   Version: 7.3.1
Status: UNCONFIRMED
  Severity: normal
  Priority: P3
 Component: target
  Assignee: unassigned at gcc dot gnu.org
  Reporter: mihail.ionescu at arm dot com
  Target Milestone: ---

Used compiler options are: -mcpu=cortex-m0 -mthumb -O2.

Consider the following code:

__attribute__((used))
void *retaddr;

__attribute__((noinline))
void test(void) {
  retaddr = __builtin_return_address(0);

  /* Used for enforcing registers stacking.*/
  asm volatile("" : : : "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
"r8", "r9", "r10", "r11", "r12");
}

It produces the following asm:

 8001940: b5f0 push {r4, r5, r6, r7, lr}
 8001942: 46de mov lr, fp <=== HERE LR is used as a scratchpad
 8001944: 4657 mov r7, sl
 8001946: 464e mov r6, r9
 8001948: 4645 mov r5, r8
 800194a: 4672 mov r2, lr <=== HERE LR is accessed for return address
 800194c: 4b04 ldr r3, [pc, #16] ; (8001960 )
 800194e: b5e0 push {r5, r6, r7, lr}
 8001950: 601a str r2, [r3, #0]
 8001952: bc3c pop {r2, r3, r4, r5}
 8001954: 4690 mov r8, r2
 8001956: 4699 mov r9, r3
 8001958: 46a2 mov sl, r4
 800195a: 46ab mov fp, r5
 800195c: bdf0 pop {r4, r5, r6, r7, pc}

The problem is in the function entry code, where callee-saved registers are
stacked. LR is used as scratchpad @8001942 before the return address is taken
@800194a.

This problem broke the ChibiOS port for Cortex-M0 using the latest compilers,
the builtin is used for enforcing context switch after nested ISRs execution, a
very critical bit of code, there is no easy way to workaround this.

[Bug target/87883] [ARM] ICE: Segmentation fault in arm_regno_class

2018-11-23 Thread mihail.ionescu at arm dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87883

--- Comment #1 from Mihail Ionescu  ---
Hi Jozef,

The issue is indeed there on trunk/gcc-8/gcc-7, but it is expected. It is
caused by the fact that the "arm_active_target.isa" bitmap is not initialised
by the time "init_reg_sets" is called. This can be fixed by checking if it is
initialised or not in the arm backend, but it is not ideal, as arm_regno_class
(REGNO_REG_CLASS) is not supposed to be queried at that time.

What exactly is your patch trying to do? Is there any way of working around
this within your patch?


Best regards,
Mihail

[Bug target/87867] [7 regression] ICE on virtual destructor (-mlong-calls -ffunction-sections) on arm-none-eabi

2018-11-21 Thread mihail.ionescu at arm dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87867

Mihail Ionescu  changed:

   What|Removed |Added

 Status|NEW |RESOLVED
  Known to work||7.3.1
 Resolution|--- |FIXED
  Known to fail|7.3.0   |

--- Comment #4 from Mihail Ionescu  ---
Fixed -- Eric's patch was backported to GCC 8 and GCC 7.

[Bug c++/87867] New: ICE on virtual destructor (-mlong-calls -ffunction-sections) on arm-none-eabi

2018-11-02 Thread mihail.ionescu at arm dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87867

Bug ID: 87867
   Summary: ICE on virtual destructor (-mlong-calls
-ffunction-sections) on arm-none-eabi
   Product: gcc
   Version: 8.2.1
Status: UNCONFIRMED
  Severity: normal
  Priority: P3
 Component: c++
  Assignee: unassigned at gcc dot gnu.org
  Reporter: mihail.ionescu at arm dot com
  Target Milestone: ---

The issue is fixed on trunk. GCC 7.3 and 8.2 crash when compiling the following
example with these specific options: "-mlong-calls", "-ffunction-sections".


class A
{
public:
virtual ~A() { }
};

class B
{
public:
virtual ~B() { }
};

class C : public A, public B
{
public:
virtual ~C();
};

C::~C()
{
}


gcc-arm-error.cpp: In member function 'virtual void* C::_ZThn4_N1CD1Ev()':
gcc-arm-error.cpp:21:1: internal compiler error: in gen_reg_rtx, at
emit-rtl.c:1155
 }
 ^
0xa3a98c gen_reg_rtx(machine_mode)
/arm-none-eabi/build/src/gcc/gcc/emit-rtl.c:1155
0xa54e1e force_reg(machine_mode, rtx_def*)
/arm-none-eabi/build/src/gcc/gcc/explow.c:655
0x143237e gen_sibcall(rtx_def*, rtx_def*, rtx_def*)
/arm-none-eabi/build/src/gcc/gcc/config/arm/arm.md:8272
0x11c3f0e arm32_output_mi_thunk
/arm-none-eabi/build/src/gcc/gcc/config/arm/arm.c:26778
0x11c3f0e arm_output_mi_thunk
/arm-none-eabi/build/src/gcc/gcc/config/arm/arm.c:26799
0x9813cb cgraph_node::expand_thunk(bool, bool)
/arm-none-eabi/build/src/gcc/gcc/cgraphunit.c:1787
0x9836af cgraph_node::assemble_thunks_and_aliases()
/arm-none-eabi/build/src/gcc/gcc/cgraphunit.c:2067
0x983715 cgraph_node::assemble_thunks_and_aliases()
/arm-none-eabi/build/src/gcc/gcc/cgraphunit.c:2085
0x983c1c cgraph_node::expand()
/arm-none-eabi/build/src/gcc/gcc/cgraphunit.c:2202
0x98508a output_in_order
/arm-none-eabi/build/src/gcc/gcc/cgraphunit.c:2381
0x98508a symbol_table::compile()
/arm-none-eabi/build/src/gcc/gcc/cgraphunit.c:2623
0x987392 symbol_table::finalize_compilation_unit()
/arm-none-eabi/build/src/gcc/gcc/cgraphunit.c:2717
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