https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109231

            Bug ID: 109231
           Summary: [13 regression] Comparison failure in
                    libphobos/libdruntime/rt/util/typeinfo.o
           Product: gcc
           Version: 13.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: d
          Assignee: ibuclaw at gdcproject dot org
          Reporter: ro at gcc dot gnu.org
  Target Milestone: ---
              Host: sparc-sun-solaris2.11
            Target: sparc-sun-solaris2.11
             Build: sparc-sun-solaris2.11

Between 20230317 (2bb71424636fba7944b36b1689e9df22a53f1a3f) and 20230320
(fbd50e867e6a782c7b56c9727bf7e1e74dae4b94),
Solaris/SPARC bootstrap broke with a comparison failure:

Comparing stages 2 and 3
Bootstrap comparison failure!
sparc-sun-solaris2.11/libphobos/libdruntime/rt/util/.libs/typeinfo.o differs
sparc-sun-solaris2.11/libphobos/libdruntime/rt/util/typeinfo.o differs
make[2]: *** [Makefile:32772: compare] Error 1

For some reason, this only happens when using gas, not with the native as.

elfcmp shows

*** section:
[244].text._D2rt4util8typeinfo__T20TypeInfoArrayGenericTfTfZQBb7compareMxFIPvIQdZi:
data information differs
--- <sym>:
_D2rt4util8typeinfo__T20TypeInfoArrayGenericTfTfZQBb7compareMxFIPvIQdZi()
<     0x40:<sym>+0x40:     83 aa 4a a8  fcmpes    %fcc1, %f9, %f8
>     0x40:<sym>+0x40:     81 aa 4a a8  fcmpes    %fcc0, %f9, %f8

*** section:
[245].text._D2rt4util8typeinfo__T20TypeInfoArrayGenericTdTdZQBb7compareMxFIPvIQdZi:
data information differs
--- <sym>:
_D2rt4util8typeinfo__T20TypeInfoArrayGenericTdTdZQBb7compareMxFIPvIQdZi()
<     0x34:<sym>+0x34:     81 aa 0a 48  fcmpd     %fcc0, %d8, %d8
>     0x34:<sym>+0x34:     83 aa 0a 48  fcmpd     %fcc1, %d8, %d8

*** section:
[246].text._D2rt4util8typeinfo__T20TypeInfoArrayGenericTEQBsQBs7utility17__c_complex_floatTQBjZQCk7compareMxFIPvIQdZi:
data information differs
--- <sym>:
_D2rt4util8typeinfo__T20TypeInfoArrayGenericTEQBsQBs7utility17__c_complex_floatTQBjZQCk7compareMxFIPvIQdZi()
<     0x3c:<sym>+0x3c:     87 aa 0a 28  fcmps     %fcc3, %f8, %f8
>     0x3c:<sym>+0x3c:     81 aa 0a 28  fcmps     %fcc0, %f8, %f8

*** section:
[247].text._D2rt4util8typeinfo__T20TypeInfoArrayGenericTEQBsQBs7utility18__c_complex_doubleTQBkZQCl7compareMxFIPvIQdZi:
data information differs
--- <sym>:
_D2rt4util8typeinfo__T20TypeInfoArrayGenericTEQBsQBs7utility18__c_complex_doubleTQBkZQCl7compareMxFIPvIQdZi()
<     0x3c:<sym>+0x3c:     83 aa 0a 48  fcmpd     %fcc1, %d8, %d8
>     0x3c:<sym>+0x3c:     85 aa 0a 48  fcmpd     %fcc2, %d8, %d8

*** section:
[248].text._D2rt4util8typeinfo__T15TypeInfoGenericTfTfZQw7compareMxFNaNbNeIPvIQdZi:
data information differs
--- <sym>:
_D2rt4util8typeinfo__T15TypeInfoGenericTfTfZQw7compareMxFNaNbNeIPvIQdZi()
<     0x8:<sym>+0x8:       87 aa 0a 28  fcmps     %fcc3, %f8, %f8
>     0x8:<sym>+0x8:       81 aa 0a 28  fcmps     %fcc0, %f8, %f8

*** section:
[249].text._D2rt4util8typeinfo__T15TypeInfoGenericTdTdZQw7compareMxFNaNbNeIPvIQdZi:
data information differs
--- <sym>:
_D2rt4util8typeinfo__T15TypeInfoGenericTdTdZQw7compareMxFNaNbNeIPvIQdZi()
<     0x8:<sym>+0x8:       85 aa 0a 48  fcmpd     %fcc2, %d8, %d8
>     0x8:<sym>+0x8:       87 aa 0a 48  fcmpd     %fcc3, %d8, %d8

*** section:
[250].text._D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility17__c_complex_floatTQBjZQCf7compareMxFNaNbNeIPvIQdZi:
data information differs
--- <sym>:
_D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility17__c_complex_floatTQBjZQCf7compareMxFNaNbNeIPvIQdZi()
<     0x8:<sym>+0x8:       83 aa 0a 28  fcmps     %fcc1, %f8, %f8
>     0x8:<sym>+0x8:       85 aa 0a 28  fcmps     %fcc2, %f8, %f8

*** section:
[251].text._D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility18__c_complex_doubleTQBkZQCg7compareMxFNaNbNeIPvIQdZi:
data information differs
--- <sym>:
_D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility18__c_complex_doubleTQBkZQCg7compareMxFNaNbNeIPvIQdZi()
<     0x8:<sym>+0x8:       87 aa 0a 48  fcmpd     %fcc3, %d8, %d8
>     0x8:<sym>+0x8:       81 aa 0a 48  fcmpd     %fcc0, %d8, %d8

*** section:
[284].text._D4core8internal5array8equality__T8__equalsTxE2rt4util7utility17__c_complex_floatTxQBmZQCbFNaNbNiNfMAxQCfMQgZb:
data information differs
--- <sym>:
_D4core8internal5array8equality__T8__equalsTxE2rt4util7utility17__c_complex_floatTxQBmZQCbFNaNbNiNfMAxQCfMQgZb()
<     0x44:<sym>+0x44:     85 aa 4a 28  fcmps     %fcc2, %f9, %f8
>     0x44:<sym>+0x44:     87 aa 4a 28  fcmps     %fcc3, %f9, %f8

*** section:
[287].text._D4core8internal5array8equality__T8__equalsTxE2rt4util7utility18__c_complex_doubleTxQBnZQCcFNaNbNiNfMAxQCgMQgZb:
data information differs
--- <sym>:
_D4core8internal5array8equality__T8__equalsTxE2rt4util7utility18__c_complex_doubleTxQBnZQCcFNaNbNiNfMAxQCgMQgZb()
<     0x44:<sym>+0x44:     81 aa 8a 48  fcmpd     %fcc0, %d10, %d8
>     0x44:<sym>+0x44:     83 aa 8a 48  fcmpd     %fcc1, %d10, %d8

*** section:
[295].text._D4core8internal4hash__T13coalesceFloatTfZQsFNaNbNiNfxfZf: data
information differs
--- <sym>: _D4core8internal4hash__T13coalesceFloatTfZQsFNaNbNiNfxfZf()
<     0x28:<sym>+0x28:     83 aa 0a 20  fcmps     %fcc1, %f8, %f0
>     0x28:<sym>+0x28:     85 aa 0a 20  fcmps     %fcc2, %f8, %f0

*** section:
[302].text._D4core8internal4hash__T13coalesceFloatTdZQsFNaNbNiNfxdZd: data
information differs
--- <sym>: _D4core8internal4hash__T13coalesceFloatTdZQsFNaNbNiNfxdZd()
<     0x20:<sym>+0x20:     87 aa 0a 40  fcmpd     %fcc3, %d8, %d0
>     0x20:<sym>+0x20:     81 aa 0a 40  fcmpd     %fcc0, %d8, %d0

*** section:
[415].text._D4core8internal5array8equality__T7isEqualTfTfZQnFNaNbNiMxPfMxQekZb:
data information differs
--- <sym>:
_D4core8internal5array8equality__T7isEqualTfTfZQnFNaNbNiMxPfMxQekZb()
<     0x2c:<sym>+0x2c:     83 aa 4a 28  fcmps     %fcc1, %f9, %f8
>     0x2c:<sym>+0x2c:     85 aa 4a 28  fcmps     %fcc2, %f9, %f8

*** section:
[420].text._D4core8internal5array8equality__T7isEqualTdTdZQnFNaNbNiMxPdMxQekZb:
data information differs
--- <sym>:
_D4core8internal5array8equality__T7isEqualTdTdZQnFNaNbNiMxPdMxQekZb()
<     0x2c:<sym>+0x2c:     85 aa 8a 48  fcmpd     %fcc2, %d10, %d8
>     0x2c:<sym>+0x2c:     87 aa 8a 48  fcmpd     %fcc3, %d10, %d8

Those differences in register allocation may well not be a gdc problem at all.
Considering the commits in that range, this one

commit 57688950b9328cbb4a9c21eb3199f9132b5119d3
Author: Vladimir N. Makarov <vmaka...@redhat.com>
Date:   Fri Mar 17 08:58:58 2023 -0400

    LRA: Implement combining secondary memory reload and original insn

might be a candidate.

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