[Bug middle-end/95021] [10/11 Regression] Bogus -Wclobbered warning
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=95021 H.J. Lu changed: What|Removed |Added Status|UNCONFIRMED |NEW CC||rguenther at suse dot de Last reconfirmed||2020-05-09 Target Milestone|--- |10.2 Ever confirmed|0 |1 --- Comment #1 from H.J. Lu --- Need -msse2 to trigger the bug. This caused by r10-2807: commit 48a31a09839b12127ce7c40d7adc4bd5bf1d3407 Author: Richard Biener Date: Mon Aug 26 10:35:59 2019 + re PR target/91522 (STV is slow) 2019-08-26 Richard Biener PR target/91522 PR target/91527 * config/i386/i386-features.h (general_scalar_chain::defs_map): New member. (general_scalar_chain::replace_with_subreg): Remove. (general_scalar_chain::replace_with_subreg_in_insn): Likewise. (general_scalar_chain::convert_reg): Adjust signature. * config/i386/i386-features.c (scalar_chain::add_insn): Do not iterate over all defs of a reg. (general_scalar_chain::replace_with_subreg): Remove. (general_scalar_chain::replace_with_subreg_in_insn): Likewise. (general_scalar_chain::make_vector_copies): Populate defs_map, place copy only after defs that are used as vectors in the chain. (general_scalar_chain::convert_reg): Emit a copy for a specific def in a specific instruction. (general_scalar_chain::convert_op): All reg uses are converted here. (general_scalar_chain::convert_insn): Emit copies for scalar uses of defs here. Replace uses with the copies we created. Replace and convert the def. Adjust REG_DEAD notes, remove REG_EQUIV/EQUAL notes. (general_scalar_chain::convert_registers): Only handle copies into the chain here.
[Bug middle-end/95021] [10/11 Regression] Bogus -Wclobbered warning
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=95021
--- Comment #2 from H.J. Lu ---
271r.ce2 dump has
;; bb 0 artificial_defs: { d2(0){ }d5(1){ }d8(2){ }d9(6){ }d17(7){ }d34(16){
}d44(19){ }d47(20){ }d50(21){ }d53(22){ }d66(28){ }d69(29){ }d72(30){ }}
;; bb 0 artificial_uses: { }
;; lr in85
;; lr use
;; lr def 0 [ax] 1 [dx] 2 [cx] 6 [bp] 7 [sp] 16 [argp] 19 [frame] 20
[xmm0] 21 [xmm1] 22 [xmm2] 28 [mm0] 29 [mm1] 30 [mm2]
;; live in
;; live gen 0 [ax] 1 [dx] 2 [cx] 6 [bp] 7 [sp] 16 [argp] 19 [frame] 20
[xmm0] 21 [xmm1] 22 [xmm2] 28 [mm0] 29 [mm1] 30 [mm2]
;; live kill
;; lr out 6 [bp] 7 [sp] 16 [argp] 19 [frame] 85
;; live out 6 [bp] 7 [sp] 16 [argp] 19 [frame]
...
;; bb 2 artificial_defs: { }
;; bb 2 artificial_uses: { u0(6){ }u1(7){ }u2(16){ }u3(19){ }}
;; lr in6 [bp] 7 [sp] 16 [argp] 19 [frame] 85
;; lr use 6 [bp] 7 [sp] 16 [argp] 19 [frame]
;; lr def 0 [ax] 1 [dx] 2 [cx] 7 [sp] 8 [st] 9 [st(1)] 10 [st(2)] 11
[st(3)] 12 [st(4)] 13 [st(5)] 14 [st(6)] 15 [st(7)] 17 [flags] 18 [fpsr] 20
[xmm0] 21 [xmm1] 22 [xmm2] 23 [xmm3] 24 [xmm4] 25 [xmm5] 26 [xmm6] 27 [xmm7] 28
[mm0] 29 [mm1] 30 [mm2] 31 [mm3] 32 [mm4] 33 [mm5] 34 [mm6] 35 [mm7] 36 [r8] 37
[r9] 38 [r10] 39 [r11] 40 [r12] 41 [r13] 42 [r14] 43 [r15] 44 [xmm8] 45 [xmm9]
46 [xmm10] 47 [xmm11] 48 [xmm12] 49 [xmm13] 50 [xmm14] 51 [xmm15] 52 [xmm16] 53
[xmm17] 54 [xmm18] 55 [xmm19] 56 [xmm20] 57 [xmm21] 58 [xmm22] 59 [xmm23] 60
[xmm24] 61 [xmm25] 62 [xmm26] 63 [xmm27] 64 [xmm28] 65 [xmm29] 66 [xmm30] 67
[xmm31] 68 [k0] 69 [k1] 70 [k2] 71 [k3] 72 [k4] 73 [k5] 74 [k6] 75 [k7] 88
;; live in 6 [bp] 7 [sp] 16 [argp] 19 [frame]
;; live gen 0 [ax] 7 [sp] 17 [flags] 88
;; live kill17 [flags]
;; lr out 6 [bp] 7 [sp] 16 [argp] 19 [frame] 85
;; live out 6 [bp] 7 [sp] 16 [argp] 19 [frame]
Since IRA has
/* DF_LIVE can't be used in the register allocator, too many other
parts of the compiler depend on using the "classic" liveness
interpretation of the DF_LR problem. See PR38711.
Remove the problem, so that we don't spend time updating it in
any of the df_analyze() calls during IRA/LRA. */
if (optimize > 1)
df_remove_problem (df_live);
gcc_checking_assert (df_live == NULL);
setjmp_vars_warning uses DF_LR info and gets the wrong result.
Why is DF_LR info so way off? Reg 85 isn't live at function entry
nor at BB 2 exit.
[Bug middle-end/95021] [10/11 Regression] Bogus -Wclobbered warning
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=95021 Richard Biener changed: What|Removed |Added Keywords||diagnostic CC|rguenther at suse dot de |law at gcc dot gnu.org, ||rguenth at gcc dot gnu.org Target||x86_64-*-* --- Comment #3 from Richard Biener --- IIRC Jeff was working on replacing -Wclobbered
[Bug middle-end/95021] [10/11 Regression] Bogus -Wclobbered warning
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=95021
--- Comment #4 from H.J. Lu ---
The problem is since df_lr_bb_local_compute has
/* If the def is to only part of the reg, it does
not kill the other defs that reach here. */
if (!(DF_REF_FLAGS (def) & (DF_REF_PARTIAL | DF_REF_CONDITIONAL)))
{
unsigned int dregno = DF_REF_REGNO (def);
bitmap_set_bit (&bb_info->def, dregno);
bitmap_clear_bit (&bb_info->use, dregno);
}
it doesn't consider
(insn 40 39 25 3 (set (subreg:SI (reg/v:DI 85 [ target ]) 4)
(subreg:SI (reg:V2DI 90) 0)) "x.i":17:7 -1
(nil))
as a def.
[Bug middle-end/95021] [10/11 Regression] Bogus -Wclobbered warning
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=95021 --- Comment #5 from H.J. Lu --- STV generates: 8d b6 00 00 00 00 lea0x0(%esi),%esi a1 00 00 00 00 mov0x0,%eax R_386_32target_p 83 ec 08sub$0x8,%esp f3 0f 7e 00 movq (%eax),%xmm0 a1 00 00 00 00 mov0x0,%eax R_386_32c 66 0f 6f c8 movdqa %xmm0,%xmm1 66 0f 7e 44 24 10 movd %xmm0,0x10(%esp) 66 0f 73 d1 20 psrlq $0x20,%xmm1 66 0f d6 00 movq %xmm0,(%eax) 66 0f 7e 4c 24 14 movd %xmm1,0x14(%esp) ff 74 24 14 pushl 0x14(%esp) ff 74 24 14 pushl 0x14(%esp) e8 fc ff ff ff callR_386_PC32 e instead of 8d b6 00 00 00 00 lea0x0(%esi),%esi a1 00 00 00 00 mov0x0,%eax R_386_32target_p 8b 0d 00 00 00 00 mov0x0,%ecx R_386_32c 83 ec 08sub$0x8,%esp 8b 50 04mov0x4(%eax),%edx 8b 00 mov(%eax),%eax 89 51 04mov%edx,0x4(%ecx) 89 01 mov%eax,(%ecx) 52 push %edx 50 push %eax e8 fc ff ff ff callR_386_PC32 e It is hard to tell if vector is faster.
[Bug middle-end/95021] [10/11 Regression] Bogus -Wclobbered warning
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=95021
--- Comment #6 from rguenther at suse dot de ---
On Tue, 12 May 2020, hjl.tools at gmail dot com wrote:
> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=95021
>
> --- Comment #4 from H.J. Lu ---
> The problem is since df_lr_bb_local_compute has
>
>/* If the def is to only part of the reg, it does
>not kill the other defs that reach here. */
> if (!(DF_REF_FLAGS (def) & (DF_REF_PARTIAL | DF_REF_CONDITIONAL)))
> {
> unsigned int dregno = DF_REF_REGNO (def);
> bitmap_set_bit (&bb_info->def, dregno);
> bitmap_clear_bit (&bb_info->use, dregno);
> }
>
> it doesn't consider
>
> (insn 40 39 25 3 (set (subreg:SI (reg/v:DI 85 [ target ]) 4)
> (subreg:SI (reg:V2DI 90) 0)) "x.i":17:7 -1
> (nil))
>
> as a def.
Which it isn't since it sets the upper half of reg:DI 85 only.
[Bug middle-end/95021] [10/11 Regression] Bogus -Wclobbered warning
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=95021 H.J. Lu changed: What|Removed |Added CC||ubizjak at gmail dot com URL||https://gcc.gnu.org/piperma ||il/gcc-patches/2020-May/545 ||630.html Keywords||patch --- Comment #7 from H.J. Lu --- A patch is posted at https://gcc.gnu.org/pipermail/gcc-patches/2020-May/545630.html
[Bug middle-end/95021] [10/11 Regression] Bogus -Wclobbered warning
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=95021
--- Comment #8 from H.J. Lu ---
(In reply to rguent...@suse.de from comment #6)
> On Tue, 12 May 2020, hjl.tools at gmail dot com wrote:
>
> > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=95021
> >
> > --- Comment #4 from H.J. Lu ---
> > The problem is since df_lr_bb_local_compute has
> >
> >/* If the def is to only part of the reg, it does
> >not kill the other defs that reach here. */
> > if (!(DF_REF_FLAGS (def) & (DF_REF_PARTIAL | DF_REF_CONDITIONAL)))
> > {
> > unsigned int dregno = DF_REF_REGNO (def);
> > bitmap_set_bit (&bb_info->def, dregno);
> > bitmap_clear_bit (&bb_info->use, dregno);
> > }
> >
> > it doesn't consider
> >
> > (insn 40 39 25 3 (set (subreg:SI (reg/v:DI 85 [ target ]) 4)
> > (subreg:SI (reg:V2DI 90) 0)) "x.i":17:7 -1
> > (nil))
> >
> > as a def.
>
> Which it isn't since it sets the upper half of reg:DI 85 only.
True. But it is clearly incorrect that reg:DI 85 is live at function
entrance.
[Bug middle-end/95021] [10/11 Regression] Bogus -Wclobbered warning
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=95021 --- Comment #9 from CVS Commits --- The master branch has been updated by H.J. Lu : https://gcc.gnu.org/g:266f44a91c0c9705d3d18e82d7c5bab32927a18f commit r11-446-g266f44a91c0c9705d3d18e82d7c5bab32927a18f Author: H.J. Lu Date: Sun May 17 10:10:34 2020 -0700 x86: Allow V1TI vector register pushes Add V1TI vector register push and split it after reload to a sequence of: (set (reg:P SP_REG) (plus:P SP_REG) (const_int -8))) (set (match_dup 0) (match_dup 1)) so that STV pass can convert TI mode integer push to V1TI vector register push. Rename has_non_address_hard_reg to pseudo_reg_set, combine calls of single_set and has_non_address_hard_reg to pseudo_reg_set, to ignore pseudo register push. Remove c-c++-common/dfp/func-vararg-mixed-2.c since it is compiled with -mpreferred-stack-boundary=2 and leads to segfault: Dump of assembler code for function __bid_nesd2: 0x08049210 <+0>: endbr32 0x08049214 <+4>: push %esi 0x08049215 <+5>: push %ebx 0x08049216 <+6>: call 0x8049130 <__x86.get_pc_thunk.bx> 0x0804921b <+11>:add$0x8de5,%ebx 0x08049221 <+17>:sub$0x20,%esp 0x08049224 <+20>:mov0x30(%esp),%esi 0x08049228 <+24>:pushl 0x2c(%esp) 0x0804922c <+28>:call 0x804e600 <__bid32_to_bid64> 0x08049231 <+33>:mov%esi,(%esp) 0x08049234 <+36>:movd %edx,%xmm1 0x08049238 <+40>:movd %eax,%xmm0 0x0804923c <+44>:punpckldq %xmm1,%xmm0 => 0x08049240 <+48>:movaps %xmm0,0x10(%esp) 0x08049245 <+53>:call 0x804e600 <__bid32_to_bid64> 0x0804924a <+58>:push %edx 0x0804924b <+59>:push %eax 0x0804924c <+60>:pushl 0x1c(%esp) 0x08049250 <+64>:pushl 0x1c(%esp) 0x08049254 <+68>:call 0x804b260 <__bid64_quiet_not_equal> 0x08049259 <+73>:add$0x34,%esp 0x0804925c <+76>:pop%ebx 0x0804925d <+77>:pop%esi 0x0804925e <+78>:ret when libgcc is compiled with -msse2. According to GCC manual: '-mpreferred-stack-boundary=NUM' Attempt to keep the stack boundary aligned to a 2 raised to NUM byte boundary. If '-mpreferred-stack-boundary' is not specified, the default is 4 (16 bytes or 128-bits). *Warning:* If you use this switch, then you must build all modules with the same value, including any libraries. This includes the system libraries and startup modules. c-c++-common/dfp/func-vararg-mixed-2.c, which was added by commit 3b2488ca6ece182f2136a20ee5fa0bb92f935b0f Author: H.J. Lu Date: Wed Jul 30 19:24:02 2008 + func-vararg-alternate-d128-2.c: New. 2008-07-30 H.J. Lu Joey Ye * gcc.dg/dfp/func-vararg-alternate-d128-2.c: New. * gcc.dg/dfp/func-vararg-mixed-2.c: Likewise. isn't expected to work with libgcc. gcc/ PR target/95021 * config/i386/i386-features.c (has_non_address_hard_reg): Renamed to ... (pseudo_reg_set): This. Return the SET expression. Ignore pseudo register push. (general_scalar_to_vector_candidate_p): Combine single_set and has_non_address_hard_reg calls to pseudo_reg_set. (timode_scalar_to_vector_candidate_p): Likewise. * config/i386/i386.md (*pushv1ti2): New pattern. gcc/testsuite/ PR target/95021 * c-c++-common/dfp/func-vararg-mixed-2.c: Removed. * gcc.target/i386/pr95021-1.c: New test. * gcc.target/i386/pr95021-2.c: Likewise. * gcc.target/i386/pr95021-3.c: Likewise. * gcc.target/i386/pr95021-4.c: Likewise. * gcc.target/i386/pr95021-5.c: Likewise.
[Bug middle-end/95021] [10/11 Regression] Bogus -Wclobbered warning
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=95021 --- Comment #10 from H.J. Lu --- Fixed for GCC 11.
[Bug middle-end/95021] [10/11 Regression] Bogus -Wclobbered warning
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=95021 Rainer Orth changed: What|Removed |Added CC||ro at gcc dot gnu.org --- Comment #11 from Rainer Orth --- Two of the new tests FAIL on 32-bit Solaris/x86: +FAIL: gcc.target/i386/pr95021-1.c scan-assembler movq[ \\t]%xmm[0-9]+, (%esp) +FAIL: gcc.target/i386/pr95021-3.c scan-assembler movq[ \\t]+[^\\n]*, %xmm
[Bug middle-end/95021] [10/11 Regression] Bogus -Wclobbered warning
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=95021 Richard Biener changed: What|Removed |Added Target Milestone|10.2|10.3 --- Comment #12 from Richard Biener --- GCC 10.2 is released, adjusting target milestone.
