[Bug rtl-optimization/111384] missed optimization: GCC adds extra any extend when storing subreg#0 multiple times
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111384 Siarhei Volkau changed: What|Removed |Added Resolution|--- |DUPLICATE Status|NEW |RESOLVED --- Comment #5 from Siarhei Volkau --- Dup of bug 104387. *** This bug has been marked as a duplicate of bug 104387 ***
[Bug rtl-optimization/111384] missed optimization: GCC adds extra any extend when storing subreg#0 multiple times
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111384 Jeffrey A. Law changed: What|Removed |Added Last reconfirmed||2023-10-07 Ever confirmed|0 |1 Status|UNCONFIRMED |NEW --- Comment #4 from Jeffrey A. Law --- So this is something we've been pondering over in rv64 land. Joern has an extension to DCE which tracks subobjects in an attempt to determine if bits set by sign/zero extensions are never read. If they aren't read, then the extension can be eliminated.
[Bug rtl-optimization/111384] missed optimization: GCC adds extra any extend when storing subreg#0 multiple times
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111384 --- Comment #3 from Andrew Pinski --- I thought I saw/reported a similar bug but I can't find it right now.
[Bug rtl-optimization/111384] missed optimization: GCC adds extra any extend when storing subreg#0 multiple times
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111384 Andrew Pinski changed: What|Removed |Added Severity|normal |enhancement
[Bug rtl-optimization/111384] missed optimization: GCC adds extra any extend when storing subreg#0 multiple times
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111384 --- Comment #2 from Siarhei Volkau --- Well what the godbolt says with -O2 -fomit-frame-pointer. ARM: uxthr0, r0 @ << zero extend strhr0, [r1] strhr0, [r2] bx lr ARM64: and w0, w0, 65535 @ << zero extend strhw0, [x1] strhw0, [x2] ret MIPS64: andi$4,$4,0x@ << zero extend sh $4,0($5) jr $31 sh $4,0($6) MRISC32: shufr1, r1, #2888 @ << zero extend sth r1, [r2] sth r1, [r3] ret RISC-V: sllia0,a0,16@ << zero extend srlia0,a0,16@ << zero extend sh a0,0(a1) sh a0,0(a2) ret RISC-V (64-bit): sllia0,a0,48@ << zero extend srlia0,a0,48@ << zero extend sh a0,0(a1) sh a0,0(a2) ret Xtensa ESP32: entry sp, 32 extui a2, a2, 0, 16 @ << zero extend s16ia2, a3, 0 s16ia2, a4, 0 retw.n Loongarch64: bstrpick.w $r4,$r4,15,0 @ << zero extend st.h$r4,$r5,0 st.h$r4,$r6,0 jr $r1 MIPS: andi$4,$4,0x@ << zero extend sh $4,0($5) jr $31 sh $4,0($6) SH: extu.w r4,r4 @ << zero extend mov.w r4,@r5 rts mov.w r4,@r6 Other available at godbolt (x86-64/Power/Power64/s390) unaffected.
[Bug rtl-optimization/111384] missed optimization: GCC adds extra any extend when storing subreg#0 multiple times
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111384 Richard Biener changed: What|Removed |Added Version|unknown |14.0 Component|middle-end |rtl-optimization --- Comment #1 from Richard Biener --- can you name one of many?