[Bug rtl-optimization/18560] better optimalization of EOR/MOV block.
--- Comment #7 from rask at gcc dot gnu dot org 2007-11-09 20:40 --- This has been fixed for more than a year: reverse: @ args = 0, pretend = 0, frame = 0 @ frame_needed = 0, uses_anonymous_args = 0 @ link register save eliminated. eor r3, r0, r0, ror #16 @ 12*arith_shiftsi [length = 4] bic r3, r3, #16711680 @ 13*arm_andsi3_insn/2 [length = 4] mov r0, r0, ror #8 @ 15*arm_shiftsi3 [length = 4] eor r0, r0, r3, lsr #8 @ 23*arith_shiftsi [length = 4] @ lr needed for prologue@ 36prologue_use[length = 4] bx lr @ 39return [length = 12] .size reverse, .-reverse .ident GCC: (GNU) 4.2.0 20060729 (experimental) 4.3.0 (revision 129967) generates the same code. -- rask at gcc dot gnu dot org changed: What|Removed |Added Status|NEW |RESOLVED Known to work||4.2.0 4.3.0 Resolution||FIXED http://gcc.gnu.org/bugzilla/show_bug.cgi?id=18560
[Bug rtl-optimization/18560] better optimalization of EOR/MOV block.
-- What|Removed |Added Target Milestone|4.0.0 |--- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=18560
[Bug rtl-optimization/18560] better optimalization of EOR/MOV block.
-- What|Removed |Added Status|REOPENED|NEW http://gcc.gnu.org/bugzilla/show_bug.cgi?id=18560
[Bug rtl-optimization/18560] better optimalization of EOR/MOV block.
--- Additional Comments From rearnsha at gcc dot gnu dot org 2005-02-11 10:15 --- The new register allocator (new-ra) has been removed because it was buggy and there were no plans to fix it. I was using it to show that the initial MOV was an unrelated issue. Your code snippet shows that the rotate and the EOR are being merged, which is what this PR was about. -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=18560
[Bug rtl-optimization/18560] better optimalization of EOR/MOV block.
--- Additional Comments From pluto at pld-linux dot org 2005-02-11 10:47 --- (In reply to comment #4) The new register allocator (new-ra) has been removed because it was buggy and there were no plans to fix it. I was using it to show that the initial MOV was an unrelated issue. Your code snippet shows that the rotate and the EOR are being merged, which is what this PR was about. The PR is about initial eor/mov opt., not eor/rotate ;-) At this moment the comercial IAR compiler generates good code. The GCC should be good too :) reverse: 0x0D04 E0201860 EOR R1, R0, R0, ROR #16 0x0D08 E3C118FF BIC R1, R1, #0xFF 0x0D0C E1A01421 MOV R1, R1, LSR #8 0x0D10 E0210460 EOR R0, R1, R0, ROR #8 0x0D14 E12FFF1E BX LR -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=18560
[Bug rtl-optimization/18560] better optimalization of EOR/MOV block.
--- Additional Comments From pluto at pld-linux dot org 2005-02-10 20:17 --- (In reply to comment #2) As Andrew pointed out, the merge of the eor and the rotate is now done on mainline in 4.0. Hmm, it doesn't work on my gcc. # arm-pld-linux-gcc reversing_the_bytes_in_word.c -s -S -O2 .file reversing_the_bytes_in_word.c .text .align 2 .global reverse .type reverse, %function reverse: @ args = 0, pretend = 0, frame = 0 @ frame_needed = 0, uses_anonymous_args = 0 @ link register save eliminated. mov r3, r0 eor r0, r0, r0, ror #16 bic r0, r0, #16711680 mov r0, r0, lsr #8 eor r0, r0, r3, ror #8 @ lr needed for prologue mov pc, lr .size reverse, .-reverse .ident GCC: (GNU) 4.0.0 20050130 (experimental) The initial redundant MOV is a register allocation artifact. This particular testcase compiles optimally with the new register allocator: Is there a special option I need to set? -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=18560
[Bug rtl-optimization/18560] better optimalization of EOR/MOV block.
--- Additional Comments From rearnsha at gcc dot gnu dot org 2004-12-14 15:16 --- As Andrew pointed out, the merge of the eor and the rotate is now done on mainline in 4.0. The initial redundant MOV is a register allocation artifact. This particular testcase compiles optimally with the new register allocator: reverse: eor r3, r0, r0, ror #16 bic r3, r3, #16711680 mov r3, r3, lsr #8 eor r0, r3, r0, ror #8 bx lr but for other reasons, I wouldn't recommend you use that option (too many other bugs). -- What|Removed |Added Status|NEW |RESOLVED Resolution||FIXED Target Milestone|--- |4.0.0 http://gcc.gnu.org/bugzilla/show_bug.cgi?id=18560
[Bug rtl-optimization/18560] better optimalization of EOR/MOV block.
--- Additional Comments From pinskia at gcc dot gnu dot org 2004-11-19 14:50 --- Confirmed, the mainline produces better code already: mov r3, r0 eor r0, r0, r0, ror #16 bic r0, r0, #16711680 mov r0, r0, lsr #8 eor r0, r0, r3, ror #8 @ lr needed for prologue bx lr -- What|Removed |Added Severity|minor |enhancement Status|UNCONFIRMED |NEW Ever Confirmed||1 GCC build triplet|pentium3-pld-linux | GCC host triplet|pentium3-pld-linux | Keywords||missed-optimization Last reconfirmed|-00-00 00:00:00 |2004-11-19 14:50:54 date|| http://gcc.gnu.org/bugzilla/show_bug.cgi?id=18560
