[Bug rtl-optimization/27468] sign-extending Alpha instructions not exploited
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=27468 Uros Bizjak ubizjak at gmail dot com changed: What|Removed |Added Status|NEW |ASSIGNED URL||http://gcc.gnu.org/ml/gcc-p ||atches/2011-12/msg01606.htm ||l AssignedTo|unassigned at gcc dot |ubizjak at gmail dot com |gnu.org | Target Milestone|--- |4.7.0 --- Comment #4 from Uros Bizjak ubizjak at gmail dot com 2011-12-22 10:14:44 UTC --- Patch at [1]. [1] http://gcc.gnu.org/ml/gcc-patches/2011-12/msg01606.html
[Bug rtl-optimization/27468] sign-extending Alpha instructions not exploited
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=27468 --- Comment #5 from Uros Bizjak ubizjak at gmail dot com 2011-12-22 10:25:10 UTC --- With proposed patch to enable REE pass, we still generate: f5: 0: 20 05 f0 43 negqa0,v0 4: c0 08 10 46 cmovge a0,a0,v0 8: 00 00 e0 43 sextl v0,v0 c: 01 80 fa 6b ret However, we need a sign extend somewhere, and in above case, we apply sign extension to the result, where Compaq C applies extension to the arguments of cmove. These sequences are equivalent an all aspects. FYI: Proposed optimal f5 sequence is wrong. Since cmov always operates on the whole DImode register, garbage in bits 31+ of a0 can pass unmodified to the function result. Compaq C is correct to produce: f5: 0:10 00 f0 43 sextla0,a0 4:20 01 f0 43 negla0,v0 8:c0 08 10 46 cmovgea0,a0,v0 c:00 00 fe 2f unop 10:01 80 fa 6b ret but this is effectively no different than gcc sequence above.
[Bug rtl-optimization/27468] sign-extending Alpha instructions not exploited
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=27468 --- Comment #6 from uros at gcc dot gnu.org 2011-12-22 16:35:25 UTC --- Author: uros Date: Thu Dec 22 16:35:16 2011 New Revision: 182626 URL: http://gcc.gnu.org/viewcvs?root=gccview=revrev=182626 Log: PR target/27468 * common/config/alpha/alpha-common.c (alpha_option_optimization_table): Enable flag_ree at -O2 or higher. Modified: trunk/gcc/ChangeLog trunk/gcc/common/config/alpha/alpha-common.c
[Bug rtl-optimization/27468] sign-extending Alpha instructions not exploited
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=27468 Uros Bizjak ubizjak at gmail dot com changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution||FIXED --- Comment #7 from Uros Bizjak ubizjak at gmail dot com 2011-12-22 16:36:51 UTC --- Fixed.
[Bug rtl-optimization/27468] sign-extending Alpha instructions not exploited
--- Comment #3 from rth at gcc dot gnu dot org 2009-12-03 00:23 --- Note that f23 and f49 are fixed in gcc 4.5, probably by the fix to PR8603. The f5 test continues to have the unneeded extend. -- rth at gcc dot gnu dot org changed: What|Removed |Added Status|UNCONFIRMED |NEW Ever Confirmed|0 |1 Last reconfirmed|-00-00 00:00:00 |2009-12-03 00:23:35 date|| http://gcc.gnu.org/bugzilla/show_bug.cgi?id=27468
[Bug rtl-optimization/27468] sign-extending Alpha instructions not exploited
--- Comment #2 from mattst88 at gmail dot com 2009-04-18 15:22 ---
For reference, here's what the Compaq C compiler generates for each of these.
(In reply to comment #0)
The sign-extending Alpha instructions like addl are sometimes not used. I
don't know whether the SEE pass is supposed to affect this, or whether it
is something a combiner pass should do...
Compaq C:
f5:
0: 10 00 f0 43 sextl a0,a0
4: 20 01 f0 43 negla0,v0
8: c0 08 10 46 cmovge a0,a0,v0
c: 00 00 fe 2f unop
10: 01 80 fa 6b ret
#include stdlib.h
/* gcc 4.2.0 20060506:
negqa0,v0
cmovge a0,a0,v0
sextl v0,v0
optimal:
negla0,v0
cmovge a0,a0,v0 */
int f5(int x) {
return abs(x);
}
Compaq C:
f23:
0: 30 17 06 4a sll a0,0x30,a0
4: 90 17 06 4a sra a0,0x30,a0
8: 62 05 10 42 s4subq a0,a0,t1
c: 42 06 50 40 s8addq t1,a0,t1
10: 42 06 50 40 s8addq t1,a0,t1
14: 40 06 50 40 s8addq t1,a0,v0
18: 01 80 fa 6b ret
/* gcc 4.2.0 20060506:
s4addq a0,a0,v0
s4addq v0,v0,v0
s8addq v0,a0,v0
s8addq v0,a0,v0 #
sextl v0,v0# can be combined to s8addl v0,a0,v0 */
int64_t f23(int16_t x) {
return 1609 * x;
}
Compaq C:
f49:
0: 00 80 5f 24 ldaht1,-32768
4: 00 80 7f 24 ldaht2,-32768
8: 02 08 02 46 xor a0,t1,t1
c: 00 00 43 40 addlt1,t2,v0
10: 01 80 fa 6b ret
/* gcc 4.2.0 20060506:
ldaht0,-32768
xor a0,t0,v0
addqv0,t0,v0 #
sextl v0,v0# can be combined to addlv0,t0,v0 */
unsigned f49(unsigned val) {
return (val ^ 0x8000) - 0x8000;
}
In the first two cases, the Compaq C compiler seems to be more careful about
input arguments.
--
mattst88 at gmail dot com changed:
What|Removed |Added
CC||mattst88 at gmail dot com
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=27468
[Bug rtl-optimization/27468] sign-extending Alpha instructions not exploited
--- Comment #1 from pinskia at gcc dot gnu dot org 2006-05-07 18:35 ---
For abs, we do get a difference in the RTL:
(insn 32 11 16 2 (set (subreg:SI (reg:DI 73) 0)
(subreg:SI (reg:DI 72) 0)) -1 (nil)
(expr_list:REG_DEAD (reg:DI 72)
(nil)))
(note 16 32 31 2 NOTE_INSN_FUNCTION_END)
(insn 31 16 19 2 (set (reg:DI 73)
(sign_extend:DI (subreg:SI (reg:DI 73) 0))) 1 {*extendsidi2_1} (nil)
(nil))
- TO;
(insn 12 11 16 2 (set (reg:DI 73)
(sign_extend:DI (subreg:SI (reg:DI 72) 0))) 1 {*extendsidi2_1}
(insn_list:REG_DEP_TRUE 11 (nil))
(expr_list:REG_DEAD (reg:DI 72)
(nil)))
(note 16 12 19 2 NOTE_INSN_FUNCTION_END)
--
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=27468
