--- Comment #3 from vmakarov at redhat dot com 2009-03-25 21:05 ---
Thanks for reporting this.
The compiler is broken on gcc_assert in the following code
+ else if ((code == PRE_INC || code == PRE_DEC
+ || code == POST_INC || code == POST_DEC))
+ {
+ int in_hard_regno;
+ int in_regno = REGNO (XEXP (in_reg, 0));
+
+ if (reg_last_reload_reg[in_regno] != NULL_RTX)
+ {
+ in_hard_regno = REGNO
(reg_last_reload_reg[in_regno]);
+ gcc_assert (TEST_HARD_REG_BIT (reg_reloaded_valid,
+in_hard_regno));
+ for (x = old_prev ? NEXT_INSN (old_prev) : insn;
+ x != old_next;
+ x = NEXT_INSN (x))
+ if (x == reg_reloaded_insn[in_hard_regno])
+ break;
+ /* If for some reasons, we didn't set up
+reg_last_reload_reg in this insn,
+invalidate inheritance from previous
+insns for the incremented/decremented
+register. Such registers will be not in
+reg_has_output_reload. */
+ if (x == old_next)
+ forget_old_reloads_1 (XEXP (in_reg, 0),
+ NULL_RTX, NULL);
+ }
+ }
Here in_regno is 191 and in_hard_regno is 8. This code is executed
after emit_insn_reloads which invalidates hard register 8 when
processing reload #5 of the current insn. I've overlooked this
possibility in my patch for PR37514
http://gcc.gnu.org/ml/gcc-patches/2008-11/msg01424.html
reg_reloaded_valid should be checked for reg_reloaded_insn validity
but not as gcc_assert. I'll send a new patch solving the problem soon.
(insn 411 1161 1160 17
/tmp/x144980/gcc/gcc/testsuite/gcc.c-torture/execute/stdarg-3.c:144 (set
(mem/s/c:SI (post_inc:SI (reg/f:SI 192)) [10 S4 A8])
(mem/s/c:SI (post_inc:SI (reg/f:SI 191)) [10 a3+4 S4 A16])) 38
{*movsi_internal} (expr_list:REG_INC (reg/f:SI 191)
(expr_list:REG_INC (reg/f:SI 192)
(nil
Reloads for insn # 411
Reload 0: reload_in (SI) = (plus:SI (reg/f:SI 14 sp)
(const_int 104 [0x68]))
GENERAL_REGS, RELOAD_FOR_OPERAND_ADDRESS (opnum = 0), can't combine
reload_in_reg: (plus:SI (reg/f:SI 14 sp)
(const_int 104 [0x68]))
reload_reg_rtx: (reg:SI 9 r9)
Reload 1: reload_in (SI) = (post_inc:SI (mem/c:SI (plus:SI (reg/f:SI 14 sp)
(const_int 104
[0x68])) [11 %sfp+-280 S4 A8]))
reload_out (SI) = (post_inc:SI (mem/c:SI (plus:SI (reg/f:SI 14 sp)
(const_int 104
[0x68])) [11 %sfp+-280 S4 A8]))
GENERAL_REGS, RELOAD_FOR_OPERAND_ADDRESS (opnum = 0), inc by 4, can't
combine
reload_in_reg: (post_inc:SI (reg/f:SI 192))
reload_reg_rtx: (reg:SI 6 r6)
Reload 2: reload_in (SI) = (plus:SI (reg/f:SI 14 sp)
(const_int 100 [0x64]))
GENERAL_REGS, RELOAD_FOR_INPUT_ADDRESS (opnum = 1), can't combine
reload_in_reg: (plus:SI (reg/f:SI 14 sp)
(const_int 100 [0x64]))
reload_reg_rtx: (reg:SI 9 r9)
Reload 3: reload_in (SI) = (post_inc:SI (mem/c:SI (plus:SI (reg/f:SI 14 sp)
(const_int 100
[0x64])) [11 %sfp+-284 S4 A8]))
reload_out (SI) = (post_inc:SI (mem/c:SI (plus:SI (reg/f:SI 14 sp)
(const_int 100
[0x64])) [11 %sfp+-284 S4 A8]))
GENERAL_REGS, RELOAD_FOR_INPUT_ADDRESS (opnum = 1), inc by 4, can't
combine
reload_in_reg: (post_inc:SI (reg/f:SI 191))
reload_reg_rtx: (reg:SI 8 r8)
Reload 4: reload_out (SI) = (mem/s/c:SI (post_inc:SI (reg/f:SI 192)) [10 S4
A8])
NO_REGS, RELOAD_FOR_OUTPUT (opnum = 0), optional
reload_out_reg: (mem/s/c:SI (post_inc:SI (reg/f:SI 192)) [10 S4 A8])
Reload 5: reload_in (SI) = (mem/s/c:SI (post_inc:SI (reg/f:SI 191)) [10 a3+4 S4
A16])
GENERAL_REGS, RELOAD_FOR_INPUT (opnum = 1)
reload_in_reg: (mem/s/c:SI (post_inc:SI (reg/f:SI 191)) [10 a3+4 S4
A16])
reload_reg_rtx: (reg:SI 8 r8)
--
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=39522
