[Bug rtl-optimization/70751] [7 Regression] FAIL: gcc.target/arm/eliminate.c scan-assembler-times r0,[\\t ]*sp 3 since r235184
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70751 Dominik Vogt changed: What|Removed |Added CC||vogt at linux dot vnet.ibm.com --- Comment #7 from Dominik Vogt --- This commit triggers an ICE with s390x. See https://gcc.gnu.org/ml/gcc-patches/2016-06/msg01810.html for details.
[Bug rtl-optimization/70751] [7 Regression] FAIL: gcc.target/arm/eliminate.c scan-assembler-times r0,[\\t ]*sp 3 since r235184
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70751 Jiong Wang changed: What|Removed |Added Status|NEW |RESOLVED Resolution|--- |FIXED --- Comment #6 from Jiong Wang --- Fixed.
[Bug rtl-optimization/70751] [7 Regression] FAIL: gcc.target/arm/eliminate.c scan-assembler-times r0,[\\t ]*sp 3 since r235184
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70751 --- Comment #5 from Jiong Wang --- Author: jiwang Date: Thu Jun 9 21:28:31 2016 New Revision: 237277 URL: https://gcc.gnu.org/viewcvs?rev=237277=gcc=rev Log: [Patch] PR70751, correct the cost for spilling non-pseudo into memory PR rtl-optimization/70751 * lra-constraints.c (process_alt_operands): Recognize Non-pseudo spilled into memory. Modified: trunk/gcc/ChangeLog trunk/gcc/lra-constraints.c
[Bug rtl-optimization/70751] [7 Regression] FAIL: gcc.target/arm/eliminate.c scan-assembler-times r0,[\\t ]*sp 3 since r235184
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70751 --- Comment #4 from Jiong Wang --- Thanks, I will prepare a patch after various testing OK.
[Bug rtl-optimization/70751] [7 Regression] FAIL: gcc.target/arm/eliminate.c scan-assembler-times r0,[\\t ]*sp 3 since r235184
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70751 Vladimir Makarov changed: What|Removed |Added CC||vmakarov at gcc dot gnu.org --- Comment #3 from Vladimir Makarov --- (In reply to Jiong Wang from comment #2) > Vlad, > > Do you have any comments on this regression? > > *arm_movsi_insn has the following operand constraints: > > operand 0: "=rk,r,r,r,rk,m" > operand 1: "rk, I,K,j,mi,rk" > > As r235184 won't explicitly refuse an unmatch CT_MEMORY operand, > alternative (alt) 4 got a chance to compete with alt 0, and eventually be > the winner as it's with rld_nregs=0 while alt 0 is with rld_nregs=1. > > I am thinking it's OK to give alt 4 a chance here, but we should calculate > the cost correctly > > For alt 4, it should be treated as a "Spill pseudo into memory" then there > will be reject+=3, but unfortunately the check for spill to memory is: > Sorry, I missed the PR. Yes, I think you are right. Probably the condition should be if (no_regs_p && ! (REG_P (op) && hard_regno[nop] < 0)) or just if (no_regs_p) as the control never reaches this point for a spilled pseudo. Of course, the print info should be changed inside the if-stmt as it is not only pseudo anymore. It would be nice if you prepare the patch. But we should be ready for new PRs as the code change might affect other targets (unfortunately, it is a very sensitive code). Thank you for the analysis. It saved a lot of my time. > if (no_regs_p && REG_P (op) && hard_regno[nop] >= 0) > > While the op for this case is not REG_P after equiv substitution. > > (plus:SI (reg/f:SI 102 sfp) > (const_int 4 [0x4])) > > >
[Bug rtl-optimization/70751] [7 Regression] FAIL: gcc.target/arm/eliminate.c scan-assembler-times r0,[\\t ]*sp 3 since r235184
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70751
--- Comment #2 from Jiong Wang ---
Vlad,
Do you have any comments on this regression?
*arm_movsi_insn has the following operand constraints:
operand 0: "=rk,r,r,r,rk,m"
operand 1: "rk, I,K,j,mi,rk"
As r235184 won't explicitly refuse an unmatch CT_MEMORY operand, alternative
(alt) 4 got a chance to compete with alt 0, and eventually be the winner as
it's with rld_nregs=0 while alt 0 is with rld_nregs=1.
I am thinking it's OK to give alt 4 a chance here, but we should calculate the
cost correctly
For alt 4, it should be treated as a "Spill pseudo into memory" then there
will be reject+=3, but unfortunately the check for spill to memory is:
if (no_regs_p && REG_P (op) && hard_regno[nop] >= 0)
While the op for this case is not REG_P after equiv substitution.
(plus:SI (reg/f:SI 102 sfp)
(const_int 4 [0x4]))
reloading check dump pasted:
before
===
Changing pseudo 110 in operand 1 of insn 6 on equiv sfp:SI+0x4
1 Non-pseudo reload: reject+=2
1 Non input pseudo reload: reject++
alt=0,overall=9,losers=1,rld_nregs=1
alt=1: Bad operand -- refuse
alt=2: Bad operand -- refuse
alt=3: Bad operand -- refuse
alt=4: Bad operand -- refuse
0 Non-pseudo reload: reject+=2
0 Spill pseudo into memory: reject+=3
0 Non input pseudo reload: reject++
alt=5,overall=12,losers=1 -- refuse
Choosing alt 0 in insn 6: (0) =rk (1) rk {*arm_movsi_insn}
after
===
Changing pseudo 110 in operand 1 of insn 6 on equiv sfp:SI+0x4
1 Non-pseudo reload: reject+=2
1 Non input pseudo reload: reject++
alt=0,overall=9,losers=1,rld_nregs=1
alt=1: Bad operand -- refuse
alt=2: Bad operand -- refuse
alt=3: Bad operand -- refuse
1 Non-pseudo reload: reject+=2
1 Non input pseudo reload: reject++
alt=4,overall=9,losers=1,rld_nregs=0
0 Non-pseudo reload: reject+=2
0 Spill pseudo into memory: reject+=3
0 Non input pseudo reload: reject++
alt=5,overall=12,losers=1 -- refuse
Choosing alt 4 in insn 6: (0) rk (1) mi {*arm_movsi_insn}
[Bug rtl-optimization/70751] [7 Regression] FAIL: gcc.target/arm/eliminate.c scan-assembler-times r0,[\\t ]*sp 3 since r235184
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70751 Ramana Radhakrishnan changed: What|Removed |Added Status|UNCONFIRMED |NEW Last reconfirmed||2016-04-23 CC||ramana at gcc dot gnu.org Ever confirmed|0 |1 --- Comment #1 from Ramana Radhakrishnan --- Confirmed.
[Bug rtl-optimization/70751] [7 Regression] FAIL: gcc.target/arm/eliminate.c scan-assembler-times r0,[\\t ]*sp 3 since r235184
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70751 Richard Biener changed: What|Removed |Added Keywords||missed-optimization, ra Target Milestone|--- |7.0 Summary|FAIL: |[7 Regression] FAIL: |gcc.target/arm/eliminate.c |gcc.target/arm/eliminate.c |scan-assembler-times|scan-assembler-times |r0,[\\t ]*sp 3 since|r0,[\\t ]*sp 3 since |r235184 |r235184
