[Bug rtl-optimization/79584] ICE in base_to_reg, at lra-constraints.c:2918
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79584 Alan Modra changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|--- |FIXED Target Milestone|--- |7.0 --- Comment #8 from Alan Modra --- Fixed
[Bug rtl-optimization/79584] ICE in base_to_reg, at lra-constraints.c:2918
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79584 --- Comment #7 from Alan Modra --- Author: amodra Date: Sat Feb 25 22:44:41 2017 New Revision: 245741 URL: https://gcc.gnu.org/viewcvs?rev=245741=gcc=rev Log: PR79584, ICE in base_to_reg PR rtl-optimization/79584 * lra-constraints.c (base_to_reg): Reload ad->base, the entire base, not ad->base_term, the reg within base. Remove assertion that ad->base == ad->base_term. Replace gen_int_mode using bogus mode with const0_rtx. Modified: trunk/gcc/ChangeLog trunk/gcc/lra-constraints.c
[Bug rtl-optimization/79584] ICE in base_to_reg, at lra-constraints.c:2918
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79584 --- Comment #6 from Pat Haugen --- (In reply to Alan Modra from comment #5) > I'd test powerpc64-linux bi-arch but the machine I normally use for BE > testing had a disk die, and instead of trying to set everything up again at > midnight, I'm going to bed and hoping Pat can handle bootstrap and > regression test.. Thanks for the patch Alan, bi-arch testing on BE went fine.
[Bug rtl-optimization/79584] ICE in base_to_reg, at lra-constraints.c:2918
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79584 --- Comment #5 from Alan Modra --- The patch passes ppc64le bootstrap but that isn't really the best target to test. I'd test powerpc64-linux bi-arch but the machine I normally use for BE testing had a disk die, and instead of trying to set everything up again at midnight, I'm going to bed and hoping Pat can handle bootstrap and regression test..
[Bug rtl-optimization/79584] ICE in base_to_reg, at lra-constraints.c:2918
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79584 Alan Modra changed: What|Removed |Added Status|NEW |ASSIGNED Assignee|unassigned at gcc dot gnu.org |amodra at gmail dot com --- Comment #4 from Alan Modra --- Created attachment 40813 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=40813=edit lra fix Patch currently under test
[Bug rtl-optimization/79584] ICE in base_to_reg, at lra-constraints.c:2918
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79584
Alan Modra changed:
What|Removed |Added
Status|ASSIGNED|NEW
Assignee|amodra at gmail dot com|unassigned at gcc dot
gnu.org
--- Comment #3 from Alan Modra ---
OK, so I'd forgotten what those equivalences are really saying. There isn't
anything really wrong with them. What we have in the testcase is
(set (reg1) (mem1))
(set (mem2) (reg1))
(set (reg2) (reg1))
The equivalence set up by add_store_equivs says this can be transformed to
(set (mem2) (mem1))
(nop)
(set (reg2) (mem2))
ie. all occurrences of reg1 be replaced with mem2.
The real problem occurs when we get to the last of the three insns.
(insn 11 17 10 2 (set (reg:SD 33 1)
(mem/j/c:SD (lo_sum:SI (reg/f:SI 160)
(symbol_ref:SI ("u") [flags 0x84] ))
[2 u.b+0 S4 A32]))
"/home/alan/src/gcc.git/gcc/testsuite/c-c++-common/dfp/pr35620.c":20 489
{movsd_hardfloat}
(nil))
This address form isn't valid for SDmode, and lra apparently doesn't know how
to deal with it. So while this may have been triggered by my ira change, that
change itself isn't at fault.
[Bug rtl-optimization/79584] ICE in base_to_reg, at lra-constraints.c:2918
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79584
Alan Modra changed:
What|Removed |Added
Status|UNCONFIRMED |ASSIGNED
Last reconfirmed||2017-02-21
CC||amodra at gmail dot com
Assignee|unassigned at gcc dot gnu.org |amodra at gmail dot com
Ever confirmed|0 |1
--- Comment #2 from Alan Modra ---
I don't see a -mno-lra ICE with r245619 (plus a few local patches), but do
reproduce the lra ICE. Coming out of ira the following insn sets the reg that
feeds into the insn that ICEs (the reg doesn't get a hard reg so the mem equiv
is used).
(insn 7 8 11 2 (set (reg:SI 155 [ i.0_1 ])
(mem/c:SI (lo_sum:SI (reg/f:SI 158)
(symbol_ref:SI ("i") [flags 0xc4] )) [1 i+0 S4 A32]))
"/home/alan/src/gcc.git/gcc/testsuite/c-c++-common/dfp/pr35620.c":18 480
{*movsi_internal1}
(expr_list:REG_DEAD (reg/f:SI 158)
(expr_list:REG_EQUIV (mem/j/c:SI (lo_sum:SI (reg/f:SI 160)
(symbol_ref:SI ("u") [flags 0x84] )) [2 u.b+0 S4 A32])
(nil
The REG_EQUIV is one from add_store_equivs. It looks quite bogus to me.
[Bug rtl-optimization/79584] ICE in base_to_reg, at lra-constraints.c:2918
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79584 Pat Haugen changed: What|Removed |Added CC||amodra at gcc dot gnu.org --- Comment #1 from Pat Haugen --- Bisected to r235659. Compiling with that revision and -fsched-pressure shows an ICE in reload, compiling with -fsched-pressure -mlra shows the LRA ICE.
