[Bug target/100760] [mips + msa] ICE: maximum number of generated reload insns per insn achieved

[syq at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100760

YunQiang Su  changed:

   What|Removed |Added

 Resolution|--- |FIXED
 CC||syq at gcc dot gnu.org
 Status|UNCONFIRMED |RESOLVED

--- Comment #3 from YunQiang Su  ---
Close it.

[Bug target/100760] [mips + msa] ICE: maximum number of generated reload insns per insn achieved

[cvs-commit at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100760

--- Comment #2 from CVS Commits  ---
The master branch has been updated by Xi Ruoyao :

https://gcc.gnu.org/g:82625a42e652d52fc6bbe6070f8d0589d5e0c8ad

commit r12-2183-g82625a42e652d52fc6bbe6070f8d0589d5e0c8ad
Author: Xi Ruoyao 
Date:   Fri Jun 18 20:11:42 2021 +0800

mips: check MSA support for vector modes [PR100760,PR100761,PR100762]

Check if the vector mode is really supported by MSA in certain cases,
instead of testing ISA_HAS_MSA.  Simply testing ISA_HAS_MSA can cause
ICE when MSA is enabled besides other MIPS SIMD extensions (notably,
Loongson MMI).

gcc/

PR target/100760
PR target/100761
PR target/100762
* config/mips/mips.c (mips_const_insns): Use MSA_SUPPORTED_MODE_P
instead of ISA_HAS_MSA.
(mips_expand_vec_unpack): Likewise.
(mips_expand_vector_init): Likewise.

gcc/testsuite/

PR target/100760
PR target/100761
PR target/100762
* gcc.target/mips/pr100760.c: New test.
* gcc.target/mips/pr100761.c: New test.
* gcc.target/mips/pr100762.c: New test.

[Bug target/100760] [mips + msa] ICE: maximum number of generated reload insns per insn achieved

[xry111 at mengyan1223 dot wang via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100760

Xi Ruoyao  changed:

   What|Removed |Added

 CC||xry111 at mengyan1223 dot wang

--- Comment #1 from Xi Ruoyao  ---
Patch proposed: https://gcc.gnu.org/pipermail/gcc-patches/2021-June/573213.html