https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113856

            Bug ID: 113856
           Summary: `(vect64 float){1.0f, 0}` code generation could just
                    be `fmov sN, 1.0f`
           Product: gcc
           Version: 14.0
            Status: UNCONFIRMED
          Keywords: missed-optimization
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: pinskia at gcc dot gnu.org
  Target Milestone: ---

Take:
```
#define vect64 __attribute__((vector_size(8) ))

vect64  float f1( float a)
{
  return (vect64 float){1.0f, 0};
}
vect64  float f2( float a)
{
  return (vect64 float){1.0f, 1.0f};
}
```

Currently GCC produces:
```
f1:
        adrp    x0, .LC0
        ldr     d0, [x0, #:lo12:.LC0]
        ret
f2:
        fmov    v0.2s, 1.0e+0
        ret
```


But f1 could be implemented using fmov also.
Like:
```
f1:
        fmov    s0, 1.0e+0
        ret
```

Reply via email to