[Bug target/115439] [15 Regression] ICEs after r15-638 on master-thumb_m55_hard_eabi
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115439 --- Comment #7 from Andrew Pinski --- (In reply to Robin Dapp from comment #6) > Are you going to post a patch? I was going to let the arm folks take care of it since I have no way to test it.
[Bug target/115439] [15 Regression] ICEs after r15-638 on master-thumb_m55_hard_eabi
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115439 --- Comment #6 from Robin Dapp --- Looks reasonable. That's what we were doing before in internal-fn.cc before expanding (except operands[2]). Are you going to post a patch?
[Bug target/115439] [15 Regression] ICEs after r15-638 on master-thumb_m55_hard_eabi
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115439
--- Comment #5 from Andrew Pinski ---
(In reply to Andrew Pinski from comment #4)
> I think something like this:
> ```
> [apinski@xeond2 arm]$ git diff mve.md
> diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md
> index 9fe51298cdc..8af4797e935 100644
> --- a/gcc/config/arm/mve.md
> +++ b/gcc/config/arm/mve.md
> @@ -6897,6 +6897,12 @@ (define_expand "vcond_mask_"
> (match_operand:MVE_VLD_ST 2 "s_register_operand")))]
>"TARGET_HAVE_MVE"
> {
> + if (!register_operand (operands[3], mode))
> +operands[3] = force_reg (operands[3]);
> + if (!register_operand (operands[1], mode))
> +operands[1] = force_reg (operands[1]);
> + if (!register_operand (operands[2], mode))
> +operands[1] = force_reg (operands[2]);
copy and pasto:`operands[1] = force_reg (operands[1]);` is the correct line for
above.
>switch (GET_MODE_CLASS (mode))
> {
>case MODE_VECTOR_INT:
>
> ```
> Signed-off-by: Andrew Pinski
[Bug target/115439] [15 Regression] ICEs after r15-638 on master-thumb_m55_hard_eabi
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115439
--- Comment #4 from Andrew Pinski ---
I think something like this:
```
[apinski@xeond2 arm]$ git diff mve.md
diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md
index 9fe51298cdc..8af4797e935 100644
--- a/gcc/config/arm/mve.md
+++ b/gcc/config/arm/mve.md
@@ -6897,6 +6897,12 @@ (define_expand "vcond_mask_"
(match_operand:MVE_VLD_ST 2 "s_register_operand")))]
"TARGET_HAVE_MVE"
{
+ if (!register_operand (operands[3], mode))
+operands[3] = force_reg (operands[3]);
+ if (!register_operand (operands[1], mode))
+operands[1] = force_reg (operands[1]);
+ if (!register_operand (operands[2], mode))
+operands[1] = force_reg (operands[2]);
switch (GET_MODE_CLASS (mode))
{
case MODE_VECTOR_INT:
```
Signed-off-by: Andrew Pinski
[Bug target/115439] [15 Regression] ICEs after r15-638 on master-thumb_m55_hard_eabi
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115439 --- Comment #3 from Carlos Eduardo Seo --- (In reply to Robin Dapp from comment #2) > We already discussed that briefly on the mailing list. Richard Sandiford > suspected a target bug. What options do I need to configure GCC in order to > reproduce that locally? You can reproduce exactly what is being done by the CI by following: https://git-us.linaro.org/toolchain/ci/interesting-commits.git/plain/gcc/sha1/7ca35f2e430081d6ec91e910002f92d9713350fa/tcwg_gnu_embed_check_gcc/master-thumb_m55_hard_eabi/reproduction_instructions.txt If you prefer to do it manually: configure SHELL=/bin/bash \ --with-mpc=/home/tcwg-buildslave/workspace/tcwg_gnu_1/abe/builds/destdir/x86_64-pc-linux-gnu \ --with-mpfr=/home/tcwg-buildslave/workspace/tcwg_gnu_1/abe/builds/destdir/x86_64-pc-linux-gnu \ --with-gmp=/home/tcwg-buildslave/workspace/tcwg_gnu_1/abe/builds/destdir/x86_64-pc-linux-gnu \ --with-gnu-as \ --with-gnu-ld \ --disable-libmudflap \ --enable-lto \ --enable-shared \ --without-included-gettext \ --enable-nls \ --with-system-zlib \ --disable-sjlj-exceptions \ --enable-gnu-unique-object \ --enable-linker-build-id \ --disable-libstdcxx-pch \ --enable-c99 \ --enable-clocale=gnu \ --enable-libstdcxx-debug \ --enable-long-long \ --with-cloog=no \ --with-ppl=no \ --with-isl=no \ --enable-threads=no \ --disable-multiarch \ --disable-multilib \ --with-mode=thumb \ --with-arch=armv8.1-m.main+mve.fp+fp.dp \ --with-float=hard \ --with-sysroot=/home/tcwg-buildslave/workspace/tcwg_gnu_1/abe/builds/destdir/x86_64-pc-linux-gnu/arm-eabi \ --with-headers=yes \ --with-native-system-header-dir=/include \ --with-newlib \ --enable-checking=yes \ --disable-bootstrap \ --enable-languages=c,c++,lto \ --prefix=/home/tcwg-buildslave/workspace/tcwg_gnu_1/abe/builds/destdir/x86_64-pc-linux-gnu \ --build=x86_64-pc-linux-gnu \ --host=x86_64-pc-linux-gnu \ --target=arm-eabi
[Bug target/115439] [15 Regression] ICEs after r15-638 on master-thumb_m55_hard_eabi
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115439 Robin Dapp changed: What|Removed |Added CC||rdapp at gcc dot gnu.org --- Comment #2 from Robin Dapp --- We already discussed that briefly on the mailing list. Richard Sandiford suspected a target bug. What options do I need to configure GCC in order to reproduce that locally?
[Bug target/115439] [15 Regression] ICEs after r15-638 on master-thumb_m55_hard_eabi
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115439 --- Comment #1 from Andrew Pinski --- https://gcc.gnu.org/pipermail/gcc-patches/2024-June/654086.html
[Bug target/115439] [15 Regression] ICEs after r15-638 on master-thumb_m55_hard_eabi
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115439 Andrew Pinski changed: What|Removed |Added Target||arm-eabi Component|c++ |target Summary|[Regression] ICEs after |[15 Regression] ICEs after |7ca35f2e43 on |r15-638 on |master-thumb_m55_hard_eabi |master-thumb_m55_hard_eabi Keywords||ice-on-valid-code Target Milestone|--- |15.0
