[Bug target/19102] [3.4 Regression] -march=pentium3 breaks linux kernel compiles w/ gcc-3_4-branch as of 2004/12/20

2004-12-22 Thread ebotcazou at gcc dot gnu dot org

--- Additional Comments From ebotcazou at gcc dot gnu dot org  2004-12-22 
11:27 ---
Introduced with:

2004-12-19  Richard Henderson  [EMAIL PROTECTED]

* config/i386/i386.c (ix86_hard_regno_mode_ok): Always accept all SSE,
MMX, 3DNOW modes in SSE registers; always accept all MMX, 3DNOW modes
in MMX registers.
* config/i386/i386.h (VALID_SSE2_REG_MODE): Don't include
VALID_MMX_REG_MODE.
* config/i386/i386.md (movv4sf_internal, movv4si_internal, 
movv2di_internal, movv2si_internal, movv4hi_internal,
movv2sf_internal, movv2df_internal, movv8hi_internal,
movv16qi_internal, movti_internal): Add leading '*' to name.
(movv2di_internal, movv2df_internal, movv8hi_internal,
movv16qi_internal, movv2df, movv8hi, movv16qi, movv2di,
pushv2di, pushv8hi, pushv16qi): Enable for SSE1.
(movv2si_internal, movv4hi_internal): Add SSE alternatives.
(movv8qi_internal, movv2sf_internal): Likewise.
(movtf): Simplify conditional.
(movv2sf, pushv2sf): Enable for MMX.


-- 
   What|Removed |Added

   Last reconfirmed|2004-12-21 12:22:41 |2004-12-22 11:27:44
   date||


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=19102


[Bug target/19102] [3.4 Regression] -march=pentium3 breaks linux kernel compiles w/ gcc-3_4-branch as of 2004/12/20

2004-12-22 Thread ebotcazou at gcc dot gnu dot org

--- Additional Comments From ebotcazou at gcc dot gnu dot org  2004-12-22 
11:43 ---
Investigating.


-- 
   What|Removed |Added

 AssignedTo|unassigned at gcc dot gnu   |ebotcazou at gcc dot gnu dot
   |dot org |org
 Status|NEW |ASSIGNED


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=19102


[Bug target/19102] [3.4 Regression] -march=pentium3 breaks linux kernel compiles w/ gcc-3_4-branch as of 2004/12/20

2004-12-22 Thread ebotcazou at gcc dot gnu dot org

--- Additional Comments From ebotcazou at gcc dot gnu dot org  2004-12-22 
12:24 ---
Why do we allow MMX modes in SSE regs now?  The following patchlet is sufficient
to fix the problem:

Index: config/i386/i386.c
===
RCS file: /cvs/gcc/gcc/gcc/config/i386/i386.c,v
retrieving revision 1.635.2.18
diff -u -p -r1.635.2.18 i386.c
--- config/i386/i386.c  20 Dec 2004 05:37:36 -  1.635.2.18
+++ config/i386/i386.c  22 Dec 2004 12:21:42 -
@@ -14931,9 +14931,7 @@ ix86_hard_regno_mode_ok (int regno, enum
  out of SSE registers, even when no operation instructions
  are available.  */
   return (VALID_SSE_REG_MODE (mode)
- || VALID_SSE2_REG_MODE (mode)
- || VALID_MMX_REG_MODE (mode)
- || VALID_MMX_REG_MODE_3DNOW (mode));
+ || VALID_SSE2_REG_MODE (mode));
 }
   if (MMX_REGNO_P (regno))
 {


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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=19102


[Bug target/19102] [3.4 Regression] -march=pentium3 breaks linux kernel compiles w/ gcc-3_4-branch as of 2004/12/20

2004-12-22 Thread ebotcazou at gcc dot gnu dot org

--- Additional Comments From ebotcazou at gcc dot gnu dot org  2004-12-22 
18:49 ---
I can't do much more at this point.


-- 
   What|Removed |Added

 CC||ebotcazou at gcc dot gnu dot
   ||org
 AssignedTo|ebotcazou at gcc dot gnu dot|unassigned at gcc dot gnu
   |org |dot org
 Status|ASSIGNED|NEW


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=19102


[Bug target/19102] [3.4 Regression] -march=pentium3 breaks linux kernel compiles w/ gcc-3_4-branch as of 2004/12/20

2004-12-22 Thread rth at gcc dot gnu dot org

--- Additional Comments From rth at gcc dot gnu dot org  2004-12-22 19:12 
---
Subject: Re:  [3.4 Regression] -march=pentium3 breaks linux kernel compiles w/ 
gcc-3_4-branch as of 2004/12/20

 Why do we allow MMX modes in SSE regs now?

Because x86-64 calling conventions demand it.


r~


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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=19102


[Bug target/19102] [3.4 Regression] -march=pentium3 breaks linux kernel compiles w/ gcc-3_4-branch as of 2004/12/20

2004-12-22 Thread ebotcazou at gcc dot gnu dot org

--- Additional Comments From ebotcazou at gcc dot gnu dot org  2004-12-22 
20:24 ---
  Why do we allow MMX modes in SSE regs now?
 
 Because x86-64 calling conventions demand it.

The calling conventions for vector types I presume?  The problem is that SImode
slipped through the cracks so the register allocator now jumps from SIREG to
INT_SSE_REGS for SImode pseudos.  Is that an unintended side-effect?


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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=19102


[Bug target/19102] [3.4 Regression] -march=pentium3 breaks linux kernel compiles w/ gcc-3_4-branch as of 2004/12/20

2004-12-22 Thread pinskia at gcc dot gnu dot org


-- 
   What|Removed |Added

   Severity|critical|normal


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=19102


[Bug target/19102] [3.4 Regression] -march=pentium3 breaks linux kernel compiles w/ gcc-3_4-branch as of 2004/12/20

2004-12-22 Thread ebotcazou at gcc dot gnu dot org

--- Additional Comments From ebotcazou at gcc dot gnu dot org  2004-12-22 
23:18 ---
 And, actually, we allowed MMX modes with -msse2 before, so there must be 
 another 
 explanation of why things wouldn't have been failing with -march=pentium4.

Allocation ordering considerations?


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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=19102


[Bug target/19102] [3.4 Regression] -march=pentium3 breaks linux kernel compiles w/ gcc-3_4-branch as of 2004/12/20

2004-12-22 Thread rth at gcc dot gnu dot org

--- Additional Comments From rth at gcc dot gnu dot org  2004-12-22 23:27 
---
Apparently register move costs.

Testing a Large Hack to prevent this suddenly appearing on the 3.4 branch.

For mainline, move pattern constraints should be fixed, and folks will have
to make sure to use -mno-sse when sse is not desired.  Plus, -mno-sse will
have to be fixed such that it's effective when -march implies sse[23], and
we'll have to add extra code to not ICE on x86-64 when the ABI specifies
that parameters go in disabled registers.

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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=19102


[Bug target/19102] [3.4 Regression] -march=pentium3 breaks linux kernel compiles w/ gcc-3_4-branch as of 2004/12/20

2004-12-22 Thread ak at muc dot de

--- Additional Comments From ak at muc dot de  2004-12-22 23:53 ---
FWIW i compiled a full 3.3-hammer compiled 2.6.10rc3 x86-64 kernel
for suspicious use of %xmm or %mm and there wasn't any.

There also is a warning in all 2.6 x86-64 kernels for kernel FPU use at runtime.

So at least on x86-64 it doesn't seem to be a real issue in practice.


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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=19102


[Bug target/19102] [3.4 Regression] -march=pentium3 breaks linux kernel compiles w/ gcc-3_4-branch as of 2004/12/20

2004-12-22 Thread cvs-commit at gcc dot gnu dot org

--- Additional Comments From cvs-commit at gcc dot gnu dot org  2004-12-23 
01:31 ---
Subject: Bug 19102

CVSROOT:/cvs/gcc
Module name:gcc
Branch: gcc-3_4-branch
Changes by: [EMAIL PROTECTED]   2004-12-23 01:31:20

Modified files:
gcc: ChangeLog 
gcc/config/i386: i386.c 

Log message:
PR target/19102
* config/i386/i386.c (x86_inter_unit_moves): Disable.
(ix86_hard_regno_mode_ok): Disallow SSE2 and MMX scalar modes
in SSE registers when only SSE1 enabled.

Patches:
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/ChangeLog.diff?cvsroot=gcconly_with_tag=gcc-3_4-branchr1=2.2326.2.750r2=2.2326.2.751
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/config/i386/i386.c.diff?cvsroot=gcconly_with_tag=gcc-3_4-branchr1=1.635.2.18r2=1.635.2.19



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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=19102


[Bug target/19102] [3.4 Regression] -march=pentium3 breaks linux kernel compiles w/ gcc-3_4-branch as of 2004/12/20

2004-12-22 Thread rth at gcc dot gnu dot org

--- Additional Comments From rth at gcc dot gnu dot org  2004-12-23 01:40 
---
http://gcc.gnu.org/ml/gcc-patches/2004-12/msg01777.html

-- 
   What|Removed |Added

 Status|ASSIGNED|RESOLVED
 Resolution||FIXED


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=19102


[Bug target/19102] [3.4 Regression] -march=pentium3 breaks linux kernel compiles w/ gcc-3_4-branch as of 2004/12/20

2004-12-21 Thread belyshev at lubercy dot com

--- Additional Comments From belyshev at lubercy dot com  2004-12-21 12:22 
---
/* reduced testcase, use -O1 -march=pentium3 */

int unknown_bootoption (void)
{
  int i, j, k, l;
  for (i = 0; i  2; i++)
  asm volatile(
   :=a (j), =S (k), =c (l)
   :1 (0), 2 (0));
  return 0;
}


-- 
   What|Removed |Added

 CC||rth at gcc dot gnu dot org
   Severity|normal  |critical
 Status|UNCONFIRMED |NEW
  Component|c   |target
 Ever Confirmed||1
  GCC build triplet|i686-ark-linux  |
   GCC host triplet|i686-ark-linux  |
 GCC target triplet|i686-ark-linux  |i686-*-*
   Keywords||ice-on-valid-code
   Last reconfirmed|-00-00 00:00:00 |2004-12-21 12:22:41
   date||
Summary|-march=pentium3 breaks linux|[3.4 Regression] -
   |kernel compiles w/ gcc-3_4- |march=pentium3 breaks linux
   |branch as of 2004/12/20 |kernel compiles w/ gcc-3_4-
   ||branch as of 2004/12/20
   Target Milestone|--- |3.4.4


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=19102


[Bug target/19102] [3.4 Regression] -march=pentium3 breaks linux kernel compiles w/ gcc-3_4-branch as of 2004/12/20

2004-12-21 Thread pinskia at gcc dot gnu dot org

--- Additional Comments From pinskia at gcc dot gnu dot org  2004-12-21 
16:44 ---
Hmm, it worked with 2004-12-11.

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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=19102


[Bug target/19102] [3.4 Regression] -march=pentium3 breaks linux kernel compiles w/ gcc-3_4-branch as of 2004/12/20

2004-12-21 Thread bero at arklinux dot org

--- Additional Comments From bero at arklinux dot org  2004-12-21 17:55 
---
Worked in 2004-12-17 too, broken in 2004-12-20 and 2004-12-21 (I don't have 
-18 and -19) 

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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=19102


[Bug target/19102] [3.4 Regression] -march=pentium3 breaks linux kernel compiles w/ gcc-3_4-branch as of 2004/12/20

2004-12-21 Thread bero at arklinux dot org

--- Additional Comments From bero at arklinux dot org  2004-12-21 18:00 
---
Must be a cc1 issue - 2004-12-21 with 
2004-12-17's /usr/libexec/gcc/*/3.4.4/cc1 works 

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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=19102