[Bug target/20614] PowerPC - inefficient use of condition register

[segher at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=20614

Segher Boessenkool  changed:

   What|Removed |Added

 Status|NEW |RESOLVED
 CC||segher at gcc dot gnu.org
 Resolution|--- |FIXED

--- Comment #7 from Segher Boessenkool  ---
At least as far back as 4.9 GCC does no longer generate subfic; is uses
a mix of cntlzw/srwi, addic/subfe, and cmpw insns.  Using more than three
CR fields is a bad idea (you then need to save and restore CR, which is
expensive on any CPU).

No doubt we could generate better code for this, but the reported
problem is no longer there, so I'm closing this bug.

[Bug target/20614] PowerPC - inefficient use of condition register

[pinskia at gcc dot gnu dot org]

--- Comment #6 from pinskia at gcc dot gnu dot org  2006-07-19 16:34 ---
This more important with the Cell than most other PowerPCs.


-- 

pinskia at gcc dot gnu dot org changed:

   What|Removed |Added

   Last reconfirmed|2006-01-08 05:21:13 |2006-07-19 16:34:51
   date||


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=20614

[Bug target/20614] PowerPC - inefficient use of condition register

[pinskia at gcc dot gnu dot org]

--- Comment #5 from pinskia at gcc dot gnu dot org  2005-10-04 06:18 ---
I should note on the 970 (fx at least), logical cr instructions can only appear
in the first dispatch group.
(Table6-6. Instructions with Group Formation Restrictions).


-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=20614

[Bug target/20614] PowerPC - inefficient use of condition register

[dje at gcc dot gnu dot org]

--- Additional Comments From dje at gcc dot gnu dot org  2005-09-18 15:57 
---
Generating cmpw to different CRs instead of a sequence operating on GPRs does
not help unless bool variables can be assigned to CRs.  Using cmpw currently
causes GCC to move the result from a CR to a GPR using mfcr and a shift -- the
same number of instructions as the GPR sequence (now using cntlzw).  Without
bools assigned to CRs and using crand instruction, cmpw is not a win for
performance or code size by itself.  Using CRs to store bool user variables is
on the list of useful enhancements.

-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=20614

[Bug target/20614] PowerPC - inefficient use of condition register

[pinskia at gcc dot gnu dot org]

--- Additional Comments From pinskia at gcc dot gnu dot org  2005-03-24 
06:22 ---
This is actually a target issue.

Anyways confirmed.

I think there is another bug about this or a discussion somewhere which talks 
about this.

-- 
   What|Removed |Added

 CC||pinskia at gcc dot gnu dot
   ||org
 Status|UNCONFIRMED |NEW
  Component|rtl-optimization|target
 Ever Confirmed||1
 GCC target triplet|powerpc-apple-darwin7.7.0   |powerpc*-*-*
   Keywords||missed-optimization
   Last reconfirmed|-00-00 00:00:00 |2005-03-24 06:22:13
   date||


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=20614

[Bug target/20614] PowerPC - inefficient use of condition register

[pinskia at gcc dot gnu dot org]

--- Additional Comments From pinskia at gcc dot gnu dot org  2005-03-24 
06:25 ---
Though I don't know how much this buys you on any of the current PPCs.  From 
the G3/G4 to the 970.  
In fact the 970 this could make it worse but I could be wrong.

-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=20614

[Bug target/20614] PowerPC - inefficient use of condition register

[astrange at ithinksw dot com]

--- Additional Comments From astrange at ithinksw dot com  2005-03-24 06:39 
---
It buys two cycles per compare on a G3/G4 (as well as not clobbering cr0, which 
one of the gcc patterns 
does). It also saves 2/3s of the code size, which is what -Os is targeting. Not 
much, but the realworld 
version of this will take all the speed it can get.

-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=20614