[Bug target/27772] mr instruction with odd-numbered register created

2006-05-26 Thread rguenth at gcc dot gnu dot org


--- Comment #1 from rguenth at gcc dot gnu dot org  2006-05-26 10:32 ---
Created an attachment (id=11515)
 -- (http://gcc.gnu.org/bugzilla/attachment.cgi?id=11515action=view)
preprocessed source


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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=27772



[Bug target/27772] mr instruction with odd-numbered register created

2006-05-26 Thread uweigand at gcc dot gnu dot org


--- Comment #2 from uweigand at gcc dot gnu dot org  2006-05-26 12:58 
---
This looks like a source-code problem.  The assembler instruction

 union {DItype __ll; struct {USItype __h, __l;} __i; } __x;
 __asm__ (lr %N0,%1\n\tmr %0,%2 : =r (__x.__ll)
  : r (__xm0), r (__xm1));

fundamentally assumes __ll is in fact of mode DImode, as the type name
DItype suggests -- that's (on 32-bit) what causes reload to allocate a
register *pair* for the %0 operand.

However, in your mul.i file, that type is defined as:

typedef long int DItype;

which happens to be in fact SImode ...


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uweigand at gcc dot gnu dot org changed:

   What|Removed |Added

 Status|UNCONFIRMED |RESOLVED
 Resolution||INVALID


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=27772