[Bug target/41076] [avr] pessimal code for logical OR of 8-bit fields
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=41076 --- Comment #10 from Georg-Johann Lay --- Author: gjl Date: Mon Oct 2 11:31:03 2017 New Revision: 253343 URL: https://gcc.gnu.org/viewcvs?rev=253343&root=gcc&view=rev Log: PR target/41076 * confg/avr/avr.md (*iorhi3.ashift8-ext.zerox): Add "r,r,0" alternative. Modified: trunk/gcc/ChangeLog trunk/gcc/config/avr/avr.md
[Bug target/41076] [avr] pessimal code for logical OR of 8-bit fields
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=41076 Georg-Johann Lay changed: What|Removed |Added Status|REOPENED|RESOLVED Resolution|--- |FIXED Target Milestone|--- |7.0 --- Comment #9 from Georg-Johann Lay --- Fixed in v7 (hope so).
[Bug target/41076] [avr] pessimal code for logical OR of 8-bit fields
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=41076 --- Comment #8 from Georg-Johann Lay --- Author: gjl Date: Mon Nov 28 08:40:11 2016 New Revision: 242907 URL: https://gcc.gnu.org/viewcvs?rev=242907&root=gcc&view=rev Log: PR 41076 * config/avr/avr.md (SPLIT34): New mode iterator. (bitop): New code iterator. (*iorhi3.ashift8-*). New insn-and-split patterns. (*movhi): Post-reload split reg = 0. [!MOVW]: Post-reload split reg = reg. (*mov) [SI,SF,PSI,SQ,USQ,SA,USA]: Post-reload split reg = reg. (andhi3, andpsi3, andsi3): Post-reload split reg-reg operations. (iorhi3, iorpsi3, iorsi3): Same. (xorhi3, xorpsi3, xorsi3): Same. * config/avr/avr.c (avr_rtx_costs_1) [IOR && HImode]: Adjust rtx costs to *iorhi3.ashift8-* patterns. Modified: trunk/gcc/ChangeLog trunk/gcc/config/avr/avr.c trunk/gcc/config/avr/avr.md
[Bug target/41076] [avr] pessimal code for logical OR of 8-bit fields
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=41076 Georg-Johann Lay changed: What|Removed |Added CC||matthijs at stdin dot nl --- Comment #7 from Georg-Johann Lay --- *** Bug 60145 has been marked as a duplicate of this bug. ***
[Bug target/41076] [avr] pessimal code for logical OR of 8-bit fields
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=41076
Georg-Johann Lay changed:
What|Removed |Added
Status|RESOLVED|REOPENED
Resolution|FIXED |
Target Milestone|4.7.1 |---
Severity|enhancement |normal
--- Comment #6 from Georg-Johann Lay 2013-01-22
22:31:11 UTC ---
(In reply to comment #5)
> Fixed I suppose.
Unfortunately, not
extern unsigned char read8 (void);
unsigned short read16 (void)
{
unsigned char lo, hi;
hi = read8();
lo = read8();
return lo | hi << 8;
}
with 4.8.0 -S -Os the compiler needs 5 instructions (29, 37, 30, 38) for an
operation that is basically a no-op:
read16:
push r28 ; 31pushqi1/1[length = 1]
/* prologue: function */
/* frame size = 0 */
/* stack size = 1 */
.L__stack_usage = 1
call read8 ; 5call_value_insn/2[length = 2]
mov r28,r24 ; 6movqi_insn/1[length = 1]
call read8 ; 7call_value_insn/2[length = 2]
mov r18,r28 ; 28movqi_insn/1[length = 1]
ldi r19,0 ; 29movqi_insn/1[length = 1]
mov r19,r18 ; 37*ashlhi3_const/3[length = 2]
clr r18
or r18,r24 ; 30iorqi3/1[length = 1]
movw r24,r18 ; 38*movhi/1[length = 1]
/* epilogue start */
pop r28 ; 34popqi[length = 1]
ret ; 35return_from_epilogue[length = 1]
[Bug target/41076] [avr] pessimal code for logical OR of 8-bit fields
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=41076 Richard Guenther changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution||FIXED --- Comment #5 from Richard Guenther 2012-07-02 13:52:40 UTC --- Fixed I suppose.
[Bug target/41076] [avr] pessimal code for logical OR of 8-bit fields
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=41076 Richard Guenther changed: What|Removed |Added Target Milestone|4.7.0 |4.7.1 --- Comment #4 from Richard Guenther 2012-03-22 08:26:23 UTC --- GCC 4.7.0 is being released, adjusting target milestone.
[Bug target/41076] [avr] pessimal code for logical OR of 8-bit fields
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=41076 Georg-Johann Lay changed: What|Removed |Added Target|avr-elf |avr Priority|P3 |P4 Version|unknown |4.6.1 Target Milestone|--- |4.7.0 Severity|normal |enhancement
[Bug target/41076] [avr] pessimal code for logical OR of 8-bit fields
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=41076 Georg-Johann Lay changed: What|Removed |Added Status|UNCONFIRMED |ASSIGNED Last reconfirmed||2011-09-11 AssignedTo|unassigned at gcc dot |gjl at gcc dot gnu.org |gnu.org | Ever Confirmed|0 |1 --- Comment #3 from Georg-Johann Lay 2011-09-11 20:59:28 UTC --- Created attachment 25242 --> http://gcc.gnu.org/bugzilla/attachment.cgi?id=25242 Some test cases
[Bug target/41076] [avr] pessimal code for logical OR of 8-bit fields
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=41076
--- Comment #2 from Georg-Johann Lay 2011-05-16
14:20:25 UTC ---
Author: gjl
Date: Mon May 16 14:20:19 2011
New Revision: 173792
URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=173792
Log:
PR target/27663
PR target/41076
* config/avr/predicates.md (const_8_16_24_operand): New predicate.
* config/avr/avr.md ("*iorqi.byte0",
"*iorqi.byte1-3"): New define_insn_and_split patterns.
Modified:
trunk/gcc/ChangeLog
trunk/gcc/config/avr/avr.md
trunk/gcc/config/avr/predicates.md
[Bug target/41076] [avr] pessimal code for logical OR of 8-bit fields
--- Comment #1 from rguenth at gcc dot gnu dot org 2009-08-15 09:55 --- because this is what C says you are doing: return (unsigned short) ((int) a | ((int) b << 8)); which is harder to transform back into what you expect. -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=41076
