http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50449

             Bug #: 50449
           Summary: [avr] Loading some 32 constants not optimal
    Classification: Unclassified
           Product: gcc
           Version: 4.7.0
            Status: UNCONFIRMED
          Keywords: missed-optimization
          Severity: minor
          Priority: P3
         Component: target
        AssignedTo: unassig...@gcc.gnu.org
        ReportedBy: g...@gcc.gnu.org
            Target: avr


The following code

register long long X1 asm ("16");
register long X2 asm ("24");
register int X3 asm ("30");

void foo (void)
{
    register long r asm ("12") = 1 << 2;
    asm volatile (" "::"r"(r));
}

compiled with
avr-gcc-4.6.1 -S -Os -dp -mmcu=atmegs8
loads the cpmstant as

    clr r12     ;  5    *movsi/6    [length = 5]
    clr r13
    movw r14,r12
    set
    bld r12,2

whereas 4.7.0 will print something like

    set
    clr r12
    bld r12,2
    clr r13
    clr r14
    clr r15

i.e. it uses one instruction more because of the changes to output_movsisf in
http://gcc.gnu.org/viewcvs?view=revision&revision=175956 .

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