[Bug target/56313] aarch64 backend not using fmls instruction
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=56313 Ramana Radhakrishnan ramana at gcc dot gnu.org changed: What|Removed |Added CC||ramana at gcc dot gnu.org --- Comment #3 from Ramana Radhakrishnan ramana at gcc dot gnu.org --- 4.9 and trunk both generate. foo: adrpx0, .LANCHOR0 add x0, x0, :lo12:.LANCHOR0 add x2, x0, 8 add x1, x0, 16 ldr d0, [x0] ldr d2, [x2] ldr d1, [x1] fmlsv0.2s, v2.2s, v1.2s str d0, [x0] ret
[Bug target/56313] aarch64 backend not using fmls instruction
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=56313 Richard Earnshaw rearnsha at gcc dot gnu.org changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|--- |FIXED Target Milestone|--- |4.9.0 --- Comment #2 from Richard Earnshaw rearnsha at gcc dot gnu.org --- Fixed on trunk. Probably with: 2013-09-16 James Greenhalgh james.greenha...@arm.com * config/aarch64/aarch64-simd-builtins.def (fma): New. * config/aarch64/aarch64-simd.md (aarch64_mla_eltmode): New. (aarch64_mla_elt_vswap_width_namemode): Likewise. (aarch64_mls_eltmode): Likewise. (aarch64_mls_elt_vswap_width_namemode): Likewise. (aarch64_fma4_eltmode): Likewise. (aarch64_fma4_elt_vswap_width_namemode): Likewise. (aarch64_fma4_elt_to_128v2df): Likewise. (aarch64_fma4_elt_to_64df): Likewise. (fnmamode4): Likewise. (aarch64_fnma4_eltmode): Likewise. (aarch64_fnma4_elt_vswap_width_namemode): Likewise. (aarch64_fnma4_elt_to_128v2df): Likewise. (aarch64_fnma4_elt_to_64df): Likewise. * config/aarch64/iterators.md (VDQSF): New. * config/aarch64/arm_neon.h (vfmassdq_laneq_f32, 64): Convert to C implementation. (vmlsaq_laneq_fsu16, 32, 64): Likewise.
[Bug target/56313] aarch64 backend not using fmls instruction
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=56313 --- Comment #1 from Joshua Conner josh.m.conner at gmail dot com 2013-02-14 01:39:55 UTC --- In case it helps, the pattern for aarch64_vmlsmode is written as: (set (op0) (minus (op1) (mult (op2) (op3 Restructuring this to: (set (op0) (fma (neg (op1)) (op2) (op3))) Allows the combiner to take advantage of the pattern.