[Bug target/61330] [5 Regression] Thumb ICE for case 920507-1.c

[yroux at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61330

--- Comment #9 from Yvan Roux yroux at gcc dot gnu.org ---
Author: yroux
Date: Wed Sep  3 07:23:01 2014
New Revision: 214847

URL: https://gcc.gnu.org/viewcvs?rev=214847root=gccview=rev
Log:
gcc/
2014-09-03  Yvan Roux  yvan.r...@linaro.org

Backport from trunk r214526.
2014-08-26  Joseph Myers  jos...@codesourcery.com

PR target/60606
PR target/61330
* varasm.c (make_decl_rtl): Clear DECL_ASSEMBLER_NAME and
DECL_HARD_REGISTER and return for invalid register specifications.
* cfgexpand.c (expand_one_var): If expand_one_hard_reg_var clears
DECL_HARD_REGISTER, call expand_one_error_var.
* config/arm/arm.c (arm_hard_regno_mode_ok): Do not allow
CC_REGNUM with non-MODE_CC modes.
(arm_regno_class): Return NO_REGS for PC_REGNUM.

gcc/testsuite/
2014-09-03  Yvan Roux  yvan.r...@linaro.org

Backport from trunk r214526.
2014-08-26  Joseph Myers  jos...@codesourcery.com

PR target/60606
PR target/61330
* gcc.dg/torture/pr60606-1.c, gcc.target/arm/pr60606-2.c,
gcc.target/arm/pr60606-3.c, gcc.target/arm/pr60606-4.c: New tests.


Added:
branches/linaro/gcc-4_9-branch/gcc/testsuite/gcc.dg/torture/pr60606-1.c
branches/linaro/gcc-4_9-branch/gcc/testsuite/gcc.target/arm/pr60606-2.c
branches/linaro/gcc-4_9-branch/gcc/testsuite/gcc.target/arm/pr60606-3.c
branches/linaro/gcc-4_9-branch/gcc/testsuite/gcc.target/arm/pr60606-4.c
Modified:
branches/linaro/gcc-4_9-branch/gcc/ChangeLog.linaro
branches/linaro/gcc-4_9-branch/gcc/cfgexpand.c
branches/linaro/gcc-4_9-branch/gcc/config/arm/arm.c
branches/linaro/gcc-4_9-branch/gcc/testsuite/ChangeLog.linaro
branches/linaro/gcc-4_9-branch/gcc/varasm.c

[Bug target/61330] [5 Regression] Thumb ICE for case 920507-1.c

[jsm28 at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61330

--- Comment #7 from Joseph S. Myers jsm28 at gcc dot gnu.org ---
Author: jsm28
Date: Tue Aug 26 17:06:31 2014
New Revision: 214526

URL: https://gcc.gnu.org/viewcvs?rev=214526root=gccview=rev
Log:
Fix ARM ICE for register var asm (pc) (PR target/60606).

PR target/60606
PR target/61330
* varasm.c (make_decl_rtl): Clear DECL_ASSEMBLER_NAME and
DECL_HARD_REGISTER and return for invalid register specifications.
* cfgexpand.c (expand_one_var): If expand_one_hard_reg_var clears
DECL_HARD_REGISTER, call expand_one_error_var.
* config/arm/arm.c (arm_hard_regno_mode_ok): Do not allow
CC_REGNUM with non-MODE_CC modes.
(arm_regno_class): Return NO_REGS for PC_REGNUM.

testsuite:
* gcc.dg/torture/pr60606-1.c, gcc.target/arm/pr60606-2.c,
gcc.target/arm/pr60606-3.c, gcc.target/arm/pr60606-4.c: New tests.

Added:
trunk/gcc/testsuite/gcc.dg/torture/pr60606-1.c
trunk/gcc/testsuite/gcc.target/arm/pr60606-2.c
trunk/gcc/testsuite/gcc.target/arm/pr60606-3.c
trunk/gcc/testsuite/gcc.target/arm/pr60606-4.c
Modified:
trunk/gcc/ChangeLog
trunk/gcc/cfgexpand.c
trunk/gcc/config/arm/arm.c
trunk/gcc/testsuite/ChangeLog
trunk/gcc/varasm.c

[Bug target/61330] [5 Regression] Thumb ICE for case 920507-1.c

[jsm28 at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61330

Joseph S. Myers jsm28 at gcc dot gnu.org changed:

   What|Removed |Added

 Status|NEW |RESOLVED
 Resolution|--- |FIXED

--- Comment #8 from Joseph S. Myers jsm28 at gcc dot gnu.org ---
Fixed for GCC 5.